Running rebuild.sh found a few changes to be updated to
vm/mterp/out/InterpAsm-mips.S and
vm/mterp/out/InterpC-mips.cpp
diff --git a/vm/mterp/out/InterpAsm-mips.S b/vm/mterp/out/InterpAsm-mips.S
index dbb488b..734ae91 100644
--- a/vm/mterp/out/InterpAsm-mips.S
+++ b/vm/mterp/out/InterpAsm-mips.S
@@ -15192,7 +15192,7 @@
     addu      rOBJ, rOBJ, a3               #  form address
         #  noop                            #  releasing store
     sw a0, (rOBJ)                      #  obj.field (8/16/32 bits) <- a0
-    # noop
+    # noop 
     GOTO_OPCODE(t0)                        #  jump to next instruction
 
 
@@ -15286,7 +15286,7 @@
     addu      rOBJ, rOBJ, a3               #  form address
         #  noop                            #  releasing store
     sw a0, (rOBJ)                      #  obj.field (8/16/32 bits) <- a0
-    # noop
+    # noop 
     GOTO_OPCODE(t0)                        #  jump to next instruction
 
 
@@ -15315,7 +15315,7 @@
     addu      rOBJ, rOBJ, a3               #  form address
         #  noop                            #  releasing store
     sw a0, (rOBJ)                      #  obj.field (8/16/32 bits) <- a0
-    # noop
+    # noop 
     GOTO_OPCODE(t0)                        #  jump to next instruction
 
 
@@ -15344,7 +15344,7 @@
     addu      rOBJ, rOBJ, a3               #  form address
         #  noop                            #  releasing store
     sw a0, (rOBJ)                      #  obj.field (8/16/32 bits) <- a0
-    # noop
+    # noop 
     GOTO_OPCODE(t0)                        #  jump to next instruction
 
 
@@ -15373,7 +15373,7 @@
     addu      rOBJ, rOBJ, a3               #  form address
         #  noop                            #  releasing store
     sw a0, (rOBJ)                      #  obj.field (8/16/32 bits) <- a0
-    # noop
+    # noop 
     GOTO_OPCODE(t0)                        #  jump to next instruction
 
 
@@ -15462,7 +15462,7 @@
     GET_INST_OPCODE(t0)                    #  extract opcode from rINST
           #  no-op                             #  releasing store
     sw        a1, offStaticField_value(a0) #  field <- vBBBB
-          #  no-op
+          #  no-op 
     GOTO_OPCODE(t0)                        #  jump to next instruction
 
 /* continuation for OP_SPUT_WIDE_JUMBO */
@@ -15506,7 +15506,7 @@
     GET_INST_OPCODE(t0)                    #  extract opcode from rINST
           #  no-op                             #  releasing store
     sw        a1, offStaticField_value(a0) #  field <- vBBBB
-          #  no-op
+          #  no-op 
     beqz      a1, 1f
     srl       t2, t1, GC_CARD_SHIFT
     addu      t3, a2, t2
@@ -15524,7 +15524,7 @@
     GET_INST_OPCODE(t0)                    #  extract opcode from rINST
           #  no-op                             #  releasing store
     sw        a1, offStaticField_value(a0) #  field <- vBBBB
-          #  no-op
+          #  no-op 
     GOTO_OPCODE(t0)                        #  jump to next instruction
 
 /* continuation for OP_SPUT_BYTE_JUMBO */
@@ -15537,7 +15537,7 @@
     GET_INST_OPCODE(t0)                    #  extract opcode from rINST
           #  no-op                             #  releasing store
     sw        a1, offStaticField_value(a0) #  field <- vBBBB
-          #  no-op
+          #  no-op 
     GOTO_OPCODE(t0)                        #  jump to next instruction
 
 /* continuation for OP_SPUT_CHAR_JUMBO */
@@ -15550,7 +15550,7 @@
     GET_INST_OPCODE(t0)                    #  extract opcode from rINST
           #  no-op                             #  releasing store
     sw        a1, offStaticField_value(a0) #  field <- vBBBB
-          #  no-op
+          #  no-op 
     GOTO_OPCODE(t0)                        #  jump to next instruction
 
 /* continuation for OP_SPUT_SHORT_JUMBO */
@@ -15563,7 +15563,7 @@
     GET_INST_OPCODE(t0)                    #  extract opcode from rINST
           #  no-op                             #  releasing store
     sw        a1, offStaticField_value(a0) #  field <- vBBBB
-          #  no-op
+          #  no-op 
     GOTO_OPCODE(t0)                        #  jump to next instruction
 
 /* continuation for OP_INVOKE_VIRTUAL_JUMBO */
diff --git a/vm/mterp/out/InterpC-mips.cpp b/vm/mterp/out/InterpC-mips.cpp
index 5281974..02f8856 100644
--- a/vm/mterp/out/InterpC-mips.cpp
+++ b/vm/mterp/out/InterpC-mips.cpp
@@ -460,7 +460,7 @@
     }
 #endif
 
-#define FINISH_BKPT(_opcode)	   /* FIXME? */
+#define FINISH_BKPT(_opcode)       /* FIXME? */
 #define DISPATCH_EXTENDED(_opcode) /* FIXME? */
 
 /*
@@ -498,7 +498,7 @@
  * As a special case, "goto bail" turns into a longjmp.
  */
 #define GOTO_bail()                                                         \
-    dvmMterpStdBail(self, false)
+    dvmMterpStdBail(self)
 
 /*
  * Periodically check for thread suspension.
@@ -2344,6 +2344,22 @@
 #undef debugTrackedRefStart
 
 /* File: mips/debug.cpp */
+/*
+ * Copyright (C) 2008 The Android Open Source Project
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
 #include <inttypes.h>
 
 /*