[MIPSR6] Add mips64r6 and mips32r6 targets
Add mips64r6 target and corresponding mips32r6 target.
Defaults remain as mips64r2 and mips32r2.
Apply -FP64A codegen subsetting to mips32r6 only.
Access FR=0 odd-numbered 32-bit float regs only via
double-prec even-numbered regs, not by single-prec ops.
Change-Id: I1740a6c658304b6c41242be58d68753e6f171658
diff --git a/core/clang/mips.mk b/core/clang/mips.mk
index 88721e9..1624b6f 100644
--- a/core/clang/mips.mk
+++ b/core/clang/mips.mk
@@ -9,6 +9,7 @@
$(CLANG_CONFIG_UNKNOWN_CFLAGS) \
-mips32 \
-mips32r2 \
+ -mips32r6 \
-mfp32 \
-mfp64 \
-mfpxx \
diff --git a/core/clang/mips64.mk b/core/clang/mips64.mk
index d087b9b..a76aa08 100644
--- a/core/clang/mips64.mk
+++ b/core/clang/mips64.mk
@@ -1,7 +1,5 @@
# Clang flags for mips64 arch, target or host.
-$(warning Untested mips64 clang flags, fix me!)
-
CLANG_CONFIG_mips64_EXTRA_ASFLAGS :=
CLANG_CONFIG_mips64_EXTRA_CFLAGS :=
CLANG_CONFIG_mips64_EXTRA_LDFLAGS :=
@@ -9,6 +7,7 @@
# Include common unknown flags
CLANG_CONFIG_mips64_UNKNOWN_CFLAGS := \
$(CLANG_CONFIG_UNKNOWN_CFLAGS) \
+ -mips64r6 \
-fno-strict-volatile-bitfields \
-fgcse-after-reload \
-frerun-cse-after-loop \
diff --git a/core/combo/arch/mips/mips32r6.mk b/core/combo/arch/mips/mips32r6.mk
new file mode 100644
index 0000000..315aa60
--- /dev/null
+++ b/core/combo/arch/mips/mips32r6.mk
@@ -0,0 +1,12 @@
+# Configuration for Android on MIPS.
+# Generating binaries for MIPS32R6/hard-float/little-endian
+
+ARCH_MIPS_REV6 := true
+arch_variant_cflags := \
+ -mips32r6 \
+ -mfp64 \
+ -mno-odd-spreg \
+ -msynci
+
+arch_variant_ldflags := \
+ -Wl,-melf32ltsmip
diff --git a/core/combo/arch/mips64/mips64r6.mk b/core/combo/arch/mips64/mips64r6.mk
new file mode 100644
index 0000000..443de20
--- /dev/null
+++ b/core/combo/arch/mips64/mips64r6.mk
@@ -0,0 +1,7 @@
+# Configuration for Android on mips64r6.
+
+ARCH_MIPS_REV6 := true
+arch_variant_cflags := \
+ -mips64r6 \
+ -msynci
+
diff --git a/target/board/generic_mips64/BoardConfig.mk b/target/board/generic_mips64/BoardConfig.mk
index 88a24a3..5dc943a 100644
--- a/target/board/generic_mips64/BoardConfig.mk
+++ b/target/board/generic_mips64/BoardConfig.mk
@@ -30,8 +30,12 @@
TARGET_2ND_ARCH := mips
ifeq (,$(TARGET_2ND_ARCH_VARIANT))
+ifeq ($(TARGET_ARCH_VARIANT),mips64r6)
+TARGET_2ND_ARCH_VARIANT := mips32r6
+else
TARGET_2ND_ARCH_VARIANT := mips32r2-fp
endif
+endif
TARGET_2ND_CPU_ABI := mips
# The emulator (qemu) uses the Goldfish devices
