tree 904bc5df5c840b96996259fb9658b492161117e3
parent f7db5ecc4d662da8368f31d57401ca1a39690e40
author Henrik Smiding <henrik.smiding@stericsson.com> 1284559683 +0200
committer Christian Bejram <christian.bejram@stericsson.com> 1336393082 +0200

Adjust memcpy for ARM Cortex A9 cache line size

ARM Cortex A8 use 64 bytes and ARM Cortex A9 use 32 bytes cache line
size.

The following patch:
  Adds code to adjust memcpy cache line size to match A9 cache line
  size.
  Adds a flag to select between 32 bytes and 64 bytes cache line
  size.

  Copyright (C) ST-Ericsson SA 2010
    Modified neon implementation to fit Cortex A9 cache line size
    Author: Henrik Smiding henrik.smiding@stericsson.com for
            ST-Ericsson.

Change-Id: I8a55946bfb074e6ec0a14805ed65f73fcd0984a3
Signed-off-by: Christian Bejram <christian.bejram@stericsson.com>