[MIPSR6] Use C-coded string ops on mips32r6/mips64r6

The existing assembler code uses deprecated lwl/lwr/swl/swr ops.
Replacing those with misalignment-forgiving lw/sw ops may
involve careful performance tuning.

(cherry picked from commit bc5a3ec6df66d2456667ddf1d6dfaf623552169d)

Change-Id: I35167da27f2d406339b7f24b4a1fb270c87bc12e
1 file changed