Add <sys/reg.h>.
This describes the offsets into ptrace's returned arrays of registers
for x86 and x86-64.
Change-Id: I044f03e286673999a298b73a813d4ad366625845
diff --git a/libc/include/sys/reg.h b/libc/include/sys/reg.h
new file mode 100644
index 0000000..b3d2aac
--- /dev/null
+++ b/libc/include/sys/reg.h
@@ -0,0 +1,84 @@
+/*
+ * Copyright (C) 2014 The Android Open Source Project
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#ifndef _SYS_REG_H_
+#define _SYS_REG_H_
+
+#if defined(__i386__)
+
+#define EBX 0
+#define ECX 1
+#define EDX 2
+#define ESI 3
+#define EDI 4
+#define EBP 5
+#define EAX 6
+#define DS 7
+#define ES 8
+#define FS 9
+#define GS 10
+#define ORIG_EAX 11
+#define EIP 12
+#define CS 13
+#define EFL 14
+#define UESP 15
+#define SS 16
+
+#elif defined(__x86_64__)
+
+#define R15 0
+#define R14 1
+#define R13 2
+#define R12 3
+#define RBP 4
+#define RBX 5
+#define R11 6
+#define R10 7
+#define R9 8
+#define R8 9
+#define RAX 10
+#define RCX 11
+#define RDX 12
+#define RSI 13
+#define RDI 14
+#define ORIG_RAX 15
+#define RIP 16
+#define CS 17
+#define EFLAGS 18
+#define RSP 19
+#define SS 20
+#define FS_BASE 21
+#define GS_BASE 22
+#define DS 23
+#define ES 24
+#define FS 25
+#define GS 26
+
+#endif
+
+#endif /* _SYS_REG_H_ */
