02b75806a80f8b75c3d6ba2ff97c995117630f36 - platform/art

commit	02b75806a80f8b75c3d6ba2ff97c995117630f36	[log] [tgz]
author	Roland Levillain <rpl@google.com>	Wed Jul 13 11:54:35 2016 +0100
committer	Roland Levillain <rpl@google.com>	Wed Jul 13 11:54:35 2016 +0100
tree	ecdb1852c3e33f120110091cc2d07a9737fbd3b5
parent	5f485719b166ceb8e591329d40e76c5e50988022 [diff]

Introduce more compact ReadBarrierMark slow-paths.

Replace entry point ReadBarrierMark with 32
ReadBarrierMarkRegX entry points, using register
number X as input and output (instead of the standard
runtime calling convention) to save two moves in Baker's
read barrier mark slow-path code.

Test: ART host and target (ARM, ARM64) tests.
Bug: 29506760
Bug: 12687968
Change-Id: I73cfb82831cf040b8b018e984163c865cc44ed87

compiler/oat_test.cc[diff]
compiler/optimizing/code_generator.h[diff]
compiler/optimizing/code_generator_arm.cc[diff]
compiler/optimizing/code_generator_arm64.cc[diff]
compiler/optimizing/code_generator_x86.cc[diff]
compiler/optimizing/code_generator_x86_64.cc[diff]
runtime/arch/arm/entrypoints_init_arm.cc[diff]
runtime/arch/arm/quick_entrypoints_arm.S[diff]
runtime/arch/arm64/entrypoints_init_arm64.cc[diff]
runtime/arch/arm64/quick_entrypoints_arm64.S[diff]
runtime/arch/mips/entrypoints_direct_mips.h[diff]
runtime/arch/mips/entrypoints_init_mips.cc[diff]
runtime/arch/mips64/entrypoints_init_mips64.cc[diff]
runtime/arch/stub_test.cc[diff]
runtime/arch/x86/entrypoints_init_x86.cc[diff]
runtime/arch/x86/quick_entrypoints_x86.S[diff]
runtime/arch/x86_64/entrypoints_init_x86_64.cc[diff]
runtime/arch/x86_64/quick_entrypoints_x86_64.S[diff]
runtime/asm_support.h[diff]
runtime/entrypoints/quick/quick_entrypoints_list.h[diff]
runtime/entrypoints_order_test.cc[diff]
runtime/oat.h[diff]
runtime/thread.cc[diff]
runtime/thread.h[diff]

24 files changed

tree: ecdb1852c3e33f120110091cc2d07a9737fbd3b5