Rewrite the mterp code generator and the template snippets.
This changes the code generation, but the generated assembly
files are unchanged (except for some whitespace differences).
This replaces the custom template meta-language with python.
All the architecture-specific template files are concatenated to create
one big python script. This generated python script is then executed to
produced the final assembly file. The template syntax is:
* Lines starting with % are python code. They will be copied as-is to
the script (without the %) and thus executed during the generation.
* Other lines are text, and they are essentially syntax sugar for
out.write('''(line text)''') and thus they write the main output.
* Within a text line, $ can be used insert variables from code.
This makes the code generation simpler and it will make it possible
to use full power of python within the snippets to simplify code.
Test: test-art-host-gtest
Change-Id: I8325ca406b328f82163241b3d698f94de5e38bff
diff --git a/runtime/interpreter/mterp/Makefile_mterp b/runtime/interpreter/mterp/Makefile_mterp
deleted file mode 100644
index ac8da69..0000000
--- a/runtime/interpreter/mterp/Makefile_mterp
+++ /dev/null
@@ -1,49 +0,0 @@
-# Copyright (C) 2016 The Android Open Source Project
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-# See the License for the specific language governing permissions and
-# limitations under the License.
-
-#
-# Makefile for the Art fast interpreter. This is not currently
-# integrated into the build system.
-#
-
-SHELL := /bin/sh
-
-# Build system has TARGET_ARCH=arm, but we can support the exact architecture
-# if it is worthwhile.
-#
-# To generate sources:
-# for arch in arm arm64 x86 x86_64 mips mips64
-# do
-# TARGET_ARCH_EXT=$arch make -f Makefile_mterp
-# done
-#
-
-OUTPUT_DIR := out
-
-# Accumulate all possible dependencies for the generated files in a very
-# conservative fashion. If it's not one of the generated files in "out",
-# assume it's a dependency.
-SOURCE_DEPS := \
- $(shell find . -path ./$(OUTPUT_DIR) -prune -o -type f -print) \
-
-# Source files generated by the script. There's always one C and one
-# assembly file, though in practice one or the other could be empty.
-GEN_SOURCES := \
- $(OUTPUT_DIR)/interp_asm_$(TARGET_ARCH_EXT).S
-
-target: $(GEN_SOURCES)
-
-$(GEN_SOURCES): $(SOURCE_DEPS)
- @mkdir -p out
- ./gen_mterp.py $(TARGET_ARCH_EXT) $(OUTPUT_DIR)
diff --git a/runtime/interpreter/mterp/README.txt b/runtime/interpreter/mterp/README.txt
index 19e02be..54bb634 100644
--- a/runtime/interpreter/mterp/README.txt
+++ b/runtime/interpreter/mterp/README.txt
@@ -1,108 +1,29 @@
-rt "mterp" README
-
-NOTE: Find rebuilding instructions at the bottom of this file.
-
-
==== Overview ====
-Every configuration has a "config-*" file that controls how the sources
-are generated. The sources are written into the "out" directory, where
+The assembly source code is produced from custom python-based templates.
+All the architecture-specific template files are concatenated to create
+one big python script. This generated python script is then executed to
+produced the final assembly file. The template syntax is:
+ * Lines starting with % are python code. They will be copied as-is to
+ the script (without the %) and thus executed during the generation.
+ * Other lines are text, and they are essentially syntax sugar for
+ out.write('''(line text)''') and thus they write the main output.
+ * Within a text line, $ can be used insert variables from code.
+
+The final assembly sources are written into the "out" directory, where
they are picked up by the Android build system.
The best way to become familiar with the interpreter is to look at the
generated files in the "out" directory.
-==== Config file format ====
-
-The config files are parsed from top to bottom. Each line in the file
-may be blank, hold a comment (line starts with '#'), or be a command.
-
-The commands are:
-
- handler-style <computed-goto|jump-table>
-
- Specify which style of interpreter to generate. In computed-goto,
- each handler is allocated a fixed region, allowing transitions to
- be done via table-start-address + (opcode * handler-size). With
- jump-table style, handlers may be of any length, and the generated
- table is an array of pointers to the handlers. This command is required,
- and must be the first command in the config file.
-
- handler-size <bytes>
-
- Specify the size of the fixed region, in bytes. On most platforms
- this will need to be a power of 2. For jump-table implementations,
- this command is ignored.
-
- import <filename>
-
- The specified file is included immediately, in its entirety. No
- substitutions are performed. ".cpp" and ".h" files are copied to the
- C output, ".S" files are copied to the asm output.
-
- asm-alt-stub <filename>
-
- When present, this command will cause the generation of an alternate
- set of entry points (for computed-goto interpreters) or an alternate
- jump table (for jump-table interpreters).
-
- fallback-stub <filename>
-
- Specifies a file to be used for the special FALLBACK tag on the "op"
- command below. Intended to be used to transfer control to an alternate
- interpreter to single-step a not-yet-implemented opcode. Note: should
- note be used on RETURN-class instructions.
-
- op-start <directory>
-
- Indicates the start of the opcode list. Must precede any "op"
- commands. The specified directory is the default location to pull
- instruction files from.
-
- op <opcode> <directory>|FALLBACK
-
- Can only appear after "op-start" and before "op-end". Overrides the
- default source file location of the specified opcode. The opcode
- definition will come from the specified file, e.g. "op OP_NOP arm"
- will load from "arm/OP_NOP.S". A substitution dictionary will be
- applied (see below). If the special "FALLBACK" token is used instead of
- a directory name, the source file specified in fallback-stub will instead
- be used for this opcode.
-
- alt <opcode> <directory>
-
- Can only appear after "op-start" and before "op-end". Similar to the
- "op" command above, but denotes a source file to override the entry
- in the alternate handler table. The opcode definition will come from
- the specified file, e.g. "alt OP_NOP arm" will load from
- "arm/ALT_OP_NOP.S". A substitution dictionary will be applied
- (see below).
-
- op-end
-
- Indicates the end of the opcode list. All kNumPackedOpcodes
- opcodes are emitted when this is seen, followed by any code that
- didn't fit inside the fixed-size instruction handler space.
-
-The order of "op" and "alt" directives are not significant; the generation
-tool will extract ordering info from the VM sources.
-
-Typically the form in which most opcodes currently exist is used in
-the "op-start" directive.
-
==== Instruction file format ====
The assembly instruction files are simply fragments of assembly sources.
The starting label will be provided by the generation tool, as will
-declarations for the segment type and alignment. The expected target
-assembler is GNU "as", but others will work (may require fiddling with
-some of the pseudo-ops emitted by the generation tool).
+declarations for the segment type and alignment.
-A substitution dictionary is applied to all opcode fragments as they are
-appended to the output. Substitutions can look like "$value" or "${value}".
-
-The dictionary always includes:
+The following global variables are generally available:
$opcode - opcode name, e.g. "OP_NOP"
$opnum - opcode number, e.g. 0 for OP_NOP
@@ -113,29 +34,6 @@
so you can take advantage of C-style comments and preprocessor directives
like "#define".
-Some generator operations are available.
-
- %include "filename" [subst-dict]
-
- Includes the file, which should look like "arm/OP_NOP.S". You can
- specify values for the substitution dictionary, using standard Python
- syntax. For example, this:
- %include "arm/unop.S" {"result":"r1"}
- would insert "arm/unop.S" at the current file position, replacing
- occurrences of "$result" with "r1".
-
- %default <subst-dict>
-
- Specify default substitution dictionary values, using standard Python
- syntax. Useful if you want to have a "base" version and variants.
-
- %break
-
- Identifies the split between the main portion of the instruction
- handler (which must fit in "handler-size" bytes) and the "sister"
- code, which is appended to the end of the instruction handler block.
- In jump table implementations, %break is ignored.
-
The generation tool does *not* print a warning if your instructions
exceed "handler-size", but the VM will abort on startup if it detects an
oversized handler. On architectures with fixed-width instructions this
@@ -153,20 +51,6 @@
message and abort during startup.
-==== Development tips ====
-
-If you need to debug the initial piece of an opcode handler, and your
-debug code expands it beyond the handler size limit, you can insert a
-generic header at the top:
-
- b ${opcode}_start
-%break
-${opcode}_start:
-
-If you already have a %break, it's okay to leave it in place -- the second
-%break is ignored.
-
-
==== Rebuilding ====
If you change any of the source file fragments, you need to rebuild the
@@ -174,7 +58,7 @@
"out" are editable, then:
$ cd mterp
- $ ./rebuild.sh
+ $ ./gen_mterp.py
The ultimate goal is to have the build system generate the necessary
output files without requiring this separate step, but we're not yet
diff --git a/runtime/interpreter/mterp/arm/alt_stub.S b/runtime/interpreter/mterp/arm/alt_stub.S
index 8799d95..9e6f91e 100644
--- a/runtime/interpreter/mterp/arm/alt_stub.S
+++ b/runtime/interpreter/mterp/arm/alt_stub.S
@@ -1,3 +1,4 @@
+%def alt_stub():
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
diff --git a/runtime/interpreter/mterp/arm/bincmp.S b/runtime/interpreter/mterp/arm/bincmp.S
index 8fad42f..368c2d6 100644
--- a/runtime/interpreter/mterp/arm/bincmp.S
+++ b/runtime/interpreter/mterp/arm/bincmp.S
@@ -1,3 +1,4 @@
+%def bincmp(condition=""):
/*
* Generic two-operand compare-and-branch operation. Provide a "condition"
* fragment that specifies the comparison to perform.
diff --git a/runtime/interpreter/mterp/arm/binop.S b/runtime/interpreter/mterp/arm/binop.S
index eeb72ef..72ae9f4 100644
--- a/runtime/interpreter/mterp/arm/binop.S
+++ b/runtime/interpreter/mterp/arm/binop.S
@@ -1,4 +1,4 @@
-%default {"preinstr":"", "result":"r0", "chkzero":"0"}
+%def binop(preinstr="", result="r0", chkzero="0", instr=""):
/*
* Generic 32-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = r0 op r1".
diff --git a/runtime/interpreter/mterp/arm/binop2addr.S b/runtime/interpreter/mterp/arm/binop2addr.S
index d09a43a..6f7f23c 100644
--- a/runtime/interpreter/mterp/arm/binop2addr.S
+++ b/runtime/interpreter/mterp/arm/binop2addr.S
@@ -1,4 +1,4 @@
-%default {"preinstr":"", "result":"r0", "chkzero":"0"}
+%def binop2addr(preinstr="", result="r0", chkzero="0", instr=""):
/*
* Generic 32-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = r0 op r1".
diff --git a/runtime/interpreter/mterp/arm/binopLit16.S b/runtime/interpreter/mterp/arm/binopLit16.S
index 065394e..86291b5 100644
--- a/runtime/interpreter/mterp/arm/binopLit16.S
+++ b/runtime/interpreter/mterp/arm/binopLit16.S
@@ -1,4 +1,4 @@
-%default {"result":"r0", "chkzero":"0"}
+%def binopLit16(result="r0", chkzero="0", instr=""):
/*
* Generic 32-bit "lit16" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = r0 op r1".
diff --git a/runtime/interpreter/mterp/arm/binopLit8.S b/runtime/interpreter/mterp/arm/binopLit8.S
index 7c9c631..b850e49 100644
--- a/runtime/interpreter/mterp/arm/binopLit8.S
+++ b/runtime/interpreter/mterp/arm/binopLit8.S
@@ -1,4 +1,4 @@
-%default {"extract":"asr r1, r3, #8", "result":"r0", "chkzero":"0"}
+%def binopLit8(extract="asr r1, r3, #8", result="r0", chkzero="0", instr=""):
/*
* Generic 32-bit "lit8" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = r0 op r1".
diff --git a/runtime/interpreter/mterp/arm/binopWide.S b/runtime/interpreter/mterp/arm/binopWide.S
index 4d88001..b708627 100644
--- a/runtime/interpreter/mterp/arm/binopWide.S
+++ b/runtime/interpreter/mterp/arm/binopWide.S
@@ -1,4 +1,4 @@
-%default {"preinstr":"", "result0":"r0", "result1":"r1", "chkzero":"0"}
+%def binopWide(preinstr="", result0="r0", result1="r1", chkzero="0", instr=""):
/*
* Generic 64-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = r0-r1 op r2-r3".
diff --git a/runtime/interpreter/mterp/arm/binopWide2addr.S b/runtime/interpreter/mterp/arm/binopWide2addr.S
index bb16335..2ce5130 100644
--- a/runtime/interpreter/mterp/arm/binopWide2addr.S
+++ b/runtime/interpreter/mterp/arm/binopWide2addr.S
@@ -1,4 +1,4 @@
-%default {"preinstr":"", "result0":"r0", "result1":"r1", "chkzero":"0"}
+%def binopWide2addr(preinstr="", result0="r0", result1="r1", chkzero="0", instr=""):
/*
* Generic 64-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = r0-r1 op r2-r3".
diff --git a/runtime/interpreter/mterp/arm/const.S b/runtime/interpreter/mterp/arm/const.S
index f6f8157..a22f366 100644
--- a/runtime/interpreter/mterp/arm/const.S
+++ b/runtime/interpreter/mterp/arm/const.S
@@ -1,4 +1,4 @@
-%default { "helper":"UndefinedConstHandler" }
+%def const(helper="UndefinedConstHandler"):
/* const/class vAA, type@BBBB */
/* const/method-handle vAA, method_handle@BBBB */
/* const/method-type vAA, proto@BBBB */
diff --git a/runtime/interpreter/mterp/arm/entry.S b/runtime/interpreter/mterp/arm/entry.S
index 7c7c527..d17802b 100644
--- a/runtime/interpreter/mterp/arm/entry.S
+++ b/runtime/interpreter/mterp/arm/entry.S
@@ -1,3 +1,4 @@
+%def entry():
/*
* Copyright (C) 2016 The Android Open Source Project
*
diff --git a/runtime/interpreter/mterp/arm/fallback.S b/runtime/interpreter/mterp/arm/fallback.S
index 44e7e12..3685700 100644
--- a/runtime/interpreter/mterp/arm/fallback.S
+++ b/runtime/interpreter/mterp/arm/fallback.S
@@ -1,3 +1,4 @@
+%def fallback():
/* Transfer stub to alternate interpreter */
b MterpFallback
diff --git a/runtime/interpreter/mterp/arm/fbinop.S b/runtime/interpreter/mterp/arm/fbinop.S
index 594ee03..0f75f89 100644
--- a/runtime/interpreter/mterp/arm/fbinop.S
+++ b/runtime/interpreter/mterp/arm/fbinop.S
@@ -1,3 +1,4 @@
+%def fbinop(instr=""):
/*
* Generic 32-bit floating-point operation. Provide an "instr" line that
* specifies an instruction that performs "s2 = s0 op s1". Because we
diff --git a/runtime/interpreter/mterp/arm/fbinop2addr.S b/runtime/interpreter/mterp/arm/fbinop2addr.S
index 53c87a0..a5162a1 100644
--- a/runtime/interpreter/mterp/arm/fbinop2addr.S
+++ b/runtime/interpreter/mterp/arm/fbinop2addr.S
@@ -1,3 +1,4 @@
+%def fbinop2addr(instr=""):
/*
* Generic 32-bit floating point "/2addr" binary operation. Provide
* an "instr" line that specifies an instruction that performs
diff --git a/runtime/interpreter/mterp/arm/fbinopWide.S b/runtime/interpreter/mterp/arm/fbinopWide.S
index ca13bfb..e283fee 100644
--- a/runtime/interpreter/mterp/arm/fbinopWide.S
+++ b/runtime/interpreter/mterp/arm/fbinopWide.S
@@ -1,3 +1,4 @@
+%def fbinopWide(instr=""):
/*
* Generic 64-bit double-precision floating point binary operation.
* Provide an "instr" line that specifies an instruction that performs
diff --git a/runtime/interpreter/mterp/arm/fbinopWide2addr.S b/runtime/interpreter/mterp/arm/fbinopWide2addr.S
index 9766e2c..639a783 100644
--- a/runtime/interpreter/mterp/arm/fbinopWide2addr.S
+++ b/runtime/interpreter/mterp/arm/fbinopWide2addr.S
@@ -1,3 +1,4 @@
+%def fbinopWide2addr(instr=""):
/*
* Generic 64-bit floating point "/2addr" binary operation. Provide
* an "instr" line that specifies an instruction that performs
diff --git a/runtime/interpreter/mterp/arm/field.S b/runtime/interpreter/mterp/arm/field.S
index c468788..82e1638 100644
--- a/runtime/interpreter/mterp/arm/field.S
+++ b/runtime/interpreter/mterp/arm/field.S
@@ -1,4 +1,4 @@
-%default { }
+%def field(helper=""):
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
diff --git a/runtime/interpreter/mterp/arm/footer.S b/runtime/interpreter/mterp/arm/footer.S
index 8e9c3c2..275584e 100644
--- a/runtime/interpreter/mterp/arm/footer.S
+++ b/runtime/interpreter/mterp/arm/footer.S
@@ -1,3 +1,4 @@
+%def footer():
/*
* ===========================================================================
* Common subroutines and data
diff --git a/runtime/interpreter/mterp/arm/funop.S b/runtime/interpreter/mterp/arm/funop.S
index 1b8bb8b..c4f2231 100644
--- a/runtime/interpreter/mterp/arm/funop.S
+++ b/runtime/interpreter/mterp/arm/funop.S
@@ -1,3 +1,4 @@
+%def funop(instr=""):
/*
* Generic 32-bit unary floating-point operation. Provide an "instr"
* line that specifies an instruction that performs "s1 = op s0".
diff --git a/runtime/interpreter/mterp/arm/funopNarrower.S b/runtime/interpreter/mterp/arm/funopNarrower.S
index b9f758b..ce5e82c 100644
--- a/runtime/interpreter/mterp/arm/funopNarrower.S
+++ b/runtime/interpreter/mterp/arm/funopNarrower.S
@@ -1,3 +1,4 @@
+%def funopNarrower(instr=""):
/*
* Generic 64bit-to-32bit unary floating point operation. Provide an
* "instr" line that specifies an instruction that performs "s0 = op d0".
diff --git a/runtime/interpreter/mterp/arm/funopWider.S b/runtime/interpreter/mterp/arm/funopWider.S
index 854cdc9..8df362f 100644
--- a/runtime/interpreter/mterp/arm/funopWider.S
+++ b/runtime/interpreter/mterp/arm/funopWider.S
@@ -1,3 +1,4 @@
+%def funopWider(instr=""):
/*
* Generic 32bit-to-64bit floating point unary operation. Provide an
* "instr" line that specifies an instruction that performs "d0 = op s0".
diff --git a/runtime/interpreter/mterp/arm/header.S b/runtime/interpreter/mterp/arm/header.S
index 8d9cab5..03f330a 100644
--- a/runtime/interpreter/mterp/arm/header.S
+++ b/runtime/interpreter/mterp/arm/header.S
@@ -1,3 +1,4 @@
+%def header():
/*
* Copyright (C) 2016 The Android Open Source Project
*
diff --git a/runtime/interpreter/mterp/arm/instruction_end.S b/runtime/interpreter/mterp/arm/instruction_end.S
index f90ebd0..cf30a9b 100644
--- a/runtime/interpreter/mterp/arm/instruction_end.S
+++ b/runtime/interpreter/mterp/arm/instruction_end.S
@@ -1,3 +1,4 @@
+%def instruction_end():
.type artMterpAsmInstructionEnd, #object
.hidden artMterpAsmInstructionEnd
diff --git a/runtime/interpreter/mterp/arm/instruction_end_alt.S b/runtime/interpreter/mterp/arm/instruction_end_alt.S
index 0b66dbb..9509a63 100644
--- a/runtime/interpreter/mterp/arm/instruction_end_alt.S
+++ b/runtime/interpreter/mterp/arm/instruction_end_alt.S
@@ -1,3 +1,4 @@
+%def instruction_end_alt():
.type artMterpAsmAltInstructionEnd, #object
.hidden artMterpAsmAltInstructionEnd
diff --git a/runtime/interpreter/mterp/arm/instruction_end_sister.S b/runtime/interpreter/mterp/arm/instruction_end_sister.S
index 71c0300..18f1dbb 100644
--- a/runtime/interpreter/mterp/arm/instruction_end_sister.S
+++ b/runtime/interpreter/mterp/arm/instruction_end_sister.S
@@ -1,3 +1,4 @@
+%def instruction_end_sister():
.type artMterpAsmSisterEnd, #object
.hidden artMterpAsmSisterEnd
diff --git a/runtime/interpreter/mterp/arm/instruction_start.S b/runtime/interpreter/mterp/arm/instruction_start.S
index b7e9cf5..457dcf9 100644
--- a/runtime/interpreter/mterp/arm/instruction_start.S
+++ b/runtime/interpreter/mterp/arm/instruction_start.S
@@ -1,3 +1,4 @@
+%def instruction_start():
.type artMterpAsmInstructionStart, #object
.hidden artMterpAsmInstructionStart
diff --git a/runtime/interpreter/mterp/arm/instruction_start_alt.S b/runtime/interpreter/mterp/arm/instruction_start_alt.S
index 7a67ba0..40d2bf5 100644
--- a/runtime/interpreter/mterp/arm/instruction_start_alt.S
+++ b/runtime/interpreter/mterp/arm/instruction_start_alt.S
@@ -1,3 +1,4 @@
+%def instruction_start_alt():
.type artMterpAsmAltInstructionStart, #object
.hidden artMterpAsmAltInstructionStart
diff --git a/runtime/interpreter/mterp/arm/instruction_start_sister.S b/runtime/interpreter/mterp/arm/instruction_start_sister.S
index 0036061..2bf2463 100644
--- a/runtime/interpreter/mterp/arm/instruction_start_sister.S
+++ b/runtime/interpreter/mterp/arm/instruction_start_sister.S
@@ -1,3 +1,4 @@
+%def instruction_start_sister():
.type artMterpAsmSisterStart, #object
.hidden artMterpAsmSisterStart
diff --git a/runtime/interpreter/mterp/arm/invoke.S b/runtime/interpreter/mterp/arm/invoke.S
index e47dd1b..812852e 100644
--- a/runtime/interpreter/mterp/arm/invoke.S
+++ b/runtime/interpreter/mterp/arm/invoke.S
@@ -1,4 +1,4 @@
-%default { "helper":"UndefinedInvokeHandler" }
+%def invoke(helper="UndefinedInvokeHandler"):
/*
* Generic invoke handler wrapper.
*/
diff --git a/runtime/interpreter/mterp/arm/invoke_polymorphic.S b/runtime/interpreter/mterp/arm/invoke_polymorphic.S
index f569d61..b473616 100644
--- a/runtime/interpreter/mterp/arm/invoke_polymorphic.S
+++ b/runtime/interpreter/mterp/arm/invoke_polymorphic.S
@@ -1,4 +1,4 @@
-%default { "helper":"UndefinedInvokeHandler" }
+%def invoke_polymorphic(helper="UndefinedInvokeHandler"):
/*
* invoke-polymorphic handler wrapper.
*/
diff --git a/runtime/interpreter/mterp/arm/op_add_double.S b/runtime/interpreter/mterp/arm/op_add_double.S
index 9332bf2..17aabcd 100644
--- a/runtime/interpreter/mterp/arm/op_add_double.S
+++ b/runtime/interpreter/mterp/arm/op_add_double.S
@@ -1 +1,2 @@
-%include "arm/fbinopWide.S" {"instr":"faddd d2, d0, d1"}
+%def op_add_double():
+% fbinopWide(instr="faddd d2, d0, d1")
diff --git a/runtime/interpreter/mterp/arm/op_add_double_2addr.S b/runtime/interpreter/mterp/arm/op_add_double_2addr.S
index 3242c53..97d1757 100644
--- a/runtime/interpreter/mterp/arm/op_add_double_2addr.S
+++ b/runtime/interpreter/mterp/arm/op_add_double_2addr.S
@@ -1 +1,2 @@
-%include "arm/fbinopWide2addr.S" {"instr":"faddd d2, d0, d1"}
+%def op_add_double_2addr():
+% fbinopWide2addr(instr="faddd d2, d0, d1")
diff --git a/runtime/interpreter/mterp/arm/op_add_float.S b/runtime/interpreter/mterp/arm/op_add_float.S
index afb7967..9ca8cad 100644
--- a/runtime/interpreter/mterp/arm/op_add_float.S
+++ b/runtime/interpreter/mterp/arm/op_add_float.S
@@ -1 +1,2 @@
-%include "arm/fbinop.S" {"instr":"fadds s2, s0, s1"}
+%def op_add_float():
+% fbinop(instr="fadds s2, s0, s1")
diff --git a/runtime/interpreter/mterp/arm/op_add_float_2addr.S b/runtime/interpreter/mterp/arm/op_add_float_2addr.S
index 0067b6a..abe1989 100644
--- a/runtime/interpreter/mterp/arm/op_add_float_2addr.S
+++ b/runtime/interpreter/mterp/arm/op_add_float_2addr.S
@@ -1 +1,2 @@
-%include "arm/fbinop2addr.S" {"instr":"fadds s2, s0, s1"}
+%def op_add_float_2addr():
+% fbinop2addr(instr="fadds s2, s0, s1")
diff --git a/runtime/interpreter/mterp/arm/op_add_int.S b/runtime/interpreter/mterp/arm/op_add_int.S
index 1dcae7e..e18601c 100644
--- a/runtime/interpreter/mterp/arm/op_add_int.S
+++ b/runtime/interpreter/mterp/arm/op_add_int.S
@@ -1 +1,2 @@
-%include "arm/binop.S" {"instr":"add r0, r0, r1"}
+%def op_add_int():
+% binop(instr="add r0, r0, r1")
diff --git a/runtime/interpreter/mterp/arm/op_add_int_2addr.S b/runtime/interpreter/mterp/arm/op_add_int_2addr.S
index 9ea98f1..10ea943 100644
--- a/runtime/interpreter/mterp/arm/op_add_int_2addr.S
+++ b/runtime/interpreter/mterp/arm/op_add_int_2addr.S
@@ -1 +1,2 @@
-%include "arm/binop2addr.S" {"instr":"add r0, r0, r1"}
+%def op_add_int_2addr():
+% binop2addr(instr="add r0, r0, r1")
diff --git a/runtime/interpreter/mterp/arm/op_add_int_lit16.S b/runtime/interpreter/mterp/arm/op_add_int_lit16.S
index 5763ab8..63febf2 100644
--- a/runtime/interpreter/mterp/arm/op_add_int_lit16.S
+++ b/runtime/interpreter/mterp/arm/op_add_int_lit16.S
@@ -1 +1,2 @@
-%include "arm/binopLit16.S" {"instr":"add r0, r0, r1"}
+%def op_add_int_lit16():
+% binopLit16(instr="add r0, r0, r1")
diff --git a/runtime/interpreter/mterp/arm/op_add_int_lit8.S b/runtime/interpreter/mterp/arm/op_add_int_lit8.S
index 035510d..4393e668 100644
--- a/runtime/interpreter/mterp/arm/op_add_int_lit8.S
+++ b/runtime/interpreter/mterp/arm/op_add_int_lit8.S
@@ -1 +1,2 @@
-%include "arm/binopLit8.S" {"extract":"", "instr":"add r0, r0, r3, asr #8"}
+%def op_add_int_lit8():
+% binopLit8(extract="", instr="add r0, r0, r3, asr #8")
diff --git a/runtime/interpreter/mterp/arm/op_add_long.S b/runtime/interpreter/mterp/arm/op_add_long.S
index 093223e..88994d4 100644
--- a/runtime/interpreter/mterp/arm/op_add_long.S
+++ b/runtime/interpreter/mterp/arm/op_add_long.S
@@ -1 +1,2 @@
-%include "arm/binopWide.S" {"preinstr":"adds r0, r0, r2", "instr":"adc r1, r1, r3"}
+%def op_add_long():
+% binopWide(preinstr="adds r0, r0, r2", instr="adc r1, r1, r3")
diff --git a/runtime/interpreter/mterp/arm/op_add_long_2addr.S b/runtime/interpreter/mterp/arm/op_add_long_2addr.S
index c11e0af..bfe7447 100644
--- a/runtime/interpreter/mterp/arm/op_add_long_2addr.S
+++ b/runtime/interpreter/mterp/arm/op_add_long_2addr.S
@@ -1 +1,2 @@
-%include "arm/binopWide2addr.S" {"preinstr":"adds r0, r0, r2", "instr":"adc r1, r1, r3"}
+%def op_add_long_2addr():
+% binopWide2addr(preinstr="adds r0, r0, r2", instr="adc r1, r1, r3")
diff --git a/runtime/interpreter/mterp/arm/op_aget.S b/runtime/interpreter/mterp/arm/op_aget.S
index 11f7079..bf265b4 100644
--- a/runtime/interpreter/mterp/arm/op_aget.S
+++ b/runtime/interpreter/mterp/arm/op_aget.S
@@ -1,4 +1,4 @@
-%default { "load":"ldr", "shift":"2", "data_offset":"MIRROR_INT_ARRAY_DATA_OFFSET" }
+%def op_aget(load="ldr", shift="2", data_offset="MIRROR_INT_ARRAY_DATA_OFFSET"):
/*
* Array get, 32 bits or less. vAA <- vBB[vCC].
*
diff --git a/runtime/interpreter/mterp/arm/op_aget_boolean.S b/runtime/interpreter/mterp/arm/op_aget_boolean.S
index 8f678dc..d6e0a1b 100644
--- a/runtime/interpreter/mterp/arm/op_aget_boolean.S
+++ b/runtime/interpreter/mterp/arm/op_aget_boolean.S
@@ -1 +1,2 @@
-%include "arm/op_aget.S" { "load":"ldrb", "shift":"0", "data_offset":"MIRROR_BOOLEAN_ARRAY_DATA_OFFSET" }
+%def op_aget_boolean():
+% op_aget(load="ldrb", shift="0", data_offset="MIRROR_BOOLEAN_ARRAY_DATA_OFFSET")
diff --git a/runtime/interpreter/mterp/arm/op_aget_byte.S b/runtime/interpreter/mterp/arm/op_aget_byte.S
index a304650..6c9f1b7 100644
--- a/runtime/interpreter/mterp/arm/op_aget_byte.S
+++ b/runtime/interpreter/mterp/arm/op_aget_byte.S
@@ -1 +1,2 @@
-%include "arm/op_aget.S" { "load":"ldrsb", "shift":"0", "data_offset":"MIRROR_BYTE_ARRAY_DATA_OFFSET" }
+%def op_aget_byte():
+% op_aget(load="ldrsb", shift="0", data_offset="MIRROR_BYTE_ARRAY_DATA_OFFSET")
diff --git a/runtime/interpreter/mterp/arm/op_aget_char.S b/runtime/interpreter/mterp/arm/op_aget_char.S
index 4908306..c5812e3 100644
--- a/runtime/interpreter/mterp/arm/op_aget_char.S
+++ b/runtime/interpreter/mterp/arm/op_aget_char.S
@@ -1 +1,2 @@
-%include "arm/op_aget.S" { "load":"ldrh", "shift":"1", "data_offset":"MIRROR_CHAR_ARRAY_DATA_OFFSET" }
+%def op_aget_char():
+% op_aget(load="ldrh", shift="1", data_offset="MIRROR_CHAR_ARRAY_DATA_OFFSET")
diff --git a/runtime/interpreter/mterp/arm/op_aget_object.S b/runtime/interpreter/mterp/arm/op_aget_object.S
index 4e0aab5..3b25086 100644
--- a/runtime/interpreter/mterp/arm/op_aget_object.S
+++ b/runtime/interpreter/mterp/arm/op_aget_object.S
@@ -1,3 +1,4 @@
+%def op_aget_object():
/*
* Array object get. vAA <- vBB[vCC].
*
diff --git a/runtime/interpreter/mterp/arm/op_aget_short.S b/runtime/interpreter/mterp/arm/op_aget_short.S
index b71e659..9727560 100644
--- a/runtime/interpreter/mterp/arm/op_aget_short.S
+++ b/runtime/interpreter/mterp/arm/op_aget_short.S
@@ -1 +1,2 @@
-%include "arm/op_aget.S" { "load":"ldrsh", "shift":"1", "data_offset":"MIRROR_SHORT_ARRAY_DATA_OFFSET" }
+%def op_aget_short():
+% op_aget(load="ldrsh", shift="1", data_offset="MIRROR_SHORT_ARRAY_DATA_OFFSET")
diff --git a/runtime/interpreter/mterp/arm/op_aget_wide.S b/runtime/interpreter/mterp/arm/op_aget_wide.S
index 66ec950..28437e7 100644
--- a/runtime/interpreter/mterp/arm/op_aget_wide.S
+++ b/runtime/interpreter/mterp/arm/op_aget_wide.S
@@ -1,3 +1,4 @@
+%def op_aget_wide():
/*
* Array get, 64 bits. vAA <- vBB[vCC].
*
diff --git a/runtime/interpreter/mterp/arm/op_and_int.S b/runtime/interpreter/mterp/arm/op_and_int.S
index 7c16d37..ac0ae66 100644
--- a/runtime/interpreter/mterp/arm/op_and_int.S
+++ b/runtime/interpreter/mterp/arm/op_and_int.S
@@ -1 +1,2 @@
-%include "arm/binop.S" {"instr":"and r0, r0, r1"}
+%def op_and_int():
+% binop(instr="and r0, r0, r1")
diff --git a/runtime/interpreter/mterp/arm/op_and_int_2addr.S b/runtime/interpreter/mterp/arm/op_and_int_2addr.S
index 0fbab02..28a668a 100644
--- a/runtime/interpreter/mterp/arm/op_and_int_2addr.S
+++ b/runtime/interpreter/mterp/arm/op_and_int_2addr.S
@@ -1 +1,2 @@
-%include "arm/binop2addr.S" {"instr":"and r0, r0, r1"}
+%def op_and_int_2addr():
+% binop2addr(instr="and r0, r0, r1")
diff --git a/runtime/interpreter/mterp/arm/op_and_int_lit16.S b/runtime/interpreter/mterp/arm/op_and_int_lit16.S
index 541e9b7..4b9a4c9 100644
--- a/runtime/interpreter/mterp/arm/op_and_int_lit16.S
+++ b/runtime/interpreter/mterp/arm/op_and_int_lit16.S
@@ -1 +1,2 @@
-%include "arm/binopLit16.S" {"instr":"and r0, r0, r1"}
+%def op_and_int_lit16():
+% binopLit16(instr="and r0, r0, r1")
diff --git a/runtime/interpreter/mterp/arm/op_and_int_lit8.S b/runtime/interpreter/mterp/arm/op_and_int_lit8.S
index af746b5..b26bfe4 100644
--- a/runtime/interpreter/mterp/arm/op_and_int_lit8.S
+++ b/runtime/interpreter/mterp/arm/op_and_int_lit8.S
@@ -1 +1,2 @@
-%include "arm/binopLit8.S" {"extract":"", "instr":"and r0, r0, r3, asr #8"}
+%def op_and_int_lit8():
+% binopLit8(extract="", instr="and r0, r0, r3, asr #8")
diff --git a/runtime/interpreter/mterp/arm/op_and_long.S b/runtime/interpreter/mterp/arm/op_and_long.S
index 4ad5158..3af7897 100644
--- a/runtime/interpreter/mterp/arm/op_and_long.S
+++ b/runtime/interpreter/mterp/arm/op_and_long.S
@@ -1 +1,2 @@
-%include "arm/binopWide.S" {"preinstr":"and r0, r0, r2", "instr":"and r1, r1, r3"}
+%def op_and_long():
+% binopWide(preinstr="and r0, r0, r2", instr="and r1, r1, r3")
diff --git a/runtime/interpreter/mterp/arm/op_and_long_2addr.S b/runtime/interpreter/mterp/arm/op_and_long_2addr.S
index e23ea44..78e5d88 100644
--- a/runtime/interpreter/mterp/arm/op_and_long_2addr.S
+++ b/runtime/interpreter/mterp/arm/op_and_long_2addr.S
@@ -1 +1,2 @@
-%include "arm/binopWide2addr.S" {"preinstr":"and r0, r0, r2", "instr":"and r1, r1, r3"}
+%def op_and_long_2addr():
+% binopWide2addr(preinstr="and r0, r0, r2", instr="and r1, r1, r3")
diff --git a/runtime/interpreter/mterp/arm/op_aput.S b/runtime/interpreter/mterp/arm/op_aput.S
index a511fa5..7b5da54 100644
--- a/runtime/interpreter/mterp/arm/op_aput.S
+++ b/runtime/interpreter/mterp/arm/op_aput.S
@@ -1,4 +1,4 @@
-%default { "store":"str", "shift":"2", "data_offset":"MIRROR_INT_ARRAY_DATA_OFFSET" }
+%def op_aput(store="str", shift="2", data_offset="MIRROR_INT_ARRAY_DATA_OFFSET"):
/*
* Array put, 32 bits or less. vBB[vCC] <- vAA.
*
diff --git a/runtime/interpreter/mterp/arm/op_aput_boolean.S b/runtime/interpreter/mterp/arm/op_aput_boolean.S
index e86663f..467cc4b 100644
--- a/runtime/interpreter/mterp/arm/op_aput_boolean.S
+++ b/runtime/interpreter/mterp/arm/op_aput_boolean.S
@@ -1 +1,2 @@
-%include "arm/op_aput.S" { "store":"strb", "shift":"0", "data_offset":"MIRROR_BOOLEAN_ARRAY_DATA_OFFSET" }
+%def op_aput_boolean():
+% op_aput(store="strb", shift="0", data_offset="MIRROR_BOOLEAN_ARRAY_DATA_OFFSET")
diff --git a/runtime/interpreter/mterp/arm/op_aput_byte.S b/runtime/interpreter/mterp/arm/op_aput_byte.S
index 83694b7..2b4c0ba 100644
--- a/runtime/interpreter/mterp/arm/op_aput_byte.S
+++ b/runtime/interpreter/mterp/arm/op_aput_byte.S
@@ -1 +1,2 @@
-%include "arm/op_aput.S" { "store":"strb", "shift":"0", "data_offset":"MIRROR_BYTE_ARRAY_DATA_OFFSET" }
+%def op_aput_byte():
+% op_aput(store="strb", shift="0", data_offset="MIRROR_BYTE_ARRAY_DATA_OFFSET")
diff --git a/runtime/interpreter/mterp/arm/op_aput_char.S b/runtime/interpreter/mterp/arm/op_aput_char.S
index 3551cac..cb7dcba 100644
--- a/runtime/interpreter/mterp/arm/op_aput_char.S
+++ b/runtime/interpreter/mterp/arm/op_aput_char.S
@@ -1 +1,2 @@
-%include "arm/op_aput.S" { "store":"strh", "shift":"1", "data_offset":"MIRROR_CHAR_ARRAY_DATA_OFFSET" }
+%def op_aput_char():
+% op_aput(store="strh", shift="1", data_offset="MIRROR_CHAR_ARRAY_DATA_OFFSET")
diff --git a/runtime/interpreter/mterp/arm/op_aput_object.S b/runtime/interpreter/mterp/arm/op_aput_object.S
index c539916..83b7e5a 100644
--- a/runtime/interpreter/mterp/arm/op_aput_object.S
+++ b/runtime/interpreter/mterp/arm/op_aput_object.S
@@ -1,3 +1,4 @@
+%def op_aput_object():
/*
* Store an object into an array. vBB[vCC] <- vAA.
*/
diff --git a/runtime/interpreter/mterp/arm/op_aput_short.S b/runtime/interpreter/mterp/arm/op_aput_short.S
index 0a0590e..f624163 100644
--- a/runtime/interpreter/mterp/arm/op_aput_short.S
+++ b/runtime/interpreter/mterp/arm/op_aput_short.S
@@ -1 +1,2 @@
-%include "arm/op_aput.S" { "store":"strh", "shift":"1", "data_offset":"MIRROR_SHORT_ARRAY_DATA_OFFSET" }
+%def op_aput_short():
+% op_aput(store="strh", shift="1", data_offset="MIRROR_SHORT_ARRAY_DATA_OFFSET")
diff --git a/runtime/interpreter/mterp/arm/op_aput_wide.S b/runtime/interpreter/mterp/arm/op_aput_wide.S
index 0057507..769522a 100644
--- a/runtime/interpreter/mterp/arm/op_aput_wide.S
+++ b/runtime/interpreter/mterp/arm/op_aput_wide.S
@@ -1,3 +1,4 @@
+%def op_aput_wide():
/*
* Array put, 64 bits. vBB[vCC] <- vAA.
*
diff --git a/runtime/interpreter/mterp/arm/op_array_length.S b/runtime/interpreter/mterp/arm/op_array_length.S
index 43b1682..3ec24b8 100644
--- a/runtime/interpreter/mterp/arm/op_array_length.S
+++ b/runtime/interpreter/mterp/arm/op_array_length.S
@@ -1,3 +1,4 @@
+%def op_array_length():
/*
* Return the length of an array.
*/
diff --git a/runtime/interpreter/mterp/arm/op_check_cast.S b/runtime/interpreter/mterp/arm/op_check_cast.S
index 24eba45..a56451b 100644
--- a/runtime/interpreter/mterp/arm/op_check_cast.S
+++ b/runtime/interpreter/mterp/arm/op_check_cast.S
@@ -1,3 +1,4 @@
+%def op_check_cast():
/*
* Check to see if a cast from one class to another is allowed.
*/
diff --git a/runtime/interpreter/mterp/arm/op_cmp_long.S b/runtime/interpreter/mterp/arm/op_cmp_long.S
index 6626ff0..2f87716 100644
--- a/runtime/interpreter/mterp/arm/op_cmp_long.S
+++ b/runtime/interpreter/mterp/arm/op_cmp_long.S
@@ -1,3 +1,4 @@
+%def op_cmp_long():
/*
* Compare two 64-bit values. Puts 0, 1, or -1 into the destination
* register based on the results of the comparison.
diff --git a/runtime/interpreter/mterp/arm/op_cmpg_double.S b/runtime/interpreter/mterp/arm/op_cmpg_double.S
index 602a4b1..a166d16 100644
--- a/runtime/interpreter/mterp/arm/op_cmpg_double.S
+++ b/runtime/interpreter/mterp/arm/op_cmpg_double.S
@@ -1,3 +1,4 @@
+%def op_cmpg_double():
/*
* Compare two floating-point values. Puts 0, 1, or -1 into the
* destination register based on the results of the comparison.
diff --git a/runtime/interpreter/mterp/arm/op_cmpg_float.S b/runtime/interpreter/mterp/arm/op_cmpg_float.S
index 965091f..e14f4ec 100644
--- a/runtime/interpreter/mterp/arm/op_cmpg_float.S
+++ b/runtime/interpreter/mterp/arm/op_cmpg_float.S
@@ -1,3 +1,4 @@
+%def op_cmpg_float():
/*
* Compare two floating-point values. Puts 0, 1, or -1 into the
* destination register based on the results of the comparison.
diff --git a/runtime/interpreter/mterp/arm/op_cmpl_double.S b/runtime/interpreter/mterp/arm/op_cmpl_double.S
index 8a5e509..44c827a 100644
--- a/runtime/interpreter/mterp/arm/op_cmpl_double.S
+++ b/runtime/interpreter/mterp/arm/op_cmpl_double.S
@@ -1,3 +1,4 @@
+%def op_cmpl_double():
/*
* Compare two floating-point values. Puts 0, 1, or -1 into the
* destination register based on the results of the comparison.
diff --git a/runtime/interpreter/mterp/arm/op_cmpl_float.S b/runtime/interpreter/mterp/arm/op_cmpl_float.S
index 9df0c2c..c202663 100644
--- a/runtime/interpreter/mterp/arm/op_cmpl_float.S
+++ b/runtime/interpreter/mterp/arm/op_cmpl_float.S
@@ -1,3 +1,4 @@
+%def op_cmpl_float():
/*
* Compare two floating-point values. Puts 0, 1, or -1 into the
* destination register based on the results of the comparison.
diff --git a/runtime/interpreter/mterp/arm/op_const.S b/runtime/interpreter/mterp/arm/op_const.S
index 39890a0..e5ef50e 100644
--- a/runtime/interpreter/mterp/arm/op_const.S
+++ b/runtime/interpreter/mterp/arm/op_const.S
@@ -1,3 +1,4 @@
+%def op_const():
/* const vAA, #+BBBBbbbb */
mov r3, rINST, lsr #8 @ r3<- AA
FETCH r0, 1 @ r0<- bbbb (low)
diff --git a/runtime/interpreter/mterp/arm/op_const_16.S b/runtime/interpreter/mterp/arm/op_const_16.S
index a30cf3a..3bb89d0 100644
--- a/runtime/interpreter/mterp/arm/op_const_16.S
+++ b/runtime/interpreter/mterp/arm/op_const_16.S
@@ -1,3 +1,4 @@
+%def op_const_16():
/* const/16 vAA, #+BBBB */
FETCH_S r0, 1 @ r0<- ssssBBBB (sign-extended)
mov r3, rINST, lsr #8 @ r3<- AA
diff --git a/runtime/interpreter/mterp/arm/op_const_4.S b/runtime/interpreter/mterp/arm/op_const_4.S
index c97b0e9..bfb4246 100644
--- a/runtime/interpreter/mterp/arm/op_const_4.S
+++ b/runtime/interpreter/mterp/arm/op_const_4.S
@@ -1,3 +1,4 @@
+%def op_const_4():
/* const/4 vA, #+B */
sbfx r1, rINST, #12, #4 @ r1<- sssssssB (sign-extended)
ubfx r0, rINST, #8, #4 @ r0<- A
diff --git a/runtime/interpreter/mterp/arm/op_const_class.S b/runtime/interpreter/mterp/arm/op_const_class.S
index ff5c98c..db12ec3 100644
--- a/runtime/interpreter/mterp/arm/op_const_class.S
+++ b/runtime/interpreter/mterp/arm/op_const_class.S
@@ -1 +1,2 @@
-%include "arm/const.S" { "helper":"MterpConstClass" }
+%def op_const_class():
+% const(helper="MterpConstClass")
diff --git a/runtime/interpreter/mterp/arm/op_const_high16.S b/runtime/interpreter/mterp/arm/op_const_high16.S
index 536276d..7f20e11 100644
--- a/runtime/interpreter/mterp/arm/op_const_high16.S
+++ b/runtime/interpreter/mterp/arm/op_const_high16.S
@@ -1,3 +1,4 @@
+%def op_const_high16():
/* const/high16 vAA, #+BBBB0000 */
FETCH r0, 1 @ r0<- 0000BBBB (zero-extended)
mov r3, rINST, lsr #8 @ r3<- AA
diff --git a/runtime/interpreter/mterp/arm/op_const_method_handle.S b/runtime/interpreter/mterp/arm/op_const_method_handle.S
index 71f0550..2680c17 100644
--- a/runtime/interpreter/mterp/arm/op_const_method_handle.S
+++ b/runtime/interpreter/mterp/arm/op_const_method_handle.S
@@ -1 +1,2 @@
-%include "arm/const.S" { "helper":"MterpConstMethodHandle" }
+%def op_const_method_handle():
+% const(helper="MterpConstMethodHandle")
diff --git a/runtime/interpreter/mterp/arm/op_const_method_type.S b/runtime/interpreter/mterp/arm/op_const_method_type.S
index 2cccdaf..ea814bf 100644
--- a/runtime/interpreter/mterp/arm/op_const_method_type.S
+++ b/runtime/interpreter/mterp/arm/op_const_method_type.S
@@ -1 +1,2 @@
-%include "arm/const.S" { "helper":"MterpConstMethodType" }
+%def op_const_method_type():
+% const(helper="MterpConstMethodType")
diff --git a/runtime/interpreter/mterp/arm/op_const_string.S b/runtime/interpreter/mterp/arm/op_const_string.S
index 75ec34f..41376f8 100644
--- a/runtime/interpreter/mterp/arm/op_const_string.S
+++ b/runtime/interpreter/mterp/arm/op_const_string.S
@@ -1 +1,2 @@
-%include "arm/const.S" { "helper":"MterpConstString" }
+%def op_const_string():
+% const(helper="MterpConstString")
diff --git a/runtime/interpreter/mterp/arm/op_const_string_jumbo.S b/runtime/interpreter/mterp/arm/op_const_string_jumbo.S
index 1255c07..29c9854 100644
--- a/runtime/interpreter/mterp/arm/op_const_string_jumbo.S
+++ b/runtime/interpreter/mterp/arm/op_const_string_jumbo.S
@@ -1,3 +1,4 @@
+%def op_const_string_jumbo():
/* const/string vAA, String@BBBBBBBB */
EXPORT_PC
FETCH r0, 1 @ r0<- bbbb (low)
diff --git a/runtime/interpreter/mterp/arm/op_const_wide.S b/runtime/interpreter/mterp/arm/op_const_wide.S
index 8310a4c..40bac6d 100644
--- a/runtime/interpreter/mterp/arm/op_const_wide.S
+++ b/runtime/interpreter/mterp/arm/op_const_wide.S
@@ -1,3 +1,4 @@
+%def op_const_wide():
/* const-wide vAA, #+HHHHhhhhBBBBbbbb */
FETCH r0, 1 @ r0<- bbbb (low)
FETCH r1, 2 @ r1<- BBBB (low middle)
diff --git a/runtime/interpreter/mterp/arm/op_const_wide_16.S b/runtime/interpreter/mterp/arm/op_const_wide_16.S
index 28abb51..7d334c9 100644
--- a/runtime/interpreter/mterp/arm/op_const_wide_16.S
+++ b/runtime/interpreter/mterp/arm/op_const_wide_16.S
@@ -1,3 +1,4 @@
+%def op_const_wide_16():
/* const-wide/16 vAA, #+BBBB */
FETCH_S r0, 1 @ r0<- ssssBBBB (sign-extended)
mov r3, rINST, lsr #8 @ r3<- AA
diff --git a/runtime/interpreter/mterp/arm/op_const_wide_32.S b/runtime/interpreter/mterp/arm/op_const_wide_32.S
index c10bb04..eeb5fa5 100644
--- a/runtime/interpreter/mterp/arm/op_const_wide_32.S
+++ b/runtime/interpreter/mterp/arm/op_const_wide_32.S
@@ -1,3 +1,4 @@
+%def op_const_wide_32():
/* const-wide/32 vAA, #+BBBBbbbb */
FETCH r0, 1 @ r0<- 0000bbbb (low)
mov r3, rINST, lsr #8 @ r3<- AA
diff --git a/runtime/interpreter/mterp/arm/op_const_wide_high16.S b/runtime/interpreter/mterp/arm/op_const_wide_high16.S
index d7e38ec..57ce024 100644
--- a/runtime/interpreter/mterp/arm/op_const_wide_high16.S
+++ b/runtime/interpreter/mterp/arm/op_const_wide_high16.S
@@ -1,3 +1,4 @@
+%def op_const_wide_high16():
/* const-wide/high16 vAA, #+BBBB000000000000 */
FETCH r1, 1 @ r1<- 0000BBBB (zero-extended)
mov r3, rINST, lsr #8 @ r3<- AA
diff --git a/runtime/interpreter/mterp/arm/op_div_double.S b/runtime/interpreter/mterp/arm/op_div_double.S
index 5147550..d909694 100644
--- a/runtime/interpreter/mterp/arm/op_div_double.S
+++ b/runtime/interpreter/mterp/arm/op_div_double.S
@@ -1 +1,2 @@
-%include "arm/fbinopWide.S" {"instr":"fdivd d2, d0, d1"}
+%def op_div_double():
+% fbinopWide(instr="fdivd d2, d0, d1")
diff --git a/runtime/interpreter/mterp/arm/op_div_double_2addr.S b/runtime/interpreter/mterp/arm/op_div_double_2addr.S
index b812f17..499c87b 100644
--- a/runtime/interpreter/mterp/arm/op_div_double_2addr.S
+++ b/runtime/interpreter/mterp/arm/op_div_double_2addr.S
@@ -1 +1,2 @@
-%include "arm/fbinopWide2addr.S" {"instr":"fdivd d2, d0, d1"}
+%def op_div_double_2addr():
+% fbinopWide2addr(instr="fdivd d2, d0, d1")
diff --git a/runtime/interpreter/mterp/arm/op_div_float.S b/runtime/interpreter/mterp/arm/op_div_float.S
index 0f24d11..1136909 100644
--- a/runtime/interpreter/mterp/arm/op_div_float.S
+++ b/runtime/interpreter/mterp/arm/op_div_float.S
@@ -1 +1,2 @@
-%include "arm/fbinop.S" {"instr":"fdivs s2, s0, s1"}
+%def op_div_float():
+% fbinop(instr="fdivs s2, s0, s1")
diff --git a/runtime/interpreter/mterp/arm/op_div_float_2addr.S b/runtime/interpreter/mterp/arm/op_div_float_2addr.S
index a1dbf01..5198bc7 100644
--- a/runtime/interpreter/mterp/arm/op_div_float_2addr.S
+++ b/runtime/interpreter/mterp/arm/op_div_float_2addr.S
@@ -1 +1,2 @@
-%include "arm/fbinop2addr.S" {"instr":"fdivs s2, s0, s1"}
+%def op_div_float_2addr():
+% fbinop2addr(instr="fdivs s2, s0, s1")
diff --git a/runtime/interpreter/mterp/arm/op_div_int.S b/runtime/interpreter/mterp/arm/op_div_int.S
index 251064b..211ac77 100644
--- a/runtime/interpreter/mterp/arm/op_div_int.S
+++ b/runtime/interpreter/mterp/arm/op_div_int.S
@@ -1,4 +1,4 @@
-%default {}
+%def op_div_int():
/*
* Specialized 32-bit binary operation
*
diff --git a/runtime/interpreter/mterp/arm/op_div_int_2addr.S b/runtime/interpreter/mterp/arm/op_div_int_2addr.S
index 9be4cd8..968a499 100644
--- a/runtime/interpreter/mterp/arm/op_div_int_2addr.S
+++ b/runtime/interpreter/mterp/arm/op_div_int_2addr.S
@@ -1,4 +1,4 @@
-%default {}
+%def op_div_int_2addr():
/*
* Specialized 32-bit binary operation
*
diff --git a/runtime/interpreter/mterp/arm/op_div_int_lit16.S b/runtime/interpreter/mterp/arm/op_div_int_lit16.S
index d9bc7d6..f1e2126 100644
--- a/runtime/interpreter/mterp/arm/op_div_int_lit16.S
+++ b/runtime/interpreter/mterp/arm/op_div_int_lit16.S
@@ -1,4 +1,4 @@
-%default {}
+%def op_div_int_lit16():
/*
* Specialized 32-bit binary operation
*
diff --git a/runtime/interpreter/mterp/arm/op_div_int_lit8.S b/runtime/interpreter/mterp/arm/op_div_int_lit8.S
index 5d2dbd3..e0d88f8 100644
--- a/runtime/interpreter/mterp/arm/op_div_int_lit8.S
+++ b/runtime/interpreter/mterp/arm/op_div_int_lit8.S
@@ -1,4 +1,4 @@
-%default {}
+%def op_div_int_lit8():
/*
* Specialized 32-bit binary operation
*
diff --git a/runtime/interpreter/mterp/arm/op_div_long.S b/runtime/interpreter/mterp/arm/op_div_long.S
index 0f21a84..7423f5b 100644
--- a/runtime/interpreter/mterp/arm/op_div_long.S
+++ b/runtime/interpreter/mterp/arm/op_div_long.S
@@ -1 +1,2 @@
-%include "arm/binopWide.S" {"instr":"bl __aeabi_ldivmod", "chkzero":"1"}
+%def op_div_long():
+% binopWide(instr="bl __aeabi_ldivmod", chkzero="1")
diff --git a/runtime/interpreter/mterp/arm/op_div_long_2addr.S b/runtime/interpreter/mterp/arm/op_div_long_2addr.S
index e172b29..fed8b8f 100644
--- a/runtime/interpreter/mterp/arm/op_div_long_2addr.S
+++ b/runtime/interpreter/mterp/arm/op_div_long_2addr.S
@@ -1 +1,2 @@
-%include "arm/binopWide2addr.S" {"instr":"bl __aeabi_ldivmod", "chkzero":"1"}
+%def op_div_long_2addr():
+% binopWide2addr(instr="bl __aeabi_ldivmod", chkzero="1")
diff --git a/runtime/interpreter/mterp/arm/op_double_to_float.S b/runtime/interpreter/mterp/arm/op_double_to_float.S
index 98fdfbc..dcd575e 100644
--- a/runtime/interpreter/mterp/arm/op_double_to_float.S
+++ b/runtime/interpreter/mterp/arm/op_double_to_float.S
@@ -1 +1,2 @@
-%include "arm/funopNarrower.S" {"instr":"vcvt.f32.f64 s0, d0"}
+%def op_double_to_float():
+% funopNarrower(instr="vcvt.f32.f64 s0, d0")
diff --git a/runtime/interpreter/mterp/arm/op_double_to_int.S b/runtime/interpreter/mterp/arm/op_double_to_int.S
index aa035de..e11daad 100644
--- a/runtime/interpreter/mterp/arm/op_double_to_int.S
+++ b/runtime/interpreter/mterp/arm/op_double_to_int.S
@@ -1 +1,2 @@
-%include "arm/funopNarrower.S" {"instr":"ftosizd s0, d0"}
+%def op_double_to_int():
+% funopNarrower(instr="ftosizd s0, d0")
diff --git a/runtime/interpreter/mterp/arm/op_double_to_long.S b/runtime/interpreter/mterp/arm/op_double_to_long.S
index 19ff723..c475704 100644
--- a/runtime/interpreter/mterp/arm/op_double_to_long.S
+++ b/runtime/interpreter/mterp/arm/op_double_to_long.S
@@ -1,6 +1,7 @@
-%include "arm/unopWide.S" {"instr":"bl d2l_doconv"}
+%def op_double_to_long():
+% unopWide(instr="bl d2l_doconv")
-%break
+%def op_double_to_long_sister_code():
/*
* Convert the double in r0/r1 to a long in r0/r1.
*
diff --git a/runtime/interpreter/mterp/arm/op_fill_array_data.S b/runtime/interpreter/mterp/arm/op_fill_array_data.S
index e1ca85c..ea0d397 100644
--- a/runtime/interpreter/mterp/arm/op_fill_array_data.S
+++ b/runtime/interpreter/mterp/arm/op_fill_array_data.S
@@ -1,3 +1,4 @@
+%def op_fill_array_data():
/* fill-array-data vAA, +BBBBBBBB */
EXPORT_PC
FETCH r0, 1 @ r0<- bbbb (lo)
diff --git a/runtime/interpreter/mterp/arm/op_filled_new_array.S b/runtime/interpreter/mterp/arm/op_filled_new_array.S
index 1075f0c..fb1c3c5 100644
--- a/runtime/interpreter/mterp/arm/op_filled_new_array.S
+++ b/runtime/interpreter/mterp/arm/op_filled_new_array.S
@@ -1,4 +1,4 @@
-%default { "helper":"MterpFilledNewArray" }
+%def op_filled_new_array(helper="MterpFilledNewArray"):
/*
* Create a new array with elements filled from registers.
*
diff --git a/runtime/interpreter/mterp/arm/op_filled_new_array_range.S b/runtime/interpreter/mterp/arm/op_filled_new_array_range.S
index 16567af..1667de1 100644
--- a/runtime/interpreter/mterp/arm/op_filled_new_array_range.S
+++ b/runtime/interpreter/mterp/arm/op_filled_new_array_range.S
@@ -1 +1,2 @@
-%include "arm/op_filled_new_array.S" { "helper":"MterpFilledNewArrayRange" }
+%def op_filled_new_array_range():
+% op_filled_new_array(helper="MterpFilledNewArrayRange")
diff --git a/runtime/interpreter/mterp/arm/op_float_to_double.S b/runtime/interpreter/mterp/arm/op_float_to_double.S
index b1e12bd..760466e 100644
--- a/runtime/interpreter/mterp/arm/op_float_to_double.S
+++ b/runtime/interpreter/mterp/arm/op_float_to_double.S
@@ -1 +1,2 @@
-%include "arm/funopWider.S" {"instr":"vcvt.f64.f32 d0, s0"}
+%def op_float_to_double():
+% funopWider(instr="vcvt.f64.f32 d0, s0")
diff --git a/runtime/interpreter/mterp/arm/op_float_to_int.S b/runtime/interpreter/mterp/arm/op_float_to_int.S
index aab8716..77837ba 100644
--- a/runtime/interpreter/mterp/arm/op_float_to_int.S
+++ b/runtime/interpreter/mterp/arm/op_float_to_int.S
@@ -1 +1,2 @@
-%include "arm/funop.S" {"instr":"ftosizs s1, s0"}
+%def op_float_to_int():
+% funop(instr="ftosizs s1, s0")
diff --git a/runtime/interpreter/mterp/arm/op_float_to_long.S b/runtime/interpreter/mterp/arm/op_float_to_long.S
index 42bd98d..482b18e 100644
--- a/runtime/interpreter/mterp/arm/op_float_to_long.S
+++ b/runtime/interpreter/mterp/arm/op_float_to_long.S
@@ -1,6 +1,7 @@
-%include "arm/unopWider.S" {"instr":"bl f2l_doconv"}
+%def op_float_to_long():
+% unopWider(instr="bl f2l_doconv")
-%break
+%def op_float_to_long_sister_code():
/*
* Convert the float in r0 to a long in r0/r1.
*
diff --git a/runtime/interpreter/mterp/arm/op_goto.S b/runtime/interpreter/mterp/arm/op_goto.S
index aa42dfd..832a989 100644
--- a/runtime/interpreter/mterp/arm/op_goto.S
+++ b/runtime/interpreter/mterp/arm/op_goto.S
@@ -1,3 +1,4 @@
+%def op_goto():
/*
* Unconditional branch, 8-bit offset.
*
diff --git a/runtime/interpreter/mterp/arm/op_goto_16.S b/runtime/interpreter/mterp/arm/op_goto_16.S
index 12a6bc0..4324a8d 100644
--- a/runtime/interpreter/mterp/arm/op_goto_16.S
+++ b/runtime/interpreter/mterp/arm/op_goto_16.S
@@ -1,3 +1,4 @@
+%def op_goto_16():
/*
* Unconditional branch, 16-bit offset.
*
diff --git a/runtime/interpreter/mterp/arm/op_goto_32.S b/runtime/interpreter/mterp/arm/op_goto_32.S
index 7325a1c..b01d2fa 100644
--- a/runtime/interpreter/mterp/arm/op_goto_32.S
+++ b/runtime/interpreter/mterp/arm/op_goto_32.S
@@ -1,3 +1,4 @@
+%def op_goto_32():
/*
* Unconditional branch, 32-bit offset.
*
diff --git a/runtime/interpreter/mterp/arm/op_if_eq.S b/runtime/interpreter/mterp/arm/op_if_eq.S
index b8b6a6e..da58674 100644
--- a/runtime/interpreter/mterp/arm/op_if_eq.S
+++ b/runtime/interpreter/mterp/arm/op_if_eq.S
@@ -1 +1,2 @@
-%include "arm/bincmp.S" { "condition":"eq" }
+%def op_if_eq():
+% bincmp(condition="eq")
diff --git a/runtime/interpreter/mterp/arm/op_if_eqz.S b/runtime/interpreter/mterp/arm/op_if_eqz.S
index 7012f61..0639664 100644
--- a/runtime/interpreter/mterp/arm/op_if_eqz.S
+++ b/runtime/interpreter/mterp/arm/op_if_eqz.S
@@ -1 +1,2 @@
-%include "arm/zcmp.S" { "condition":"eq" }
+%def op_if_eqz():
+% zcmp(condition="eq")
diff --git a/runtime/interpreter/mterp/arm/op_if_ge.S b/runtime/interpreter/mterp/arm/op_if_ge.S
index eb29e63..5b6ed2f 100644
--- a/runtime/interpreter/mterp/arm/op_if_ge.S
+++ b/runtime/interpreter/mterp/arm/op_if_ge.S
@@ -1 +1,2 @@
-%include "arm/bincmp.S" { "condition":"ge" }
+%def op_if_ge():
+% bincmp(condition="ge")
diff --git a/runtime/interpreter/mterp/arm/op_if_gez.S b/runtime/interpreter/mterp/arm/op_if_gez.S
index d9da374..ea6cda7 100644
--- a/runtime/interpreter/mterp/arm/op_if_gez.S
+++ b/runtime/interpreter/mterp/arm/op_if_gez.S
@@ -1 +1,2 @@
-%include "arm/zcmp.S" { "condition":"ge" }
+%def op_if_gez():
+% zcmp(condition="ge")
diff --git a/runtime/interpreter/mterp/arm/op_if_gt.S b/runtime/interpreter/mterp/arm/op_if_gt.S
index a35eab8..201decf 100644
--- a/runtime/interpreter/mterp/arm/op_if_gt.S
+++ b/runtime/interpreter/mterp/arm/op_if_gt.S
@@ -1 +1,2 @@
-%include "arm/bincmp.S" { "condition":"gt" }
+%def op_if_gt():
+% bincmp(condition="gt")
diff --git a/runtime/interpreter/mterp/arm/op_if_gtz.S b/runtime/interpreter/mterp/arm/op_if_gtz.S
index 4ef4d8e..1fdbb6e 100644
--- a/runtime/interpreter/mterp/arm/op_if_gtz.S
+++ b/runtime/interpreter/mterp/arm/op_if_gtz.S
@@ -1 +1,2 @@
-%include "arm/zcmp.S" { "condition":"gt" }
+%def op_if_gtz():
+% zcmp(condition="gt")
diff --git a/runtime/interpreter/mterp/arm/op_if_le.S b/runtime/interpreter/mterp/arm/op_if_le.S
index c7c31bc..e6024f2 100644
--- a/runtime/interpreter/mterp/arm/op_if_le.S
+++ b/runtime/interpreter/mterp/arm/op_if_le.S
@@ -1 +1,2 @@
-%include "arm/bincmp.S" { "condition":"le" }
+%def op_if_le():
+% bincmp(condition="le")
diff --git a/runtime/interpreter/mterp/arm/op_if_lez.S b/runtime/interpreter/mterp/arm/op_if_lez.S
index 9fbf6c9..62c0d2c 100644
--- a/runtime/interpreter/mterp/arm/op_if_lez.S
+++ b/runtime/interpreter/mterp/arm/op_if_lez.S
@@ -1 +1,2 @@
-%include "arm/zcmp.S" { "condition":"le" }
+%def op_if_lez():
+% zcmp(condition="le")
diff --git a/runtime/interpreter/mterp/arm/op_if_lt.S b/runtime/interpreter/mterp/arm/op_if_lt.S
index 9469fbb..4ef22fd 100644
--- a/runtime/interpreter/mterp/arm/op_if_lt.S
+++ b/runtime/interpreter/mterp/arm/op_if_lt.S
@@ -1 +1,2 @@
-%include "arm/bincmp.S" { "condition":"lt" }
+%def op_if_lt():
+% bincmp(condition="lt")
diff --git a/runtime/interpreter/mterp/arm/op_if_ltz.S b/runtime/interpreter/mterp/arm/op_if_ltz.S
index a4fc1b8..84b2d0b 100644
--- a/runtime/interpreter/mterp/arm/op_if_ltz.S
+++ b/runtime/interpreter/mterp/arm/op_if_ltz.S
@@ -1 +1,2 @@
-%include "arm/zcmp.S" { "condition":"lt" }
+%def op_if_ltz():
+% zcmp(condition="lt")
diff --git a/runtime/interpreter/mterp/arm/op_if_ne.S b/runtime/interpreter/mterp/arm/op_if_ne.S
index c945331..ec3a688 100644
--- a/runtime/interpreter/mterp/arm/op_if_ne.S
+++ b/runtime/interpreter/mterp/arm/op_if_ne.S
@@ -1 +1,2 @@
-%include "arm/bincmp.S" { "condition":"ne" }
+%def op_if_ne():
+% bincmp(condition="ne")
diff --git a/runtime/interpreter/mterp/arm/op_if_nez.S b/runtime/interpreter/mterp/arm/op_if_nez.S
index 2d81fda..7009c3a 100644
--- a/runtime/interpreter/mterp/arm/op_if_nez.S
+++ b/runtime/interpreter/mterp/arm/op_if_nez.S
@@ -1 +1,2 @@
-%include "arm/zcmp.S" { "condition":"ne" }
+%def op_if_nez():
+% zcmp(condition="ne")
diff --git a/runtime/interpreter/mterp/arm/op_iget.S b/runtime/interpreter/mterp/arm/op_iget.S
index 1fa32fa..d09edc0 100644
--- a/runtime/interpreter/mterp/arm/op_iget.S
+++ b/runtime/interpreter/mterp/arm/op_iget.S
@@ -1,2 +1,2 @@
-%default { "is_object":"0", "helper":"MterpIGetU32"}
-%include "arm/field.S" { }
+%def op_iget(is_object="0", helper="MterpIGetU32"):
+% field(helper=helper)
diff --git a/runtime/interpreter/mterp/arm/op_iget_boolean.S b/runtime/interpreter/mterp/arm/op_iget_boolean.S
index f23cb3a..cb8edee 100644
--- a/runtime/interpreter/mterp/arm/op_iget_boolean.S
+++ b/runtime/interpreter/mterp/arm/op_iget_boolean.S
@@ -1 +1,2 @@
-%include "arm/op_iget.S" { "helper":"MterpIGetU8" }
+%def op_iget_boolean():
+% op_iget(helper="MterpIGetU8")
diff --git a/runtime/interpreter/mterp/arm/op_iget_boolean_quick.S b/runtime/interpreter/mterp/arm/op_iget_boolean_quick.S
index 0ae4843..7ac9fce 100644
--- a/runtime/interpreter/mterp/arm/op_iget_boolean_quick.S
+++ b/runtime/interpreter/mterp/arm/op_iget_boolean_quick.S
@@ -1 +1,2 @@
-%include "arm/op_iget_quick.S" { "load":"ldrb" }
+%def op_iget_boolean_quick():
+% op_iget_quick(load="ldrb")
diff --git a/runtime/interpreter/mterp/arm/op_iget_byte.S b/runtime/interpreter/mterp/arm/op_iget_byte.S
index 9c4f37c..2b87fb1 100644
--- a/runtime/interpreter/mterp/arm/op_iget_byte.S
+++ b/runtime/interpreter/mterp/arm/op_iget_byte.S
@@ -1 +1,2 @@
-%include "arm/op_iget.S" { "helper":"MterpIGetI8" }
+%def op_iget_byte():
+% op_iget(helper="MterpIGetI8")
diff --git a/runtime/interpreter/mterp/arm/op_iget_byte_quick.S b/runtime/interpreter/mterp/arm/op_iget_byte_quick.S
index e1b3083..bbccaff 100644
--- a/runtime/interpreter/mterp/arm/op_iget_byte_quick.S
+++ b/runtime/interpreter/mterp/arm/op_iget_byte_quick.S
@@ -1 +1,2 @@
-%include "arm/op_iget_quick.S" { "load":"ldrsb" }
+%def op_iget_byte_quick():
+% op_iget_quick(load="ldrsb")
diff --git a/runtime/interpreter/mterp/arm/op_iget_char.S b/runtime/interpreter/mterp/arm/op_iget_char.S
index 80c4227..001bd03 100644
--- a/runtime/interpreter/mterp/arm/op_iget_char.S
+++ b/runtime/interpreter/mterp/arm/op_iget_char.S
@@ -1 +1,2 @@
-%include "arm/op_iget.S" { "helper":"MterpIGetU16" }
+%def op_iget_char():
+% op_iget(helper="MterpIGetU16")
diff --git a/runtime/interpreter/mterp/arm/op_iget_char_quick.S b/runtime/interpreter/mterp/arm/op_iget_char_quick.S
index b44d8f1..71a9276 100644
--- a/runtime/interpreter/mterp/arm/op_iget_char_quick.S
+++ b/runtime/interpreter/mterp/arm/op_iget_char_quick.S
@@ -1 +1,2 @@
-%include "arm/op_iget_quick.S" { "load":"ldrh" }
+%def op_iget_char_quick():
+% op_iget_quick(load="ldrh")
diff --git a/runtime/interpreter/mterp/arm/op_iget_object.S b/runtime/interpreter/mterp/arm/op_iget_object.S
index e30b129..4e5f769 100644
--- a/runtime/interpreter/mterp/arm/op_iget_object.S
+++ b/runtime/interpreter/mterp/arm/op_iget_object.S
@@ -1 +1,2 @@
-%include "arm/op_iget.S" { "is_object":"1", "helper":"MterpIGetObj" }
+%def op_iget_object():
+% op_iget(is_object="1", helper="MterpIGetObj")
diff --git a/runtime/interpreter/mterp/arm/op_iget_object_quick.S b/runtime/interpreter/mterp/arm/op_iget_object_quick.S
index 16cb118..72b04b8 100644
--- a/runtime/interpreter/mterp/arm/op_iget_object_quick.S
+++ b/runtime/interpreter/mterp/arm/op_iget_object_quick.S
@@ -1,3 +1,4 @@
+%def op_iget_object_quick():
/* For: iget-object-quick */
/* op vA, vB, offset@CCCC */
mov r2, rINST, lsr #12 @ r2<- B
diff --git a/runtime/interpreter/mterp/arm/op_iget_quick.S b/runtime/interpreter/mterp/arm/op_iget_quick.S
index 0eaf364..9894498 100644
--- a/runtime/interpreter/mterp/arm/op_iget_quick.S
+++ b/runtime/interpreter/mterp/arm/op_iget_quick.S
@@ -1,4 +1,4 @@
-%default { "load":"ldr" }
+%def op_iget_quick(load="ldr"):
/* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick */
/* op vA, vB, offset@CCCC */
mov r2, rINST, lsr #12 @ r2<- B
diff --git a/runtime/interpreter/mterp/arm/op_iget_short.S b/runtime/interpreter/mterp/arm/op_iget_short.S
index dd6bc99..a62c4d9 100644
--- a/runtime/interpreter/mterp/arm/op_iget_short.S
+++ b/runtime/interpreter/mterp/arm/op_iget_short.S
@@ -1 +1,2 @@
-%include "arm/op_iget.S" { "helper":"MterpIGetI16" }
+%def op_iget_short():
+% op_iget(helper="MterpIGetI16")
diff --git a/runtime/interpreter/mterp/arm/op_iget_short_quick.S b/runtime/interpreter/mterp/arm/op_iget_short_quick.S
index 1831b99..5dbdc4f 100644
--- a/runtime/interpreter/mterp/arm/op_iget_short_quick.S
+++ b/runtime/interpreter/mterp/arm/op_iget_short_quick.S
@@ -1 +1,2 @@
-%include "arm/op_iget_quick.S" { "load":"ldrsh" }
+%def op_iget_short_quick():
+% op_iget_quick(load="ldrsh")
diff --git a/runtime/interpreter/mterp/arm/op_iget_wide.S b/runtime/interpreter/mterp/arm/op_iget_wide.S
index ede21eb..9643cc3 100644
--- a/runtime/interpreter/mterp/arm/op_iget_wide.S
+++ b/runtime/interpreter/mterp/arm/op_iget_wide.S
@@ -1 +1,2 @@
-%include "arm/op_iget.S" { "helper":"MterpIGetU64" }
+%def op_iget_wide():
+% op_iget(helper="MterpIGetU64")
diff --git a/runtime/interpreter/mterp/arm/op_iget_wide_quick.S b/runtime/interpreter/mterp/arm/op_iget_wide_quick.S
index 5a7177d..e247fb2 100644
--- a/runtime/interpreter/mterp/arm/op_iget_wide_quick.S
+++ b/runtime/interpreter/mterp/arm/op_iget_wide_quick.S
@@ -1,3 +1,4 @@
+%def op_iget_wide_quick():
/* iget-wide-quick vA, vB, offset@CCCC */
mov r2, rINST, lsr #12 @ r2<- B
FETCH ip, 1 @ ip<- field byte offset
diff --git a/runtime/interpreter/mterp/arm/op_instance_of.S b/runtime/interpreter/mterp/arm/op_instance_of.S
index 019929e..020b4c5 100644
--- a/runtime/interpreter/mterp/arm/op_instance_of.S
+++ b/runtime/interpreter/mterp/arm/op_instance_of.S
@@ -1,3 +1,4 @@
+%def op_instance_of():
/*
* Check to see if an object reference is an instance of a class.
*
diff --git a/runtime/interpreter/mterp/arm/op_int_to_byte.S b/runtime/interpreter/mterp/arm/op_int_to_byte.S
index 059d5c2..3229b5e 100644
--- a/runtime/interpreter/mterp/arm/op_int_to_byte.S
+++ b/runtime/interpreter/mterp/arm/op_int_to_byte.S
@@ -1 +1,2 @@
-%include "arm/unop.S" {"instr":"sxtb r0, r0"}
+%def op_int_to_byte():
+% unop(instr="sxtb r0, r0")
diff --git a/runtime/interpreter/mterp/arm/op_int_to_char.S b/runtime/interpreter/mterp/arm/op_int_to_char.S
index 83a0c19..9ce13b8 100644
--- a/runtime/interpreter/mterp/arm/op_int_to_char.S
+++ b/runtime/interpreter/mterp/arm/op_int_to_char.S
@@ -1 +1,2 @@
-%include "arm/unop.S" {"instr":"uxth r0, r0"}
+%def op_int_to_char():
+% unop(instr="uxth r0, r0")
diff --git a/runtime/interpreter/mterp/arm/op_int_to_double.S b/runtime/interpreter/mterp/arm/op_int_to_double.S
index 810c2e4..cc8065a 100644
--- a/runtime/interpreter/mterp/arm/op_int_to_double.S
+++ b/runtime/interpreter/mterp/arm/op_int_to_double.S
@@ -1 +1,2 @@
-%include "arm/funopWider.S" {"instr":"fsitod d0, s0"}
+%def op_int_to_double():
+% funopWider(instr="fsitod d0, s0")
diff --git a/runtime/interpreter/mterp/arm/op_int_to_float.S b/runtime/interpreter/mterp/arm/op_int_to_float.S
index f41654c..b19f3f3 100644
--- a/runtime/interpreter/mterp/arm/op_int_to_float.S
+++ b/runtime/interpreter/mterp/arm/op_int_to_float.S
@@ -1 +1,2 @@
-%include "arm/funop.S" {"instr":"fsitos s1, s0"}
+%def op_int_to_float():
+% funop(instr="fsitos s1, s0")
diff --git a/runtime/interpreter/mterp/arm/op_int_to_long.S b/runtime/interpreter/mterp/arm/op_int_to_long.S
index b5aed8e..8d67899 100644
--- a/runtime/interpreter/mterp/arm/op_int_to_long.S
+++ b/runtime/interpreter/mterp/arm/op_int_to_long.S
@@ -1 +1,2 @@
-%include "arm/unopWider.S" {"instr":"mov r1, r0, asr #31"}
+%def op_int_to_long():
+% unopWider(instr="mov r1, r0, asr #31")
diff --git a/runtime/interpreter/mterp/arm/op_int_to_short.S b/runtime/interpreter/mterp/arm/op_int_to_short.S
index 717bd96..2332460 100644
--- a/runtime/interpreter/mterp/arm/op_int_to_short.S
+++ b/runtime/interpreter/mterp/arm/op_int_to_short.S
@@ -1 +1,2 @@
-%include "arm/unop.S" {"instr":"sxth r0, r0"}
+%def op_int_to_short():
+% unop(instr="sxth r0, r0")
diff --git a/runtime/interpreter/mterp/arm/op_invoke_custom.S b/runtime/interpreter/mterp/arm/op_invoke_custom.S
index 2af875c..0bd29b4 100644
--- a/runtime/interpreter/mterp/arm/op_invoke_custom.S
+++ b/runtime/interpreter/mterp/arm/op_invoke_custom.S
@@ -1,4 +1,5 @@
-%include "arm/invoke.S" { "helper":"MterpInvokeCustom" }
+%def op_invoke_custom():
+% invoke(helper="MterpInvokeCustom")
/*
* Handle an invoke-custom invocation.
*
diff --git a/runtime/interpreter/mterp/arm/op_invoke_custom_range.S b/runtime/interpreter/mterp/arm/op_invoke_custom_range.S
index 32575c4..57e61af 100644
--- a/runtime/interpreter/mterp/arm/op_invoke_custom_range.S
+++ b/runtime/interpreter/mterp/arm/op_invoke_custom_range.S
@@ -1 +1,2 @@
-%include "arm/invoke.S" { "helper":"MterpInvokeCustomRange" }
+%def op_invoke_custom_range():
+% invoke(helper="MterpInvokeCustomRange")
diff --git a/runtime/interpreter/mterp/arm/op_invoke_direct.S b/runtime/interpreter/mterp/arm/op_invoke_direct.S
index 1edf221..d3139cf 100644
--- a/runtime/interpreter/mterp/arm/op_invoke_direct.S
+++ b/runtime/interpreter/mterp/arm/op_invoke_direct.S
@@ -1 +1,2 @@
-%include "arm/invoke.S" { "helper":"MterpInvokeDirect" }
+%def op_invoke_direct():
+% invoke(helper="MterpInvokeDirect")
diff --git a/runtime/interpreter/mterp/arm/op_invoke_direct_range.S b/runtime/interpreter/mterp/arm/op_invoke_direct_range.S
index 3097b8e..b4a161f 100644
--- a/runtime/interpreter/mterp/arm/op_invoke_direct_range.S
+++ b/runtime/interpreter/mterp/arm/op_invoke_direct_range.S
@@ -1 +1,2 @@
-%include "arm/invoke.S" { "helper":"MterpInvokeDirectRange" }
+%def op_invoke_direct_range():
+% invoke(helper="MterpInvokeDirectRange")
diff --git a/runtime/interpreter/mterp/arm/op_invoke_interface.S b/runtime/interpreter/mterp/arm/op_invoke_interface.S
index f6d565b..b064126 100644
--- a/runtime/interpreter/mterp/arm/op_invoke_interface.S
+++ b/runtime/interpreter/mterp/arm/op_invoke_interface.S
@@ -1,4 +1,5 @@
-%include "arm/invoke.S" { "helper":"MterpInvokeInterface" }
+%def op_invoke_interface():
+% invoke(helper="MterpInvokeInterface")
/*
* Handle an interface method call.
*
diff --git a/runtime/interpreter/mterp/arm/op_invoke_interface_range.S b/runtime/interpreter/mterp/arm/op_invoke_interface_range.S
index c8443b0..2989115 100644
--- a/runtime/interpreter/mterp/arm/op_invoke_interface_range.S
+++ b/runtime/interpreter/mterp/arm/op_invoke_interface_range.S
@@ -1 +1,2 @@
-%include "arm/invoke.S" { "helper":"MterpInvokeInterfaceRange" }
+%def op_invoke_interface_range():
+% invoke(helper="MterpInvokeInterfaceRange")
diff --git a/runtime/interpreter/mterp/arm/op_invoke_polymorphic.S b/runtime/interpreter/mterp/arm/op_invoke_polymorphic.S
index 816a7ae..ce61f5a 100644
--- a/runtime/interpreter/mterp/arm/op_invoke_polymorphic.S
+++ b/runtime/interpreter/mterp/arm/op_invoke_polymorphic.S
@@ -1 +1,2 @@
-%include "arm/invoke_polymorphic.S" { "helper":"MterpInvokePolymorphic" }
+%def op_invoke_polymorphic():
+% invoke_polymorphic(helper="MterpInvokePolymorphic")
diff --git a/runtime/interpreter/mterp/arm/op_invoke_polymorphic_range.S b/runtime/interpreter/mterp/arm/op_invoke_polymorphic_range.S
index 2541c27..16731bd 100644
--- a/runtime/interpreter/mterp/arm/op_invoke_polymorphic_range.S
+++ b/runtime/interpreter/mterp/arm/op_invoke_polymorphic_range.S
@@ -1 +1,2 @@
-%include "arm/invoke_polymorphic.S" { "helper":"MterpInvokePolymorphicRange" }
+%def op_invoke_polymorphic_range():
+% invoke_polymorphic(helper="MterpInvokePolymorphicRange")
diff --git a/runtime/interpreter/mterp/arm/op_invoke_static.S b/runtime/interpreter/mterp/arm/op_invoke_static.S
index c3cefcf..3e38d36 100644
--- a/runtime/interpreter/mterp/arm/op_invoke_static.S
+++ b/runtime/interpreter/mterp/arm/op_invoke_static.S
@@ -1,2 +1,3 @@
-%include "arm/invoke.S" { "helper":"MterpInvokeStatic" }
+%def op_invoke_static():
+% invoke(helper="MterpInvokeStatic")
diff --git a/runtime/interpreter/mterp/arm/op_invoke_static_range.S b/runtime/interpreter/mterp/arm/op_invoke_static_range.S
index dd60d7b..e0a546c 100644
--- a/runtime/interpreter/mterp/arm/op_invoke_static_range.S
+++ b/runtime/interpreter/mterp/arm/op_invoke_static_range.S
@@ -1 +1,2 @@
-%include "arm/invoke.S" { "helper":"MterpInvokeStaticRange" }
+%def op_invoke_static_range():
+% invoke(helper="MterpInvokeStaticRange")
diff --git a/runtime/interpreter/mterp/arm/op_invoke_super.S b/runtime/interpreter/mterp/arm/op_invoke_super.S
index 92ef2a4..3c34c99 100644
--- a/runtime/interpreter/mterp/arm/op_invoke_super.S
+++ b/runtime/interpreter/mterp/arm/op_invoke_super.S
@@ -1,4 +1,5 @@
-%include "arm/invoke.S" { "helper":"MterpInvokeSuper" }
+%def op_invoke_super():
+% invoke(helper="MterpInvokeSuper")
/*
* Handle a "super" method call.
*
diff --git a/runtime/interpreter/mterp/arm/op_invoke_super_range.S b/runtime/interpreter/mterp/arm/op_invoke_super_range.S
index 9e4fb1c..caeafaa 100644
--- a/runtime/interpreter/mterp/arm/op_invoke_super_range.S
+++ b/runtime/interpreter/mterp/arm/op_invoke_super_range.S
@@ -1 +1,2 @@
-%include "arm/invoke.S" { "helper":"MterpInvokeSuperRange" }
+%def op_invoke_super_range():
+% invoke(helper="MterpInvokeSuperRange")
diff --git a/runtime/interpreter/mterp/arm/op_invoke_virtual.S b/runtime/interpreter/mterp/arm/op_invoke_virtual.S
index 5b893ff..249177b 100644
--- a/runtime/interpreter/mterp/arm/op_invoke_virtual.S
+++ b/runtime/interpreter/mterp/arm/op_invoke_virtual.S
@@ -1,4 +1,5 @@
-%include "arm/invoke.S" { "helper":"MterpInvokeVirtual" }
+%def op_invoke_virtual():
+% invoke(helper="MterpInvokeVirtual")
/*
* Handle a virtual method call.
*
diff --git a/runtime/interpreter/mterp/arm/op_invoke_virtual_quick.S b/runtime/interpreter/mterp/arm/op_invoke_virtual_quick.S
index 020e8b8..ea72c17 100644
--- a/runtime/interpreter/mterp/arm/op_invoke_virtual_quick.S
+++ b/runtime/interpreter/mterp/arm/op_invoke_virtual_quick.S
@@ -1 +1,2 @@
-%include "arm/invoke.S" { "helper":"MterpInvokeVirtualQuick" }
+%def op_invoke_virtual_quick():
+% invoke(helper="MterpInvokeVirtualQuick")
diff --git a/runtime/interpreter/mterp/arm/op_invoke_virtual_range.S b/runtime/interpreter/mterp/arm/op_invoke_virtual_range.S
index 2b42a78..baa0779 100644
--- a/runtime/interpreter/mterp/arm/op_invoke_virtual_range.S
+++ b/runtime/interpreter/mterp/arm/op_invoke_virtual_range.S
@@ -1 +1,2 @@
-%include "arm/invoke.S" { "helper":"MterpInvokeVirtualRange" }
+%def op_invoke_virtual_range():
+% invoke(helper="MterpInvokeVirtualRange")
diff --git a/runtime/interpreter/mterp/arm/op_invoke_virtual_range_quick.S b/runtime/interpreter/mterp/arm/op_invoke_virtual_range_quick.S
index 42f2ded..1d961a0 100644
--- a/runtime/interpreter/mterp/arm/op_invoke_virtual_range_quick.S
+++ b/runtime/interpreter/mterp/arm/op_invoke_virtual_range_quick.S
@@ -1 +1,2 @@
-%include "arm/invoke.S" { "helper":"MterpInvokeVirtualQuickRange" }
+%def op_invoke_virtual_range_quick():
+% invoke(helper="MterpInvokeVirtualQuickRange")
diff --git a/runtime/interpreter/mterp/arm/op_iput.S b/runtime/interpreter/mterp/arm/op_iput.S
index 6201d80..e5351ba 100644
--- a/runtime/interpreter/mterp/arm/op_iput.S
+++ b/runtime/interpreter/mterp/arm/op_iput.S
@@ -1,2 +1,2 @@
-%default { "is_object":"0", "helper":"MterpIPutU32" }
-%include "arm/field.S" { }
+%def op_iput(is_object="0", helper="MterpIPutU32"):
+% field(helper=helper)
diff --git a/runtime/interpreter/mterp/arm/op_iput_boolean.S b/runtime/interpreter/mterp/arm/op_iput_boolean.S
index 57edadd..9eb8498 100644
--- a/runtime/interpreter/mterp/arm/op_iput_boolean.S
+++ b/runtime/interpreter/mterp/arm/op_iput_boolean.S
@@ -1 +1,2 @@
-%include "arm/op_iput.S" { "helper":"MterpIPutU8" }
+%def op_iput_boolean():
+% op_iput(helper="MterpIPutU8")
diff --git a/runtime/interpreter/mterp/arm/op_iput_boolean_quick.S b/runtime/interpreter/mterp/arm/op_iput_boolean_quick.S
index f0a2777..fd077a7 100644
--- a/runtime/interpreter/mterp/arm/op_iput_boolean_quick.S
+++ b/runtime/interpreter/mterp/arm/op_iput_boolean_quick.S
@@ -1 +1,2 @@
-%include "arm/op_iput_quick.S" { "store":"strb" }
+%def op_iput_boolean_quick():
+% op_iput_quick(store="strb")
diff --git a/runtime/interpreter/mterp/arm/op_iput_byte.S b/runtime/interpreter/mterp/arm/op_iput_byte.S
index ab283b9..4b74f9f 100644
--- a/runtime/interpreter/mterp/arm/op_iput_byte.S
+++ b/runtime/interpreter/mterp/arm/op_iput_byte.S
@@ -1 +1,2 @@
-%include "arm/op_iput.S" { "helper":"MterpIPutI8" }
+%def op_iput_byte():
+% op_iput(helper="MterpIPutI8")
diff --git a/runtime/interpreter/mterp/arm/op_iput_byte_quick.S b/runtime/interpreter/mterp/arm/op_iput_byte_quick.S
index f0a2777..30238cf 100644
--- a/runtime/interpreter/mterp/arm/op_iput_byte_quick.S
+++ b/runtime/interpreter/mterp/arm/op_iput_byte_quick.S
@@ -1 +1,2 @@
-%include "arm/op_iput_quick.S" { "store":"strb" }
+%def op_iput_byte_quick():
+% op_iput_quick(store="strb")
diff --git a/runtime/interpreter/mterp/arm/op_iput_char.S b/runtime/interpreter/mterp/arm/op_iput_char.S
index 0fe5d96..64a249f 100644
--- a/runtime/interpreter/mterp/arm/op_iput_char.S
+++ b/runtime/interpreter/mterp/arm/op_iput_char.S
@@ -1 +1,2 @@
-%include "arm/op_iput.S" { "helper":"MterpIPutU16" }
+%def op_iput_char():
+% op_iput(helper="MterpIPutU16")
diff --git a/runtime/interpreter/mterp/arm/op_iput_char_quick.S b/runtime/interpreter/mterp/arm/op_iput_char_quick.S
index 5212fc3..0deff56 100644
--- a/runtime/interpreter/mterp/arm/op_iput_char_quick.S
+++ b/runtime/interpreter/mterp/arm/op_iput_char_quick.S
@@ -1 +1,2 @@
-%include "arm/op_iput_quick.S" { "store":"strh" }
+%def op_iput_char_quick():
+% op_iput_quick(store="strh")
diff --git a/runtime/interpreter/mterp/arm/op_iput_object.S b/runtime/interpreter/mterp/arm/op_iput_object.S
index 1003d10..131edd5 100644
--- a/runtime/interpreter/mterp/arm/op_iput_object.S
+++ b/runtime/interpreter/mterp/arm/op_iput_object.S
@@ -1 +1,2 @@
-%include "arm/op_iput.S" { "is_object":"1", "helper":"MterpIPutObj" }
+%def op_iput_object():
+% op_iput(is_object="1", helper="MterpIPutObj")
diff --git a/runtime/interpreter/mterp/arm/op_iput_object_quick.S b/runtime/interpreter/mterp/arm/op_iput_object_quick.S
index 876b3da..be90b84 100644
--- a/runtime/interpreter/mterp/arm/op_iput_object_quick.S
+++ b/runtime/interpreter/mterp/arm/op_iput_object_quick.S
@@ -1,3 +1,4 @@
+%def op_iput_object_quick():
EXPORT_PC
add r0, rFP, #OFF_FP_SHADOWFRAME
mov r1, rPC
diff --git a/runtime/interpreter/mterp/arm/op_iput_quick.S b/runtime/interpreter/mterp/arm/op_iput_quick.S
index 98c8150..f84c098 100644
--- a/runtime/interpreter/mterp/arm/op_iput_quick.S
+++ b/runtime/interpreter/mterp/arm/op_iput_quick.S
@@ -1,4 +1,4 @@
-%default { "store":"str" }
+%def op_iput_quick(store="str"):
/* For: iput-quick, iput-object-quick */
/* op vA, vB, offset@CCCC */
mov r2, rINST, lsr #12 @ r2<- B
diff --git a/runtime/interpreter/mterp/arm/op_iput_short.S b/runtime/interpreter/mterp/arm/op_iput_short.S
index cc98363..e631a3b 100644
--- a/runtime/interpreter/mterp/arm/op_iput_short.S
+++ b/runtime/interpreter/mterp/arm/op_iput_short.S
@@ -1 +1,2 @@
-%include "arm/op_iput.S" { "helper":"MterpIPutI16" }
+%def op_iput_short():
+% op_iput(helper="MterpIPutI16")
diff --git a/runtime/interpreter/mterp/arm/op_iput_short_quick.S b/runtime/interpreter/mterp/arm/op_iput_short_quick.S
index 5212fc3..6a1b651 100644
--- a/runtime/interpreter/mterp/arm/op_iput_short_quick.S
+++ b/runtime/interpreter/mterp/arm/op_iput_short_quick.S
@@ -1 +1,2 @@
-%include "arm/op_iput_quick.S" { "store":"strh" }
+%def op_iput_short_quick():
+% op_iput_quick(store="strh")
diff --git a/runtime/interpreter/mterp/arm/op_iput_wide.S b/runtime/interpreter/mterp/arm/op_iput_wide.S
index f2845ad..2f34fd3 100644
--- a/runtime/interpreter/mterp/arm/op_iput_wide.S
+++ b/runtime/interpreter/mterp/arm/op_iput_wide.S
@@ -1 +1,2 @@
-%include "arm/op_iput.S" { "helper":"MterpIPutU64" }
+%def op_iput_wide():
+% op_iput(helper="MterpIPutU64")
diff --git a/runtime/interpreter/mterp/arm/op_iput_wide_quick.S b/runtime/interpreter/mterp/arm/op_iput_wide_quick.S
index 88e6ea1..8408f0a 100644
--- a/runtime/interpreter/mterp/arm/op_iput_wide_quick.S
+++ b/runtime/interpreter/mterp/arm/op_iput_wide_quick.S
@@ -1,3 +1,4 @@
+%def op_iput_wide_quick():
/* iput-wide-quick vA, vB, offset@CCCC */
mov r2, rINST, lsr #12 @ r2<- B
FETCH r3, 1 @ r3<- field byte offset
diff --git a/runtime/interpreter/mterp/arm/op_long_to_double.S b/runtime/interpreter/mterp/arm/op_long_to_double.S
index cac12d4..3228c70 100644
--- a/runtime/interpreter/mterp/arm/op_long_to_double.S
+++ b/runtime/interpreter/mterp/arm/op_long_to_double.S
@@ -1,4 +1,4 @@
-%default {}
+%def op_long_to_double():
/*
* Specialised 64-bit floating point operation.
*
diff --git a/runtime/interpreter/mterp/arm/op_long_to_float.S b/runtime/interpreter/mterp/arm/op_long_to_float.S
index efa5a66..c021975 100644
--- a/runtime/interpreter/mterp/arm/op_long_to_float.S
+++ b/runtime/interpreter/mterp/arm/op_long_to_float.S
@@ -1 +1,2 @@
-%include "arm/unopNarrower.S" {"instr":"bl __aeabi_l2f"}
+%def op_long_to_float():
+% unopNarrower(instr="bl __aeabi_l2f")
diff --git a/runtime/interpreter/mterp/arm/op_long_to_int.S b/runtime/interpreter/mterp/arm/op_long_to_int.S
index 3e91f23..eacb8f5 100644
--- a/runtime/interpreter/mterp/arm/op_long_to_int.S
+++ b/runtime/interpreter/mterp/arm/op_long_to_int.S
@@ -1,2 +1,3 @@
+%def op_long_to_int():
/* we ignore the high word, making this equivalent to a 32-bit reg move */
-%include "arm/op_move.S"
+% op_move()
diff --git a/runtime/interpreter/mterp/arm/op_monitor_enter.S b/runtime/interpreter/mterp/arm/op_monitor_enter.S
index 3c34f75..afe293c 100644
--- a/runtime/interpreter/mterp/arm/op_monitor_enter.S
+++ b/runtime/interpreter/mterp/arm/op_monitor_enter.S
@@ -1,3 +1,4 @@
+%def op_monitor_enter():
/*
* Synchronize on an object.
*/
diff --git a/runtime/interpreter/mterp/arm/op_monitor_exit.S b/runtime/interpreter/mterp/arm/op_monitor_exit.S
index fc7cef5..ddfa774 100644
--- a/runtime/interpreter/mterp/arm/op_monitor_exit.S
+++ b/runtime/interpreter/mterp/arm/op_monitor_exit.S
@@ -1,3 +1,4 @@
+%def op_monitor_exit():
/*
* Unlock an object.
*
diff --git a/runtime/interpreter/mterp/arm/op_move.S b/runtime/interpreter/mterp/arm/op_move.S
index dfecc24..7dd893f 100644
--- a/runtime/interpreter/mterp/arm/op_move.S
+++ b/runtime/interpreter/mterp/arm/op_move.S
@@ -1,4 +1,4 @@
-%default { "is_object":"0" }
+%def op_move(is_object="0"):
/* for move, move-object, long-to-int */
/* op vA, vB */
mov r1, rINST, lsr #12 @ r1<- B from 15:12
diff --git a/runtime/interpreter/mterp/arm/op_move_16.S b/runtime/interpreter/mterp/arm/op_move_16.S
index 78138a2..86601aa 100644
--- a/runtime/interpreter/mterp/arm/op_move_16.S
+++ b/runtime/interpreter/mterp/arm/op_move_16.S
@@ -1,4 +1,4 @@
-%default { "is_object":"0" }
+%def op_move_16(is_object="0"):
/* for: move/16, move-object/16 */
/* op vAAAA, vBBBB */
FETCH r1, 2 @ r1<- BBBB
diff --git a/runtime/interpreter/mterp/arm/op_move_exception.S b/runtime/interpreter/mterp/arm/op_move_exception.S
index 0242e26..9136228 100644
--- a/runtime/interpreter/mterp/arm/op_move_exception.S
+++ b/runtime/interpreter/mterp/arm/op_move_exception.S
@@ -1,3 +1,4 @@
+%def op_move_exception():
/* move-exception vAA */
mov r2, rINST, lsr #8 @ r2<- AA
ldr r3, [rSELF, #THREAD_EXCEPTION_OFFSET]
diff --git a/runtime/interpreter/mterp/arm/op_move_from16.S b/runtime/interpreter/mterp/arm/op_move_from16.S
index 3e79417..113909c 100644
--- a/runtime/interpreter/mterp/arm/op_move_from16.S
+++ b/runtime/interpreter/mterp/arm/op_move_from16.S
@@ -1,4 +1,4 @@
-%default { "is_object":"0" }
+%def op_move_from16(is_object="0"):
/* for: move/from16, move-object/from16 */
/* op vAA, vBBBB */
FETCH r1, 1 @ r1<- BBBB
diff --git a/runtime/interpreter/mterp/arm/op_move_object.S b/runtime/interpreter/mterp/arm/op_move_object.S
index 16de57b..dbb4d59 100644
--- a/runtime/interpreter/mterp/arm/op_move_object.S
+++ b/runtime/interpreter/mterp/arm/op_move_object.S
@@ -1 +1,2 @@
-%include "arm/op_move.S" {"is_object":"1"}
+%def op_move_object():
+% op_move(is_object="1")
diff --git a/runtime/interpreter/mterp/arm/op_move_object_16.S b/runtime/interpreter/mterp/arm/op_move_object_16.S
index 2534300..4012037 100644
--- a/runtime/interpreter/mterp/arm/op_move_object_16.S
+++ b/runtime/interpreter/mterp/arm/op_move_object_16.S
@@ -1 +1,2 @@
-%include "arm/op_move_16.S" {"is_object":"1"}
+%def op_move_object_16():
+% op_move_16(is_object="1")
diff --git a/runtime/interpreter/mterp/arm/op_move_object_from16.S b/runtime/interpreter/mterp/arm/op_move_object_from16.S
index 9e0cf02..c82698e 100644
--- a/runtime/interpreter/mterp/arm/op_move_object_from16.S
+++ b/runtime/interpreter/mterp/arm/op_move_object_from16.S
@@ -1 +1,2 @@
-%include "arm/op_move_from16.S" {"is_object":"1"}
+%def op_move_object_from16():
+% op_move_from16(is_object="1")
diff --git a/runtime/interpreter/mterp/arm/op_move_result.S b/runtime/interpreter/mterp/arm/op_move_result.S
index f2586a0..eee23f6 100644
--- a/runtime/interpreter/mterp/arm/op_move_result.S
+++ b/runtime/interpreter/mterp/arm/op_move_result.S
@@ -1,4 +1,4 @@
-%default { "is_object":"0" }
+%def op_move_result(is_object="0"):
/* for: move-result, move-result-object */
/* op vAA */
mov r2, rINST, lsr #8 @ r2<- AA
diff --git a/runtime/interpreter/mterp/arm/op_move_result_object.S b/runtime/interpreter/mterp/arm/op_move_result_object.S
index 643296a..87aea26 100644
--- a/runtime/interpreter/mterp/arm/op_move_result_object.S
+++ b/runtime/interpreter/mterp/arm/op_move_result_object.S
@@ -1 +1,2 @@
-%include "arm/op_move_result.S" {"is_object":"1"}
+%def op_move_result_object():
+% op_move_result(is_object="1")
diff --git a/runtime/interpreter/mterp/arm/op_move_result_wide.S b/runtime/interpreter/mterp/arm/op_move_result_wide.S
index 87929ea..8b4e980 100644
--- a/runtime/interpreter/mterp/arm/op_move_result_wide.S
+++ b/runtime/interpreter/mterp/arm/op_move_result_wide.S
@@ -1,3 +1,4 @@
+%def op_move_result_wide():
/* move-result-wide vAA */
mov rINST, rINST, lsr #8 @ rINST<- AA
ldr r3, [rFP, #OFF_FP_RESULT_REGISTER]
diff --git a/runtime/interpreter/mterp/arm/op_move_wide.S b/runtime/interpreter/mterp/arm/op_move_wide.S
index ff353ea..800f7f6 100644
--- a/runtime/interpreter/mterp/arm/op_move_wide.S
+++ b/runtime/interpreter/mterp/arm/op_move_wide.S
@@ -1,3 +1,4 @@
+%def op_move_wide():
/* move-wide vA, vB */
/* NOTE: regs can overlap, e.g. "move v6,v7" or "move v7,v6" */
mov r3, rINST, lsr #12 @ r3<- B
diff --git a/runtime/interpreter/mterp/arm/op_move_wide_16.S b/runtime/interpreter/mterp/arm/op_move_wide_16.S
index 9812b66..ef4f0a8 100644
--- a/runtime/interpreter/mterp/arm/op_move_wide_16.S
+++ b/runtime/interpreter/mterp/arm/op_move_wide_16.S
@@ -1,3 +1,4 @@
+%def op_move_wide_16():
/* move-wide/16 vAAAA, vBBBB */
/* NOTE: regs can overlap, e.g. "move v6,v7" or "move v7,v6" */
FETCH r3, 2 @ r3<- BBBB
diff --git a/runtime/interpreter/mterp/arm/op_move_wide_from16.S b/runtime/interpreter/mterp/arm/op_move_wide_from16.S
index d2cc60c..aae5aa3 100644
--- a/runtime/interpreter/mterp/arm/op_move_wide_from16.S
+++ b/runtime/interpreter/mterp/arm/op_move_wide_from16.S
@@ -1,3 +1,4 @@
+%def op_move_wide_from16():
/* move-wide/from16 vAA, vBBBB */
/* NOTE: regs can overlap, e.g. "move v6,v7" or "move v7,v6" */
FETCH r3, 1 @ r3<- BBBB
diff --git a/runtime/interpreter/mterp/arm/op_mul_double.S b/runtime/interpreter/mterp/arm/op_mul_double.S
index 530e85a..72948c2 100644
--- a/runtime/interpreter/mterp/arm/op_mul_double.S
+++ b/runtime/interpreter/mterp/arm/op_mul_double.S
@@ -1 +1,2 @@
-%include "arm/fbinopWide.S" {"instr":"fmuld d2, d0, d1"}
+%def op_mul_double():
+% fbinopWide(instr="fmuld d2, d0, d1")
diff --git a/runtime/interpreter/mterp/arm/op_mul_double_2addr.S b/runtime/interpreter/mterp/arm/op_mul_double_2addr.S
index da1abc6..afa7fcf 100644
--- a/runtime/interpreter/mterp/arm/op_mul_double_2addr.S
+++ b/runtime/interpreter/mterp/arm/op_mul_double_2addr.S
@@ -1 +1,2 @@
-%include "arm/fbinopWide2addr.S" {"instr":"fmuld d2, d0, d1"}
+%def op_mul_double_2addr():
+% fbinopWide2addr(instr="fmuld d2, d0, d1")
diff --git a/runtime/interpreter/mterp/arm/op_mul_float.S b/runtime/interpreter/mterp/arm/op_mul_float.S
index 6a72e6f..ecb3717 100644
--- a/runtime/interpreter/mterp/arm/op_mul_float.S
+++ b/runtime/interpreter/mterp/arm/op_mul_float.S
@@ -1 +1,2 @@
-%include "arm/fbinop.S" {"instr":"fmuls s2, s0, s1"}
+%def op_mul_float():
+% fbinop(instr="fmuls s2, s0, s1")
diff --git a/runtime/interpreter/mterp/arm/op_mul_float_2addr.S b/runtime/interpreter/mterp/arm/op_mul_float_2addr.S
index edb5101..d084b11 100644
--- a/runtime/interpreter/mterp/arm/op_mul_float_2addr.S
+++ b/runtime/interpreter/mterp/arm/op_mul_float_2addr.S
@@ -1 +1,2 @@
-%include "arm/fbinop2addr.S" {"instr":"fmuls s2, s0, s1"}
+%def op_mul_float_2addr():
+% fbinop2addr(instr="fmuls s2, s0, s1")
diff --git a/runtime/interpreter/mterp/arm/op_mul_int.S b/runtime/interpreter/mterp/arm/op_mul_int.S
index d6151d4..8a7daf2 100644
--- a/runtime/interpreter/mterp/arm/op_mul_int.S
+++ b/runtime/interpreter/mterp/arm/op_mul_int.S
@@ -1,2 +1,3 @@
+%def op_mul_int():
/* must be "mul r0, r1, r0" -- "r0, r0, r1" is illegal */
-%include "arm/binop.S" {"instr":"mul r0, r1, r0"}
+% binop(instr="mul r0, r1, r0")
diff --git a/runtime/interpreter/mterp/arm/op_mul_int_2addr.S b/runtime/interpreter/mterp/arm/op_mul_int_2addr.S
index 66a797d..98bfb7a 100644
--- a/runtime/interpreter/mterp/arm/op_mul_int_2addr.S
+++ b/runtime/interpreter/mterp/arm/op_mul_int_2addr.S
@@ -1,2 +1,3 @@
+%def op_mul_int_2addr():
/* must be "mul r0, r1, r0" -- "r0, r0, r1" is illegal */
-%include "arm/binop2addr.S" {"instr":"mul r0, r1, r0"}
+% binop2addr(instr="mul r0, r1, r0")
diff --git a/runtime/interpreter/mterp/arm/op_mul_int_lit16.S b/runtime/interpreter/mterp/arm/op_mul_int_lit16.S
index 4e40c43..ab3f3612 100644
--- a/runtime/interpreter/mterp/arm/op_mul_int_lit16.S
+++ b/runtime/interpreter/mterp/arm/op_mul_int_lit16.S
@@ -1,2 +1,3 @@
+%def op_mul_int_lit16():
/* must be "mul r0, r1, r0" -- "r0, r0, r1" is illegal */
-%include "arm/binopLit16.S" {"instr":"mul r0, r1, r0"}
+% binopLit16(instr="mul r0, r1, r0")
diff --git a/runtime/interpreter/mterp/arm/op_mul_int_lit8.S b/runtime/interpreter/mterp/arm/op_mul_int_lit8.S
index dbafae9..6cc5b89 100644
--- a/runtime/interpreter/mterp/arm/op_mul_int_lit8.S
+++ b/runtime/interpreter/mterp/arm/op_mul_int_lit8.S
@@ -1,2 +1,3 @@
+%def op_mul_int_lit8():
/* must be "mul r0, r1, r0" -- "r0, r0, r1" is illegal */
-%include "arm/binopLit8.S" {"instr":"mul r0, r1, r0"}
+% binopLit8(instr="mul r0, r1, r0")
diff --git a/runtime/interpreter/mterp/arm/op_mul_long.S b/runtime/interpreter/mterp/arm/op_mul_long.S
index 4f55280..c9f2e67 100644
--- a/runtime/interpreter/mterp/arm/op_mul_long.S
+++ b/runtime/interpreter/mterp/arm/op_mul_long.S
@@ -1,3 +1,4 @@
+%def op_mul_long():
/*
* Signed 64-bit integer multiply.
*
diff --git a/runtime/interpreter/mterp/arm/op_mul_long_2addr.S b/runtime/interpreter/mterp/arm/op_mul_long_2addr.S
index 4c1f058..2fd9f5c 100644
--- a/runtime/interpreter/mterp/arm/op_mul_long_2addr.S
+++ b/runtime/interpreter/mterp/arm/op_mul_long_2addr.S
@@ -1,3 +1,4 @@
+%def op_mul_long_2addr():
/*
* Signed 64-bit integer multiply, "/2addr" version.
*
diff --git a/runtime/interpreter/mterp/arm/op_neg_double.S b/runtime/interpreter/mterp/arm/op_neg_double.S
index 33e609c..df73341 100644
--- a/runtime/interpreter/mterp/arm/op_neg_double.S
+++ b/runtime/interpreter/mterp/arm/op_neg_double.S
@@ -1 +1,2 @@
-%include "arm/unopWide.S" {"instr":"add r1, r1, #0x80000000"}
+%def op_neg_double():
+% unopWide(instr="add r1, r1, #0x80000000")
diff --git a/runtime/interpreter/mterp/arm/op_neg_float.S b/runtime/interpreter/mterp/arm/op_neg_float.S
index 993583f..4ed178f 100644
--- a/runtime/interpreter/mterp/arm/op_neg_float.S
+++ b/runtime/interpreter/mterp/arm/op_neg_float.S
@@ -1 +1,2 @@
-%include "arm/unop.S" {"instr":"add r0, r0, #0x80000000"}
+%def op_neg_float():
+% unop(instr="add r0, r0, #0x80000000")
diff --git a/runtime/interpreter/mterp/arm/op_neg_int.S b/runtime/interpreter/mterp/arm/op_neg_int.S
index ec0b253..08b72a1 100644
--- a/runtime/interpreter/mterp/arm/op_neg_int.S
+++ b/runtime/interpreter/mterp/arm/op_neg_int.S
@@ -1 +1,2 @@
-%include "arm/unop.S" {"instr":"rsb r0, r0, #0"}
+%def op_neg_int():
+% unop(instr="rsb r0, r0, #0")
diff --git a/runtime/interpreter/mterp/arm/op_neg_long.S b/runtime/interpreter/mterp/arm/op_neg_long.S
index dab2eb4..716c6dc 100644
--- a/runtime/interpreter/mterp/arm/op_neg_long.S
+++ b/runtime/interpreter/mterp/arm/op_neg_long.S
@@ -1 +1,2 @@
-%include "arm/unopWide.S" {"preinstr":"rsbs r0, r0, #0", "instr":"rsc r1, r1, #0"}
+%def op_neg_long():
+% unopWide(preinstr="rsbs r0, r0, #0", instr="rsc r1, r1, #0")
diff --git a/runtime/interpreter/mterp/arm/op_new_array.S b/runtime/interpreter/mterp/arm/op_new_array.S
index 8bb792c..04b5fa4 100644
--- a/runtime/interpreter/mterp/arm/op_new_array.S
+++ b/runtime/interpreter/mterp/arm/op_new_array.S
@@ -1,3 +1,4 @@
+%def op_new_array():
/*
* Allocate an array of objects, specified with the array class
* and a count.
diff --git a/runtime/interpreter/mterp/arm/op_new_instance.S b/runtime/interpreter/mterp/arm/op_new_instance.S
index 95d4be8..447a6cf 100644
--- a/runtime/interpreter/mterp/arm/op_new_instance.S
+++ b/runtime/interpreter/mterp/arm/op_new_instance.S
@@ -1,3 +1,4 @@
+%def op_new_instance():
/*
* Create a new instance of a class.
*/
diff --git a/runtime/interpreter/mterp/arm/op_nop.S b/runtime/interpreter/mterp/arm/op_nop.S
index af0f88f..8bfd1a3 100644
--- a/runtime/interpreter/mterp/arm/op_nop.S
+++ b/runtime/interpreter/mterp/arm/op_nop.S
@@ -1,3 +1,4 @@
+%def op_nop():
FETCH_ADVANCE_INST 1 @ advance to next instr, load rINST
GET_INST_OPCODE ip @ ip<- opcode from rINST
GOTO_OPCODE ip @ execute it
diff --git a/runtime/interpreter/mterp/arm/op_not_int.S b/runtime/interpreter/mterp/arm/op_not_int.S
index 816485a..90c4eed 100644
--- a/runtime/interpreter/mterp/arm/op_not_int.S
+++ b/runtime/interpreter/mterp/arm/op_not_int.S
@@ -1 +1,2 @@
-%include "arm/unop.S" {"instr":"mvn r0, r0"}
+%def op_not_int():
+% unop(instr="mvn r0, r0")
diff --git a/runtime/interpreter/mterp/arm/op_not_long.S b/runtime/interpreter/mterp/arm/op_not_long.S
index 49a5905..29104f2 100644
--- a/runtime/interpreter/mterp/arm/op_not_long.S
+++ b/runtime/interpreter/mterp/arm/op_not_long.S
@@ -1 +1,2 @@
-%include "arm/unopWide.S" {"preinstr":"mvn r0, r0", "instr":"mvn r1, r1"}
+%def op_not_long():
+% unopWide(preinstr="mvn r0, r0", instr="mvn r1, r1")
diff --git a/runtime/interpreter/mterp/arm/op_or_int.S b/runtime/interpreter/mterp/arm/op_or_int.S
index b046e8d..6992d2a 100644
--- a/runtime/interpreter/mterp/arm/op_or_int.S
+++ b/runtime/interpreter/mterp/arm/op_or_int.S
@@ -1 +1,2 @@
-%include "arm/binop.S" {"instr":"orr r0, r0, r1"}
+%def op_or_int():
+% binop(instr="orr r0, r0, r1")
diff --git a/runtime/interpreter/mterp/arm/op_or_int_2addr.S b/runtime/interpreter/mterp/arm/op_or_int_2addr.S
index 493c59f..805ca09 100644
--- a/runtime/interpreter/mterp/arm/op_or_int_2addr.S
+++ b/runtime/interpreter/mterp/arm/op_or_int_2addr.S
@@ -1 +1,2 @@
-%include "arm/binop2addr.S" {"instr":"orr r0, r0, r1"}
+%def op_or_int_2addr():
+% binop2addr(instr="orr r0, r0, r1")
diff --git a/runtime/interpreter/mterp/arm/op_or_int_lit16.S b/runtime/interpreter/mterp/arm/op_or_int_lit16.S
index 0a01db8..03bf4ed 100644
--- a/runtime/interpreter/mterp/arm/op_or_int_lit16.S
+++ b/runtime/interpreter/mterp/arm/op_or_int_lit16.S
@@ -1 +1,2 @@
-%include "arm/binopLit16.S" {"instr":"orr r0, r0, r1"}
+%def op_or_int_lit16():
+% binopLit16(instr="orr r0, r0, r1")
diff --git a/runtime/interpreter/mterp/arm/op_or_int_lit8.S b/runtime/interpreter/mterp/arm/op_or_int_lit8.S
index 9882bfc..a29d73f 100644
--- a/runtime/interpreter/mterp/arm/op_or_int_lit8.S
+++ b/runtime/interpreter/mterp/arm/op_or_int_lit8.S
@@ -1 +1,2 @@
-%include "arm/binopLit8.S" {"extract":"", "instr":"orr r0, r0, r3, asr #8"}
+%def op_or_int_lit8():
+% binopLit8(extract="", instr="orr r0, r0, r3, asr #8")
diff --git a/runtime/interpreter/mterp/arm/op_or_long.S b/runtime/interpreter/mterp/arm/op_or_long.S
index 048c45c..3278700 100644
--- a/runtime/interpreter/mterp/arm/op_or_long.S
+++ b/runtime/interpreter/mterp/arm/op_or_long.S
@@ -1 +1,2 @@
-%include "arm/binopWide.S" {"preinstr":"orr r0, r0, r2", "instr":"orr r1, r1, r3"}
+%def op_or_long():
+% binopWide(preinstr="orr r0, r0, r2", instr="orr r1, r1, r3")
diff --git a/runtime/interpreter/mterp/arm/op_or_long_2addr.S b/runtime/interpreter/mterp/arm/op_or_long_2addr.S
index 9395346..56ce5e6 100644
--- a/runtime/interpreter/mterp/arm/op_or_long_2addr.S
+++ b/runtime/interpreter/mterp/arm/op_or_long_2addr.S
@@ -1 +1,2 @@
-%include "arm/binopWide2addr.S" {"preinstr":"orr r0, r0, r2", "instr":"orr r1, r1, r3"}
+%def op_or_long_2addr():
+% binopWide2addr(preinstr="orr r0, r0, r2", instr="orr r1, r1, r3")
diff --git a/runtime/interpreter/mterp/arm/op_packed_switch.S b/runtime/interpreter/mterp/arm/op_packed_switch.S
index 412c58f..26af19d 100644
--- a/runtime/interpreter/mterp/arm/op_packed_switch.S
+++ b/runtime/interpreter/mterp/arm/op_packed_switch.S
@@ -1,4 +1,4 @@
-%default { "func":"MterpDoPackedSwitch" }
+%def op_packed_switch(func="MterpDoPackedSwitch"):
/*
* Handle a packed-switch or sparse-switch instruction. In both cases
* we decode it and hand it off to a helper function.
diff --git a/runtime/interpreter/mterp/arm/op_rem_double.S b/runtime/interpreter/mterp/arm/op_rem_double.S
index b539221..1e1e680 100644
--- a/runtime/interpreter/mterp/arm/op_rem_double.S
+++ b/runtime/interpreter/mterp/arm/op_rem_double.S
@@ -1,2 +1,3 @@
+%def op_rem_double():
/* EABI doesn't define a double remainder function, but libm does */
-%include "arm/binopWide.S" {"instr":"bl fmod"}
+% binopWide(instr="bl fmod")
diff --git a/runtime/interpreter/mterp/arm/op_rem_double_2addr.S b/runtime/interpreter/mterp/arm/op_rem_double_2addr.S
index 372ef1d..8db1cde 100644
--- a/runtime/interpreter/mterp/arm/op_rem_double_2addr.S
+++ b/runtime/interpreter/mterp/arm/op_rem_double_2addr.S
@@ -1,2 +1,3 @@
+%def op_rem_double_2addr():
/* EABI doesn't define a double remainder function, but libm does */
-%include "arm/binopWide2addr.S" {"instr":"bl fmod"}
+% binopWide2addr(instr="bl fmod")
diff --git a/runtime/interpreter/mterp/arm/op_rem_float.S b/runtime/interpreter/mterp/arm/op_rem_float.S
index 7bd10de..5362e0a 100644
--- a/runtime/interpreter/mterp/arm/op_rem_float.S
+++ b/runtime/interpreter/mterp/arm/op_rem_float.S
@@ -1,2 +1,3 @@
+%def op_rem_float():
/* EABI doesn't define a float remainder function, but libm does */
-%include "arm/binop.S" {"instr":"bl fmodf"}
+% binop(instr="bl fmodf")
diff --git a/runtime/interpreter/mterp/arm/op_rem_float_2addr.S b/runtime/interpreter/mterp/arm/op_rem_float_2addr.S
index 93c5fae..90ff391 100644
--- a/runtime/interpreter/mterp/arm/op_rem_float_2addr.S
+++ b/runtime/interpreter/mterp/arm/op_rem_float_2addr.S
@@ -1,2 +1,3 @@
+%def op_rem_float_2addr():
/* EABI doesn't define a float remainder function, but libm does */
-%include "arm/binop2addr.S" {"instr":"bl fmodf"}
+% binop2addr(instr="bl fmodf")
diff --git a/runtime/interpreter/mterp/arm/op_rem_int.S b/runtime/interpreter/mterp/arm/op_rem_int.S
index ff62573..068870e 100644
--- a/runtime/interpreter/mterp/arm/op_rem_int.S
+++ b/runtime/interpreter/mterp/arm/op_rem_int.S
@@ -1,4 +1,4 @@
-%default {}
+%def op_rem_int():
/*
* Specialized 32-bit binary operation
*
diff --git a/runtime/interpreter/mterp/arm/op_rem_int_2addr.S b/runtime/interpreter/mterp/arm/op_rem_int_2addr.S
index ba5751a..22ade95 100644
--- a/runtime/interpreter/mterp/arm/op_rem_int_2addr.S
+++ b/runtime/interpreter/mterp/arm/op_rem_int_2addr.S
@@ -1,4 +1,4 @@
-%default {}
+%def op_rem_int_2addr():
/*
* Specialized 32-bit binary operation
*
diff --git a/runtime/interpreter/mterp/arm/op_rem_int_lit16.S b/runtime/interpreter/mterp/arm/op_rem_int_lit16.S
index 4edb187..0605663 100644
--- a/runtime/interpreter/mterp/arm/op_rem_int_lit16.S
+++ b/runtime/interpreter/mterp/arm/op_rem_int_lit16.S
@@ -1,4 +1,4 @@
-%default {}
+%def op_rem_int_lit16():
/*
* Specialized 32-bit binary operation
*
diff --git a/runtime/interpreter/mterp/arm/op_rem_int_lit8.S b/runtime/interpreter/mterp/arm/op_rem_int_lit8.S
index 3888361..9b6867b 100644
--- a/runtime/interpreter/mterp/arm/op_rem_int_lit8.S
+++ b/runtime/interpreter/mterp/arm/op_rem_int_lit8.S
@@ -1,4 +1,4 @@
-%default {}
+%def op_rem_int_lit8():
/*
* Specialized 32-bit binary operation
*
diff --git a/runtime/interpreter/mterp/arm/op_rem_long.S b/runtime/interpreter/mterp/arm/op_rem_long.S
index b2b1c24..a44827f 100644
--- a/runtime/interpreter/mterp/arm/op_rem_long.S
+++ b/runtime/interpreter/mterp/arm/op_rem_long.S
@@ -1,2 +1,3 @@
+%def op_rem_long():
/* ldivmod returns quotient in r0/r1 and remainder in r2/r3 */
-%include "arm/binopWide.S" {"instr":"bl __aeabi_ldivmod", "result0":"r2", "result1":"r3", "chkzero":"1"}
+% binopWide(instr="bl __aeabi_ldivmod", result0="r2", result1="r3", chkzero="1")
diff --git a/runtime/interpreter/mterp/arm/op_rem_long_2addr.S b/runtime/interpreter/mterp/arm/op_rem_long_2addr.S
index f87d493..cf34964 100644
--- a/runtime/interpreter/mterp/arm/op_rem_long_2addr.S
+++ b/runtime/interpreter/mterp/arm/op_rem_long_2addr.S
@@ -1,2 +1,3 @@
+%def op_rem_long_2addr():
/* ldivmod returns quotient in r0/r1 and remainder in r2/r3 */
-%include "arm/binopWide2addr.S" {"instr":"bl __aeabi_ldivmod", "result0":"r2", "result1":"r3", "chkzero":"1"}
+% binopWide2addr(instr="bl __aeabi_ldivmod", result0="r2", result1="r3", chkzero="1")
diff --git a/runtime/interpreter/mterp/arm/op_return.S b/runtime/interpreter/mterp/arm/op_return.S
index f9c0f0f..fe35ec9 100644
--- a/runtime/interpreter/mterp/arm/op_return.S
+++ b/runtime/interpreter/mterp/arm/op_return.S
@@ -1,3 +1,4 @@
+%def op_return():
/*
* Return a 32-bit value.
*
diff --git a/runtime/interpreter/mterp/arm/op_return_object.S b/runtime/interpreter/mterp/arm/op_return_object.S
index c490730..2eeec0b 100644
--- a/runtime/interpreter/mterp/arm/op_return_object.S
+++ b/runtime/interpreter/mterp/arm/op_return_object.S
@@ -1 +1,2 @@
-%include "arm/op_return.S"
+%def op_return_object():
+% op_return()
diff --git a/runtime/interpreter/mterp/arm/op_return_void.S b/runtime/interpreter/mterp/arm/op_return_void.S
index a91ccb3..2418c6a 100644
--- a/runtime/interpreter/mterp/arm/op_return_void.S
+++ b/runtime/interpreter/mterp/arm/op_return_void.S
@@ -1,3 +1,4 @@
+%def op_return_void():
.extern MterpThreadFenceForConstructor
bl MterpThreadFenceForConstructor
ldr lr, [rSELF, #THREAD_FLAGS_OFFSET]
diff --git a/runtime/interpreter/mterp/arm/op_return_void_no_barrier.S b/runtime/interpreter/mterp/arm/op_return_void_no_barrier.S
index b953f4c..fa4cc0a 100644
--- a/runtime/interpreter/mterp/arm/op_return_void_no_barrier.S
+++ b/runtime/interpreter/mterp/arm/op_return_void_no_barrier.S
@@ -1,3 +1,4 @@
+%def op_return_void_no_barrier():
ldr lr, [rSELF, #THREAD_FLAGS_OFFSET]
mov r0, rSELF
ands lr, #THREAD_SUSPEND_OR_CHECKPOINT_REQUEST
diff --git a/runtime/interpreter/mterp/arm/op_return_wide.S b/runtime/interpreter/mterp/arm/op_return_wide.S
index df582c0..a2a3be4 100644
--- a/runtime/interpreter/mterp/arm/op_return_wide.S
+++ b/runtime/interpreter/mterp/arm/op_return_wide.S
@@ -1,3 +1,4 @@
+%def op_return_wide():
/*
* Return a 64-bit value.
*/
diff --git a/runtime/interpreter/mterp/arm/op_rsub_int.S b/runtime/interpreter/mterp/arm/op_rsub_int.S
index 1508dd4..5d41f6d 100644
--- a/runtime/interpreter/mterp/arm/op_rsub_int.S
+++ b/runtime/interpreter/mterp/arm/op_rsub_int.S
@@ -1,2 +1,3 @@
+%def op_rsub_int():
/* this op is "rsub-int", but can be thought of as "rsub-int/lit16" */
-%include "arm/binopLit16.S" {"instr":"rsb r0, r0, r1"}
+% binopLit16(instr="rsb r0, r0, r1")
diff --git a/runtime/interpreter/mterp/arm/op_rsub_int_lit8.S b/runtime/interpreter/mterp/arm/op_rsub_int_lit8.S
index dc953dc..5ce759d 100644
--- a/runtime/interpreter/mterp/arm/op_rsub_int_lit8.S
+++ b/runtime/interpreter/mterp/arm/op_rsub_int_lit8.S
@@ -1 +1,2 @@
-%include "arm/binopLit8.S" {"extract":"", "instr":"rsb r0, r0, r3, asr #8"}
+%def op_rsub_int_lit8():
+% binopLit8(extract="", instr="rsb r0, r0, r3, asr #8")
diff --git a/runtime/interpreter/mterp/arm/op_sget.S b/runtime/interpreter/mterp/arm/op_sget.S
index b382de4..8a6a66a 100644
--- a/runtime/interpreter/mterp/arm/op_sget.S
+++ b/runtime/interpreter/mterp/arm/op_sget.S
@@ -1,2 +1,2 @@
-%default { "is_object":"0", "helper":"MterpSGetU32" }
-%include "arm/field.S" { }
+%def op_sget(is_object="0", helper="MterpSGetU32"):
+% field(helper=helper)
diff --git a/runtime/interpreter/mterp/arm/op_sget_boolean.S b/runtime/interpreter/mterp/arm/op_sget_boolean.S
index df1a024..d9c12c9 100644
--- a/runtime/interpreter/mterp/arm/op_sget_boolean.S
+++ b/runtime/interpreter/mterp/arm/op_sget_boolean.S
@@ -1 +1,2 @@
-%include "arm/op_sget.S" {"helper":"MterpSGetU8"}
+%def op_sget_boolean():
+% op_sget(helper="MterpSGetU8")
diff --git a/runtime/interpreter/mterp/arm/op_sget_byte.S b/runtime/interpreter/mterp/arm/op_sget_byte.S
index 8ad3ff0..37c6879 100644
--- a/runtime/interpreter/mterp/arm/op_sget_byte.S
+++ b/runtime/interpreter/mterp/arm/op_sget_byte.S
@@ -1 +1,2 @@
-%include "arm/op_sget.S" {"helper":"MterpSGetI8"}
+%def op_sget_byte():
+% op_sget(helper="MterpSGetI8")
diff --git a/runtime/interpreter/mterp/arm/op_sget_char.S b/runtime/interpreter/mterp/arm/op_sget_char.S
index 5239514..003bcd1 100644
--- a/runtime/interpreter/mterp/arm/op_sget_char.S
+++ b/runtime/interpreter/mterp/arm/op_sget_char.S
@@ -1 +1,2 @@
-%include "arm/op_sget.S" {"helper":"MterpSGetU16"}
+%def op_sget_char():
+% op_sget(helper="MterpSGetU16")
diff --git a/runtime/interpreter/mterp/arm/op_sget_object.S b/runtime/interpreter/mterp/arm/op_sget_object.S
index e61a5a7..7cf3597 100644
--- a/runtime/interpreter/mterp/arm/op_sget_object.S
+++ b/runtime/interpreter/mterp/arm/op_sget_object.S
@@ -1 +1,2 @@
-%include "arm/op_sget.S" {"is_object":"1", "helper":"MterpSGetObj"}
+%def op_sget_object():
+% op_sget(is_object="1", helper="MterpSGetObj")
diff --git a/runtime/interpreter/mterp/arm/op_sget_short.S b/runtime/interpreter/mterp/arm/op_sget_short.S
index 49493eb..afacb57 100644
--- a/runtime/interpreter/mterp/arm/op_sget_short.S
+++ b/runtime/interpreter/mterp/arm/op_sget_short.S
@@ -1 +1,2 @@
-%include "arm/op_sget.S" {"helper":"MterpSGetI16"}
+%def op_sget_short():
+% op_sget(helper="MterpSGetI16")
diff --git a/runtime/interpreter/mterp/arm/op_sget_wide.S b/runtime/interpreter/mterp/arm/op_sget_wide.S
index d6905df..fff2be6 100644
--- a/runtime/interpreter/mterp/arm/op_sget_wide.S
+++ b/runtime/interpreter/mterp/arm/op_sget_wide.S
@@ -1 +1,2 @@
-%include "arm/op_sget.S" {"helper":"MterpSGetU64"}
+%def op_sget_wide():
+% op_sget(helper="MterpSGetU64")
diff --git a/runtime/interpreter/mterp/arm/op_shl_int.S b/runtime/interpreter/mterp/arm/op_shl_int.S
index 7e4c768..948a520 100644
--- a/runtime/interpreter/mterp/arm/op_shl_int.S
+++ b/runtime/interpreter/mterp/arm/op_shl_int.S
@@ -1 +1,2 @@
-%include "arm/binop.S" {"preinstr":"and r1, r1, #31", "instr":"mov r0, r0, asl r1"}
+%def op_shl_int():
+% binop(preinstr="and r1, r1, #31", instr="mov r0, r0, asl r1")
diff --git a/runtime/interpreter/mterp/arm/op_shl_int_2addr.S b/runtime/interpreter/mterp/arm/op_shl_int_2addr.S
index 4286577..89b16da 100644
--- a/runtime/interpreter/mterp/arm/op_shl_int_2addr.S
+++ b/runtime/interpreter/mterp/arm/op_shl_int_2addr.S
@@ -1 +1,2 @@
-%include "arm/binop2addr.S" {"preinstr":"and r1, r1, #31", "instr":"mov r0, r0, asl r1"}
+%def op_shl_int_2addr():
+% binop2addr(preinstr="and r1, r1, #31", instr="mov r0, r0, asl r1")
diff --git a/runtime/interpreter/mterp/arm/op_shl_int_lit8.S b/runtime/interpreter/mterp/arm/op_shl_int_lit8.S
index 60a1498..d6f81e7 100644
--- a/runtime/interpreter/mterp/arm/op_shl_int_lit8.S
+++ b/runtime/interpreter/mterp/arm/op_shl_int_lit8.S
@@ -1 +1,2 @@
-%include "arm/binopLit8.S" {"extract":"ubfx r1, r3, #8, #5", "instr":"mov r0, r0, asl r1"}
+%def op_shl_int_lit8():
+% binopLit8(extract="ubfx r1, r3, #8, #5", instr="mov r0, r0, asl r1")
diff --git a/runtime/interpreter/mterp/arm/op_shl_long.S b/runtime/interpreter/mterp/arm/op_shl_long.S
index 82ec6ed..d11fee2 100644
--- a/runtime/interpreter/mterp/arm/op_shl_long.S
+++ b/runtime/interpreter/mterp/arm/op_shl_long.S
@@ -1,3 +1,4 @@
+%def op_shl_long():
/*
* Long integer shift. This is different from the generic 32/64-bit
* binary operations because vAA/vBB are 64-bit but vCC (the shift
diff --git a/runtime/interpreter/mterp/arm/op_shl_long_2addr.S b/runtime/interpreter/mterp/arm/op_shl_long_2addr.S
index f361a7d..e636d2e 100644
--- a/runtime/interpreter/mterp/arm/op_shl_long_2addr.S
+++ b/runtime/interpreter/mterp/arm/op_shl_long_2addr.S
@@ -1,3 +1,4 @@
+%def op_shl_long_2addr():
/*
* Long integer shift, 2addr version. vA is 64-bit value/result, vB is
* 32-bit shift distance.
diff --git a/runtime/interpreter/mterp/arm/op_shr_int.S b/runtime/interpreter/mterp/arm/op_shr_int.S
index 6317605..4d94d1f 100644
--- a/runtime/interpreter/mterp/arm/op_shr_int.S
+++ b/runtime/interpreter/mterp/arm/op_shr_int.S
@@ -1 +1,2 @@
-%include "arm/binop.S" {"preinstr":"and r1, r1, #31", "instr":"mov r0, r0, asr r1"}
+%def op_shr_int():
+% binop(preinstr="and r1, r1, #31", instr="mov r0, r0, asr r1")
diff --git a/runtime/interpreter/mterp/arm/op_shr_int_2addr.S b/runtime/interpreter/mterp/arm/op_shr_int_2addr.S
index cc8632f..786b409 100644
--- a/runtime/interpreter/mterp/arm/op_shr_int_2addr.S
+++ b/runtime/interpreter/mterp/arm/op_shr_int_2addr.S
@@ -1 +1,2 @@
-%include "arm/binop2addr.S" {"preinstr":"and r1, r1, #31", "instr":"mov r0, r0, asr r1"}
+%def op_shr_int_2addr():
+% binop2addr(preinstr="and r1, r1, #31", instr="mov r0, r0, asr r1")
diff --git a/runtime/interpreter/mterp/arm/op_shr_int_lit8.S b/runtime/interpreter/mterp/arm/op_shr_int_lit8.S
index c2f6cb0..f5550b1 100644
--- a/runtime/interpreter/mterp/arm/op_shr_int_lit8.S
+++ b/runtime/interpreter/mterp/arm/op_shr_int_lit8.S
@@ -1 +1,2 @@
-%include "arm/binopLit8.S" {"extract":"ubfx r1, r3, #8, #5", "instr":"mov r0, r0, asr r1"}
+%def op_shr_int_lit8():
+% binopLit8(extract="ubfx r1, r3, #8, #5", instr="mov r0, r0, asr r1")
diff --git a/runtime/interpreter/mterp/arm/op_shr_long.S b/runtime/interpreter/mterp/arm/op_shr_long.S
index a0afe5b..eec8d32 100644
--- a/runtime/interpreter/mterp/arm/op_shr_long.S
+++ b/runtime/interpreter/mterp/arm/op_shr_long.S
@@ -1,3 +1,4 @@
+%def op_shr_long():
/*
* Long integer shift. This is different from the generic 32/64-bit
* binary operations because vAA/vBB are 64-bit but vCC (the shift
diff --git a/runtime/interpreter/mterp/arm/op_shr_long_2addr.S b/runtime/interpreter/mterp/arm/op_shr_long_2addr.S
index 976110e..ac40d36 100644
--- a/runtime/interpreter/mterp/arm/op_shr_long_2addr.S
+++ b/runtime/interpreter/mterp/arm/op_shr_long_2addr.S
@@ -1,3 +1,4 @@
+%def op_shr_long_2addr():
/*
* Long integer shift, 2addr version. vA is 64-bit value/result, vB is
* 32-bit shift distance.
diff --git a/runtime/interpreter/mterp/arm/op_sparse_switch.S b/runtime/interpreter/mterp/arm/op_sparse_switch.S
index 9f7a42b..b74d7da 100644
--- a/runtime/interpreter/mterp/arm/op_sparse_switch.S
+++ b/runtime/interpreter/mterp/arm/op_sparse_switch.S
@@ -1 +1,2 @@
-%include "arm/op_packed_switch.S" { "func":"MterpDoSparseSwitch" }
+%def op_sparse_switch():
+% op_packed_switch(func="MterpDoSparseSwitch")
diff --git a/runtime/interpreter/mterp/arm/op_sput.S b/runtime/interpreter/mterp/arm/op_sput.S
index 171f024..cbd6ee9 100644
--- a/runtime/interpreter/mterp/arm/op_sput.S
+++ b/runtime/interpreter/mterp/arm/op_sput.S
@@ -1,2 +1,2 @@
-%default { "is_object":"0", "helper":"MterpSPutU32"}
-%include "arm/field.S" { }
+%def op_sput(is_object="0", helper="MterpSPutU32"):
+% field(helper=helper)
diff --git a/runtime/interpreter/mterp/arm/op_sput_boolean.S b/runtime/interpreter/mterp/arm/op_sput_boolean.S
index 0c37623..36fba84 100644
--- a/runtime/interpreter/mterp/arm/op_sput_boolean.S
+++ b/runtime/interpreter/mterp/arm/op_sput_boolean.S
@@ -1 +1,2 @@
-%include "arm/op_sput.S" {"helper":"MterpSPutU8"}
+%def op_sput_boolean():
+% op_sput(helper="MterpSPutU8")
diff --git a/runtime/interpreter/mterp/arm/op_sput_byte.S b/runtime/interpreter/mterp/arm/op_sput_byte.S
index 8d4e754..84ad4a0 100644
--- a/runtime/interpreter/mterp/arm/op_sput_byte.S
+++ b/runtime/interpreter/mterp/arm/op_sput_byte.S
@@ -1 +1,2 @@
-%include "arm/op_sput.S" {"helper":"MterpSPutI8"}
+%def op_sput_byte():
+% op_sput(helper="MterpSPutI8")
diff --git a/runtime/interpreter/mterp/arm/op_sput_char.S b/runtime/interpreter/mterp/arm/op_sput_char.S
index 442b56f..9b8eeba 100644
--- a/runtime/interpreter/mterp/arm/op_sput_char.S
+++ b/runtime/interpreter/mterp/arm/op_sput_char.S
@@ -1 +1,2 @@
-%include "arm/op_sput.S" {"helper":"MterpSPutU16"}
+%def op_sput_char():
+% op_sput(helper="MterpSPutU16")
diff --git a/runtime/interpreter/mterp/arm/op_sput_object.S b/runtime/interpreter/mterp/arm/op_sput_object.S
index 8fcd52e..081360c 100644
--- a/runtime/interpreter/mterp/arm/op_sput_object.S
+++ b/runtime/interpreter/mterp/arm/op_sput_object.S
@@ -1 +1,2 @@
-%include "arm/op_sput.S" {"is_object":"1", "helper":"MterpSPutObj"}
+%def op_sput_object():
+% op_sput(is_object="1", helper="MterpSPutObj")
diff --git a/runtime/interpreter/mterp/arm/op_sput_short.S b/runtime/interpreter/mterp/arm/op_sput_short.S
index 0eb533f..ee16513 100644
--- a/runtime/interpreter/mterp/arm/op_sput_short.S
+++ b/runtime/interpreter/mterp/arm/op_sput_short.S
@@ -1 +1,2 @@
-%include "arm/op_sput.S" {"helper":"MterpSPutI16"}
+%def op_sput_short():
+% op_sput(helper="MterpSPutI16")
diff --git a/runtime/interpreter/mterp/arm/op_sput_wide.S b/runtime/interpreter/mterp/arm/op_sput_wide.S
index c254f78..44c1a18 100644
--- a/runtime/interpreter/mterp/arm/op_sput_wide.S
+++ b/runtime/interpreter/mterp/arm/op_sput_wide.S
@@ -1 +1,2 @@
-%include "arm/op_sput.S" {"helper":"MterpSPutU64"}
+%def op_sput_wide():
+% op_sput(helper="MterpSPutU64")
diff --git a/runtime/interpreter/mterp/arm/op_sub_double.S b/runtime/interpreter/mterp/arm/op_sub_double.S
index 69bcc67..418f930 100644
--- a/runtime/interpreter/mterp/arm/op_sub_double.S
+++ b/runtime/interpreter/mterp/arm/op_sub_double.S
@@ -1 +1,2 @@
-%include "arm/fbinopWide.S" {"instr":"fsubd d2, d0, d1"}
+%def op_sub_double():
+% fbinopWide(instr="fsubd d2, d0, d1")
diff --git a/runtime/interpreter/mterp/arm/op_sub_double_2addr.S b/runtime/interpreter/mterp/arm/op_sub_double_2addr.S
index 2ea59fe..2bd0370 100644
--- a/runtime/interpreter/mterp/arm/op_sub_double_2addr.S
+++ b/runtime/interpreter/mterp/arm/op_sub_double_2addr.S
@@ -1 +1,2 @@
-%include "arm/fbinopWide2addr.S" {"instr":"fsubd d2, d0, d1"}
+%def op_sub_double_2addr():
+% fbinopWide2addr(instr="fsubd d2, d0, d1")
diff --git a/runtime/interpreter/mterp/arm/op_sub_float.S b/runtime/interpreter/mterp/arm/op_sub_float.S
index 3f17a0d..c0b09ff 100644
--- a/runtime/interpreter/mterp/arm/op_sub_float.S
+++ b/runtime/interpreter/mterp/arm/op_sub_float.S
@@ -1 +1,2 @@
-%include "arm/fbinop.S" {"instr":"fsubs s2, s0, s1"}
+%def op_sub_float():
+% fbinop(instr="fsubs s2, s0, s1")
diff --git a/runtime/interpreter/mterp/arm/op_sub_float_2addr.S b/runtime/interpreter/mterp/arm/op_sub_float_2addr.S
index 2f4aac4..c5ffec7 100644
--- a/runtime/interpreter/mterp/arm/op_sub_float_2addr.S
+++ b/runtime/interpreter/mterp/arm/op_sub_float_2addr.S
@@ -1 +1,2 @@
-%include "arm/fbinop2addr.S" {"instr":"fsubs s2, s0, s1"}
+%def op_sub_float_2addr():
+% fbinop2addr(instr="fsubs s2, s0, s1")
diff --git a/runtime/interpreter/mterp/arm/op_sub_int.S b/runtime/interpreter/mterp/arm/op_sub_int.S
index efb9e10..0932989 100644
--- a/runtime/interpreter/mterp/arm/op_sub_int.S
+++ b/runtime/interpreter/mterp/arm/op_sub_int.S
@@ -1 +1,2 @@
-%include "arm/binop.S" {"instr":"sub r0, r0, r1"}
+%def op_sub_int():
+% binop(instr="sub r0, r0, r1")
diff --git a/runtime/interpreter/mterp/arm/op_sub_int_2addr.S b/runtime/interpreter/mterp/arm/op_sub_int_2addr.S
index 4d3036b..c6fa2e4 100644
--- a/runtime/interpreter/mterp/arm/op_sub_int_2addr.S
+++ b/runtime/interpreter/mterp/arm/op_sub_int_2addr.S
@@ -1 +1,2 @@
-%include "arm/binop2addr.S" {"instr":"sub r0, r0, r1"}
+%def op_sub_int_2addr():
+% binop2addr(instr="sub r0, r0, r1")
diff --git a/runtime/interpreter/mterp/arm/op_sub_long.S b/runtime/interpreter/mterp/arm/op_sub_long.S
index 6f1eb6e..85d9a9f 100644
--- a/runtime/interpreter/mterp/arm/op_sub_long.S
+++ b/runtime/interpreter/mterp/arm/op_sub_long.S
@@ -1 +1,2 @@
-%include "arm/binopWide.S" {"preinstr":"subs r0, r0, r2", "instr":"sbc r1, r1, r3"}
+%def op_sub_long():
+% binopWide(preinstr="subs r0, r0, r2", instr="sbc r1, r1, r3")
diff --git a/runtime/interpreter/mterp/arm/op_sub_long_2addr.S b/runtime/interpreter/mterp/arm/op_sub_long_2addr.S
index 8e9da05..8a782aa 100644
--- a/runtime/interpreter/mterp/arm/op_sub_long_2addr.S
+++ b/runtime/interpreter/mterp/arm/op_sub_long_2addr.S
@@ -1 +1,2 @@
-%include "arm/binopWide2addr.S" {"preinstr":"subs r0, r0, r2", "instr":"sbc r1, r1, r3"}
+%def op_sub_long_2addr():
+% binopWide2addr(preinstr="subs r0, r0, r2", instr="sbc r1, r1, r3")
diff --git a/runtime/interpreter/mterp/arm/op_throw.S b/runtime/interpreter/mterp/arm/op_throw.S
index be49ada..0d3fe37 100644
--- a/runtime/interpreter/mterp/arm/op_throw.S
+++ b/runtime/interpreter/mterp/arm/op_throw.S
@@ -1,3 +1,4 @@
+%def op_throw():
/*
* Throw an exception object in the current thread.
*/
diff --git a/runtime/interpreter/mterp/arm/op_unused_3e.S b/runtime/interpreter/mterp/arm/op_unused_3e.S
index 10948dc..d889f1a 100644
--- a/runtime/interpreter/mterp/arm/op_unused_3e.S
+++ b/runtime/interpreter/mterp/arm/op_unused_3e.S
@@ -1 +1,2 @@
-%include "arm/unused.S"
+%def op_unused_3e():
+% unused()
diff --git a/runtime/interpreter/mterp/arm/op_unused_3f.S b/runtime/interpreter/mterp/arm/op_unused_3f.S
index 10948dc..b3ebcfa 100644
--- a/runtime/interpreter/mterp/arm/op_unused_3f.S
+++ b/runtime/interpreter/mterp/arm/op_unused_3f.S
@@ -1 +1,2 @@
-%include "arm/unused.S"
+%def op_unused_3f():
+% unused()
diff --git a/runtime/interpreter/mterp/arm/op_unused_40.S b/runtime/interpreter/mterp/arm/op_unused_40.S
index 10948dc..7920fb3 100644
--- a/runtime/interpreter/mterp/arm/op_unused_40.S
+++ b/runtime/interpreter/mterp/arm/op_unused_40.S
@@ -1 +1,2 @@
-%include "arm/unused.S"
+%def op_unused_40():
+% unused()
diff --git a/runtime/interpreter/mterp/arm/op_unused_41.S b/runtime/interpreter/mterp/arm/op_unused_41.S
index 10948dc..5ed03b8 100644
--- a/runtime/interpreter/mterp/arm/op_unused_41.S
+++ b/runtime/interpreter/mterp/arm/op_unused_41.S
@@ -1 +1,2 @@
-%include "arm/unused.S"
+%def op_unused_41():
+% unused()
diff --git a/runtime/interpreter/mterp/arm/op_unused_42.S b/runtime/interpreter/mterp/arm/op_unused_42.S
index 10948dc..ac32521 100644
--- a/runtime/interpreter/mterp/arm/op_unused_42.S
+++ b/runtime/interpreter/mterp/arm/op_unused_42.S
@@ -1 +1,2 @@
-%include "arm/unused.S"
+%def op_unused_42():
+% unused()
diff --git a/runtime/interpreter/mterp/arm/op_unused_43.S b/runtime/interpreter/mterp/arm/op_unused_43.S
index 10948dc..33e2aa1 100644
--- a/runtime/interpreter/mterp/arm/op_unused_43.S
+++ b/runtime/interpreter/mterp/arm/op_unused_43.S
@@ -1 +1,2 @@
-%include "arm/unused.S"
+%def op_unused_43():
+% unused()
diff --git a/runtime/interpreter/mterp/arm/op_unused_73.S b/runtime/interpreter/mterp/arm/op_unused_73.S
index 10948dc..e3267a3 100644
--- a/runtime/interpreter/mterp/arm/op_unused_73.S
+++ b/runtime/interpreter/mterp/arm/op_unused_73.S
@@ -1 +1,2 @@
-%include "arm/unused.S"
+%def op_unused_73():
+% unused()
diff --git a/runtime/interpreter/mterp/arm/op_unused_79.S b/runtime/interpreter/mterp/arm/op_unused_79.S
index 10948dc..3c6dafc 100644
--- a/runtime/interpreter/mterp/arm/op_unused_79.S
+++ b/runtime/interpreter/mterp/arm/op_unused_79.S
@@ -1 +1,2 @@
-%include "arm/unused.S"
+%def op_unused_79():
+% unused()
diff --git a/runtime/interpreter/mterp/arm/op_unused_7a.S b/runtime/interpreter/mterp/arm/op_unused_7a.S
index 10948dc..9c03cd5 100644
--- a/runtime/interpreter/mterp/arm/op_unused_7a.S
+++ b/runtime/interpreter/mterp/arm/op_unused_7a.S
@@ -1 +1,2 @@
-%include "arm/unused.S"
+%def op_unused_7a():
+% unused()
diff --git a/runtime/interpreter/mterp/arm/op_unused_f3.S b/runtime/interpreter/mterp/arm/op_unused_f3.S
index 10948dc..ab10b78 100644
--- a/runtime/interpreter/mterp/arm/op_unused_f3.S
+++ b/runtime/interpreter/mterp/arm/op_unused_f3.S
@@ -1 +1,2 @@
-%include "arm/unused.S"
+%def op_unused_f3():
+% unused()
diff --git a/runtime/interpreter/mterp/arm/op_unused_f4.S b/runtime/interpreter/mterp/arm/op_unused_f4.S
index 10948dc..09229d6 100644
--- a/runtime/interpreter/mterp/arm/op_unused_f4.S
+++ b/runtime/interpreter/mterp/arm/op_unused_f4.S
@@ -1 +1,2 @@
-%include "arm/unused.S"
+%def op_unused_f4():
+% unused()
diff --git a/runtime/interpreter/mterp/arm/op_unused_f5.S b/runtime/interpreter/mterp/arm/op_unused_f5.S
index 10948dc..0d6149b 100644
--- a/runtime/interpreter/mterp/arm/op_unused_f5.S
+++ b/runtime/interpreter/mterp/arm/op_unused_f5.S
@@ -1 +1,2 @@
-%include "arm/unused.S"
+%def op_unused_f5():
+% unused()
diff --git a/runtime/interpreter/mterp/arm/op_unused_f6.S b/runtime/interpreter/mterp/arm/op_unused_f6.S
index 10948dc..117b03d 100644
--- a/runtime/interpreter/mterp/arm/op_unused_f6.S
+++ b/runtime/interpreter/mterp/arm/op_unused_f6.S
@@ -1 +1,2 @@
-%include "arm/unused.S"
+%def op_unused_f6():
+% unused()
diff --git a/runtime/interpreter/mterp/arm/op_unused_f7.S b/runtime/interpreter/mterp/arm/op_unused_f7.S
index 10948dc..4e3a0f3 100644
--- a/runtime/interpreter/mterp/arm/op_unused_f7.S
+++ b/runtime/interpreter/mterp/arm/op_unused_f7.S
@@ -1 +1,2 @@
-%include "arm/unused.S"
+%def op_unused_f7():
+% unused()
diff --git a/runtime/interpreter/mterp/arm/op_unused_f8.S b/runtime/interpreter/mterp/arm/op_unused_f8.S
index 10948dc..d122075 100644
--- a/runtime/interpreter/mterp/arm/op_unused_f8.S
+++ b/runtime/interpreter/mterp/arm/op_unused_f8.S
@@ -1 +1,2 @@
-%include "arm/unused.S"
+%def op_unused_f8():
+% unused()
diff --git a/runtime/interpreter/mterp/arm/op_unused_f9.S b/runtime/interpreter/mterp/arm/op_unused_f9.S
index 10948dc..7d09a0e 100644
--- a/runtime/interpreter/mterp/arm/op_unused_f9.S
+++ b/runtime/interpreter/mterp/arm/op_unused_f9.S
@@ -1 +1,2 @@
-%include "arm/unused.S"
+%def op_unused_f9():
+% unused()
diff --git a/runtime/interpreter/mterp/arm/op_unused_fc.S b/runtime/interpreter/mterp/arm/op_unused_fc.S
index 10948dc..0697819 100644
--- a/runtime/interpreter/mterp/arm/op_unused_fc.S
+++ b/runtime/interpreter/mterp/arm/op_unused_fc.S
@@ -1 +1,2 @@
-%include "arm/unused.S"
+%def op_unused_fc():
+% unused()
diff --git a/runtime/interpreter/mterp/arm/op_unused_fd.S b/runtime/interpreter/mterp/arm/op_unused_fd.S
index 10948dc..4bc2b4b 100644
--- a/runtime/interpreter/mterp/arm/op_unused_fd.S
+++ b/runtime/interpreter/mterp/arm/op_unused_fd.S
@@ -1 +1,2 @@
-%include "arm/unused.S"
+%def op_unused_fd():
+% unused()
diff --git a/runtime/interpreter/mterp/arm/op_ushr_int.S b/runtime/interpreter/mterp/arm/op_ushr_int.S
index a74361b..7716bebc 100644
--- a/runtime/interpreter/mterp/arm/op_ushr_int.S
+++ b/runtime/interpreter/mterp/arm/op_ushr_int.S
@@ -1 +1,2 @@
-%include "arm/binop.S" {"preinstr":"and r1, r1, #31", "instr":"mov r0, r0, lsr r1"}
+%def op_ushr_int():
+% binop(preinstr="and r1, r1, #31", instr="mov r0, r0, lsr r1")
diff --git a/runtime/interpreter/mterp/arm/op_ushr_int_2addr.S b/runtime/interpreter/mterp/arm/op_ushr_int_2addr.S
index f2d1d13..8e435a7 100644
--- a/runtime/interpreter/mterp/arm/op_ushr_int_2addr.S
+++ b/runtime/interpreter/mterp/arm/op_ushr_int_2addr.S
@@ -1 +1,2 @@
-%include "arm/binop2addr.S" {"preinstr":"and r1, r1, #31", "instr":"mov r0, r0, lsr r1"}
+%def op_ushr_int_2addr():
+% binop2addr(preinstr="and r1, r1, #31", instr="mov r0, r0, lsr r1")
diff --git a/runtime/interpreter/mterp/arm/op_ushr_int_lit8.S b/runtime/interpreter/mterp/arm/op_ushr_int_lit8.S
index 5554eb0..40783de 100644
--- a/runtime/interpreter/mterp/arm/op_ushr_int_lit8.S
+++ b/runtime/interpreter/mterp/arm/op_ushr_int_lit8.S
@@ -1 +1,2 @@
-%include "arm/binopLit8.S" {"extract":"ubfx r1, r3, #8, #5", "instr":"mov r0, r0, lsr r1"}
+%def op_ushr_int_lit8():
+% binopLit8(extract="ubfx r1, r3, #8, #5", instr="mov r0, r0, lsr r1")
diff --git a/runtime/interpreter/mterp/arm/op_ushr_long.S b/runtime/interpreter/mterp/arm/op_ushr_long.S
index c817bc9..2ab31ff 100644
--- a/runtime/interpreter/mterp/arm/op_ushr_long.S
+++ b/runtime/interpreter/mterp/arm/op_ushr_long.S
@@ -1,3 +1,4 @@
+%def op_ushr_long():
/*
* Long integer shift. This is different from the generic 32/64-bit
* binary operations because vAA/vBB are 64-bit but vCC (the shift
diff --git a/runtime/interpreter/mterp/arm/op_ushr_long_2addr.S b/runtime/interpreter/mterp/arm/op_ushr_long_2addr.S
index 2735f87..e86161b 100644
--- a/runtime/interpreter/mterp/arm/op_ushr_long_2addr.S
+++ b/runtime/interpreter/mterp/arm/op_ushr_long_2addr.S
@@ -1,3 +1,4 @@
+%def op_ushr_long_2addr():
/*
* Long integer shift, 2addr version. vA is 64-bit value/result, vB is
* 32-bit shift distance.
diff --git a/runtime/interpreter/mterp/arm/op_xor_int.S b/runtime/interpreter/mterp/arm/op_xor_int.S
index fd7a4b7..89a6450 100644
--- a/runtime/interpreter/mterp/arm/op_xor_int.S
+++ b/runtime/interpreter/mterp/arm/op_xor_int.S
@@ -1 +1,2 @@
-%include "arm/binop.S" {"instr":"eor r0, r0, r1"}
+%def op_xor_int():
+% binop(instr="eor r0, r0, r1")
diff --git a/runtime/interpreter/mterp/arm/op_xor_int_2addr.S b/runtime/interpreter/mterp/arm/op_xor_int_2addr.S
index 196a665..af7e85e 100644
--- a/runtime/interpreter/mterp/arm/op_xor_int_2addr.S
+++ b/runtime/interpreter/mterp/arm/op_xor_int_2addr.S
@@ -1 +1,2 @@
-%include "arm/binop2addr.S" {"instr":"eor r0, r0, r1"}
+%def op_xor_int_2addr():
+% binop2addr(instr="eor r0, r0, r1")
diff --git a/runtime/interpreter/mterp/arm/op_xor_int_lit16.S b/runtime/interpreter/mterp/arm/op_xor_int_lit16.S
index 39f2a47..a970e01 100644
--- a/runtime/interpreter/mterp/arm/op_xor_int_lit16.S
+++ b/runtime/interpreter/mterp/arm/op_xor_int_lit16.S
@@ -1 +1,2 @@
-%include "arm/binopLit16.S" {"instr":"eor r0, r0, r1"}
+%def op_xor_int_lit16():
+% binopLit16(instr="eor r0, r0, r1")
diff --git a/runtime/interpreter/mterp/arm/op_xor_int_lit8.S b/runtime/interpreter/mterp/arm/op_xor_int_lit8.S
index 97d0b9e..2241f31 100644
--- a/runtime/interpreter/mterp/arm/op_xor_int_lit8.S
+++ b/runtime/interpreter/mterp/arm/op_xor_int_lit8.S
@@ -1 +1,2 @@
-%include "arm/binopLit8.S" {"extract":"", "instr":"eor r0, r0, r3, asr #8"}
+%def op_xor_int_lit8():
+% binopLit8(extract="", instr="eor r0, r0, r3, asr #8")
diff --git a/runtime/interpreter/mterp/arm/op_xor_long.S b/runtime/interpreter/mterp/arm/op_xor_long.S
index 4f830d0..3700a4a 100644
--- a/runtime/interpreter/mterp/arm/op_xor_long.S
+++ b/runtime/interpreter/mterp/arm/op_xor_long.S
@@ -1 +1,2 @@
-%include "arm/binopWide.S" {"preinstr":"eor r0, r0, r2", "instr":"eor r1, r1, r3"}
+%def op_xor_long():
+% binopWide(preinstr="eor r0, r0, r2", instr="eor r1, r1, r3")
diff --git a/runtime/interpreter/mterp/arm/op_xor_long_2addr.S b/runtime/interpreter/mterp/arm/op_xor_long_2addr.S
index 5b5ed88..6558a4e 100644
--- a/runtime/interpreter/mterp/arm/op_xor_long_2addr.S
+++ b/runtime/interpreter/mterp/arm/op_xor_long_2addr.S
@@ -1 +1,2 @@
-%include "arm/binopWide2addr.S" {"preinstr":"eor r0, r0, r2", "instr":"eor r1, r1, r3"}
+%def op_xor_long_2addr():
+% binopWide2addr(preinstr="eor r0, r0, r2", instr="eor r1, r1, r3")
diff --git a/runtime/interpreter/mterp/arm/unop.S b/runtime/interpreter/mterp/arm/unop.S
index 56518b5..a0b0954 100644
--- a/runtime/interpreter/mterp/arm/unop.S
+++ b/runtime/interpreter/mterp/arm/unop.S
@@ -1,4 +1,4 @@
-%default {"preinstr":""}
+%def unop(preinstr="", instr=""):
/*
* Generic 32-bit unary operation. Provide an "instr" line that
* specifies an instruction that performs "result = op r0".
diff --git a/runtime/interpreter/mterp/arm/unopNarrower.S b/runtime/interpreter/mterp/arm/unopNarrower.S
index 2d0453a..4d1bdb9 100644
--- a/runtime/interpreter/mterp/arm/unopNarrower.S
+++ b/runtime/interpreter/mterp/arm/unopNarrower.S
@@ -1,4 +1,4 @@
-%default {"preinstr":""}
+%def unopNarrower(preinstr="", instr=""):
/*
* Generic 64bit-to-32bit unary operation. Provide an "instr" line
* that specifies an instruction that performs "result = op r0/r1", where
diff --git a/runtime/interpreter/mterp/arm/unopWide.S b/runtime/interpreter/mterp/arm/unopWide.S
index cd5defd..658c207 100644
--- a/runtime/interpreter/mterp/arm/unopWide.S
+++ b/runtime/interpreter/mterp/arm/unopWide.S
@@ -1,4 +1,4 @@
-%default {"preinstr":""}
+%def unopWide(preinstr="", instr=""):
/*
* Generic 64-bit unary operation. Provide an "instr" line that
* specifies an instruction that performs "result = op r0/r1".
diff --git a/runtime/interpreter/mterp/arm/unopWider.S b/runtime/interpreter/mterp/arm/unopWider.S
index 9d50489..8b32927 100644
--- a/runtime/interpreter/mterp/arm/unopWider.S
+++ b/runtime/interpreter/mterp/arm/unopWider.S
@@ -1,4 +1,4 @@
-%default {"preinstr":""}
+%def unopWider(preinstr="", instr=""):
/*
* Generic 32bit-to-64bit unary operation. Provide an "instr" line
* that specifies an instruction that performs "result = op r0", where
diff --git a/runtime/interpreter/mterp/arm/unused.S b/runtime/interpreter/mterp/arm/unused.S
index ffa00be..3f37e74 100644
--- a/runtime/interpreter/mterp/arm/unused.S
+++ b/runtime/interpreter/mterp/arm/unused.S
@@ -1,3 +1,4 @@
+%def unused():
/*
* Bail to reference interpreter to throw.
*/
diff --git a/runtime/interpreter/mterp/arm/zcmp.S b/runtime/interpreter/mterp/arm/zcmp.S
index 5db8b6c..6905a32 100644
--- a/runtime/interpreter/mterp/arm/zcmp.S
+++ b/runtime/interpreter/mterp/arm/zcmp.S
@@ -1,3 +1,4 @@
+%def zcmp(condition=""):
/*
* Generic one-operand compare-and-branch operation. Provide a "condition"
* fragment that specifies the comparison to perform.
diff --git a/runtime/interpreter/mterp/arm64/alt_stub.S b/runtime/interpreter/mterp/arm64/alt_stub.S
index 3a463fe..3343463 100644
--- a/runtime/interpreter/mterp/arm64/alt_stub.S
+++ b/runtime/interpreter/mterp/arm64/alt_stub.S
@@ -1,3 +1,4 @@
+%def alt_stub():
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
diff --git a/runtime/interpreter/mterp/arm64/bincmp.S b/runtime/interpreter/mterp/arm64/bincmp.S
index 8dd4fed..80ffbc5 100644
--- a/runtime/interpreter/mterp/arm64/bincmp.S
+++ b/runtime/interpreter/mterp/arm64/bincmp.S
@@ -1,3 +1,4 @@
+%def bincmp(condition=""):
/*
* Generic two-operand compare-and-branch operation. Provide a "condition"
* fragment that specifies the comparison to perform.
diff --git a/runtime/interpreter/mterp/arm64/binop.S b/runtime/interpreter/mterp/arm64/binop.S
index b629b0b..be4db17 100644
--- a/runtime/interpreter/mterp/arm64/binop.S
+++ b/runtime/interpreter/mterp/arm64/binop.S
@@ -1,4 +1,4 @@
-%default {"preinstr":"", "result":"w0", "chkzero":"0"}
+%def binop(preinstr="", result="w0", chkzero="0", instr=""):
/*
* Generic 32-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = w0 op w1".
diff --git a/runtime/interpreter/mterp/arm64/binop2addr.S b/runtime/interpreter/mterp/arm64/binop2addr.S
index a480a7d..5b46b12 100644
--- a/runtime/interpreter/mterp/arm64/binop2addr.S
+++ b/runtime/interpreter/mterp/arm64/binop2addr.S
@@ -1,4 +1,4 @@
-%default {"preinstr":"", "result":"w0", "chkzero":"0"}
+%def binop2addr(preinstr="", result="w0", chkzero="0", instr=""):
/*
* Generic 32-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = w0 op w1".
diff --git a/runtime/interpreter/mterp/arm64/binopLit16.S b/runtime/interpreter/mterp/arm64/binopLit16.S
index 4f9d205..b8af7d1 100644
--- a/runtime/interpreter/mterp/arm64/binopLit16.S
+++ b/runtime/interpreter/mterp/arm64/binopLit16.S
@@ -1,4 +1,4 @@
-%default {"preinstr":"", "result":"w0", "chkzero":"0"}
+%def binopLit16(preinstr="", result="w0", chkzero="0", instr=""):
/*
* Generic 32-bit "lit16" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = w0 op w1".
diff --git a/runtime/interpreter/mterp/arm64/binopLit8.S b/runtime/interpreter/mterp/arm64/binopLit8.S
index dfa3169..e7161a7 100644
--- a/runtime/interpreter/mterp/arm64/binopLit8.S
+++ b/runtime/interpreter/mterp/arm64/binopLit8.S
@@ -1,4 +1,4 @@
-%default {"extract": "asr w1, w3, #8", "preinstr":"", "result":"w0", "chkzero":"0"}
+%def binopLit8(extract="asr w1, w3, #8", preinstr="", result="w0", chkzero="0", instr=""):
/*
* Generic 32-bit "lit8" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = w0 op w1".
diff --git a/runtime/interpreter/mterp/arm64/binopWide.S b/runtime/interpreter/mterp/arm64/binopWide.S
index 9de24f1..829b530 100644
--- a/runtime/interpreter/mterp/arm64/binopWide.S
+++ b/runtime/interpreter/mterp/arm64/binopWide.S
@@ -1,4 +1,4 @@
-%default {"preinstr":"", "instr":"add x0, x1, x2", "result":"x0", "r1":"x1", "r2":"x2", "chkzero":"0"}
+%def binopWide(preinstr="", instr="add x0, x1, x2", result="x0", r1="x1", r2="x2", chkzero="0"):
/*
* Generic 64-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = x1 op x2".
diff --git a/runtime/interpreter/mterp/arm64/binopWide2addr.S b/runtime/interpreter/mterp/arm64/binopWide2addr.S
index d9927a2..dbd6b3b 100644
--- a/runtime/interpreter/mterp/arm64/binopWide2addr.S
+++ b/runtime/interpreter/mterp/arm64/binopWide2addr.S
@@ -1,4 +1,4 @@
-%default {"preinstr":"", "instr":"add x0, x0, x1", "r0":"x0", "r1":"x1", "chkzero":"0"}
+%def binopWide2addr(preinstr="", instr="add x0, x0, x1", r0="x0", r1="x1", chkzero="0"):
/*
* Generic 64-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "x0 = x0 op x1".
diff --git a/runtime/interpreter/mterp/arm64/close_cfi.S b/runtime/interpreter/mterp/arm64/close_cfi.S
index 7ba04860..8f651b1 100644
--- a/runtime/interpreter/mterp/arm64/close_cfi.S
+++ b/runtime/interpreter/mterp/arm64/close_cfi.S
@@ -1,3 +1,4 @@
+%def close_cfi():
// Close out the cfi info. We're treating mterp as a single function.
END ExecuteMterpImpl
diff --git a/runtime/interpreter/mterp/arm64/const.S b/runtime/interpreter/mterp/arm64/const.S
index 6f82bbf..f8477a8 100644
--- a/runtime/interpreter/mterp/arm64/const.S
+++ b/runtime/interpreter/mterp/arm64/const.S
@@ -1,4 +1,4 @@
-%default { "helper":"UndefinedConstHandler" }
+%def const(helper="UndefinedConstHandler"):
/* const/class vAA, type@BBBB */
/* const/method-handle vAA, method_handle@BBBB */
/* const/method-type vAA, proto@BBBB */
diff --git a/runtime/interpreter/mterp/arm64/entry.S b/runtime/interpreter/mterp/arm64/entry.S
index cf38a29..baf8afce 100644
--- a/runtime/interpreter/mterp/arm64/entry.S
+++ b/runtime/interpreter/mterp/arm64/entry.S
@@ -1,3 +1,4 @@
+%def entry():
/*
* Copyright (C) 2016 The Android Open Source Project
*
diff --git a/runtime/interpreter/mterp/arm64/fallback.S b/runtime/interpreter/mterp/arm64/fallback.S
index 44e7e12..3685700 100644
--- a/runtime/interpreter/mterp/arm64/fallback.S
+++ b/runtime/interpreter/mterp/arm64/fallback.S
@@ -1,3 +1,4 @@
+%def fallback():
/* Transfer stub to alternate interpreter */
b MterpFallback
diff --git a/runtime/interpreter/mterp/arm64/fbinop.S b/runtime/interpreter/mterp/arm64/fbinop.S
index 926d078..e3fb25a 100644
--- a/runtime/interpreter/mterp/arm64/fbinop.S
+++ b/runtime/interpreter/mterp/arm64/fbinop.S
@@ -1,4 +1,4 @@
-%default {}
+%def fbinop(instr=""):
/*:
* Generic 32-bit floating-point operation.
*
diff --git a/runtime/interpreter/mterp/arm64/fbinop2addr.S b/runtime/interpreter/mterp/arm64/fbinop2addr.S
index 04236ad..9f235d9 100644
--- a/runtime/interpreter/mterp/arm64/fbinop2addr.S
+++ b/runtime/interpreter/mterp/arm64/fbinop2addr.S
@@ -1,3 +1,4 @@
+%def fbinop2addr(instr=""):
/*
* Generic 32-bit floating point "/2addr" binary operation. Provide
* an "instr" line that specifies an instruction that performs
diff --git a/runtime/interpreter/mterp/arm64/fcmp.S b/runtime/interpreter/mterp/arm64/fcmp.S
index cad6318..c0cc33a 100644
--- a/runtime/interpreter/mterp/arm64/fcmp.S
+++ b/runtime/interpreter/mterp/arm64/fcmp.S
@@ -1,4 +1,4 @@
-%default {"wide":"", "r1":"s1", "r2":"s2", "cond":"lt"}
+%def fcmp(wide="", r1="s1", r2="s2", cond="lt"):
/*
* Compare two floating-point values. Puts 0, 1, or -1 into the
* destination register based on the results of the comparison.
diff --git a/runtime/interpreter/mterp/arm64/field.S b/runtime/interpreter/mterp/arm64/field.S
index 631c8d1..8a66992 100644
--- a/runtime/interpreter/mterp/arm64/field.S
+++ b/runtime/interpreter/mterp/arm64/field.S
@@ -1,4 +1,4 @@
-%default { }
+%def field(helper=""):
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
diff --git a/runtime/interpreter/mterp/arm64/footer.S b/runtime/interpreter/mterp/arm64/footer.S
index 0ce3543..ba17f5e 100644
--- a/runtime/interpreter/mterp/arm64/footer.S
+++ b/runtime/interpreter/mterp/arm64/footer.S
@@ -1,10 +1,10 @@
+%def footer():
/*
* ===========================================================================
* Common subroutines and data
* ===========================================================================
*/
-
/*
* We've detected a condition that will result in an exception, but the exception
* has not yet been thrown. Just bail out to the reference interpreter to deal with it.
@@ -207,7 +207,6 @@
GET_INST_OPCODE ip // extract opcode from wINST
GOTO_OPCODE ip // jump to next instruction
-
/*
* Check for suspend check request. Assumes wINST already loaded, xPC advanced and
* still needs to get the opcode and branch to it, and flags are in lr.
diff --git a/runtime/interpreter/mterp/arm64/funopNarrow.S b/runtime/interpreter/mterp/arm64/funopNarrow.S
index aed830b..f08e87f 100644
--- a/runtime/interpreter/mterp/arm64/funopNarrow.S
+++ b/runtime/interpreter/mterp/arm64/funopNarrow.S
@@ -1,4 +1,4 @@
-%default {"srcreg":"s0", "tgtreg":"d0"}
+%def funopNarrow(srcreg="s0", tgtreg="d0", instr=""):
/*
* Generic 32bit-to-32bit floating point unary operation. Provide an
* "instr" line that specifies an instruction that performs "$tgtreg = op $srcreg".
diff --git a/runtime/interpreter/mterp/arm64/funopNarrower.S b/runtime/interpreter/mterp/arm64/funopNarrower.S
index 6fddfea..e1a1214 100644
--- a/runtime/interpreter/mterp/arm64/funopNarrower.S
+++ b/runtime/interpreter/mterp/arm64/funopNarrower.S
@@ -1,4 +1,4 @@
-%default {"srcreg":"s0", "tgtreg":"d0"}
+%def funopNarrower(srcreg="s0", tgtreg="d0", instr=""):
/*
* Generic 64bit-to-32bit floating point unary operation. Provide an
* "instr" line that specifies an instruction that performs "$tgtreg = op $srcreg".
diff --git a/runtime/interpreter/mterp/arm64/funopWide.S b/runtime/interpreter/mterp/arm64/funopWide.S
index 409e26b..83e55be 100644
--- a/runtime/interpreter/mterp/arm64/funopWide.S
+++ b/runtime/interpreter/mterp/arm64/funopWide.S
@@ -1,4 +1,4 @@
-%default {"srcreg":"s0", "tgtreg":"d0"}
+%def funopWide(srcreg="s0", tgtreg="d0", instr=""):
/*
* Generic 64bit-to-64bit floating point unary operation. Provide an
* "instr" line that specifies an instruction that performs "$tgtreg = op $srcreg".
diff --git a/runtime/interpreter/mterp/arm64/funopWider.S b/runtime/interpreter/mterp/arm64/funopWider.S
index 4c91ebc..825698e 100644
--- a/runtime/interpreter/mterp/arm64/funopWider.S
+++ b/runtime/interpreter/mterp/arm64/funopWider.S
@@ -1,4 +1,4 @@
-%default {"srcreg":"s0", "tgtreg":"d0"}
+%def funopWider(srcreg="s0", tgtreg="d0", instr=""):
/*
* Generic 32bit-to-64bit floating point unary operation. Provide an
* "instr" line that specifies an instruction that performs "$tgtreg = op $srcreg".
diff --git a/runtime/interpreter/mterp/arm64/header.S b/runtime/interpreter/mterp/arm64/header.S
index 0722804..4102972 100644
--- a/runtime/interpreter/mterp/arm64/header.S
+++ b/runtime/interpreter/mterp/arm64/header.S
@@ -1,3 +1,4 @@
+%def header():
/*
* Copyright (C) 2016 The Android Open Source Project
*
diff --git a/runtime/interpreter/mterp/arm64/instruction_end.S b/runtime/interpreter/mterp/arm64/instruction_end.S
index f90ebd0..cf30a9b 100644
--- a/runtime/interpreter/mterp/arm64/instruction_end.S
+++ b/runtime/interpreter/mterp/arm64/instruction_end.S
@@ -1,3 +1,4 @@
+%def instruction_end():
.type artMterpAsmInstructionEnd, #object
.hidden artMterpAsmInstructionEnd
diff --git a/runtime/interpreter/mterp/arm64/instruction_end_alt.S b/runtime/interpreter/mterp/arm64/instruction_end_alt.S
index 0b66dbb..9509a63 100644
--- a/runtime/interpreter/mterp/arm64/instruction_end_alt.S
+++ b/runtime/interpreter/mterp/arm64/instruction_end_alt.S
@@ -1,3 +1,4 @@
+%def instruction_end_alt():
.type artMterpAsmAltInstructionEnd, #object
.hidden artMterpAsmAltInstructionEnd
diff --git a/runtime/interpreter/mterp/arm64/instruction_end_sister.S b/runtime/interpreter/mterp/arm64/instruction_end_sister.S
index 71c0300..18f1dbb 100644
--- a/runtime/interpreter/mterp/arm64/instruction_end_sister.S
+++ b/runtime/interpreter/mterp/arm64/instruction_end_sister.S
@@ -1,3 +1,4 @@
+%def instruction_end_sister():
.type artMterpAsmSisterEnd, #object
.hidden artMterpAsmSisterEnd
diff --git a/runtime/interpreter/mterp/arm64/instruction_start.S b/runtime/interpreter/mterp/arm64/instruction_start.S
index b7e9cf5..457dcf9 100644
--- a/runtime/interpreter/mterp/arm64/instruction_start.S
+++ b/runtime/interpreter/mterp/arm64/instruction_start.S
@@ -1,3 +1,4 @@
+%def instruction_start():
.type artMterpAsmInstructionStart, #object
.hidden artMterpAsmInstructionStart
diff --git a/runtime/interpreter/mterp/arm64/instruction_start_alt.S b/runtime/interpreter/mterp/arm64/instruction_start_alt.S
index 7a67ba0..40d2bf5 100644
--- a/runtime/interpreter/mterp/arm64/instruction_start_alt.S
+++ b/runtime/interpreter/mterp/arm64/instruction_start_alt.S
@@ -1,3 +1,4 @@
+%def instruction_start_alt():
.type artMterpAsmAltInstructionStart, #object
.hidden artMterpAsmAltInstructionStart
diff --git a/runtime/interpreter/mterp/arm64/instruction_start_sister.S b/runtime/interpreter/mterp/arm64/instruction_start_sister.S
index 0036061..2bf2463 100644
--- a/runtime/interpreter/mterp/arm64/instruction_start_sister.S
+++ b/runtime/interpreter/mterp/arm64/instruction_start_sister.S
@@ -1,3 +1,4 @@
+%def instruction_start_sister():
.type artMterpAsmSisterStart, #object
.hidden artMterpAsmSisterStart
diff --git a/runtime/interpreter/mterp/arm64/invoke.S b/runtime/interpreter/mterp/arm64/invoke.S
index 7a32df7..9e5b5b7 100644
--- a/runtime/interpreter/mterp/arm64/invoke.S
+++ b/runtime/interpreter/mterp/arm64/invoke.S
@@ -1,4 +1,4 @@
-%default { "helper":"UndefinedInvokeHandler" }
+%def invoke(helper="UndefinedInvokeHandler"):
/*
* Generic invoke handler wrapper.
*/
diff --git a/runtime/interpreter/mterp/arm64/invoke_polymorphic.S b/runtime/interpreter/mterp/arm64/invoke_polymorphic.S
index 7906f0a..08ffb9c 100644
--- a/runtime/interpreter/mterp/arm64/invoke_polymorphic.S
+++ b/runtime/interpreter/mterp/arm64/invoke_polymorphic.S
@@ -1,4 +1,4 @@
-%default { "helper":"UndefinedInvokeHandler" }
+%def invoke_polymorphic(helper="UndefinedInvokeHandler"):
/*
* invoke-polymorphic handler wrapper.
*/
diff --git a/runtime/interpreter/mterp/arm64/op_add_double.S b/runtime/interpreter/mterp/arm64/op_add_double.S
index 8509f70..8d31342 100644
--- a/runtime/interpreter/mterp/arm64/op_add_double.S
+++ b/runtime/interpreter/mterp/arm64/op_add_double.S
@@ -1 +1,2 @@
-%include "arm64/binopWide.S" {"instr":"fadd d0, d1, d2", "result":"d0", "r1":"d1", "r2":"d2"}
+%def op_add_double():
+% binopWide(instr="fadd d0, d1, d2", result="d0", r1="d1", r2="d2")
diff --git a/runtime/interpreter/mterp/arm64/op_add_double_2addr.S b/runtime/interpreter/mterp/arm64/op_add_double_2addr.S
index 61fd58f..88c1d5e 100644
--- a/runtime/interpreter/mterp/arm64/op_add_double_2addr.S
+++ b/runtime/interpreter/mterp/arm64/op_add_double_2addr.S
@@ -1 +1,2 @@
-%include "arm64/binopWide2addr.S" {"instr":"fadd d0, d0, d1", "r0":"d0", "r1":"d1"}
+%def op_add_double_2addr():
+% binopWide2addr(instr="fadd d0, d0, d1", r0="d0", r1="d1")
diff --git a/runtime/interpreter/mterp/arm64/op_add_float.S b/runtime/interpreter/mterp/arm64/op_add_float.S
index 7d09fef..388732e 100644
--- a/runtime/interpreter/mterp/arm64/op_add_float.S
+++ b/runtime/interpreter/mterp/arm64/op_add_float.S
@@ -1 +1,2 @@
-%include "arm64/fbinop.S" {"instr":"fadd s0, s0, s1"}
+%def op_add_float():
+% fbinop(instr="fadd s0, s0, s1")
diff --git a/runtime/interpreter/mterp/arm64/op_add_float_2addr.S b/runtime/interpreter/mterp/arm64/op_add_float_2addr.S
index 7b378e2..061c9d5 100644
--- a/runtime/interpreter/mterp/arm64/op_add_float_2addr.S
+++ b/runtime/interpreter/mterp/arm64/op_add_float_2addr.S
@@ -1 +1,2 @@
-%include "arm64/fbinop2addr.S" {"instr":"fadd s2, s0, s1"}
+%def op_add_float_2addr():
+% fbinop2addr(instr="fadd s2, s0, s1")
diff --git a/runtime/interpreter/mterp/arm64/op_add_int.S b/runtime/interpreter/mterp/arm64/op_add_int.S
index 6eadb54..99953ee 100644
--- a/runtime/interpreter/mterp/arm64/op_add_int.S
+++ b/runtime/interpreter/mterp/arm64/op_add_int.S
@@ -1 +1,2 @@
-%include "arm64/binop.S" {"instr":"add w0, w0, w1"}
+%def op_add_int():
+% binop(instr="add w0, w0, w1")
diff --git a/runtime/interpreter/mterp/arm64/op_add_int_2addr.S b/runtime/interpreter/mterp/arm64/op_add_int_2addr.S
index d35bc8e..d61fcce 100644
--- a/runtime/interpreter/mterp/arm64/op_add_int_2addr.S
+++ b/runtime/interpreter/mterp/arm64/op_add_int_2addr.S
@@ -1 +1,2 @@
-%include "arm64/binop2addr.S" {"instr":"add w0, w0, w1"}
+%def op_add_int_2addr():
+% binop2addr(instr="add w0, w0, w1")
diff --git a/runtime/interpreter/mterp/arm64/op_add_int_lit16.S b/runtime/interpreter/mterp/arm64/op_add_int_lit16.S
index 4930ad7..37bf2e8 100644
--- a/runtime/interpreter/mterp/arm64/op_add_int_lit16.S
+++ b/runtime/interpreter/mterp/arm64/op_add_int_lit16.S
@@ -1 +1,2 @@
-%include "arm64/binopLit16.S" {"instr":"add w0, w0, w1"}
+%def op_add_int_lit16():
+% binopLit16(instr="add w0, w0, w1")
diff --git a/runtime/interpreter/mterp/arm64/op_add_int_lit8.S b/runtime/interpreter/mterp/arm64/op_add_int_lit8.S
index 2dfb8b9..f4cab96 100644
--- a/runtime/interpreter/mterp/arm64/op_add_int_lit8.S
+++ b/runtime/interpreter/mterp/arm64/op_add_int_lit8.S
@@ -1 +1,2 @@
-%include "arm64/binopLit8.S" {"extract":"", "instr":"add w0, w0, w3, asr #8"}
+%def op_add_int_lit8():
+% binopLit8(extract="", instr="add w0, w0, w3, asr #8")
diff --git a/runtime/interpreter/mterp/arm64/op_add_long.S b/runtime/interpreter/mterp/arm64/op_add_long.S
index bc334aa..0ac3246 100644
--- a/runtime/interpreter/mterp/arm64/op_add_long.S
+++ b/runtime/interpreter/mterp/arm64/op_add_long.S
@@ -1 +1,2 @@
-%include "arm64/binopWide.S" {"instr":"add x0, x1, x2"}
+%def op_add_long():
+% binopWide(instr="add x0, x1, x2")
diff --git a/runtime/interpreter/mterp/arm64/op_add_long_2addr.S b/runtime/interpreter/mterp/arm64/op_add_long_2addr.S
index 5e5dbce..03987eb 100644
--- a/runtime/interpreter/mterp/arm64/op_add_long_2addr.S
+++ b/runtime/interpreter/mterp/arm64/op_add_long_2addr.S
@@ -1 +1,2 @@
-%include "arm64/binopWide2addr.S" {"instr":"add x0, x0, x1"}
+%def op_add_long_2addr():
+% binopWide2addr(instr="add x0, x0, x1")
diff --git a/runtime/interpreter/mterp/arm64/op_aget.S b/runtime/interpreter/mterp/arm64/op_aget.S
index 662c9cc..edc62f5 100644
--- a/runtime/interpreter/mterp/arm64/op_aget.S
+++ b/runtime/interpreter/mterp/arm64/op_aget.S
@@ -1,4 +1,4 @@
-%default { "load":"ldr", "shift":"2", "data_offset":"MIRROR_INT_ARRAY_DATA_OFFSET" }
+%def op_aget(load="ldr", shift="2", data_offset="MIRROR_INT_ARRAY_DATA_OFFSET"):
/*
* Array get, 32 bits or less. vAA <- vBB[vCC].
*
diff --git a/runtime/interpreter/mterp/arm64/op_aget_boolean.S b/runtime/interpreter/mterp/arm64/op_aget_boolean.S
index 6ab6cc1..d6e0a1b 100644
--- a/runtime/interpreter/mterp/arm64/op_aget_boolean.S
+++ b/runtime/interpreter/mterp/arm64/op_aget_boolean.S
@@ -1 +1,2 @@
-%include "arm64/op_aget.S" { "load":"ldrb", "shift":"0", "data_offset":"MIRROR_BOOLEAN_ARRAY_DATA_OFFSET" }
+%def op_aget_boolean():
+% op_aget(load="ldrb", shift="0", data_offset="MIRROR_BOOLEAN_ARRAY_DATA_OFFSET")
diff --git a/runtime/interpreter/mterp/arm64/op_aget_byte.S b/runtime/interpreter/mterp/arm64/op_aget_byte.S
index c7f5b23..6c9f1b7 100644
--- a/runtime/interpreter/mterp/arm64/op_aget_byte.S
+++ b/runtime/interpreter/mterp/arm64/op_aget_byte.S
@@ -1 +1,2 @@
-%include "arm64/op_aget.S" { "load":"ldrsb", "shift":"0", "data_offset":"MIRROR_BYTE_ARRAY_DATA_OFFSET" }
+%def op_aget_byte():
+% op_aget(load="ldrsb", shift="0", data_offset="MIRROR_BYTE_ARRAY_DATA_OFFSET")
diff --git a/runtime/interpreter/mterp/arm64/op_aget_char.S b/runtime/interpreter/mterp/arm64/op_aget_char.S
index 9fddf17..c5812e3 100644
--- a/runtime/interpreter/mterp/arm64/op_aget_char.S
+++ b/runtime/interpreter/mterp/arm64/op_aget_char.S
@@ -1 +1,2 @@
-%include "arm64/op_aget.S" { "load":"ldrh", "shift":"1", "data_offset":"MIRROR_CHAR_ARRAY_DATA_OFFSET" }
+%def op_aget_char():
+% op_aget(load="ldrh", shift="1", data_offset="MIRROR_CHAR_ARRAY_DATA_OFFSET")
diff --git a/runtime/interpreter/mterp/arm64/op_aget_object.S b/runtime/interpreter/mterp/arm64/op_aget_object.S
index 1bbe3e8..0c5d2c3 100644
--- a/runtime/interpreter/mterp/arm64/op_aget_object.S
+++ b/runtime/interpreter/mterp/arm64/op_aget_object.S
@@ -1,3 +1,4 @@
+%def op_aget_object():
/*
* Array object get. vAA <- vBB[vCC].
*
diff --git a/runtime/interpreter/mterp/arm64/op_aget_short.S b/runtime/interpreter/mterp/arm64/op_aget_short.S
index 39554de..9727560 100644
--- a/runtime/interpreter/mterp/arm64/op_aget_short.S
+++ b/runtime/interpreter/mterp/arm64/op_aget_short.S
@@ -1 +1,2 @@
-%include "arm64/op_aget.S" { "load":"ldrsh", "shift":"1", "data_offset":"MIRROR_SHORT_ARRAY_DATA_OFFSET" }
+%def op_aget_short():
+% op_aget(load="ldrsh", shift="1", data_offset="MIRROR_SHORT_ARRAY_DATA_OFFSET")
diff --git a/runtime/interpreter/mterp/arm64/op_aget_wide.S b/runtime/interpreter/mterp/arm64/op_aget_wide.S
index 6f990ba..e9bccd6 100644
--- a/runtime/interpreter/mterp/arm64/op_aget_wide.S
+++ b/runtime/interpreter/mterp/arm64/op_aget_wide.S
@@ -1,3 +1,4 @@
+%def op_aget_wide():
/*
* Array get, 64 bits. vAA <- vBB[vCC].
*
diff --git a/runtime/interpreter/mterp/arm64/op_and_int.S b/runtime/interpreter/mterp/arm64/op_and_int.S
index 31f3f73..364e615 100644
--- a/runtime/interpreter/mterp/arm64/op_and_int.S
+++ b/runtime/interpreter/mterp/arm64/op_and_int.S
@@ -1 +1,2 @@
-%include "arm64/binop.S" {"instr":"and w0, w0, w1"}
+%def op_and_int():
+% binop(instr="and w0, w0, w1")
diff --git a/runtime/interpreter/mterp/arm64/op_and_int_2addr.S b/runtime/interpreter/mterp/arm64/op_and_int_2addr.S
index e59632c..98a5c5d 100644
--- a/runtime/interpreter/mterp/arm64/op_and_int_2addr.S
+++ b/runtime/interpreter/mterp/arm64/op_and_int_2addr.S
@@ -1 +1,2 @@
-%include "arm64/binop2addr.S" {"instr":"and w0, w0, w1"}
+%def op_and_int_2addr():
+% binop2addr(instr="and w0, w0, w1")
diff --git a/runtime/interpreter/mterp/arm64/op_and_int_lit16.S b/runtime/interpreter/mterp/arm64/op_and_int_lit16.S
index 6540f81..add2ecc 100644
--- a/runtime/interpreter/mterp/arm64/op_and_int_lit16.S
+++ b/runtime/interpreter/mterp/arm64/op_and_int_lit16.S
@@ -1 +1,2 @@
-%include "arm64/binopLit16.S" {"instr":"and w0, w0, w1"}
+%def op_and_int_lit16():
+% binopLit16(instr="and w0, w0, w1")
diff --git a/runtime/interpreter/mterp/arm64/op_and_int_lit8.S b/runtime/interpreter/mterp/arm64/op_and_int_lit8.S
index 495b5cd..bf68c2a 100644
--- a/runtime/interpreter/mterp/arm64/op_and_int_lit8.S
+++ b/runtime/interpreter/mterp/arm64/op_and_int_lit8.S
@@ -1 +1,2 @@
-%include "arm64/binopLit8.S" {"extract":"", "instr":"and w0, w0, w3, asr #8"}
+%def op_and_int_lit8():
+% binopLit8(extract="", instr="and w0, w0, w3, asr #8")
diff --git a/runtime/interpreter/mterp/arm64/op_and_long.S b/runtime/interpreter/mterp/arm64/op_and_long.S
index ede047d..aff5ead 100644
--- a/runtime/interpreter/mterp/arm64/op_and_long.S
+++ b/runtime/interpreter/mterp/arm64/op_and_long.S
@@ -1 +1,2 @@
-%include "arm64/binopWide.S" {"instr":"and x0, x1, x2"}
+%def op_and_long():
+% binopWide(instr="and x0, x1, x2")
diff --git a/runtime/interpreter/mterp/arm64/op_and_long_2addr.S b/runtime/interpreter/mterp/arm64/op_and_long_2addr.S
index d62ccef..ba71e5c 100644
--- a/runtime/interpreter/mterp/arm64/op_and_long_2addr.S
+++ b/runtime/interpreter/mterp/arm64/op_and_long_2addr.S
@@ -1 +1,2 @@
-%include "arm64/binopWide2addr.S" {"instr":"and x0, x0, x1"}
+%def op_and_long_2addr():
+% binopWide2addr(instr="and x0, x0, x1")
diff --git a/runtime/interpreter/mterp/arm64/op_aput.S b/runtime/interpreter/mterp/arm64/op_aput.S
index 175b483..85dd556 100644
--- a/runtime/interpreter/mterp/arm64/op_aput.S
+++ b/runtime/interpreter/mterp/arm64/op_aput.S
@@ -1,4 +1,4 @@
-%default { "store":"str", "shift":"2", "data_offset":"MIRROR_INT_ARRAY_DATA_OFFSET" }
+%def op_aput(store="str", shift="2", data_offset="MIRROR_INT_ARRAY_DATA_OFFSET"):
/*
* Array put, 32 bits or less. vBB[vCC] <- vAA.
*
diff --git a/runtime/interpreter/mterp/arm64/op_aput_boolean.S b/runtime/interpreter/mterp/arm64/op_aput_boolean.S
index 5e7a86f..467cc4b 100644
--- a/runtime/interpreter/mterp/arm64/op_aput_boolean.S
+++ b/runtime/interpreter/mterp/arm64/op_aput_boolean.S
@@ -1 +1,2 @@
-%include "arm64/op_aput.S" { "store":"strb", "shift":"0", "data_offset":"MIRROR_BOOLEAN_ARRAY_DATA_OFFSET" }
+%def op_aput_boolean():
+% op_aput(store="strb", shift="0", data_offset="MIRROR_BOOLEAN_ARRAY_DATA_OFFSET")
diff --git a/runtime/interpreter/mterp/arm64/op_aput_byte.S b/runtime/interpreter/mterp/arm64/op_aput_byte.S
index d659ebc..2b4c0ba 100644
--- a/runtime/interpreter/mterp/arm64/op_aput_byte.S
+++ b/runtime/interpreter/mterp/arm64/op_aput_byte.S
@@ -1 +1,2 @@
-%include "arm64/op_aput.S" { "store":"strb", "shift":"0", "data_offset":"MIRROR_BYTE_ARRAY_DATA_OFFSET" }
+%def op_aput_byte():
+% op_aput(store="strb", shift="0", data_offset="MIRROR_BYTE_ARRAY_DATA_OFFSET")
diff --git a/runtime/interpreter/mterp/arm64/op_aput_char.S b/runtime/interpreter/mterp/arm64/op_aput_char.S
index 7547c80..cb7dcba 100644
--- a/runtime/interpreter/mterp/arm64/op_aput_char.S
+++ b/runtime/interpreter/mterp/arm64/op_aput_char.S
@@ -1 +1,2 @@
-%include "arm64/op_aput.S" { "store":"strh", "shift":"1", "data_offset":"MIRROR_CHAR_ARRAY_DATA_OFFSET" }
+%def op_aput_char():
+% op_aput(store="strh", shift="1", data_offset="MIRROR_CHAR_ARRAY_DATA_OFFSET")
diff --git a/runtime/interpreter/mterp/arm64/op_aput_object.S b/runtime/interpreter/mterp/arm64/op_aput_object.S
index 0146fdc..4d1ee65 100644
--- a/runtime/interpreter/mterp/arm64/op_aput_object.S
+++ b/runtime/interpreter/mterp/arm64/op_aput_object.S
@@ -1,3 +1,4 @@
+%def op_aput_object():
/*
* Store an object into an array. vBB[vCC] <- vAA.
*/
diff --git a/runtime/interpreter/mterp/arm64/op_aput_short.S b/runtime/interpreter/mterp/arm64/op_aput_short.S
index 8631e28..f624163 100644
--- a/runtime/interpreter/mterp/arm64/op_aput_short.S
+++ b/runtime/interpreter/mterp/arm64/op_aput_short.S
@@ -1 +1,2 @@
-%include "arm64/op_aput.S" { "store":"strh", "shift":"1", "data_offset":"MIRROR_SHORT_ARRAY_DATA_OFFSET" }
+%def op_aput_short():
+% op_aput(store="strh", shift="1", data_offset="MIRROR_SHORT_ARRAY_DATA_OFFSET")
diff --git a/runtime/interpreter/mterp/arm64/op_aput_wide.S b/runtime/interpreter/mterp/arm64/op_aput_wide.S
index e1cf9c1..8498783 100644
--- a/runtime/interpreter/mterp/arm64/op_aput_wide.S
+++ b/runtime/interpreter/mterp/arm64/op_aput_wide.S
@@ -1,3 +1,4 @@
+%def op_aput_wide():
/*
* Array put, 64 bits. vBB[vCC] <- vAA.
*
diff --git a/runtime/interpreter/mterp/arm64/op_array_length.S b/runtime/interpreter/mterp/arm64/op_array_length.S
index 0cce917..26979b8 100644
--- a/runtime/interpreter/mterp/arm64/op_array_length.S
+++ b/runtime/interpreter/mterp/arm64/op_array_length.S
@@ -1,3 +1,4 @@
+%def op_array_length():
/*
* Return the length of an array.
*/
diff --git a/runtime/interpreter/mterp/arm64/op_check_cast.S b/runtime/interpreter/mterp/arm64/op_check_cast.S
index cb9f606..359c860 100644
--- a/runtime/interpreter/mterp/arm64/op_check_cast.S
+++ b/runtime/interpreter/mterp/arm64/op_check_cast.S
@@ -1,3 +1,4 @@
+%def op_check_cast():
/*
* Check to see if a cast from one class to another is allowed.
*/
diff --git a/runtime/interpreter/mterp/arm64/op_cmp_long.S b/runtime/interpreter/mterp/arm64/op_cmp_long.S
index c4ad984..636262c 100644
--- a/runtime/interpreter/mterp/arm64/op_cmp_long.S
+++ b/runtime/interpreter/mterp/arm64/op_cmp_long.S
@@ -1,3 +1,4 @@
+%def op_cmp_long():
FETCH w0, 1 // w0<- CCBB
lsr w4, wINST, #8 // w4<- AA
and w2, w0, #255 // w2<- BB
diff --git a/runtime/interpreter/mterp/arm64/op_cmpg_double.S b/runtime/interpreter/mterp/arm64/op_cmpg_double.S
index 30cb7eb..4527873 100644
--- a/runtime/interpreter/mterp/arm64/op_cmpg_double.S
+++ b/runtime/interpreter/mterp/arm64/op_cmpg_double.S
@@ -1 +1,2 @@
-%include "arm64/fcmp.S" {"wide":"_WIDE", "r1":"d1", "r2":"d2", "cond":"cc"}
+%def op_cmpg_double():
+% fcmp(wide="_WIDE", r1="d1", r2="d2", cond="cc")
diff --git a/runtime/interpreter/mterp/arm64/op_cmpg_float.S b/runtime/interpreter/mterp/arm64/op_cmpg_float.S
index ba23f43..395d186 100644
--- a/runtime/interpreter/mterp/arm64/op_cmpg_float.S
+++ b/runtime/interpreter/mterp/arm64/op_cmpg_float.S
@@ -1 +1,2 @@
-%include "arm64/fcmp.S" {"wide":"", "r1":"s1", "r2":"s2", "cond":"cc"}
+%def op_cmpg_float():
+% fcmp(wide="", r1="s1", r2="s2", cond="cc")
diff --git a/runtime/interpreter/mterp/arm64/op_cmpl_double.S b/runtime/interpreter/mterp/arm64/op_cmpl_double.S
index c739685..67b69c8 100644
--- a/runtime/interpreter/mterp/arm64/op_cmpl_double.S
+++ b/runtime/interpreter/mterp/arm64/op_cmpl_double.S
@@ -1 +1,2 @@
-%include "arm64/fcmp.S" {"wide":"_WIDE", "r1":"d1", "r2":"d2", "cond":"lt"}
+%def op_cmpl_double():
+% fcmp(wide="_WIDE", r1="d1", r2="d2", cond="lt")
diff --git a/runtime/interpreter/mterp/arm64/op_cmpl_float.S b/runtime/interpreter/mterp/arm64/op_cmpl_float.S
index 32a9319..7574f4c 100644
--- a/runtime/interpreter/mterp/arm64/op_cmpl_float.S
+++ b/runtime/interpreter/mterp/arm64/op_cmpl_float.S
@@ -1 +1,2 @@
-%include "arm64/fcmp.S" {"wide":"", "r1":"s1", "r2":"s2", "cond":"lt"}
+%def op_cmpl_float():
+% fcmp(wide="", r1="s1", r2="s2", cond="lt")
diff --git a/runtime/interpreter/mterp/arm64/op_const.S b/runtime/interpreter/mterp/arm64/op_const.S
index 031ede1..493611e 100644
--- a/runtime/interpreter/mterp/arm64/op_const.S
+++ b/runtime/interpreter/mterp/arm64/op_const.S
@@ -1,3 +1,4 @@
+%def op_const():
/* const vAA, #+BBBBbbbb */
lsr w3, wINST, #8 // w3<- AA
FETCH w0, 1 // w0<- bbbb (low
diff --git a/runtime/interpreter/mterp/arm64/op_const_16.S b/runtime/interpreter/mterp/arm64/op_const_16.S
index f0e8192..75e6936 100644
--- a/runtime/interpreter/mterp/arm64/op_const_16.S
+++ b/runtime/interpreter/mterp/arm64/op_const_16.S
@@ -1,3 +1,4 @@
+%def op_const_16():
/* const/16 vAA, #+BBBB */
FETCH_S w0, 1 // w0<- ssssBBBB (sign-extended)
lsr w3, wINST, #8 // w3<- AA
diff --git a/runtime/interpreter/mterp/arm64/op_const_4.S b/runtime/interpreter/mterp/arm64/op_const_4.S
index 9a36115..e6281ed 100644
--- a/runtime/interpreter/mterp/arm64/op_const_4.S
+++ b/runtime/interpreter/mterp/arm64/op_const_4.S
@@ -1,3 +1,4 @@
+%def op_const_4():
/* const/4 vA, #+B */
sbfx w1, wINST, #12, #4 // w1<- sssssssB
ubfx w0, wINST, #8, #4 // w0<- A
diff --git a/runtime/interpreter/mterp/arm64/op_const_class.S b/runtime/interpreter/mterp/arm64/op_const_class.S
index 7228245..db12ec3 100644
--- a/runtime/interpreter/mterp/arm64/op_const_class.S
+++ b/runtime/interpreter/mterp/arm64/op_const_class.S
@@ -1 +1,2 @@
-%include "arm64/const.S" { "helper":"MterpConstClass" }
+%def op_const_class():
+% const(helper="MterpConstClass")
diff --git a/runtime/interpreter/mterp/arm64/op_const_high16.S b/runtime/interpreter/mterp/arm64/op_const_high16.S
index 3a9edff..8a8558f 100644
--- a/runtime/interpreter/mterp/arm64/op_const_high16.S
+++ b/runtime/interpreter/mterp/arm64/op_const_high16.S
@@ -1,3 +1,4 @@
+%def op_const_high16():
/* const/high16 vAA, #+BBBB0000 */
FETCH w0, 1 // r0<- 0000BBBB (zero-extended)
lsr w3, wINST, #8 // r3<- AA
diff --git a/runtime/interpreter/mterp/arm64/op_const_method_handle.S b/runtime/interpreter/mterp/arm64/op_const_method_handle.S
index 0df0fa6..2680c17 100644
--- a/runtime/interpreter/mterp/arm64/op_const_method_handle.S
+++ b/runtime/interpreter/mterp/arm64/op_const_method_handle.S
@@ -1 +1,2 @@
-%include "arm64/const.S" { "helper":"MterpConstMethodHandle" }
+%def op_const_method_handle():
+% const(helper="MterpConstMethodHandle")
diff --git a/runtime/interpreter/mterp/arm64/op_const_method_type.S b/runtime/interpreter/mterp/arm64/op_const_method_type.S
index 1adfe5a..ea814bf 100644
--- a/runtime/interpreter/mterp/arm64/op_const_method_type.S
+++ b/runtime/interpreter/mterp/arm64/op_const_method_type.S
@@ -1 +1,2 @@
-%include "arm64/const.S" { "helper":"MterpConstMethodType" }
+%def op_const_method_type():
+% const(helper="MterpConstMethodType")
diff --git a/runtime/interpreter/mterp/arm64/op_const_string.S b/runtime/interpreter/mterp/arm64/op_const_string.S
index 8cf0d6d..41376f8 100644
--- a/runtime/interpreter/mterp/arm64/op_const_string.S
+++ b/runtime/interpreter/mterp/arm64/op_const_string.S
@@ -1 +1,2 @@
-%include "arm64/const.S" { "helper":"MterpConstString" }
+%def op_const_string():
+% const(helper="MterpConstString")
diff --git a/runtime/interpreter/mterp/arm64/op_const_string_jumbo.S b/runtime/interpreter/mterp/arm64/op_const_string_jumbo.S
index e1a7339..1a78bcb 100644
--- a/runtime/interpreter/mterp/arm64/op_const_string_jumbo.S
+++ b/runtime/interpreter/mterp/arm64/op_const_string_jumbo.S
@@ -1,3 +1,4 @@
+%def op_const_string_jumbo():
/* const/string vAA, String//BBBBBBBB */
EXPORT_PC
FETCH w0, 1 // w0<- bbbb (low
diff --git a/runtime/interpreter/mterp/arm64/op_const_wide.S b/runtime/interpreter/mterp/arm64/op_const_wide.S
index 8f57dda..6d3be6b 100644
--- a/runtime/interpreter/mterp/arm64/op_const_wide.S
+++ b/runtime/interpreter/mterp/arm64/op_const_wide.S
@@ -1,3 +1,4 @@
+%def op_const_wide():
/* const-wide vAA, #+HHHHhhhhBBBBbbbb */
FETCH w0, 1 // w0<- bbbb (low)
FETCH w1, 2 // w1<- BBBB (low middle)
diff --git a/runtime/interpreter/mterp/arm64/op_const_wide_16.S b/runtime/interpreter/mterp/arm64/op_const_wide_16.S
index 553d481..04615e1 100644
--- a/runtime/interpreter/mterp/arm64/op_const_wide_16.S
+++ b/runtime/interpreter/mterp/arm64/op_const_wide_16.S
@@ -1,3 +1,4 @@
+%def op_const_wide_16():
/* const-wide/16 vAA, #+BBBB */
FETCH_S x0, 1 // x0<- ssssssssssssBBBB (sign-extended)
lsr w3, wINST, #8 // w3<- AA
diff --git a/runtime/interpreter/mterp/arm64/op_const_wide_32.S b/runtime/interpreter/mterp/arm64/op_const_wide_32.S
index 9dc4fc3..627ddea 100644
--- a/runtime/interpreter/mterp/arm64/op_const_wide_32.S
+++ b/runtime/interpreter/mterp/arm64/op_const_wide_32.S
@@ -1,3 +1,4 @@
+%def op_const_wide_32():
/* const-wide/32 vAA, #+BBBBbbbb */
FETCH w0, 1 // x0<- 000000000000bbbb (low)
lsr w3, wINST, #8 // w3<- AA
diff --git a/runtime/interpreter/mterp/arm64/op_const_wide_high16.S b/runtime/interpreter/mterp/arm64/op_const_wide_high16.S
index 94ab987..d51d25f 100644
--- a/runtime/interpreter/mterp/arm64/op_const_wide_high16.S
+++ b/runtime/interpreter/mterp/arm64/op_const_wide_high16.S
@@ -1,3 +1,4 @@
+%def op_const_wide_high16():
/* const-wide/high16 vAA, #+BBBB000000000000 */
FETCH w0, 1 // w0<- 0000BBBB (zero-extended)
lsr w1, wINST, #8 // w1<- AA
diff --git a/runtime/interpreter/mterp/arm64/op_div_double.S b/runtime/interpreter/mterp/arm64/op_div_double.S
index 1f7dad0..ec5b1f5 100644
--- a/runtime/interpreter/mterp/arm64/op_div_double.S
+++ b/runtime/interpreter/mterp/arm64/op_div_double.S
@@ -1 +1,2 @@
-%include "arm64/binopWide.S" {"instr":"fdiv d0, d1, d2", "result":"d0", "r1":"d1", "r2":"d2"}
+%def op_div_double():
+% binopWide(instr="fdiv d0, d1, d2", result="d0", r1="d1", r2="d2")
diff --git a/runtime/interpreter/mterp/arm64/op_div_double_2addr.S b/runtime/interpreter/mterp/arm64/op_div_double_2addr.S
index 414a175..e2781b8 100644
--- a/runtime/interpreter/mterp/arm64/op_div_double_2addr.S
+++ b/runtime/interpreter/mterp/arm64/op_div_double_2addr.S
@@ -1 +1,2 @@
-%include "arm64/binopWide2addr.S" {"instr":"fdiv d0, d0, d1", "r0":"d0", "r1":"d1"}
+%def op_div_double_2addr():
+% binopWide2addr(instr="fdiv d0, d0, d1", r0="d0", r1="d1")
diff --git a/runtime/interpreter/mterp/arm64/op_div_float.S b/runtime/interpreter/mterp/arm64/op_div_float.S
index f24a26c..f0e72c4 100644
--- a/runtime/interpreter/mterp/arm64/op_div_float.S
+++ b/runtime/interpreter/mterp/arm64/op_div_float.S
@@ -1 +1,2 @@
-%include "arm64/fbinop.S" {"instr":"fdiv s0, s0, s1"}
+%def op_div_float():
+% fbinop(instr="fdiv s0, s0, s1")
diff --git a/runtime/interpreter/mterp/arm64/op_div_float_2addr.S b/runtime/interpreter/mterp/arm64/op_div_float_2addr.S
index 2888049..aa73950 100644
--- a/runtime/interpreter/mterp/arm64/op_div_float_2addr.S
+++ b/runtime/interpreter/mterp/arm64/op_div_float_2addr.S
@@ -1 +1,2 @@
-%include "arm64/fbinop2addr.S" {"instr":"fdiv s2, s0, s1"}
+%def op_div_float_2addr():
+% fbinop2addr(instr="fdiv s2, s0, s1")
diff --git a/runtime/interpreter/mterp/arm64/op_div_int.S b/runtime/interpreter/mterp/arm64/op_div_int.S
index 88371c0..6f4cbf3 100644
--- a/runtime/interpreter/mterp/arm64/op_div_int.S
+++ b/runtime/interpreter/mterp/arm64/op_div_int.S
@@ -1 +1,2 @@
-%include "arm64/binop.S" {"instr":"sdiv w0, w0, w1", "chkzero":"1"}
+%def op_div_int():
+% binop(instr="sdiv w0, w0, w1", chkzero="1")
diff --git a/runtime/interpreter/mterp/arm64/op_div_int_2addr.S b/runtime/interpreter/mterp/arm64/op_div_int_2addr.S
index 5f5a80f..eb01066 100644
--- a/runtime/interpreter/mterp/arm64/op_div_int_2addr.S
+++ b/runtime/interpreter/mterp/arm64/op_div_int_2addr.S
@@ -1 +1,2 @@
-%include "arm64/binop2addr.S" {"instr":"sdiv w0, w0, w1", "chkzero":"1"}
+%def op_div_int_2addr():
+% binop2addr(instr="sdiv w0, w0, w1", chkzero="1")
diff --git a/runtime/interpreter/mterp/arm64/op_div_int_lit16.S b/runtime/interpreter/mterp/arm64/op_div_int_lit16.S
index dc7a484..c5cdb96 100644
--- a/runtime/interpreter/mterp/arm64/op_div_int_lit16.S
+++ b/runtime/interpreter/mterp/arm64/op_div_int_lit16.S
@@ -1 +1,2 @@
-%include "arm64/binopLit16.S" {"instr":"sdiv w0, w0, w1", "chkzero":"1"}
+%def op_div_int_lit16():
+% binopLit16(instr="sdiv w0, w0, w1", chkzero="1")
diff --git a/runtime/interpreter/mterp/arm64/op_div_int_lit8.S b/runtime/interpreter/mterp/arm64/op_div_int_lit8.S
index c06521c..3842cd9 100644
--- a/runtime/interpreter/mterp/arm64/op_div_int_lit8.S
+++ b/runtime/interpreter/mterp/arm64/op_div_int_lit8.S
@@ -1 +1,2 @@
-%include "arm64/binopLit8.S" {"instr":"sdiv w0, w0, w1", "chkzero":"1"}
+%def op_div_int_lit8():
+% binopLit8(instr="sdiv w0, w0, w1", chkzero="1")
diff --git a/runtime/interpreter/mterp/arm64/op_div_long.S b/runtime/interpreter/mterp/arm64/op_div_long.S
index 820ae3d..696a91f 100644
--- a/runtime/interpreter/mterp/arm64/op_div_long.S
+++ b/runtime/interpreter/mterp/arm64/op_div_long.S
@@ -1 +1,2 @@
-%include "arm64/binopWide.S" {"instr":"sdiv x0, x1, x2", "chkzero":"1"}
+%def op_div_long():
+% binopWide(instr="sdiv x0, x1, x2", chkzero="1")
diff --git a/runtime/interpreter/mterp/arm64/op_div_long_2addr.S b/runtime/interpreter/mterp/arm64/op_div_long_2addr.S
index da7eabd..cac878c 100644
--- a/runtime/interpreter/mterp/arm64/op_div_long_2addr.S
+++ b/runtime/interpreter/mterp/arm64/op_div_long_2addr.S
@@ -1 +1,2 @@
-%include "arm64/binopWide2addr.S" {"instr":"sdiv x0, x0, x1", "chkzero":"1"}
+%def op_div_long_2addr():
+% binopWide2addr(instr="sdiv x0, x0, x1", chkzero="1")
diff --git a/runtime/interpreter/mterp/arm64/op_double_to_float.S b/runtime/interpreter/mterp/arm64/op_double_to_float.S
index c1555fd..292dcc7 100644
--- a/runtime/interpreter/mterp/arm64/op_double_to_float.S
+++ b/runtime/interpreter/mterp/arm64/op_double_to_float.S
@@ -1 +1,2 @@
-%include "arm64/funopNarrower.S" {"instr":"fcvt s0, d0", "srcreg":"d0", "tgtreg":"s0"}
+%def op_double_to_float():
+% funopNarrower(instr="fcvt s0, d0", srcreg="d0", tgtreg="s0")
diff --git a/runtime/interpreter/mterp/arm64/op_double_to_int.S b/runtime/interpreter/mterp/arm64/op_double_to_int.S
index 7244bac..640e6da 100644
--- a/runtime/interpreter/mterp/arm64/op_double_to_int.S
+++ b/runtime/interpreter/mterp/arm64/op_double_to_int.S
@@ -1 +1,2 @@
-%include "arm64/funopNarrower.S" {"instr":"fcvtzs w0, d0", "srcreg":"d0", "tgtreg":"w0"}
+%def op_double_to_int():
+% funopNarrower(instr="fcvtzs w0, d0", srcreg="d0", tgtreg="w0")
diff --git a/runtime/interpreter/mterp/arm64/op_double_to_long.S b/runtime/interpreter/mterp/arm64/op_double_to_long.S
index 741160b..99c15eb 100644
--- a/runtime/interpreter/mterp/arm64/op_double_to_long.S
+++ b/runtime/interpreter/mterp/arm64/op_double_to_long.S
@@ -1 +1,2 @@
-%include "arm64/funopWide.S" {"instr":"fcvtzs x0, d0", "srcreg":"d0", "tgtreg":"x0"}
+%def op_double_to_long():
+% funopWide(instr="fcvtzs x0, d0", srcreg="d0", tgtreg="x0")
diff --git a/runtime/interpreter/mterp/arm64/op_fill_array_data.S b/runtime/interpreter/mterp/arm64/op_fill_array_data.S
index 86fa6db..2ae444c 100644
--- a/runtime/interpreter/mterp/arm64/op_fill_array_data.S
+++ b/runtime/interpreter/mterp/arm64/op_fill_array_data.S
@@ -1,3 +1,4 @@
+%def op_fill_array_data():
/* fill-array-data vAA, +BBBBBBBB */
EXPORT_PC
FETCH w0, 1 // x0<- 000000000000bbbb (lo)
diff --git a/runtime/interpreter/mterp/arm64/op_filled_new_array.S b/runtime/interpreter/mterp/arm64/op_filled_new_array.S
index 806a1b1..2be627c 100644
--- a/runtime/interpreter/mterp/arm64/op_filled_new_array.S
+++ b/runtime/interpreter/mterp/arm64/op_filled_new_array.S
@@ -1,4 +1,4 @@
-%default { "helper":"MterpFilledNewArray" }
+%def op_filled_new_array(helper="MterpFilledNewArray"):
/*
* Create a new array with elements filled from registers.
*
diff --git a/runtime/interpreter/mterp/arm64/op_filled_new_array_range.S b/runtime/interpreter/mterp/arm64/op_filled_new_array_range.S
index 3c9a419..1667de1 100644
--- a/runtime/interpreter/mterp/arm64/op_filled_new_array_range.S
+++ b/runtime/interpreter/mterp/arm64/op_filled_new_array_range.S
@@ -1 +1,2 @@
-%include "arm64/op_filled_new_array.S" { "helper":"MterpFilledNewArrayRange" }
+%def op_filled_new_array_range():
+% op_filled_new_array(helper="MterpFilledNewArrayRange")
diff --git a/runtime/interpreter/mterp/arm64/op_float_to_double.S b/runtime/interpreter/mterp/arm64/op_float_to_double.S
index 892feca..c3dff39 100644
--- a/runtime/interpreter/mterp/arm64/op_float_to_double.S
+++ b/runtime/interpreter/mterp/arm64/op_float_to_double.S
@@ -1 +1,2 @@
-%include "arm64/funopWider.S" {"instr":"fcvt d0, s0", "srcreg":"s0", "tgtreg":"d0"}
+%def op_float_to_double():
+% funopWider(instr="fcvt d0, s0", srcreg="s0", tgtreg="d0")
diff --git a/runtime/interpreter/mterp/arm64/op_float_to_int.S b/runtime/interpreter/mterp/arm64/op_float_to_int.S
index c849d81..ed784e2 100644
--- a/runtime/interpreter/mterp/arm64/op_float_to_int.S
+++ b/runtime/interpreter/mterp/arm64/op_float_to_int.S
@@ -1 +1,2 @@
-%include "arm64/funopNarrow.S" {"instr":"fcvtzs w0, s0", "srcreg":"s0", "tgtreg":"w0"}
+%def op_float_to_int():
+% funopNarrow(instr="fcvtzs w0, s0", srcreg="s0", tgtreg="w0")
diff --git a/runtime/interpreter/mterp/arm64/op_float_to_long.S b/runtime/interpreter/mterp/arm64/op_float_to_long.S
index c3de16f..1491249 100644
--- a/runtime/interpreter/mterp/arm64/op_float_to_long.S
+++ b/runtime/interpreter/mterp/arm64/op_float_to_long.S
@@ -1 +1,2 @@
-%include "arm64/funopWider.S" {"instr":"fcvtzs x0, s0", "srcreg":"s0", "tgtreg":"x0"}
+%def op_float_to_long():
+% funopWider(instr="fcvtzs x0, s0", srcreg="s0", tgtreg="x0")
diff --git a/runtime/interpreter/mterp/arm64/op_goto.S b/runtime/interpreter/mterp/arm64/op_goto.S
index 6381e94..722eec6 100644
--- a/runtime/interpreter/mterp/arm64/op_goto.S
+++ b/runtime/interpreter/mterp/arm64/op_goto.S
@@ -1,3 +1,4 @@
+%def op_goto():
/*
* Unconditional branch, 8-bit offset.
*
diff --git a/runtime/interpreter/mterp/arm64/op_goto_16.S b/runtime/interpreter/mterp/arm64/op_goto_16.S
index fb9a80a..b5cfa71 100644
--- a/runtime/interpreter/mterp/arm64/op_goto_16.S
+++ b/runtime/interpreter/mterp/arm64/op_goto_16.S
@@ -1,3 +1,4 @@
+%def op_goto_16():
/*
* Unconditional branch, 16-bit offset.
*
diff --git a/runtime/interpreter/mterp/arm64/op_goto_32.S b/runtime/interpreter/mterp/arm64/op_goto_32.S
index b13cb41..3843ba2 100644
--- a/runtime/interpreter/mterp/arm64/op_goto_32.S
+++ b/runtime/interpreter/mterp/arm64/op_goto_32.S
@@ -1,3 +1,4 @@
+%def op_goto_32():
/*
* Unconditional branch, 32-bit offset.
*
diff --git a/runtime/interpreter/mterp/arm64/op_if_eq.S b/runtime/interpreter/mterp/arm64/op_if_eq.S
index aa4a0f1..da58674 100644
--- a/runtime/interpreter/mterp/arm64/op_if_eq.S
+++ b/runtime/interpreter/mterp/arm64/op_if_eq.S
@@ -1 +1,2 @@
-%include "arm64/bincmp.S" { "condition":"eq" }
+%def op_if_eq():
+% bincmp(condition="eq")
diff --git a/runtime/interpreter/mterp/arm64/op_if_eqz.S b/runtime/interpreter/mterp/arm64/op_if_eqz.S
index 47c1dee..8241db8 100644
--- a/runtime/interpreter/mterp/arm64/op_if_eqz.S
+++ b/runtime/interpreter/mterp/arm64/op_if_eqz.S
@@ -1 +1,2 @@
-%include "arm64/zcmp.S" { "compare":"0", "branch":"cbz w2," }
+%def op_if_eqz():
+% zcmp(compare="0", branch="cbz w2,")
diff --git a/runtime/interpreter/mterp/arm64/op_if_ge.S b/runtime/interpreter/mterp/arm64/op_if_ge.S
index d6ec761..5b6ed2f 100644
--- a/runtime/interpreter/mterp/arm64/op_if_ge.S
+++ b/runtime/interpreter/mterp/arm64/op_if_ge.S
@@ -1 +1,2 @@
-%include "arm64/bincmp.S" { "condition":"ge" }
+%def op_if_ge():
+% bincmp(condition="ge")
diff --git a/runtime/interpreter/mterp/arm64/op_if_gez.S b/runtime/interpreter/mterp/arm64/op_if_gez.S
index 087e094..f7903b8 100644
--- a/runtime/interpreter/mterp/arm64/op_if_gez.S
+++ b/runtime/interpreter/mterp/arm64/op_if_gez.S
@@ -1 +1,2 @@
-%include "arm64/zcmp.S" { "compare":"0", "branch":"tbz w2, #31," }
+%def op_if_gez():
+% zcmp(compare="0", branch="tbz w2, #31,")
diff --git a/runtime/interpreter/mterp/arm64/op_if_gt.S b/runtime/interpreter/mterp/arm64/op_if_gt.S
index 7db8e9d..201decf 100644
--- a/runtime/interpreter/mterp/arm64/op_if_gt.S
+++ b/runtime/interpreter/mterp/arm64/op_if_gt.S
@@ -1 +1,2 @@
-%include "arm64/bincmp.S" { "condition":"gt" }
+%def op_if_gt():
+% bincmp(condition="gt")
diff --git a/runtime/interpreter/mterp/arm64/op_if_gtz.S b/runtime/interpreter/mterp/arm64/op_if_gtz.S
index 476b265..e0663a0 100644
--- a/runtime/interpreter/mterp/arm64/op_if_gtz.S
+++ b/runtime/interpreter/mterp/arm64/op_if_gtz.S
@@ -1 +1,2 @@
-%include "arm64/zcmp.S" { "branch":"b.gt" }
+%def op_if_gtz():
+% zcmp(branch="b.gt")
diff --git a/runtime/interpreter/mterp/arm64/op_if_le.S b/runtime/interpreter/mterp/arm64/op_if_le.S
index ca3a83f..e6024f2 100644
--- a/runtime/interpreter/mterp/arm64/op_if_le.S
+++ b/runtime/interpreter/mterp/arm64/op_if_le.S
@@ -1 +1,2 @@
-%include "arm64/bincmp.S" { "condition":"le" }
+%def op_if_le():
+% bincmp(condition="le")
diff --git a/runtime/interpreter/mterp/arm64/op_if_lez.S b/runtime/interpreter/mterp/arm64/op_if_lez.S
index 2717a60..7ec4a9e 100644
--- a/runtime/interpreter/mterp/arm64/op_if_lez.S
+++ b/runtime/interpreter/mterp/arm64/op_if_lez.S
@@ -1 +1,2 @@
-%include "arm64/zcmp.S" { "branch":"b.le" }
+%def op_if_lez():
+% zcmp(branch="b.le")
diff --git a/runtime/interpreter/mterp/arm64/op_if_lt.S b/runtime/interpreter/mterp/arm64/op_if_lt.S
index 56450a1..4ef22fd 100644
--- a/runtime/interpreter/mterp/arm64/op_if_lt.S
+++ b/runtime/interpreter/mterp/arm64/op_if_lt.S
@@ -1 +1,2 @@
-%include "arm64/bincmp.S" { "condition":"lt" }
+%def op_if_lt():
+% bincmp(condition="lt")
diff --git a/runtime/interpreter/mterp/arm64/op_if_ltz.S b/runtime/interpreter/mterp/arm64/op_if_ltz.S
index 86089c1..a9f04ee 100644
--- a/runtime/interpreter/mterp/arm64/op_if_ltz.S
+++ b/runtime/interpreter/mterp/arm64/op_if_ltz.S
@@ -1 +1,2 @@
-%include "arm64/zcmp.S" { "compare":"0", "branch":"tbnz w2, #31," }
+%def op_if_ltz():
+% zcmp(compare="0", branch="tbnz w2, #31,")
diff --git a/runtime/interpreter/mterp/arm64/op_if_ne.S b/runtime/interpreter/mterp/arm64/op_if_ne.S
index 14d9e13..ec3a688 100644
--- a/runtime/interpreter/mterp/arm64/op_if_ne.S
+++ b/runtime/interpreter/mterp/arm64/op_if_ne.S
@@ -1 +1,2 @@
-%include "arm64/bincmp.S" { "condition":"ne" }
+%def op_if_ne():
+% bincmp(condition="ne")
diff --git a/runtime/interpreter/mterp/arm64/op_if_nez.S b/runtime/interpreter/mterp/arm64/op_if_nez.S
index efacc88..c4bb3b3 100644
--- a/runtime/interpreter/mterp/arm64/op_if_nez.S
+++ b/runtime/interpreter/mterp/arm64/op_if_nez.S
@@ -1 +1,2 @@
-%include "arm64/zcmp.S" { "compare":"0", "branch":"cbnz w2," }
+%def op_if_nez():
+% zcmp(compare="0", branch="cbnz w2,")
diff --git a/runtime/interpreter/mterp/arm64/op_iget.S b/runtime/interpreter/mterp/arm64/op_iget.S
index 48b9cad..d09edc0 100644
--- a/runtime/interpreter/mterp/arm64/op_iget.S
+++ b/runtime/interpreter/mterp/arm64/op_iget.S
@@ -1,2 +1,2 @@
-%default { "is_object":"0", "helper":"MterpIGetU32"}
-%include "arm64/field.S" { }
+%def op_iget(is_object="0", helper="MterpIGetU32"):
+% field(helper=helper)
diff --git a/runtime/interpreter/mterp/arm64/op_iget_boolean.S b/runtime/interpreter/mterp/arm64/op_iget_boolean.S
index 9a83b2a..cb8edee 100644
--- a/runtime/interpreter/mterp/arm64/op_iget_boolean.S
+++ b/runtime/interpreter/mterp/arm64/op_iget_boolean.S
@@ -1 +1,2 @@
-%include "arm64/op_iget.S" { "helper":"MterpIGetU8" }
+%def op_iget_boolean():
+% op_iget(helper="MterpIGetU8")
diff --git a/runtime/interpreter/mterp/arm64/op_iget_boolean_quick.S b/runtime/interpreter/mterp/arm64/op_iget_boolean_quick.S
index 2ceccb9..7ac9fce 100644
--- a/runtime/interpreter/mterp/arm64/op_iget_boolean_quick.S
+++ b/runtime/interpreter/mterp/arm64/op_iget_boolean_quick.S
@@ -1 +1,2 @@
-%include "arm64/op_iget_quick.S" { "load":"ldrb" }
+%def op_iget_boolean_quick():
+% op_iget_quick(load="ldrb")
diff --git a/runtime/interpreter/mterp/arm64/op_iget_byte.S b/runtime/interpreter/mterp/arm64/op_iget_byte.S
index f73e634..2b87fb1 100644
--- a/runtime/interpreter/mterp/arm64/op_iget_byte.S
+++ b/runtime/interpreter/mterp/arm64/op_iget_byte.S
@@ -1 +1,2 @@
-%include "arm64/op_iget.S" { "helper":"MterpIGetI8" }
+%def op_iget_byte():
+% op_iget(helper="MterpIGetI8")
diff --git a/runtime/interpreter/mterp/arm64/op_iget_byte_quick.S b/runtime/interpreter/mterp/arm64/op_iget_byte_quick.S
index 6e97b72..bbccaff 100644
--- a/runtime/interpreter/mterp/arm64/op_iget_byte_quick.S
+++ b/runtime/interpreter/mterp/arm64/op_iget_byte_quick.S
@@ -1 +1,2 @@
-%include "arm64/op_iget_quick.S" { "load":"ldrsb" }
+%def op_iget_byte_quick():
+% op_iget_quick(load="ldrsb")
diff --git a/runtime/interpreter/mterp/arm64/op_iget_char.S b/runtime/interpreter/mterp/arm64/op_iget_char.S
index a5efd9e..001bd03 100644
--- a/runtime/interpreter/mterp/arm64/op_iget_char.S
+++ b/runtime/interpreter/mterp/arm64/op_iget_char.S
@@ -1 +1,2 @@
-%include "arm64/op_iget.S" { "helper":"MterpIGetU16" }
+%def op_iget_char():
+% op_iget(helper="MterpIGetU16")
diff --git a/runtime/interpreter/mterp/arm64/op_iget_char_quick.S b/runtime/interpreter/mterp/arm64/op_iget_char_quick.S
index 325dd1c..71a9276 100644
--- a/runtime/interpreter/mterp/arm64/op_iget_char_quick.S
+++ b/runtime/interpreter/mterp/arm64/op_iget_char_quick.S
@@ -1 +1,2 @@
-%include "arm64/op_iget_quick.S" { "load":"ldrh" }
+%def op_iget_char_quick():
+% op_iget_quick(load="ldrh")
diff --git a/runtime/interpreter/mterp/arm64/op_iget_object.S b/runtime/interpreter/mterp/arm64/op_iget_object.S
index 40ddadd..4e5f769 100644
--- a/runtime/interpreter/mterp/arm64/op_iget_object.S
+++ b/runtime/interpreter/mterp/arm64/op_iget_object.S
@@ -1 +1,2 @@
-%include "arm64/op_iget.S" { "is_object":"1", "helper":"MterpIGetObj" }
+%def op_iget_object():
+% op_iget(is_object="1", helper="MterpIGetObj")
diff --git a/runtime/interpreter/mterp/arm64/op_iget_object_quick.S b/runtime/interpreter/mterp/arm64/op_iget_object_quick.S
index e9a797d..f55b08f 100644
--- a/runtime/interpreter/mterp/arm64/op_iget_object_quick.S
+++ b/runtime/interpreter/mterp/arm64/op_iget_object_quick.S
@@ -1,3 +1,4 @@
+%def op_iget_object_quick():
/* For: iget-object-quick */
/* op vA, vB, offset//CCCC */
lsr w2, wINST, #12 // w2<- B
diff --git a/runtime/interpreter/mterp/arm64/op_iget_quick.S b/runtime/interpreter/mterp/arm64/op_iget_quick.S
index 699b2c4..641bfab 100644
--- a/runtime/interpreter/mterp/arm64/op_iget_quick.S
+++ b/runtime/interpreter/mterp/arm64/op_iget_quick.S
@@ -1,4 +1,4 @@
-%default { "load":"ldr", "extend":"" }
+%def op_iget_quick(load="ldr", extend=""):
/* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick */
/* op vA, vB, offset//CCCC */
lsr w2, wINST, #12 // w2<- B
diff --git a/runtime/interpreter/mterp/arm64/op_iget_short.S b/runtime/interpreter/mterp/arm64/op_iget_short.S
index bb81c17..a62c4d9 100644
--- a/runtime/interpreter/mterp/arm64/op_iget_short.S
+++ b/runtime/interpreter/mterp/arm64/op_iget_short.S
@@ -1 +1,2 @@
-%include "arm64/op_iget.S" { "helper":"MterpIGetI16" }
+%def op_iget_short():
+% op_iget(helper="MterpIGetI16")
diff --git a/runtime/interpreter/mterp/arm64/op_iget_short_quick.S b/runtime/interpreter/mterp/arm64/op_iget_short_quick.S
index 8367070..5dbdc4f 100644
--- a/runtime/interpreter/mterp/arm64/op_iget_short_quick.S
+++ b/runtime/interpreter/mterp/arm64/op_iget_short_quick.S
@@ -1 +1,2 @@
-%include "arm64/op_iget_quick.S" { "load":"ldrsh" }
+%def op_iget_short_quick():
+% op_iget_quick(load="ldrsh")
diff --git a/runtime/interpreter/mterp/arm64/op_iget_wide.S b/runtime/interpreter/mterp/arm64/op_iget_wide.S
index 70061d6..9643cc3 100644
--- a/runtime/interpreter/mterp/arm64/op_iget_wide.S
+++ b/runtime/interpreter/mterp/arm64/op_iget_wide.S
@@ -1 +1,2 @@
-%include "arm64/op_iget.S" { "helper":"MterpIGetU64" }
+%def op_iget_wide():
+% op_iget(helper="MterpIGetU64")
diff --git a/runtime/interpreter/mterp/arm64/op_iget_wide_quick.S b/runtime/interpreter/mterp/arm64/op_iget_wide_quick.S
index e9388e4..9f7a61b 100644
--- a/runtime/interpreter/mterp/arm64/op_iget_wide_quick.S
+++ b/runtime/interpreter/mterp/arm64/op_iget_wide_quick.S
@@ -1,3 +1,4 @@
+%def op_iget_wide_quick():
/* iget-wide-quick vA, vB, offset//CCCC */
lsr w2, wINST, #12 // w2<- B
FETCH w4, 1 // w4<- field byte offset
diff --git a/runtime/interpreter/mterp/arm64/op_instance_of.S b/runtime/interpreter/mterp/arm64/op_instance_of.S
index a56705a..9c337d1 100644
--- a/runtime/interpreter/mterp/arm64/op_instance_of.S
+++ b/runtime/interpreter/mterp/arm64/op_instance_of.S
@@ -1,3 +1,4 @@
+%def op_instance_of():
/*
* Check to see if an object reference is an instance of a class.
*
diff --git a/runtime/interpreter/mterp/arm64/op_int_to_byte.S b/runtime/interpreter/mterp/arm64/op_int_to_byte.S
index 43f8148..8174978 100644
--- a/runtime/interpreter/mterp/arm64/op_int_to_byte.S
+++ b/runtime/interpreter/mterp/arm64/op_int_to_byte.S
@@ -1 +1,2 @@
-%include "arm64/unop.S" {"instr":"sxtb w0, w0"}
+%def op_int_to_byte():
+% unop(instr="sxtb w0, w0")
diff --git a/runtime/interpreter/mterp/arm64/op_int_to_char.S b/runtime/interpreter/mterp/arm64/op_int_to_char.S
index f092170..bbf3239 100644
--- a/runtime/interpreter/mterp/arm64/op_int_to_char.S
+++ b/runtime/interpreter/mterp/arm64/op_int_to_char.S
@@ -1 +1,2 @@
-%include "arm64/unop.S" {"instr":"uxth w0, w0"}
+%def op_int_to_char():
+% unop(instr="uxth w0, w0")
diff --git a/runtime/interpreter/mterp/arm64/op_int_to_double.S b/runtime/interpreter/mterp/arm64/op_int_to_double.S
index 3dee75a..f2b9dc0 100644
--- a/runtime/interpreter/mterp/arm64/op_int_to_double.S
+++ b/runtime/interpreter/mterp/arm64/op_int_to_double.S
@@ -1 +1,2 @@
-%include "arm64/funopWider.S" {"instr":"scvtf d0, w0", "srcreg":"w0", "tgtreg":"d0"}
+%def op_int_to_double():
+% funopWider(instr="scvtf d0, w0", srcreg="w0", tgtreg="d0")
diff --git a/runtime/interpreter/mterp/arm64/op_int_to_float.S b/runtime/interpreter/mterp/arm64/op_int_to_float.S
index 3ebbdc7..ffe873d 100644
--- a/runtime/interpreter/mterp/arm64/op_int_to_float.S
+++ b/runtime/interpreter/mterp/arm64/op_int_to_float.S
@@ -1 +1,2 @@
-%include "arm64/funopNarrow.S" {"instr":"scvtf s0, w0", "srcreg":"w0", "tgtreg":"s0"}
+%def op_int_to_float():
+% funopNarrow(instr="scvtf s0, w0", srcreg="w0", tgtreg="s0")
diff --git a/runtime/interpreter/mterp/arm64/op_int_to_long.S b/runtime/interpreter/mterp/arm64/op_int_to_long.S
index 45e3112..d7e5b46 100644
--- a/runtime/interpreter/mterp/arm64/op_int_to_long.S
+++ b/runtime/interpreter/mterp/arm64/op_int_to_long.S
@@ -1,3 +1,4 @@
+%def op_int_to_long():
/* int-to-long vA, vB */
lsr w3, wINST, #12 // w3<- B
ubfx w4, wINST, #8, #4 // w4<- A
diff --git a/runtime/interpreter/mterp/arm64/op_int_to_short.S b/runtime/interpreter/mterp/arm64/op_int_to_short.S
index 87fb804..0c51c76 100644
--- a/runtime/interpreter/mterp/arm64/op_int_to_short.S
+++ b/runtime/interpreter/mterp/arm64/op_int_to_short.S
@@ -1 +1,2 @@
-%include "arm64/unop.S" {"instr":"sxth w0, w0"}
+%def op_int_to_short():
+% unop(instr="sxth w0, w0")
diff --git a/runtime/interpreter/mterp/arm64/op_invoke_custom.S b/runtime/interpreter/mterp/arm64/op_invoke_custom.S
index 3686584..4bba9ee 100644
--- a/runtime/interpreter/mterp/arm64/op_invoke_custom.S
+++ b/runtime/interpreter/mterp/arm64/op_invoke_custom.S
@@ -1 +1,2 @@
-%include "arm64/invoke.S" { "helper":"MterpInvokeCustom" }
+%def op_invoke_custom():
+% invoke(helper="MterpInvokeCustom")
diff --git a/runtime/interpreter/mterp/arm64/op_invoke_custom_range.S b/runtime/interpreter/mterp/arm64/op_invoke_custom_range.S
index 06de86a..57e61af 100644
--- a/runtime/interpreter/mterp/arm64/op_invoke_custom_range.S
+++ b/runtime/interpreter/mterp/arm64/op_invoke_custom_range.S
@@ -1 +1,2 @@
-%include "arm64/invoke.S" { "helper":"MterpInvokeCustomRange" }
+%def op_invoke_custom_range():
+% invoke(helper="MterpInvokeCustomRange")
diff --git a/runtime/interpreter/mterp/arm64/op_invoke_direct.S b/runtime/interpreter/mterp/arm64/op_invoke_direct.S
index c117232..d3139cf 100644
--- a/runtime/interpreter/mterp/arm64/op_invoke_direct.S
+++ b/runtime/interpreter/mterp/arm64/op_invoke_direct.S
@@ -1 +1,2 @@
-%include "arm64/invoke.S" { "helper":"MterpInvokeDirect" }
+%def op_invoke_direct():
+% invoke(helper="MterpInvokeDirect")
diff --git a/runtime/interpreter/mterp/arm64/op_invoke_direct_range.S b/runtime/interpreter/mterp/arm64/op_invoke_direct_range.S
index efc54c7..b4a161f 100644
--- a/runtime/interpreter/mterp/arm64/op_invoke_direct_range.S
+++ b/runtime/interpreter/mterp/arm64/op_invoke_direct_range.S
@@ -1 +1,2 @@
-%include "arm64/invoke.S" { "helper":"MterpInvokeDirectRange" }
+%def op_invoke_direct_range():
+% invoke(helper="MterpInvokeDirectRange")
diff --git a/runtime/interpreter/mterp/arm64/op_invoke_interface.S b/runtime/interpreter/mterp/arm64/op_invoke_interface.S
index 12dfa59..b064126 100644
--- a/runtime/interpreter/mterp/arm64/op_invoke_interface.S
+++ b/runtime/interpreter/mterp/arm64/op_invoke_interface.S
@@ -1,4 +1,5 @@
-%include "arm64/invoke.S" { "helper":"MterpInvokeInterface" }
+%def op_invoke_interface():
+% invoke(helper="MterpInvokeInterface")
/*
* Handle an interface method call.
*
diff --git a/runtime/interpreter/mterp/arm64/op_invoke_interface_range.S b/runtime/interpreter/mterp/arm64/op_invoke_interface_range.S
index 61caaf4..2989115 100644
--- a/runtime/interpreter/mterp/arm64/op_invoke_interface_range.S
+++ b/runtime/interpreter/mterp/arm64/op_invoke_interface_range.S
@@ -1 +1,2 @@
-%include "arm64/invoke.S" { "helper":"MterpInvokeInterfaceRange" }
+%def op_invoke_interface_range():
+% invoke(helper="MterpInvokeInterfaceRange")
diff --git a/runtime/interpreter/mterp/arm64/op_invoke_polymorphic.S b/runtime/interpreter/mterp/arm64/op_invoke_polymorphic.S
index aace98f..ce61f5a 100644
--- a/runtime/interpreter/mterp/arm64/op_invoke_polymorphic.S
+++ b/runtime/interpreter/mterp/arm64/op_invoke_polymorphic.S
@@ -1 +1,2 @@
-%include "arm64/invoke_polymorphic.S" { "helper":"MterpInvokePolymorphic" }
+%def op_invoke_polymorphic():
+% invoke_polymorphic(helper="MterpInvokePolymorphic")
diff --git a/runtime/interpreter/mterp/arm64/op_invoke_polymorphic_range.S b/runtime/interpreter/mterp/arm64/op_invoke_polymorphic_range.S
index 30c8c09..16731bd 100644
--- a/runtime/interpreter/mterp/arm64/op_invoke_polymorphic_range.S
+++ b/runtime/interpreter/mterp/arm64/op_invoke_polymorphic_range.S
@@ -1 +1,2 @@
-%include "arm64/invoke_polymorphic.S" { "helper":"MterpInvokePolymorphicRange" }
+%def op_invoke_polymorphic_range():
+% invoke_polymorphic(helper="MterpInvokePolymorphicRange")
diff --git a/runtime/interpreter/mterp/arm64/op_invoke_static.S b/runtime/interpreter/mterp/arm64/op_invoke_static.S
index 634eda2..3e38d36 100644
--- a/runtime/interpreter/mterp/arm64/op_invoke_static.S
+++ b/runtime/interpreter/mterp/arm64/op_invoke_static.S
@@ -1,2 +1,3 @@
-%include "arm64/invoke.S" { "helper":"MterpInvokeStatic" }
+%def op_invoke_static():
+% invoke(helper="MterpInvokeStatic")
diff --git a/runtime/interpreter/mterp/arm64/op_invoke_static_range.S b/runtime/interpreter/mterp/arm64/op_invoke_static_range.S
index 32cdcdd..e0a546c 100644
--- a/runtime/interpreter/mterp/arm64/op_invoke_static_range.S
+++ b/runtime/interpreter/mterp/arm64/op_invoke_static_range.S
@@ -1 +1,2 @@
-%include "arm64/invoke.S" { "helper":"MterpInvokeStaticRange" }
+%def op_invoke_static_range():
+% invoke(helper="MterpInvokeStaticRange")
diff --git a/runtime/interpreter/mterp/arm64/op_invoke_super.S b/runtime/interpreter/mterp/arm64/op_invoke_super.S
index def2c55..3c34c99 100644
--- a/runtime/interpreter/mterp/arm64/op_invoke_super.S
+++ b/runtime/interpreter/mterp/arm64/op_invoke_super.S
@@ -1,4 +1,5 @@
-%include "arm64/invoke.S" { "helper":"MterpInvokeSuper" }
+%def op_invoke_super():
+% invoke(helper="MterpInvokeSuper")
/*
* Handle a "super" method call.
*
diff --git a/runtime/interpreter/mterp/arm64/op_invoke_super_range.S b/runtime/interpreter/mterp/arm64/op_invoke_super_range.S
index 27fb859..caeafaa 100644
--- a/runtime/interpreter/mterp/arm64/op_invoke_super_range.S
+++ b/runtime/interpreter/mterp/arm64/op_invoke_super_range.S
@@ -1 +1,2 @@
-%include "arm64/invoke.S" { "helper":"MterpInvokeSuperRange" }
+%def op_invoke_super_range():
+% invoke(helper="MterpInvokeSuperRange")
diff --git a/runtime/interpreter/mterp/arm64/op_invoke_virtual.S b/runtime/interpreter/mterp/arm64/op_invoke_virtual.S
index 66d0502..249177b 100644
--- a/runtime/interpreter/mterp/arm64/op_invoke_virtual.S
+++ b/runtime/interpreter/mterp/arm64/op_invoke_virtual.S
@@ -1,4 +1,5 @@
-%include "arm64/invoke.S" { "helper":"MterpInvokeVirtual" }
+%def op_invoke_virtual():
+% invoke(helper="MterpInvokeVirtual")
/*
* Handle a virtual method call.
*
diff --git a/runtime/interpreter/mterp/arm64/op_invoke_virtual_quick.S b/runtime/interpreter/mterp/arm64/op_invoke_virtual_quick.S
index 4300c34..ea72c17 100644
--- a/runtime/interpreter/mterp/arm64/op_invoke_virtual_quick.S
+++ b/runtime/interpreter/mterp/arm64/op_invoke_virtual_quick.S
@@ -1 +1,2 @@
-%include "arm64/invoke.S" { "helper":"MterpInvokeVirtualQuick" }
+%def op_invoke_virtual_quick():
+% invoke(helper="MterpInvokeVirtualQuick")
diff --git a/runtime/interpreter/mterp/arm64/op_invoke_virtual_range.S b/runtime/interpreter/mterp/arm64/op_invoke_virtual_range.S
index b43955c..baa0779 100644
--- a/runtime/interpreter/mterp/arm64/op_invoke_virtual_range.S
+++ b/runtime/interpreter/mterp/arm64/op_invoke_virtual_range.S
@@ -1 +1,2 @@
-%include "arm64/invoke.S" { "helper":"MterpInvokeVirtualRange" }
+%def op_invoke_virtual_range():
+% invoke(helper="MterpInvokeVirtualRange")
diff --git a/runtime/interpreter/mterp/arm64/op_invoke_virtual_range_quick.S b/runtime/interpreter/mterp/arm64/op_invoke_virtual_range_quick.S
index 90c7b65..1d961a0 100644
--- a/runtime/interpreter/mterp/arm64/op_invoke_virtual_range_quick.S
+++ b/runtime/interpreter/mterp/arm64/op_invoke_virtual_range_quick.S
@@ -1 +1,2 @@
-%include "arm64/invoke.S" { "helper":"MterpInvokeVirtualQuickRange" }
+%def op_invoke_virtual_range_quick():
+% invoke(helper="MterpInvokeVirtualQuickRange")
diff --git a/runtime/interpreter/mterp/arm64/op_iput.S b/runtime/interpreter/mterp/arm64/op_iput.S
index 2bc3db9..e5351ba 100644
--- a/runtime/interpreter/mterp/arm64/op_iput.S
+++ b/runtime/interpreter/mterp/arm64/op_iput.S
@@ -1,2 +1,2 @@
-%default { "is_object":"0", "helper":"MterpIPutU32" }
-%include "arm64/field.S" { }
+%def op_iput(is_object="0", helper="MterpIPutU32"):
+% field(helper=helper)
diff --git a/runtime/interpreter/mterp/arm64/op_iput_boolean.S b/runtime/interpreter/mterp/arm64/op_iput_boolean.S
index 12a278c..9eb8498 100644
--- a/runtime/interpreter/mterp/arm64/op_iput_boolean.S
+++ b/runtime/interpreter/mterp/arm64/op_iput_boolean.S
@@ -1 +1,2 @@
-%include "arm64/op_iput.S" { "helper":"MterpIPutU8" }
+%def op_iput_boolean():
+% op_iput(helper="MterpIPutU8")
diff --git a/runtime/interpreter/mterp/arm64/op_iput_boolean_quick.S b/runtime/interpreter/mterp/arm64/op_iput_boolean_quick.S
index 25c61d7..fd077a7 100644
--- a/runtime/interpreter/mterp/arm64/op_iput_boolean_quick.S
+++ b/runtime/interpreter/mterp/arm64/op_iput_boolean_quick.S
@@ -1 +1,2 @@
-%include "arm64/op_iput_quick.S" { "store":"strb" }
+%def op_iput_boolean_quick():
+% op_iput_quick(store="strb")
diff --git a/runtime/interpreter/mterp/arm64/op_iput_byte.S b/runtime/interpreter/mterp/arm64/op_iput_byte.S
index 82b99e9..4b74f9f 100644
--- a/runtime/interpreter/mterp/arm64/op_iput_byte.S
+++ b/runtime/interpreter/mterp/arm64/op_iput_byte.S
@@ -1 +1,2 @@
-%include "arm64/op_iput.S" { "helper":"MterpIPutI8" }
+%def op_iput_byte():
+% op_iput(helper="MterpIPutI8")
diff --git a/runtime/interpreter/mterp/arm64/op_iput_byte_quick.S b/runtime/interpreter/mterp/arm64/op_iput_byte_quick.S
index 25c61d7..30238cf 100644
--- a/runtime/interpreter/mterp/arm64/op_iput_byte_quick.S
+++ b/runtime/interpreter/mterp/arm64/op_iput_byte_quick.S
@@ -1 +1,2 @@
-%include "arm64/op_iput_quick.S" { "store":"strb" }
+%def op_iput_byte_quick():
+% op_iput_quick(store="strb")
diff --git a/runtime/interpreter/mterp/arm64/op_iput_char.S b/runtime/interpreter/mterp/arm64/op_iput_char.S
index 427d92d..64a249f 100644
--- a/runtime/interpreter/mterp/arm64/op_iput_char.S
+++ b/runtime/interpreter/mterp/arm64/op_iput_char.S
@@ -1 +1,2 @@
-%include "arm64/op_iput.S" { "helper":"MterpIPutU16" }
+%def op_iput_char():
+% op_iput(helper="MterpIPutU16")
diff --git a/runtime/interpreter/mterp/arm64/op_iput_char_quick.S b/runtime/interpreter/mterp/arm64/op_iput_char_quick.S
index c6ef46a..0deff56 100644
--- a/runtime/interpreter/mterp/arm64/op_iput_char_quick.S
+++ b/runtime/interpreter/mterp/arm64/op_iput_char_quick.S
@@ -1 +1,2 @@
-%include "arm64/op_iput_quick.S" { "store":"strh" }
+%def op_iput_char_quick():
+% op_iput_quick(store="strh")
diff --git a/runtime/interpreter/mterp/arm64/op_iput_object.S b/runtime/interpreter/mterp/arm64/op_iput_object.S
index e9bb93f..131edd5 100644
--- a/runtime/interpreter/mterp/arm64/op_iput_object.S
+++ b/runtime/interpreter/mterp/arm64/op_iput_object.S
@@ -1 +1,2 @@
-%include "arm64/op_iput.S" { "is_object":"1", "helper":"MterpIPutObj" }
+%def op_iput_object():
+% op_iput(is_object="1", helper="MterpIPutObj")
diff --git a/runtime/interpreter/mterp/arm64/op_iput_object_quick.S b/runtime/interpreter/mterp/arm64/op_iput_object_quick.S
index 6fbf2b1..58c1026 100644
--- a/runtime/interpreter/mterp/arm64/op_iput_object_quick.S
+++ b/runtime/interpreter/mterp/arm64/op_iput_object_quick.S
@@ -1,3 +1,4 @@
+%def op_iput_object_quick():
EXPORT_PC
add x0, xFP, #OFF_FP_SHADOWFRAME
mov x1, xPC
diff --git a/runtime/interpreter/mterp/arm64/op_iput_quick.S b/runtime/interpreter/mterp/arm64/op_iput_quick.S
index e95da76..1d99108 100644
--- a/runtime/interpreter/mterp/arm64/op_iput_quick.S
+++ b/runtime/interpreter/mterp/arm64/op_iput_quick.S
@@ -1,4 +1,4 @@
-%default { "store":"str" }
+%def op_iput_quick(store="str"):
/* For: iput-quick, iput-object-quick */
/* op vA, vB, offset//CCCC */
lsr w2, wINST, #12 // w2<- B
diff --git a/runtime/interpreter/mterp/arm64/op_iput_short.S b/runtime/interpreter/mterp/arm64/op_iput_short.S
index 67f1ace..e631a3b 100644
--- a/runtime/interpreter/mterp/arm64/op_iput_short.S
+++ b/runtime/interpreter/mterp/arm64/op_iput_short.S
@@ -1 +1,2 @@
-%include "arm64/op_iput.S" { "helper":"MterpIPutI16" }
+%def op_iput_short():
+% op_iput(helper="MterpIPutI16")
diff --git a/runtime/interpreter/mterp/arm64/op_iput_short_quick.S b/runtime/interpreter/mterp/arm64/op_iput_short_quick.S
index c6ef46a..6a1b651 100644
--- a/runtime/interpreter/mterp/arm64/op_iput_short_quick.S
+++ b/runtime/interpreter/mterp/arm64/op_iput_short_quick.S
@@ -1 +1,2 @@
-%include "arm64/op_iput_quick.S" { "store":"strh" }
+%def op_iput_short_quick():
+% op_iput_quick(store="strh")
diff --git a/runtime/interpreter/mterp/arm64/op_iput_wide.S b/runtime/interpreter/mterp/arm64/op_iput_wide.S
index e1fafad..2f34fd3 100644
--- a/runtime/interpreter/mterp/arm64/op_iput_wide.S
+++ b/runtime/interpreter/mterp/arm64/op_iput_wide.S
@@ -1 +1,2 @@
-%include "arm64/op_iput.S" { "helper":"MterpIPutU64" }
+%def op_iput_wide():
+% op_iput(helper="MterpIPutU64")
diff --git a/runtime/interpreter/mterp/arm64/op_iput_wide_quick.S b/runtime/interpreter/mterp/arm64/op_iput_wide_quick.S
index 28e831a..a789188 100644
--- a/runtime/interpreter/mterp/arm64/op_iput_wide_quick.S
+++ b/runtime/interpreter/mterp/arm64/op_iput_wide_quick.S
@@ -1,3 +1,4 @@
+%def op_iput_wide_quick():
/* iput-wide-quick vA, vB, offset//CCCC */
lsr w2, wINST, #12 // w2<- B
FETCH w3, 1 // w3<- field byte offset
diff --git a/runtime/interpreter/mterp/arm64/op_long_to_double.S b/runtime/interpreter/mterp/arm64/op_long_to_double.S
index a3f59c2..b1b7b4e 100644
--- a/runtime/interpreter/mterp/arm64/op_long_to_double.S
+++ b/runtime/interpreter/mterp/arm64/op_long_to_double.S
@@ -1 +1,2 @@
-%include "arm64/funopWide.S" {"instr":"scvtf d0, x0", "srcreg":"x0", "tgtreg":"d0"}
+%def op_long_to_double():
+% funopWide(instr="scvtf d0, x0", srcreg="x0", tgtreg="d0")
diff --git a/runtime/interpreter/mterp/arm64/op_long_to_float.S b/runtime/interpreter/mterp/arm64/op_long_to_float.S
index e9c9145..424dea0 100644
--- a/runtime/interpreter/mterp/arm64/op_long_to_float.S
+++ b/runtime/interpreter/mterp/arm64/op_long_to_float.S
@@ -1 +1,2 @@
-%include "arm64/funopNarrower.S" {"instr":"scvtf s0, x0", "srcreg":"x0", "tgtreg":"s0"}
+%def op_long_to_float():
+% funopNarrower(instr="scvtf s0, x0", srcreg="x0", tgtreg="s0")
diff --git a/runtime/interpreter/mterp/arm64/op_long_to_int.S b/runtime/interpreter/mterp/arm64/op_long_to_int.S
index 73f58d8..eacb8f5 100644
--- a/runtime/interpreter/mterp/arm64/op_long_to_int.S
+++ b/runtime/interpreter/mterp/arm64/op_long_to_int.S
@@ -1,2 +1,3 @@
+%def op_long_to_int():
/* we ignore the high word, making this equivalent to a 32-bit reg move */
-%include "arm64/op_move.S"
+% op_move()
diff --git a/runtime/interpreter/mterp/arm64/op_monitor_enter.S b/runtime/interpreter/mterp/arm64/op_monitor_enter.S
index 6fbd9ae..9d167a2 100644
--- a/runtime/interpreter/mterp/arm64/op_monitor_enter.S
+++ b/runtime/interpreter/mterp/arm64/op_monitor_enter.S
@@ -1,3 +1,4 @@
+%def op_monitor_enter():
/*
* Synchronize on an object.
*/
diff --git a/runtime/interpreter/mterp/arm64/op_monitor_exit.S b/runtime/interpreter/mterp/arm64/op_monitor_exit.S
index 26e2d8d..985769f 100644
--- a/runtime/interpreter/mterp/arm64/op_monitor_exit.S
+++ b/runtime/interpreter/mterp/arm64/op_monitor_exit.S
@@ -1,3 +1,4 @@
+%def op_monitor_exit():
/*
* Unlock an object.
*
diff --git a/runtime/interpreter/mterp/arm64/op_move.S b/runtime/interpreter/mterp/arm64/op_move.S
index 195b7eb..d3324f1 100644
--- a/runtime/interpreter/mterp/arm64/op_move.S
+++ b/runtime/interpreter/mterp/arm64/op_move.S
@@ -1,4 +1,4 @@
-%default { "is_object":"0" }
+%def op_move(is_object="0"):
/* for move, move-object, long-to-int */
/* op vA, vB */
lsr w1, wINST, #12 // x1<- B from 15:12
diff --git a/runtime/interpreter/mterp/arm64/op_move_16.S b/runtime/interpreter/mterp/arm64/op_move_16.S
index 5146e3d..0dc862d 100644
--- a/runtime/interpreter/mterp/arm64/op_move_16.S
+++ b/runtime/interpreter/mterp/arm64/op_move_16.S
@@ -1,4 +1,4 @@
-%default { "is_object":"0" }
+%def op_move_16(is_object="0"):
/* for: move/16, move-object/16 */
/* op vAAAA, vBBBB */
FETCH w1, 2 // w1<- BBBB
diff --git a/runtime/interpreter/mterp/arm64/op_move_exception.S b/runtime/interpreter/mterp/arm64/op_move_exception.S
index b29298f..2ae5ca8 100644
--- a/runtime/interpreter/mterp/arm64/op_move_exception.S
+++ b/runtime/interpreter/mterp/arm64/op_move_exception.S
@@ -1,3 +1,4 @@
+%def op_move_exception():
/* move-exception vAA */
lsr w2, wINST, #8 // w2<- AA
ldr x3, [xSELF, #THREAD_EXCEPTION_OFFSET]
diff --git a/runtime/interpreter/mterp/arm64/op_move_from16.S b/runtime/interpreter/mterp/arm64/op_move_from16.S
index 78f344d..5c73445 100644
--- a/runtime/interpreter/mterp/arm64/op_move_from16.S
+++ b/runtime/interpreter/mterp/arm64/op_move_from16.S
@@ -1,4 +1,4 @@
-%default { "is_object":"0" }
+%def op_move_from16(is_object="0"):
/* for: move/from16, move-object/from16 */
/* op vAA, vBBBB */
FETCH w1, 1 // r1<- BBBB
diff --git a/runtime/interpreter/mterp/arm64/op_move_object.S b/runtime/interpreter/mterp/arm64/op_move_object.S
index a5adc59..dbb4d59 100644
--- a/runtime/interpreter/mterp/arm64/op_move_object.S
+++ b/runtime/interpreter/mterp/arm64/op_move_object.S
@@ -1 +1,2 @@
-%include "arm64/op_move.S" {"is_object":"1"}
+%def op_move_object():
+% op_move(is_object="1")
diff --git a/runtime/interpreter/mterp/arm64/op_move_object_16.S b/runtime/interpreter/mterp/arm64/op_move_object_16.S
index ef86c45..4012037 100644
--- a/runtime/interpreter/mterp/arm64/op_move_object_16.S
+++ b/runtime/interpreter/mterp/arm64/op_move_object_16.S
@@ -1 +1,2 @@
-%include "arm64/op_move_16.S" {"is_object":"1"}
+%def op_move_object_16():
+% op_move_16(is_object="1")
diff --git a/runtime/interpreter/mterp/arm64/op_move_object_from16.S b/runtime/interpreter/mterp/arm64/op_move_object_from16.S
index 0c73b3b..c82698e 100644
--- a/runtime/interpreter/mterp/arm64/op_move_object_from16.S
+++ b/runtime/interpreter/mterp/arm64/op_move_object_from16.S
@@ -1 +1,2 @@
-%include "arm64/op_move_from16.S" {"is_object":"1"}
+%def op_move_object_from16():
+% op_move_from16(is_object="1")
diff --git a/runtime/interpreter/mterp/arm64/op_move_result.S b/runtime/interpreter/mterp/arm64/op_move_result.S
index 06fe962..9c048f0 100644
--- a/runtime/interpreter/mterp/arm64/op_move_result.S
+++ b/runtime/interpreter/mterp/arm64/op_move_result.S
@@ -1,4 +1,4 @@
-%default { "is_object":"0" }
+%def op_move_result(is_object="0"):
/* for: move-result, move-result-object */
/* op vAA */
lsr w2, wINST, #8 // r2<- AA
diff --git a/runtime/interpreter/mterp/arm64/op_move_result_object.S b/runtime/interpreter/mterp/arm64/op_move_result_object.S
index da2bbee..87aea26 100644
--- a/runtime/interpreter/mterp/arm64/op_move_result_object.S
+++ b/runtime/interpreter/mterp/arm64/op_move_result_object.S
@@ -1 +1,2 @@
-%include "arm64/op_move_result.S" {"is_object":"1"}
+%def op_move_result_object():
+% op_move_result(is_object="1")
diff --git a/runtime/interpreter/mterp/arm64/op_move_result_wide.S b/runtime/interpreter/mterp/arm64/op_move_result_wide.S
index f90a33f..96347ea 100644
--- a/runtime/interpreter/mterp/arm64/op_move_result_wide.S
+++ b/runtime/interpreter/mterp/arm64/op_move_result_wide.S
@@ -1,3 +1,4 @@
+%def op_move_result_wide():
/* for: move-result-wide */
/* op vAA */
lsr w2, wINST, #8 // r2<- AA
diff --git a/runtime/interpreter/mterp/arm64/op_move_wide.S b/runtime/interpreter/mterp/arm64/op_move_wide.S
index 538f079..4576987 100644
--- a/runtime/interpreter/mterp/arm64/op_move_wide.S
+++ b/runtime/interpreter/mterp/arm64/op_move_wide.S
@@ -1,3 +1,4 @@
+%def op_move_wide():
/* move-wide vA, vB */
/* NOTE: regs can overlap, e.g. "move v6,v7" or "move v7,v6" */
lsr w3, wINST, #12 // w3<- B
diff --git a/runtime/interpreter/mterp/arm64/op_move_wide_16.S b/runtime/interpreter/mterp/arm64/op_move_wide_16.S
index c79cdc50..09f7a61 100644
--- a/runtime/interpreter/mterp/arm64/op_move_wide_16.S
+++ b/runtime/interpreter/mterp/arm64/op_move_wide_16.S
@@ -1,3 +1,4 @@
+%def op_move_wide_16():
/* move-wide/16 vAAAA, vBBBB */
/* NOTE: regs can overlap, e.g. "move v6,v7" or "move v7,v6" */
FETCH w3, 2 // w3<- BBBB
diff --git a/runtime/interpreter/mterp/arm64/op_move_wide_from16.S b/runtime/interpreter/mterp/arm64/op_move_wide_from16.S
index 70dbe99..6afc20a 100644
--- a/runtime/interpreter/mterp/arm64/op_move_wide_from16.S
+++ b/runtime/interpreter/mterp/arm64/op_move_wide_from16.S
@@ -1,3 +1,4 @@
+%def op_move_wide_from16():
/* move-wide/from16 vAA, vBBBB */
/* NOTE: regs can overlap, e.g. "move v6,v7" or "move v7,v6" */
FETCH w3, 1 // w3<- BBBB
diff --git a/runtime/interpreter/mterp/arm64/op_mul_double.S b/runtime/interpreter/mterp/arm64/op_mul_double.S
index 8d35b81..30ca309 100644
--- a/runtime/interpreter/mterp/arm64/op_mul_double.S
+++ b/runtime/interpreter/mterp/arm64/op_mul_double.S
@@ -1 +1,2 @@
-%include "arm64/binopWide.S" {"instr":"fmul d0, d1, d2", "result":"d0", "r1":"d1", "r2":"d2"}
+%def op_mul_double():
+% binopWide(instr="fmul d0, d1, d2", result="d0", r1="d1", r2="d2")
diff --git a/runtime/interpreter/mterp/arm64/op_mul_double_2addr.S b/runtime/interpreter/mterp/arm64/op_mul_double_2addr.S
index 526cb3b..dedecb5 100644
--- a/runtime/interpreter/mterp/arm64/op_mul_double_2addr.S
+++ b/runtime/interpreter/mterp/arm64/op_mul_double_2addr.S
@@ -1 +1,2 @@
-%include "arm64/binopWide2addr.S" {"instr":"fmul d0, d0, d1", "r0":"d0", "r1":"d1"}
+%def op_mul_double_2addr():
+% binopWide2addr(instr="fmul d0, d0, d1", r0="d0", r1="d1")
diff --git a/runtime/interpreter/mterp/arm64/op_mul_float.S b/runtime/interpreter/mterp/arm64/op_mul_float.S
index eea7733..3bbbe73 100644
--- a/runtime/interpreter/mterp/arm64/op_mul_float.S
+++ b/runtime/interpreter/mterp/arm64/op_mul_float.S
@@ -1 +1,2 @@
-%include "arm64/fbinop.S" {"instr":"fmul s0, s0, s1"}
+%def op_mul_float():
+% fbinop(instr="fmul s0, s0, s1")
diff --git a/runtime/interpreter/mterp/arm64/op_mul_float_2addr.S b/runtime/interpreter/mterp/arm64/op_mul_float_2addr.S
index c1f2376..035a1fb 100644
--- a/runtime/interpreter/mterp/arm64/op_mul_float_2addr.S
+++ b/runtime/interpreter/mterp/arm64/op_mul_float_2addr.S
@@ -1 +1,2 @@
-%include "arm64/fbinop2addr.S" {"instr":"fmul s2, s0, s1"}
+%def op_mul_float_2addr():
+% fbinop2addr(instr="fmul s2, s0, s1")
diff --git a/runtime/interpreter/mterp/arm64/op_mul_int.S b/runtime/interpreter/mterp/arm64/op_mul_int.S
index d14cae1..267623d 100644
--- a/runtime/interpreter/mterp/arm64/op_mul_int.S
+++ b/runtime/interpreter/mterp/arm64/op_mul_int.S
@@ -1,2 +1,3 @@
+%def op_mul_int():
/* must be "mul w0, w1, w0" -- "w0, w0, w1" is illegal */
-%include "arm64/binop.S" {"instr":"mul w0, w1, w0"}
+% binop(instr="mul w0, w1, w0")
diff --git a/runtime/interpreter/mterp/arm64/op_mul_int_2addr.S b/runtime/interpreter/mterp/arm64/op_mul_int_2addr.S
index f079118..c0f533a 100644
--- a/runtime/interpreter/mterp/arm64/op_mul_int_2addr.S
+++ b/runtime/interpreter/mterp/arm64/op_mul_int_2addr.S
@@ -1,2 +1,3 @@
+%def op_mul_int_2addr():
/* must be "mul w0, w1, w0" -- "w0, w0, w1" is illegal */
-%include "arm64/binop2addr.S" {"instr":"mul w0, w1, w0"}
+% binop2addr(instr="mul w0, w1, w0")
diff --git a/runtime/interpreter/mterp/arm64/op_mul_int_lit16.S b/runtime/interpreter/mterp/arm64/op_mul_int_lit16.S
index a378559..d309c86 100644
--- a/runtime/interpreter/mterp/arm64/op_mul_int_lit16.S
+++ b/runtime/interpreter/mterp/arm64/op_mul_int_lit16.S
@@ -1,2 +1,3 @@
+%def op_mul_int_lit16():
/* must be "mul w0, w1, w0" -- "w0, w0, w1" is illegal */
-%include "arm64/binopLit16.S" {"instr":"mul w0, w1, w0"}
+% binopLit16(instr="mul w0, w1, w0")
diff --git a/runtime/interpreter/mterp/arm64/op_mul_int_lit8.S b/runtime/interpreter/mterp/arm64/op_mul_int_lit8.S
index b3d4014..b336841 100644
--- a/runtime/interpreter/mterp/arm64/op_mul_int_lit8.S
+++ b/runtime/interpreter/mterp/arm64/op_mul_int_lit8.S
@@ -1,2 +1,3 @@
+%def op_mul_int_lit8():
/* must be "mul w0, w1, w0" -- "w0, w0, w1" is illegal */
-%include "arm64/binopLit8.S" {"instr":"mul w0, w1, w0"}
+% binopLit8(instr="mul w0, w1, w0")
diff --git a/runtime/interpreter/mterp/arm64/op_mul_long.S b/runtime/interpreter/mterp/arm64/op_mul_long.S
index bc0dcbd..5056c0e 100644
--- a/runtime/interpreter/mterp/arm64/op_mul_long.S
+++ b/runtime/interpreter/mterp/arm64/op_mul_long.S
@@ -1 +1,2 @@
-%include "arm64/binopWide.S" {"instr":"mul x0, x1, x2"}
+%def op_mul_long():
+% binopWide(instr="mul x0, x1, x2")
diff --git a/runtime/interpreter/mterp/arm64/op_mul_long_2addr.S b/runtime/interpreter/mterp/arm64/op_mul_long_2addr.S
index fa1cdf8..e69d40a 100644
--- a/runtime/interpreter/mterp/arm64/op_mul_long_2addr.S
+++ b/runtime/interpreter/mterp/arm64/op_mul_long_2addr.S
@@ -1 +1,2 @@
-%include "arm64/binopWide2addr.S" {"instr":"mul x0, x0, x1"}
+%def op_mul_long_2addr():
+% binopWide2addr(instr="mul x0, x0, x1")
diff --git a/runtime/interpreter/mterp/arm64/op_neg_double.S b/runtime/interpreter/mterp/arm64/op_neg_double.S
index d77859d..a56eff5 100644
--- a/runtime/interpreter/mterp/arm64/op_neg_double.S
+++ b/runtime/interpreter/mterp/arm64/op_neg_double.S
@@ -1 +1,2 @@
-%include "arm64/unopWide.S" {"instr":"eor x0, x0, #0x8000000000000000"}
+%def op_neg_double():
+% unopWide(instr="eor x0, x0, #0x8000000000000000")
diff --git a/runtime/interpreter/mterp/arm64/op_neg_float.S b/runtime/interpreter/mterp/arm64/op_neg_float.S
index 6652aec..1366168 100644
--- a/runtime/interpreter/mterp/arm64/op_neg_float.S
+++ b/runtime/interpreter/mterp/arm64/op_neg_float.S
@@ -1 +1,2 @@
-%include "arm64/unop.S" {"instr":"eor w0, w0, #0x80000000"}
+%def op_neg_float():
+% unop(instr="eor w0, w0, #0x80000000")
diff --git a/runtime/interpreter/mterp/arm64/op_neg_int.S b/runtime/interpreter/mterp/arm64/op_neg_int.S
index 59c14a9..be56dd2 100644
--- a/runtime/interpreter/mterp/arm64/op_neg_int.S
+++ b/runtime/interpreter/mterp/arm64/op_neg_int.S
@@ -1 +1,2 @@
-%include "arm64/unop.S" {"instr":"sub w0, wzr, w0"}
+%def op_neg_int():
+% unop(instr="sub w0, wzr, w0")
diff --git a/runtime/interpreter/mterp/arm64/op_neg_long.S b/runtime/interpreter/mterp/arm64/op_neg_long.S
index 0c71ea7..eb2882c 100644
--- a/runtime/interpreter/mterp/arm64/op_neg_long.S
+++ b/runtime/interpreter/mterp/arm64/op_neg_long.S
@@ -1 +1,2 @@
-%include "arm64/unopWide.S" {"instr":"sub x0, xzr, x0"}
+%def op_neg_long():
+% unopWide(instr="sub x0, xzr, x0")
diff --git a/runtime/interpreter/mterp/arm64/op_new_array.S b/runtime/interpreter/mterp/arm64/op_new_array.S
index 886120a..34729a7 100644
--- a/runtime/interpreter/mterp/arm64/op_new_array.S
+++ b/runtime/interpreter/mterp/arm64/op_new_array.S
@@ -1,3 +1,4 @@
+%def op_new_array():
/*
* Allocate an array of objects, specified with the array class
* and a count.
diff --git a/runtime/interpreter/mterp/arm64/op_new_instance.S b/runtime/interpreter/mterp/arm64/op_new_instance.S
index c171ac5..beb1f6e 100644
--- a/runtime/interpreter/mterp/arm64/op_new_instance.S
+++ b/runtime/interpreter/mterp/arm64/op_new_instance.S
@@ -1,3 +1,4 @@
+%def op_new_instance():
/*
* Create a new instance of a class.
*/
diff --git a/runtime/interpreter/mterp/arm64/op_nop.S b/runtime/interpreter/mterp/arm64/op_nop.S
index 80c2d45..9702c5c 100644
--- a/runtime/interpreter/mterp/arm64/op_nop.S
+++ b/runtime/interpreter/mterp/arm64/op_nop.S
@@ -1,3 +1,4 @@
+%def op_nop():
FETCH_ADVANCE_INST 1 // advance to next instr, load rINST
GET_INST_OPCODE ip // ip<- opcode from rINST
GOTO_OPCODE ip // execute it
diff --git a/runtime/interpreter/mterp/arm64/op_not_int.S b/runtime/interpreter/mterp/arm64/op_not_int.S
index 55d7750..d2fc205 100644
--- a/runtime/interpreter/mterp/arm64/op_not_int.S
+++ b/runtime/interpreter/mterp/arm64/op_not_int.S
@@ -1 +1,2 @@
-%include "arm64/unop.S" {"instr":"mvn w0, w0"}
+%def op_not_int():
+% unop(instr="mvn w0, w0")
diff --git a/runtime/interpreter/mterp/arm64/op_not_long.S b/runtime/interpreter/mterp/arm64/op_not_long.S
index e5ebdd6..014a60d 100644
--- a/runtime/interpreter/mterp/arm64/op_not_long.S
+++ b/runtime/interpreter/mterp/arm64/op_not_long.S
@@ -1 +1,2 @@
-%include "arm64/unopWide.S" {"instr":"mvn x0, x0"}
+%def op_not_long():
+% unopWide(instr="mvn x0, x0")
diff --git a/runtime/interpreter/mterp/arm64/op_or_int.S b/runtime/interpreter/mterp/arm64/op_or_int.S
index 648c1e6..8041c6d 100644
--- a/runtime/interpreter/mterp/arm64/op_or_int.S
+++ b/runtime/interpreter/mterp/arm64/op_or_int.S
@@ -1 +1,2 @@
-%include "arm64/binop.S" {"instr":"orr w0, w0, w1"}
+%def op_or_int():
+% binop(instr="orr w0, w0, w1")
diff --git a/runtime/interpreter/mterp/arm64/op_or_int_2addr.S b/runtime/interpreter/mterp/arm64/op_or_int_2addr.S
index abdf599..918c523 100644
--- a/runtime/interpreter/mterp/arm64/op_or_int_2addr.S
+++ b/runtime/interpreter/mterp/arm64/op_or_int_2addr.S
@@ -1 +1,2 @@
-%include "arm64/binop2addr.S" {"instr":"orr w0, w0, w1"}
+%def op_or_int_2addr():
+% binop2addr(instr="orr w0, w0, w1")
diff --git a/runtime/interpreter/mterp/arm64/op_or_int_lit16.S b/runtime/interpreter/mterp/arm64/op_or_int_lit16.S
index db7f4ff..dda068b 100644
--- a/runtime/interpreter/mterp/arm64/op_or_int_lit16.S
+++ b/runtime/interpreter/mterp/arm64/op_or_int_lit16.S
@@ -1 +1,2 @@
-%include "arm64/binopLit16.S" {"instr":"orr w0, w0, w1"}
+%def op_or_int_lit16():
+% binopLit16(instr="orr w0, w0, w1")
diff --git a/runtime/interpreter/mterp/arm64/op_or_int_lit8.S b/runtime/interpreter/mterp/arm64/op_or_int_lit8.S
index 7cb26b7..0fe6122 100644
--- a/runtime/interpreter/mterp/arm64/op_or_int_lit8.S
+++ b/runtime/interpreter/mterp/arm64/op_or_int_lit8.S
@@ -1 +1,2 @@
-%include "arm64/binopLit8.S" {"extract":"", "instr":"orr w0, w0, w3, asr #8"}
+%def op_or_int_lit8():
+% binopLit8(extract="", instr="orr w0, w0, w3, asr #8")
diff --git a/runtime/interpreter/mterp/arm64/op_or_long.S b/runtime/interpreter/mterp/arm64/op_or_long.S
index dd137ce..f434d3f 100644
--- a/runtime/interpreter/mterp/arm64/op_or_long.S
+++ b/runtime/interpreter/mterp/arm64/op_or_long.S
@@ -1 +1,2 @@
-%include "arm64/binopWide.S" {"instr":"orr x0, x1, x2"}
+%def op_or_long():
+% binopWide(instr="orr x0, x1, x2")
diff --git a/runtime/interpreter/mterp/arm64/op_or_long_2addr.S b/runtime/interpreter/mterp/arm64/op_or_long_2addr.S
index f785230..4186ce9 100644
--- a/runtime/interpreter/mterp/arm64/op_or_long_2addr.S
+++ b/runtime/interpreter/mterp/arm64/op_or_long_2addr.S
@@ -1 +1,2 @@
-%include "arm64/binopWide2addr.S" {"instr":"orr x0, x0, x1"}
+%def op_or_long_2addr():
+% binopWide2addr(instr="orr x0, x0, x1")
diff --git a/runtime/interpreter/mterp/arm64/op_packed_switch.S b/runtime/interpreter/mterp/arm64/op_packed_switch.S
index 408e030..9e4eb9b 100644
--- a/runtime/interpreter/mterp/arm64/op_packed_switch.S
+++ b/runtime/interpreter/mterp/arm64/op_packed_switch.S
@@ -1,4 +1,4 @@
-%default { "func":"MterpDoPackedSwitch" }
+%def op_packed_switch(func="MterpDoPackedSwitch"):
/*
* Handle a packed-switch or sparse-switch instruction. In both cases
* we decode it and hand it off to a helper function.
diff --git a/runtime/interpreter/mterp/arm64/op_rem_double.S b/runtime/interpreter/mterp/arm64/op_rem_double.S
index c631ddb..3d43467 100644
--- a/runtime/interpreter/mterp/arm64/op_rem_double.S
+++ b/runtime/interpreter/mterp/arm64/op_rem_double.S
@@ -1,3 +1,4 @@
+%def op_rem_double():
/* rem vAA, vBB, vCC */
FETCH w0, 1 // w0<- CCBB
lsr w2, w0, #8 // w2<- CC
diff --git a/runtime/interpreter/mterp/arm64/op_rem_double_2addr.S b/runtime/interpreter/mterp/arm64/op_rem_double_2addr.S
index 9868f41..179886d 100644
--- a/runtime/interpreter/mterp/arm64/op_rem_double_2addr.S
+++ b/runtime/interpreter/mterp/arm64/op_rem_double_2addr.S
@@ -1,3 +1,4 @@
+%def op_rem_double_2addr():
/* rem vA, vB */
lsr w1, wINST, #12 // w1<- B
ubfx w2, wINST, #8, #4 // w2<- A
diff --git a/runtime/interpreter/mterp/arm64/op_rem_float.S b/runtime/interpreter/mterp/arm64/op_rem_float.S
index 73f7060..29241e5 100644
--- a/runtime/interpreter/mterp/arm64/op_rem_float.S
+++ b/runtime/interpreter/mterp/arm64/op_rem_float.S
@@ -1,2 +1,3 @@
+%def op_rem_float():
/* EABI doesn't define a float remainder function, but libm does */
-%include "arm64/fbinop.S" {"instr":"bl fmodf"}
+% fbinop(instr="bl fmodf")
diff --git a/runtime/interpreter/mterp/arm64/op_rem_float_2addr.S b/runtime/interpreter/mterp/arm64/op_rem_float_2addr.S
index 95f81c5..49bf8ea 100644
--- a/runtime/interpreter/mterp/arm64/op_rem_float_2addr.S
+++ b/runtime/interpreter/mterp/arm64/op_rem_float_2addr.S
@@ -1,3 +1,4 @@
+%def op_rem_float_2addr():
/* rem vA, vB */
lsr w3, wINST, #12 // w3<- B
ubfx w9, wINST, #8, #4 // w9<- A
diff --git a/runtime/interpreter/mterp/arm64/op_rem_int.S b/runtime/interpreter/mterp/arm64/op_rem_int.S
index dd9dfda..6f2f999 100644
--- a/runtime/interpreter/mterp/arm64/op_rem_int.S
+++ b/runtime/interpreter/mterp/arm64/op_rem_int.S
@@ -1 +1,2 @@
-%include "arm64/binop.S" {"preinstr":"sdiv w2, w0, w1", "instr":"msub w0, w2, w1, w0", "chkzero":"1"}
+%def op_rem_int():
+% binop(preinstr="sdiv w2, w0, w1", instr="msub w0, w2, w1, w0", chkzero="1")
diff --git a/runtime/interpreter/mterp/arm64/op_rem_int_2addr.S b/runtime/interpreter/mterp/arm64/op_rem_int_2addr.S
index 57fc4971..dc46b2f 100644
--- a/runtime/interpreter/mterp/arm64/op_rem_int_2addr.S
+++ b/runtime/interpreter/mterp/arm64/op_rem_int_2addr.S
@@ -1 +1,2 @@
-%include "arm64/binop2addr.S" {"preinstr":"sdiv w2, w0, w1", "instr":"msub w0, w2, w1, w0", "chkzero":"1"}
+%def op_rem_int_2addr():
+% binop2addr(preinstr="sdiv w2, w0, w1", instr="msub w0, w2, w1, w0", chkzero="1")
diff --git a/runtime/interpreter/mterp/arm64/op_rem_int_lit16.S b/runtime/interpreter/mterp/arm64/op_rem_int_lit16.S
index b51a739..75be334 100644
--- a/runtime/interpreter/mterp/arm64/op_rem_int_lit16.S
+++ b/runtime/interpreter/mterp/arm64/op_rem_int_lit16.S
@@ -1 +1,2 @@
-%include "arm64/binopLit16.S" {"preinstr":"sdiv w3, w0, w1", "instr":"msub w0, w3, w1, w0", "chkzero":"1"}
+%def op_rem_int_lit16():
+% binopLit16(preinstr="sdiv w3, w0, w1", instr="msub w0, w3, w1, w0", chkzero="1")
diff --git a/runtime/interpreter/mterp/arm64/op_rem_int_lit8.S b/runtime/interpreter/mterp/arm64/op_rem_int_lit8.S
index 03ea324..c5fef4b 100644
--- a/runtime/interpreter/mterp/arm64/op_rem_int_lit8.S
+++ b/runtime/interpreter/mterp/arm64/op_rem_int_lit8.S
@@ -1 +1,2 @@
-%include "arm64/binopLit8.S" {"preinstr":"sdiv w3, w0, w1", "instr":"msub w0, w3, w1, w0", "chkzero":"1"}
+%def op_rem_int_lit8():
+% binopLit8(preinstr="sdiv w3, w0, w1", instr="msub w0, w3, w1, w0", chkzero="1")
diff --git a/runtime/interpreter/mterp/arm64/op_rem_long.S b/runtime/interpreter/mterp/arm64/op_rem_long.S
index f133f86..31dd6be 100644
--- a/runtime/interpreter/mterp/arm64/op_rem_long.S
+++ b/runtime/interpreter/mterp/arm64/op_rem_long.S
@@ -1 +1,2 @@
-%include "arm64/binopWide.S" {"preinstr":"sdiv x3, x1, x2","instr":"msub x0, x3, x2, x1", "chkzero":"1"}
+%def op_rem_long():
+% binopWide(preinstr="sdiv x3, x1, x2", instr="msub x0, x3, x2, x1", chkzero="1")
diff --git a/runtime/interpreter/mterp/arm64/op_rem_long_2addr.S b/runtime/interpreter/mterp/arm64/op_rem_long_2addr.S
index b45e2a9..b30ef67 100644
--- a/runtime/interpreter/mterp/arm64/op_rem_long_2addr.S
+++ b/runtime/interpreter/mterp/arm64/op_rem_long_2addr.S
@@ -1 +1,2 @@
-%include "arm64/binopWide2addr.S" {"preinstr":"sdiv x3, x0, x1", "instr":"msub x0, x3, x1, x0", "chkzero":"1"}
+%def op_rem_long_2addr():
+% binopWide2addr(preinstr="sdiv x3, x0, x1", instr="msub x0, x3, x1, x0", chkzero="1")
diff --git a/runtime/interpreter/mterp/arm64/op_return.S b/runtime/interpreter/mterp/arm64/op_return.S
index 9f125c7..eedae64 100644
--- a/runtime/interpreter/mterp/arm64/op_return.S
+++ b/runtime/interpreter/mterp/arm64/op_return.S
@@ -1,3 +1,4 @@
+%def op_return():
/*
* Return a 32-bit value.
*
diff --git a/runtime/interpreter/mterp/arm64/op_return_object.S b/runtime/interpreter/mterp/arm64/op_return_object.S
index b6cb532..2eeec0b 100644
--- a/runtime/interpreter/mterp/arm64/op_return_object.S
+++ b/runtime/interpreter/mterp/arm64/op_return_object.S
@@ -1 +1,2 @@
-%include "arm64/op_return.S"
+%def op_return_object():
+% op_return()
diff --git a/runtime/interpreter/mterp/arm64/op_return_void.S b/runtime/interpreter/mterp/arm64/op_return_void.S
index b253006..6962bb2 100644
--- a/runtime/interpreter/mterp/arm64/op_return_void.S
+++ b/runtime/interpreter/mterp/arm64/op_return_void.S
@@ -1,3 +1,4 @@
+%def op_return_void():
.extern MterpThreadFenceForConstructor
bl MterpThreadFenceForConstructor
ldr w7, [xSELF, #THREAD_FLAGS_OFFSET]
diff --git a/runtime/interpreter/mterp/arm64/op_return_void_no_barrier.S b/runtime/interpreter/mterp/arm64/op_return_void_no_barrier.S
index c817169..8d872d1 100644
--- a/runtime/interpreter/mterp/arm64/op_return_void_no_barrier.S
+++ b/runtime/interpreter/mterp/arm64/op_return_void_no_barrier.S
@@ -1,3 +1,4 @@
+%def op_return_void_no_barrier():
ldr w7, [xSELF, #THREAD_FLAGS_OFFSET]
mov x0, xSELF
ands w7, w7, #THREAD_SUSPEND_OR_CHECKPOINT_REQUEST
diff --git a/runtime/interpreter/mterp/arm64/op_return_wide.S b/runtime/interpreter/mterp/arm64/op_return_wide.S
index c47661c..5d31c6a 100644
--- a/runtime/interpreter/mterp/arm64/op_return_wide.S
+++ b/runtime/interpreter/mterp/arm64/op_return_wide.S
@@ -1,3 +1,4 @@
+%def op_return_wide():
/*
* Return a 64-bit value.
*/
diff --git a/runtime/interpreter/mterp/arm64/op_rsub_int.S b/runtime/interpreter/mterp/arm64/op_rsub_int.S
index 3bf45fe..dc2342d 100644
--- a/runtime/interpreter/mterp/arm64/op_rsub_int.S
+++ b/runtime/interpreter/mterp/arm64/op_rsub_int.S
@@ -1,2 +1,3 @@
+%def op_rsub_int():
/* this op is "rsub-int", but can be thought of as "rsub-int/lit16" */
-%include "arm64/binopLit16.S" {"instr":"sub w0, w1, w0"}
+% binopLit16(instr="sub w0, w1, w0")
diff --git a/runtime/interpreter/mterp/arm64/op_rsub_int_lit8.S b/runtime/interpreter/mterp/arm64/op_rsub_int_lit8.S
index 7a3572b..51a48fb 100644
--- a/runtime/interpreter/mterp/arm64/op_rsub_int_lit8.S
+++ b/runtime/interpreter/mterp/arm64/op_rsub_int_lit8.S
@@ -1 +1,2 @@
-%include "arm64/binopLit8.S" {"instr":"sub w0, w1, w0"}
+%def op_rsub_int_lit8():
+% binopLit8(instr="sub w0, w1, w0")
diff --git a/runtime/interpreter/mterp/arm64/op_sget.S b/runtime/interpreter/mterp/arm64/op_sget.S
index 78e95b2..8a6a66a 100644
--- a/runtime/interpreter/mterp/arm64/op_sget.S
+++ b/runtime/interpreter/mterp/arm64/op_sget.S
@@ -1,2 +1,2 @@
-%default { "is_object":"0", "helper":"MterpSGetU32" }
-%include "arm64/field.S" { }
+%def op_sget(is_object="0", helper="MterpSGetU32"):
+% field(helper=helper)
diff --git a/runtime/interpreter/mterp/arm64/op_sget_boolean.S b/runtime/interpreter/mterp/arm64/op_sget_boolean.S
index 0cf9f09..d9c12c9 100644
--- a/runtime/interpreter/mterp/arm64/op_sget_boolean.S
+++ b/runtime/interpreter/mterp/arm64/op_sget_boolean.S
@@ -1 +1,2 @@
-%include "arm64/op_sget.S" {"helper":"MterpSGetU8"}
+%def op_sget_boolean():
+% op_sget(helper="MterpSGetU8")
diff --git a/runtime/interpreter/mterp/arm64/op_sget_byte.S b/runtime/interpreter/mterp/arm64/op_sget_byte.S
index 7c88a81..37c6879 100644
--- a/runtime/interpreter/mterp/arm64/op_sget_byte.S
+++ b/runtime/interpreter/mterp/arm64/op_sget_byte.S
@@ -1 +1,2 @@
-%include "arm64/op_sget.S" {"helper":"MterpSGetI8"}
+%def op_sget_byte():
+% op_sget(helper="MterpSGetI8")
diff --git a/runtime/interpreter/mterp/arm64/op_sget_char.S b/runtime/interpreter/mterp/arm64/op_sget_char.S
index 883e944..003bcd1 100644
--- a/runtime/interpreter/mterp/arm64/op_sget_char.S
+++ b/runtime/interpreter/mterp/arm64/op_sget_char.S
@@ -1 +1,2 @@
-%include "arm64/op_sget.S" {"helper":"MterpSGetU16"}
+%def op_sget_char():
+% op_sget(helper="MterpSGetU16")
diff --git a/runtime/interpreter/mterp/arm64/op_sget_object.S b/runtime/interpreter/mterp/arm64/op_sget_object.S
index 69d6adb..7cf3597 100644
--- a/runtime/interpreter/mterp/arm64/op_sget_object.S
+++ b/runtime/interpreter/mterp/arm64/op_sget_object.S
@@ -1 +1,2 @@
-%include "arm64/op_sget.S" {"is_object":"1", "helper":"MterpSGetObj"}
+%def op_sget_object():
+% op_sget(is_object="1", helper="MterpSGetObj")
diff --git a/runtime/interpreter/mterp/arm64/op_sget_short.S b/runtime/interpreter/mterp/arm64/op_sget_short.S
index 6cb9184..afacb57 100644
--- a/runtime/interpreter/mterp/arm64/op_sget_short.S
+++ b/runtime/interpreter/mterp/arm64/op_sget_short.S
@@ -1 +1,2 @@
-%include "arm64/op_sget.S" {"helper":"MterpSGetI16"}
+%def op_sget_short():
+% op_sget(helper="MterpSGetI16")
diff --git a/runtime/interpreter/mterp/arm64/op_sget_wide.S b/runtime/interpreter/mterp/arm64/op_sget_wide.S
index f5d182e..fff2be6 100644
--- a/runtime/interpreter/mterp/arm64/op_sget_wide.S
+++ b/runtime/interpreter/mterp/arm64/op_sget_wide.S
@@ -1 +1,2 @@
-%include "arm64/op_sget.S" {"helper":"MterpSGetU64"}
+%def op_sget_wide():
+% op_sget(helper="MterpSGetU64")
diff --git a/runtime/interpreter/mterp/arm64/op_shl_int.S b/runtime/interpreter/mterp/arm64/op_shl_int.S
index 3062a3f..673d4a0 100644
--- a/runtime/interpreter/mterp/arm64/op_shl_int.S
+++ b/runtime/interpreter/mterp/arm64/op_shl_int.S
@@ -1 +1,2 @@
-%include "arm64/binop.S" {"instr":"lsl w0, w0, w1"}
+%def op_shl_int():
+% binop(instr="lsl w0, w0, w1")
diff --git a/runtime/interpreter/mterp/arm64/op_shl_int_2addr.S b/runtime/interpreter/mterp/arm64/op_shl_int_2addr.S
index 9a7e09f..f4c2f8c 100644
--- a/runtime/interpreter/mterp/arm64/op_shl_int_2addr.S
+++ b/runtime/interpreter/mterp/arm64/op_shl_int_2addr.S
@@ -1 +1,2 @@
-%include "arm64/binop2addr.S" {"instr":"lsl w0, w0, w1"}
+%def op_shl_int_2addr():
+% binop2addr(instr="lsl w0, w0, w1")
diff --git a/runtime/interpreter/mterp/arm64/op_shl_int_lit8.S b/runtime/interpreter/mterp/arm64/op_shl_int_lit8.S
index 9c19b55..38f3f8e 100644
--- a/runtime/interpreter/mterp/arm64/op_shl_int_lit8.S
+++ b/runtime/interpreter/mterp/arm64/op_shl_int_lit8.S
@@ -1 +1,2 @@
-%include "arm64/binopLit8.S" {"extract":"ubfx w1, w3, #8, #5", "instr":"lsl w0, w0, w1"}
+%def op_shl_int_lit8():
+% binopLit8(extract="ubfx w1, w3, #8, #5", instr="lsl w0, w0, w1")
diff --git a/runtime/interpreter/mterp/arm64/op_shl_long.S b/runtime/interpreter/mterp/arm64/op_shl_long.S
index bbf9600..c56b59f 100644
--- a/runtime/interpreter/mterp/arm64/op_shl_long.S
+++ b/runtime/interpreter/mterp/arm64/op_shl_long.S
@@ -1 +1,2 @@
-%include "arm64/shiftWide.S" {"opcode":"lsl"}
+%def op_shl_long():
+% shiftWide(opcode="lsl")
diff --git a/runtime/interpreter/mterp/arm64/op_shl_long_2addr.S b/runtime/interpreter/mterp/arm64/op_shl_long_2addr.S
index a5c4013..ed10db2 100644
--- a/runtime/interpreter/mterp/arm64/op_shl_long_2addr.S
+++ b/runtime/interpreter/mterp/arm64/op_shl_long_2addr.S
@@ -1 +1,2 @@
-%include "arm64/shiftWide2addr.S" {"opcode":"lsl"}
+%def op_shl_long_2addr():
+% shiftWide2addr(opcode="lsl")
diff --git a/runtime/interpreter/mterp/arm64/op_shr_int.S b/runtime/interpreter/mterp/arm64/op_shr_int.S
index 493b740..9dab83d 100644
--- a/runtime/interpreter/mterp/arm64/op_shr_int.S
+++ b/runtime/interpreter/mterp/arm64/op_shr_int.S
@@ -1 +1,2 @@
-%include "arm64/binop.S" {"instr":"asr w0, w0, w1"}
+%def op_shr_int():
+% binop(instr="asr w0, w0, w1")
diff --git a/runtime/interpreter/mterp/arm64/op_shr_int_2addr.S b/runtime/interpreter/mterp/arm64/op_shr_int_2addr.S
index 6efe8ee..8bdcc11 100644
--- a/runtime/interpreter/mterp/arm64/op_shr_int_2addr.S
+++ b/runtime/interpreter/mterp/arm64/op_shr_int_2addr.S
@@ -1 +1,2 @@
-%include "arm64/binop2addr.S" {"instr":"asr w0, w0, w1"}
+%def op_shr_int_2addr():
+% binop2addr(instr="asr w0, w0, w1")
diff --git a/runtime/interpreter/mterp/arm64/op_shr_int_lit8.S b/runtime/interpreter/mterp/arm64/op_shr_int_lit8.S
index c7b61df..7f58bca 100644
--- a/runtime/interpreter/mterp/arm64/op_shr_int_lit8.S
+++ b/runtime/interpreter/mterp/arm64/op_shr_int_lit8.S
@@ -1 +1,2 @@
-%include "arm64/binopLit8.S" {"extract":"ubfx w1, w3, #8, #5", "instr":"asr w0, w0, w1"}
+%def op_shr_int_lit8():
+% binopLit8(extract="ubfx w1, w3, #8, #5", instr="asr w0, w0, w1")
diff --git a/runtime/interpreter/mterp/arm64/op_shr_long.S b/runtime/interpreter/mterp/arm64/op_shr_long.S
index 4d33235..fcaf0ec 100644
--- a/runtime/interpreter/mterp/arm64/op_shr_long.S
+++ b/runtime/interpreter/mterp/arm64/op_shr_long.S
@@ -1 +1,2 @@
-%include "arm64/shiftWide.S" {"opcode":"asr"}
+%def op_shr_long():
+% shiftWide(opcode="asr")
diff --git a/runtime/interpreter/mterp/arm64/op_shr_long_2addr.S b/runtime/interpreter/mterp/arm64/op_shr_long_2addr.S
index 0a4a386..359778a 100644
--- a/runtime/interpreter/mterp/arm64/op_shr_long_2addr.S
+++ b/runtime/interpreter/mterp/arm64/op_shr_long_2addr.S
@@ -1 +1,2 @@
-%include "arm64/shiftWide2addr.S" {"opcode":"asr"}
+%def op_shr_long_2addr():
+% shiftWide2addr(opcode="asr")
diff --git a/runtime/interpreter/mterp/arm64/op_sparse_switch.S b/runtime/interpreter/mterp/arm64/op_sparse_switch.S
index 5a8d748..b74d7da 100644
--- a/runtime/interpreter/mterp/arm64/op_sparse_switch.S
+++ b/runtime/interpreter/mterp/arm64/op_sparse_switch.S
@@ -1 +1,2 @@
-%include "arm64/op_packed_switch.S" { "func":"MterpDoSparseSwitch" }
+%def op_sparse_switch():
+% op_packed_switch(func="MterpDoSparseSwitch")
diff --git a/runtime/interpreter/mterp/arm64/op_sput.S b/runtime/interpreter/mterp/arm64/op_sput.S
index d229d0d..cbd6ee9 100644
--- a/runtime/interpreter/mterp/arm64/op_sput.S
+++ b/runtime/interpreter/mterp/arm64/op_sput.S
@@ -1,2 +1,2 @@
-%default { "is_object":"0", "helper":"MterpSPutU32"}
-%include "arm64/field.S" { }
+%def op_sput(is_object="0", helper="MterpSPutU32"):
+% field(helper=helper)
diff --git a/runtime/interpreter/mterp/arm64/op_sput_boolean.S b/runtime/interpreter/mterp/arm64/op_sput_boolean.S
index 3d0c7c0..36fba84 100644
--- a/runtime/interpreter/mterp/arm64/op_sput_boolean.S
+++ b/runtime/interpreter/mterp/arm64/op_sput_boolean.S
@@ -1 +1,2 @@
-%include "arm64/op_sput.S" {"helper":"MterpSPutU8"}
+%def op_sput_boolean():
+% op_sput(helper="MterpSPutU8")
diff --git a/runtime/interpreter/mterp/arm64/op_sput_byte.S b/runtime/interpreter/mterp/arm64/op_sput_byte.S
index 489cf92..84ad4a0 100644
--- a/runtime/interpreter/mterp/arm64/op_sput_byte.S
+++ b/runtime/interpreter/mterp/arm64/op_sput_byte.S
@@ -1 +1,2 @@
-%include "arm64/op_sput.S" {"helper":"MterpSPutI8"}
+%def op_sput_byte():
+% op_sput(helper="MterpSPutI8")
diff --git a/runtime/interpreter/mterp/arm64/op_sput_char.S b/runtime/interpreter/mterp/arm64/op_sput_char.S
index f79d311..9b8eeba 100644
--- a/runtime/interpreter/mterp/arm64/op_sput_char.S
+++ b/runtime/interpreter/mterp/arm64/op_sput_char.S
@@ -1 +1,2 @@
-%include "arm64/op_sput.S" {"helper":"MterpSPutU16"}
+%def op_sput_char():
+% op_sput(helper="MterpSPutU16")
diff --git a/runtime/interpreter/mterp/arm64/op_sput_object.S b/runtime/interpreter/mterp/arm64/op_sput_object.S
index 536f1b1..081360c 100644
--- a/runtime/interpreter/mterp/arm64/op_sput_object.S
+++ b/runtime/interpreter/mterp/arm64/op_sput_object.S
@@ -1 +1,2 @@
-%include "arm64/op_sput.S" {"is_object":"1", "helper":"MterpSPutObj"}
+%def op_sput_object():
+% op_sput(is_object="1", helper="MterpSPutObj")
diff --git a/runtime/interpreter/mterp/arm64/op_sput_short.S b/runtime/interpreter/mterp/arm64/op_sput_short.S
index 06482cd..ee16513 100644
--- a/runtime/interpreter/mterp/arm64/op_sput_short.S
+++ b/runtime/interpreter/mterp/arm64/op_sput_short.S
@@ -1 +1,2 @@
-%include "arm64/op_sput.S" {"helper":"MterpSPutI16"}
+%def op_sput_short():
+% op_sput(helper="MterpSPutI16")
diff --git a/runtime/interpreter/mterp/arm64/op_sput_wide.S b/runtime/interpreter/mterp/arm64/op_sput_wide.S
index b4be6b2..44c1a18 100644
--- a/runtime/interpreter/mterp/arm64/op_sput_wide.S
+++ b/runtime/interpreter/mterp/arm64/op_sput_wide.S
@@ -1 +1,2 @@
-%include "arm64/op_sput.S" {"helper":"MterpSPutU64"}
+%def op_sput_wide():
+% op_sput(helper="MterpSPutU64")
diff --git a/runtime/interpreter/mterp/arm64/op_sub_double.S b/runtime/interpreter/mterp/arm64/op_sub_double.S
index e8e3401..cca7556 100644
--- a/runtime/interpreter/mterp/arm64/op_sub_double.S
+++ b/runtime/interpreter/mterp/arm64/op_sub_double.S
@@ -1 +1,2 @@
-%include "arm64/binopWide.S" {"instr":"fsub d0, d1, d2", "result":"d0", "r1":"d1", "r2":"d2"}
+%def op_sub_double():
+% binopWide(instr="fsub d0, d1, d2", result="d0", r1="d1", r2="d2")
diff --git a/runtime/interpreter/mterp/arm64/op_sub_double_2addr.S b/runtime/interpreter/mterp/arm64/op_sub_double_2addr.S
index ddab55e..6d425fc 100644
--- a/runtime/interpreter/mterp/arm64/op_sub_double_2addr.S
+++ b/runtime/interpreter/mterp/arm64/op_sub_double_2addr.S
@@ -1 +1,2 @@
-%include "arm64/binopWide2addr.S" {"instr":"fsub d0, d0, d1", "r0":"d0", "r1":"d1"}
+%def op_sub_double_2addr():
+% binopWide2addr(instr="fsub d0, d0, d1", r0="d0", r1="d1")
diff --git a/runtime/interpreter/mterp/arm64/op_sub_float.S b/runtime/interpreter/mterp/arm64/op_sub_float.S
index 227b15f..e1c469b 100644
--- a/runtime/interpreter/mterp/arm64/op_sub_float.S
+++ b/runtime/interpreter/mterp/arm64/op_sub_float.S
@@ -1 +1,2 @@
-%include "arm64/fbinop.S" {"instr":"fsub s0, s0, s1"}
+%def op_sub_float():
+% fbinop(instr="fsub s0, s0, s1")
diff --git a/runtime/interpreter/mterp/arm64/op_sub_float_2addr.S b/runtime/interpreter/mterp/arm64/op_sub_float_2addr.S
index 19ac8d5..91b8346 100644
--- a/runtime/interpreter/mterp/arm64/op_sub_float_2addr.S
+++ b/runtime/interpreter/mterp/arm64/op_sub_float_2addr.S
@@ -1 +1,2 @@
-%include "arm64/fbinop2addr.S" {"instr":"fsub s2, s0, s1"}
+%def op_sub_float_2addr():
+% fbinop2addr(instr="fsub s2, s0, s1")
diff --git a/runtime/interpreter/mterp/arm64/op_sub_int.S b/runtime/interpreter/mterp/arm64/op_sub_int.S
index 0e7ce0e..8951463 100644
--- a/runtime/interpreter/mterp/arm64/op_sub_int.S
+++ b/runtime/interpreter/mterp/arm64/op_sub_int.S
@@ -1 +1,2 @@
-%include "arm64/binop.S" {"instr":"sub w0, w0, w1"}
+%def op_sub_int():
+% binop(instr="sub w0, w0, w1")
diff --git a/runtime/interpreter/mterp/arm64/op_sub_int_2addr.S b/runtime/interpreter/mterp/arm64/op_sub_int_2addr.S
index d2c1bd3..a450ce4 100644
--- a/runtime/interpreter/mterp/arm64/op_sub_int_2addr.S
+++ b/runtime/interpreter/mterp/arm64/op_sub_int_2addr.S
@@ -1 +1,2 @@
-%include "arm64/binop2addr.S" {"instr":"sub w0, w0, w1"}
+%def op_sub_int_2addr():
+% binop2addr(instr="sub w0, w0, w1")
diff --git a/runtime/interpreter/mterp/arm64/op_sub_long.S b/runtime/interpreter/mterp/arm64/op_sub_long.S
index 263c70d..696e79a 100644
--- a/runtime/interpreter/mterp/arm64/op_sub_long.S
+++ b/runtime/interpreter/mterp/arm64/op_sub_long.S
@@ -1 +1,2 @@
-%include "arm64/binopWide.S" {"instr":"sub x0, x1, x2"}
+%def op_sub_long():
+% binopWide(instr="sub x0, x1, x2")
diff --git a/runtime/interpreter/mterp/arm64/op_sub_long_2addr.S b/runtime/interpreter/mterp/arm64/op_sub_long_2addr.S
index 5be3772..a622451 100644
--- a/runtime/interpreter/mterp/arm64/op_sub_long_2addr.S
+++ b/runtime/interpreter/mterp/arm64/op_sub_long_2addr.S
@@ -1 +1,2 @@
-%include "arm64/binopWide2addr.S" {"instr":"sub x0, x0, x1"}
+%def op_sub_long_2addr():
+% binopWide2addr(instr="sub x0, x0, x1")
diff --git a/runtime/interpreter/mterp/arm64/op_throw.S b/runtime/interpreter/mterp/arm64/op_throw.S
index 9a951af..ed5a19e 100644
--- a/runtime/interpreter/mterp/arm64/op_throw.S
+++ b/runtime/interpreter/mterp/arm64/op_throw.S
@@ -1,3 +1,4 @@
+%def op_throw():
/*
* Throw an exception object in the current thread.
*/
diff --git a/runtime/interpreter/mterp/arm64/op_unused_3e.S b/runtime/interpreter/mterp/arm64/op_unused_3e.S
index 204ecef..d889f1a 100644
--- a/runtime/interpreter/mterp/arm64/op_unused_3e.S
+++ b/runtime/interpreter/mterp/arm64/op_unused_3e.S
@@ -1 +1,2 @@
-%include "arm64/unused.S"
+%def op_unused_3e():
+% unused()
diff --git a/runtime/interpreter/mterp/arm64/op_unused_3f.S b/runtime/interpreter/mterp/arm64/op_unused_3f.S
index 204ecef..b3ebcfa 100644
--- a/runtime/interpreter/mterp/arm64/op_unused_3f.S
+++ b/runtime/interpreter/mterp/arm64/op_unused_3f.S
@@ -1 +1,2 @@
-%include "arm64/unused.S"
+%def op_unused_3f():
+% unused()
diff --git a/runtime/interpreter/mterp/arm64/op_unused_40.S b/runtime/interpreter/mterp/arm64/op_unused_40.S
index 204ecef..7920fb3 100644
--- a/runtime/interpreter/mterp/arm64/op_unused_40.S
+++ b/runtime/interpreter/mterp/arm64/op_unused_40.S
@@ -1 +1,2 @@
-%include "arm64/unused.S"
+%def op_unused_40():
+% unused()
diff --git a/runtime/interpreter/mterp/arm64/op_unused_41.S b/runtime/interpreter/mterp/arm64/op_unused_41.S
index 204ecef..5ed03b8 100644
--- a/runtime/interpreter/mterp/arm64/op_unused_41.S
+++ b/runtime/interpreter/mterp/arm64/op_unused_41.S
@@ -1 +1,2 @@
-%include "arm64/unused.S"
+%def op_unused_41():
+% unused()
diff --git a/runtime/interpreter/mterp/arm64/op_unused_42.S b/runtime/interpreter/mterp/arm64/op_unused_42.S
index 204ecef..ac32521 100644
--- a/runtime/interpreter/mterp/arm64/op_unused_42.S
+++ b/runtime/interpreter/mterp/arm64/op_unused_42.S
@@ -1 +1,2 @@
-%include "arm64/unused.S"
+%def op_unused_42():
+% unused()
diff --git a/runtime/interpreter/mterp/arm64/op_unused_43.S b/runtime/interpreter/mterp/arm64/op_unused_43.S
index 204ecef..33e2aa1 100644
--- a/runtime/interpreter/mterp/arm64/op_unused_43.S
+++ b/runtime/interpreter/mterp/arm64/op_unused_43.S
@@ -1 +1,2 @@
-%include "arm64/unused.S"
+%def op_unused_43():
+% unused()
diff --git a/runtime/interpreter/mterp/arm64/op_unused_73.S b/runtime/interpreter/mterp/arm64/op_unused_73.S
index 204ecef..e3267a3 100644
--- a/runtime/interpreter/mterp/arm64/op_unused_73.S
+++ b/runtime/interpreter/mterp/arm64/op_unused_73.S
@@ -1 +1,2 @@
-%include "arm64/unused.S"
+%def op_unused_73():
+% unused()
diff --git a/runtime/interpreter/mterp/arm64/op_unused_79.S b/runtime/interpreter/mterp/arm64/op_unused_79.S
index 204ecef..3c6dafc 100644
--- a/runtime/interpreter/mterp/arm64/op_unused_79.S
+++ b/runtime/interpreter/mterp/arm64/op_unused_79.S
@@ -1 +1,2 @@
-%include "arm64/unused.S"
+%def op_unused_79():
+% unused()
diff --git a/runtime/interpreter/mterp/arm64/op_unused_7a.S b/runtime/interpreter/mterp/arm64/op_unused_7a.S
index 204ecef..9c03cd5 100644
--- a/runtime/interpreter/mterp/arm64/op_unused_7a.S
+++ b/runtime/interpreter/mterp/arm64/op_unused_7a.S
@@ -1 +1,2 @@
-%include "arm64/unused.S"
+%def op_unused_7a():
+% unused()
diff --git a/runtime/interpreter/mterp/arm64/op_unused_f3.S b/runtime/interpreter/mterp/arm64/op_unused_f3.S
index 204ecef..ab10b78 100644
--- a/runtime/interpreter/mterp/arm64/op_unused_f3.S
+++ b/runtime/interpreter/mterp/arm64/op_unused_f3.S
@@ -1 +1,2 @@
-%include "arm64/unused.S"
+%def op_unused_f3():
+% unused()
diff --git a/runtime/interpreter/mterp/arm64/op_unused_f4.S b/runtime/interpreter/mterp/arm64/op_unused_f4.S
index 204ecef..09229d6 100644
--- a/runtime/interpreter/mterp/arm64/op_unused_f4.S
+++ b/runtime/interpreter/mterp/arm64/op_unused_f4.S
@@ -1 +1,2 @@
-%include "arm64/unused.S"
+%def op_unused_f4():
+% unused()
diff --git a/runtime/interpreter/mterp/arm64/op_unused_f5.S b/runtime/interpreter/mterp/arm64/op_unused_f5.S
index 204ecef..0d6149b 100644
--- a/runtime/interpreter/mterp/arm64/op_unused_f5.S
+++ b/runtime/interpreter/mterp/arm64/op_unused_f5.S
@@ -1 +1,2 @@
-%include "arm64/unused.S"
+%def op_unused_f5():
+% unused()
diff --git a/runtime/interpreter/mterp/arm64/op_unused_f6.S b/runtime/interpreter/mterp/arm64/op_unused_f6.S
index 204ecef..117b03d 100644
--- a/runtime/interpreter/mterp/arm64/op_unused_f6.S
+++ b/runtime/interpreter/mterp/arm64/op_unused_f6.S
@@ -1 +1,2 @@
-%include "arm64/unused.S"
+%def op_unused_f6():
+% unused()
diff --git a/runtime/interpreter/mterp/arm64/op_unused_f7.S b/runtime/interpreter/mterp/arm64/op_unused_f7.S
index 204ecef..4e3a0f3 100644
--- a/runtime/interpreter/mterp/arm64/op_unused_f7.S
+++ b/runtime/interpreter/mterp/arm64/op_unused_f7.S
@@ -1 +1,2 @@
-%include "arm64/unused.S"
+%def op_unused_f7():
+% unused()
diff --git a/runtime/interpreter/mterp/arm64/op_unused_f8.S b/runtime/interpreter/mterp/arm64/op_unused_f8.S
index 204ecef..d122075 100644
--- a/runtime/interpreter/mterp/arm64/op_unused_f8.S
+++ b/runtime/interpreter/mterp/arm64/op_unused_f8.S
@@ -1 +1,2 @@
-%include "arm64/unused.S"
+%def op_unused_f8():
+% unused()
diff --git a/runtime/interpreter/mterp/arm64/op_unused_f9.S b/runtime/interpreter/mterp/arm64/op_unused_f9.S
index 204ecef..7d09a0e 100644
--- a/runtime/interpreter/mterp/arm64/op_unused_f9.S
+++ b/runtime/interpreter/mterp/arm64/op_unused_f9.S
@@ -1 +1,2 @@
-%include "arm64/unused.S"
+%def op_unused_f9():
+% unused()
diff --git a/runtime/interpreter/mterp/arm64/op_unused_fc.S b/runtime/interpreter/mterp/arm64/op_unused_fc.S
index 204ecef..0697819 100644
--- a/runtime/interpreter/mterp/arm64/op_unused_fc.S
+++ b/runtime/interpreter/mterp/arm64/op_unused_fc.S
@@ -1 +1,2 @@
-%include "arm64/unused.S"
+%def op_unused_fc():
+% unused()
diff --git a/runtime/interpreter/mterp/arm64/op_unused_fd.S b/runtime/interpreter/mterp/arm64/op_unused_fd.S
index 204ecef..4bc2b4b 100644
--- a/runtime/interpreter/mterp/arm64/op_unused_fd.S
+++ b/runtime/interpreter/mterp/arm64/op_unused_fd.S
@@ -1 +1,2 @@
-%include "arm64/unused.S"
+%def op_unused_fd():
+% unused()
diff --git a/runtime/interpreter/mterp/arm64/op_ushr_int.S b/runtime/interpreter/mterp/arm64/op_ushr_int.S
index 005452b..5f6ad2d 100644
--- a/runtime/interpreter/mterp/arm64/op_ushr_int.S
+++ b/runtime/interpreter/mterp/arm64/op_ushr_int.S
@@ -1 +1,2 @@
-%include "arm64/binop.S" {"instr":"lsr w0, w0, w1"}
+%def op_ushr_int():
+% binop(instr="lsr w0, w0, w1")
diff --git a/runtime/interpreter/mterp/arm64/op_ushr_int_2addr.S b/runtime/interpreter/mterp/arm64/op_ushr_int_2addr.S
index 1cb8cb7..47527b1 100644
--- a/runtime/interpreter/mterp/arm64/op_ushr_int_2addr.S
+++ b/runtime/interpreter/mterp/arm64/op_ushr_int_2addr.S
@@ -1 +1,2 @@
-%include "arm64/binop2addr.S" {"instr":"lsr w0, w0, w1"}
+%def op_ushr_int_2addr():
+% binop2addr(instr="lsr w0, w0, w1")
diff --git a/runtime/interpreter/mterp/arm64/op_ushr_int_lit8.S b/runtime/interpreter/mterp/arm64/op_ushr_int_lit8.S
index 555ed4e..abc5898 100644
--- a/runtime/interpreter/mterp/arm64/op_ushr_int_lit8.S
+++ b/runtime/interpreter/mterp/arm64/op_ushr_int_lit8.S
@@ -1 +1,2 @@
-%include "arm64/binopLit8.S" {"extract":"ubfx w1, w3, #8, #5", "instr":"lsr w0, w0, w1"}
+%def op_ushr_int_lit8():
+% binopLit8(extract="ubfx w1, w3, #8, #5", instr="lsr w0, w0, w1")
diff --git a/runtime/interpreter/mterp/arm64/op_ushr_long.S b/runtime/interpreter/mterp/arm64/op_ushr_long.S
index e13c86a..4f3e941 100644
--- a/runtime/interpreter/mterp/arm64/op_ushr_long.S
+++ b/runtime/interpreter/mterp/arm64/op_ushr_long.S
@@ -1 +1,2 @@
-%include "arm64/shiftWide.S" {"opcode":"lsr"}
+%def op_ushr_long():
+% shiftWide(opcode="lsr")
diff --git a/runtime/interpreter/mterp/arm64/op_ushr_long_2addr.S b/runtime/interpreter/mterp/arm64/op_ushr_long_2addr.S
index 67ec91e..5606d12 100644
--- a/runtime/interpreter/mterp/arm64/op_ushr_long_2addr.S
+++ b/runtime/interpreter/mterp/arm64/op_ushr_long_2addr.S
@@ -1 +1,2 @@
-%include "arm64/shiftWide2addr.S" {"opcode":"lsr"}
+%def op_ushr_long_2addr():
+% shiftWide2addr(opcode="lsr")
diff --git a/runtime/interpreter/mterp/arm64/op_xor_int.S b/runtime/interpreter/mterp/arm64/op_xor_int.S
index 7483663..369af7d 100644
--- a/runtime/interpreter/mterp/arm64/op_xor_int.S
+++ b/runtime/interpreter/mterp/arm64/op_xor_int.S
@@ -1 +1,2 @@
-%include "arm64/binop.S" {"instr":"eor w0, w0, w1"}
+%def op_xor_int():
+% binop(instr="eor w0, w0, w1")
diff --git a/runtime/interpreter/mterp/arm64/op_xor_int_2addr.S b/runtime/interpreter/mterp/arm64/op_xor_int_2addr.S
index 2f9a2c7..f8e87b3 100644
--- a/runtime/interpreter/mterp/arm64/op_xor_int_2addr.S
+++ b/runtime/interpreter/mterp/arm64/op_xor_int_2addr.S
@@ -1 +1,2 @@
-%include "arm64/binop2addr.S" {"instr":"eor w0, w0, w1"}
+%def op_xor_int_2addr():
+% binop2addr(instr="eor w0, w0, w1")
diff --git a/runtime/interpreter/mterp/arm64/op_xor_int_lit16.S b/runtime/interpreter/mterp/arm64/op_xor_int_lit16.S
index 6b72c56..bcfc6e2 100644
--- a/runtime/interpreter/mterp/arm64/op_xor_int_lit16.S
+++ b/runtime/interpreter/mterp/arm64/op_xor_int_lit16.S
@@ -1 +1,2 @@
-%include "arm64/binopLit16.S" {"instr":"eor w0, w0, w1"}
+%def op_xor_int_lit16():
+% binopLit16(instr="eor w0, w0, w1")
diff --git a/runtime/interpreter/mterp/arm64/op_xor_int_lit8.S b/runtime/interpreter/mterp/arm64/op_xor_int_lit8.S
index 1d3d93e..bd59c4c 100644
--- a/runtime/interpreter/mterp/arm64/op_xor_int_lit8.S
+++ b/runtime/interpreter/mterp/arm64/op_xor_int_lit8.S
@@ -1 +1,2 @@
-%include "arm64/binopLit8.S" {"extract":"", "instr":"eor w0, w0, w3, asr #8"}
+%def op_xor_int_lit8():
+% binopLit8(extract="", instr="eor w0, w0, w3, asr #8")
diff --git a/runtime/interpreter/mterp/arm64/op_xor_long.S b/runtime/interpreter/mterp/arm64/op_xor_long.S
index 3880d5d..58b97bd 100644
--- a/runtime/interpreter/mterp/arm64/op_xor_long.S
+++ b/runtime/interpreter/mterp/arm64/op_xor_long.S
@@ -1 +1,2 @@
-%include "arm64/binopWide.S" {"instr":"eor x0, x1, x2"}
+%def op_xor_long():
+% binopWide(instr="eor x0, x1, x2")
diff --git a/runtime/interpreter/mterp/arm64/op_xor_long_2addr.S b/runtime/interpreter/mterp/arm64/op_xor_long_2addr.S
index 3690552..5877665 100644
--- a/runtime/interpreter/mterp/arm64/op_xor_long_2addr.S
+++ b/runtime/interpreter/mterp/arm64/op_xor_long_2addr.S
@@ -1 +1,2 @@
-%include "arm64/binopWide2addr.S" {"instr":"eor x0, x0, x1"}
+%def op_xor_long_2addr():
+% binopWide2addr(instr="eor x0, x0, x1")
diff --git a/runtime/interpreter/mterp/arm64/shiftWide.S b/runtime/interpreter/mterp/arm64/shiftWide.S
index dcb2fb7..46922c8 100644
--- a/runtime/interpreter/mterp/arm64/shiftWide.S
+++ b/runtime/interpreter/mterp/arm64/shiftWide.S
@@ -1,4 +1,4 @@
-%default {"opcode":"shl"}
+%def shiftWide(opcode="shl"):
/*
* 64-bit shift operation.
*
diff --git a/runtime/interpreter/mterp/arm64/shiftWide2addr.S b/runtime/interpreter/mterp/arm64/shiftWide2addr.S
index b860dfd..2780d45 100644
--- a/runtime/interpreter/mterp/arm64/shiftWide2addr.S
+++ b/runtime/interpreter/mterp/arm64/shiftWide2addr.S
@@ -1,4 +1,4 @@
-%default {"opcode":"lsl"}
+%def shiftWide2addr(opcode="lsl"):
/*
* Generic 64-bit shift operation.
*/
diff --git a/runtime/interpreter/mterp/arm64/unop.S b/runtime/interpreter/mterp/arm64/unop.S
index e681968..65faf66 100644
--- a/runtime/interpreter/mterp/arm64/unop.S
+++ b/runtime/interpreter/mterp/arm64/unop.S
@@ -1,3 +1,4 @@
+%def unop(instr=""):
/*
* Generic 32-bit unary operation. Provide an "instr" line that
* specifies an instruction that performs "result = op w0".
diff --git a/runtime/interpreter/mterp/arm64/unopWide.S b/runtime/interpreter/mterp/arm64/unopWide.S
index 6ee4f92..6a16dfa 100644
--- a/runtime/interpreter/mterp/arm64/unopWide.S
+++ b/runtime/interpreter/mterp/arm64/unopWide.S
@@ -1,4 +1,4 @@
-%default {"instr":"sub x0, xzr, x0"}
+%def unopWide(instr="sub x0, xzr, x0"):
/*
* Generic 64-bit unary operation. Provide an "instr" line that
* specifies an instruction that performs "result = op x0".
diff --git a/runtime/interpreter/mterp/arm64/unused.S b/runtime/interpreter/mterp/arm64/unused.S
index ffa00be..3f37e74 100644
--- a/runtime/interpreter/mterp/arm64/unused.S
+++ b/runtime/interpreter/mterp/arm64/unused.S
@@ -1,3 +1,4 @@
+%def unused():
/*
* Bail to reference interpreter to throw.
*/
diff --git a/runtime/interpreter/mterp/arm64/zcmp.S b/runtime/interpreter/mterp/arm64/zcmp.S
index 510a3c1..4435854 100644
--- a/runtime/interpreter/mterp/arm64/zcmp.S
+++ b/runtime/interpreter/mterp/arm64/zcmp.S
@@ -1,4 +1,4 @@
-%default { "compare":"1" }
+%def zcmp(compare="1", branch=""):
/*
* Generic one-operand compare-and-branch operation. Provide a "condition"
* fragment that specifies the comparison to perform.
diff --git a/runtime/interpreter/mterp/common/gen_setup.py b/runtime/interpreter/mterp/common/gen_setup.py
new file mode 100644
index 0000000..b2e62f6
--- /dev/null
+++ b/runtime/interpreter/mterp/common/gen_setup.py
@@ -0,0 +1,85 @@
+#
+# Copyright (C) 2016 The Android Open Source Project
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+# Common global variables and helper methods for the in-memory python script.
+
+import sys, re
+from cStringIO import StringIO
+
+out = StringIO() # File-like in-memory buffer.
+handler_size_bytes = "128"
+handler_size_bits = "7"
+opcode = ""
+opnum = ""
+
+def write_line(line):
+ out.write(line + "\n")
+
+def balign():
+ write_line(" .balign {}".format(handler_size_bytes))
+
+def write_opcode(num, name, write_method, is_alt):
+ global opnum, opcode
+ opnum, opcode = str(num), name
+ if is_alt:
+ name = "ALT_" + name
+ write_line("/* ------------------------------ */")
+ balign()
+ write_line(".L_{1}: /* {0:#04x} */".format(num, name))
+ if is_alt:
+ alt_stub()
+ else:
+ write_method()
+ write_line("")
+ opnum, opcode = None, None
+
+def generate():
+ out.seek(0)
+ out.truncate()
+ write_line("/* DO NOT EDIT: This file was generated by gen-mterp.py. */")
+ header()
+ entry()
+
+ instruction_start()
+ opcodes(is_alt = False)
+ balign()
+ instruction_end()
+
+ instruction_start_sister()
+ write_sister()
+ instruction_end_sister()
+
+ # We need to footer sooner so that branch instruction can reach it.
+ # TODO: Clean up.
+ if arch == "arm64":
+ footer()
+
+ instruction_start_alt()
+ opcodes(is_alt = True)
+ balign()
+ instruction_end_alt()
+
+ if arch == "arm64":
+ close_cfi()
+ else:
+ footer()
+
+ out.seek(0)
+ # Squash consequtive empty lines.
+ text = re.sub(r"(\n\n)(\n)+", r"\1", out.read())
+ with open('out/mterp_' + arch + '.S', 'w') as output_file:
+ output_file.write(text)
+
diff --git a/runtime/interpreter/mterp/config_arm b/runtime/interpreter/mterp/config_arm
deleted file mode 100644
index a45efd9..0000000
--- a/runtime/interpreter/mterp/config_arm
+++ /dev/null
@@ -1,298 +0,0 @@
-# Copyright (C) 2015 The Android Open Source Project
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-# See the License for the specific language governing permissions and
-# limitations under the License.
-
-#
-# Configuration for ARMv7-A targets.
-#
-
-handler-style computed-goto
-handler-size 128
-
-# source for alternate entry stub
-asm-alt-stub arm/alt_stub.S
-
-# file header and basic definitions
-import arm/header.S
-
-# arch-specific entry point to interpreter
-import arm/entry.S
-
-# Stub to switch to alternate interpreter
-fallback-stub arm/fallback.S
-
-# opcode list; argument to op-start is default directory
-op-start arm
- # (override example:) op op_sub_float_2addr arm-vfp
- # (fallback example:) op op_sub_float_2addr FALLBACK
-
- # op op_nop FALLBACK
- # op op_move FALLBACK
- # op op_move_from16 FALLBACK
- # op op_move_16 FALLBACK
- # op op_move_wide FALLBACK
- # op op_move_wide_from16 FALLBACK
- # op op_move_wide_16 FALLBACK
- # op op_move_object FALLBACK
- # op op_move_object_from16 FALLBACK
- # op op_move_object_16 FALLBACK
- # op op_move_result FALLBACK
- # op op_move_result_wide FALLBACK
- # op op_move_result_object FALLBACK
- # op op_move_exception FALLBACK
- # op op_return_void FALLBACK
- # op op_return FALLBACK
- # op op_return_wide FALLBACK
- # op op_return_object FALLBACK
- # op op_const_4 FALLBACK
- # op op_const_16 FALLBACK
- # op op_const FALLBACK
- # op op_const_high16 FALLBACK
- # op op_const_wide_16 FALLBACK
- # op op_const_wide_32 FALLBACK
- # op op_const_wide FALLBACK
- # op op_const_wide_high16 FALLBACK
- # op op_const_string FALLBACK
- # op op_const_string_jumbo FALLBACK
- # op op_const_class FALLBACK
- # op op_monitor_enter FALLBACK
- # op op_monitor_exit FALLBACK
- # op op_check_cast FALLBACK
- # op op_instance_of FALLBACK
- # op op_array_length FALLBACK
- # op op_new_instance FALLBACK
- # op op_new_array FALLBACK
- # op op_filled_new_array FALLBACK
- # op op_filled_new_array_range FALLBACK
- # op op_fill_array_data FALLBACK
- # op op_throw FALLBACK
- # op op_goto FALLBACK
- # op op_goto_16 FALLBACK
- # op op_goto_32 FALLBACK
- # op op_packed_switch FALLBACK
- # op op_sparse_switch FALLBACK
- # op op_cmpl_float FALLBACK
- # op op_cmpg_float FALLBACK
- # op op_cmpl_double FALLBACK
- # op op_cmpg_double FALLBACK
- # op op_cmp_long FALLBACK
- # op op_if_eq FALLBACK
- # op op_if_ne FALLBACK
- # op op_if_lt FALLBACK
- # op op_if_ge FALLBACK
- # op op_if_gt FALLBACK
- # op op_if_le FALLBACK
- # op op_if_eqz FALLBACK
- # op op_if_nez FALLBACK
- # op op_if_ltz FALLBACK
- # op op_if_gez FALLBACK
- # op op_if_gtz FALLBACK
- # op op_if_lez FALLBACK
- # op op_unused_3e FALLBACK
- # op op_unused_3f FALLBACK
- # op op_unused_40 FALLBACK
- # op op_unused_41 FALLBACK
- # op op_unused_42 FALLBACK
- # op op_unused_43 FALLBACK
- # op op_aget FALLBACK
- # op op_aget_wide FALLBACK
- # op op_aget_object FALLBACK
- # op op_aget_boolean FALLBACK
- # op op_aget_byte FALLBACK
- # op op_aget_char FALLBACK
- # op op_aget_short FALLBACK
- # op op_aput FALLBACK
- # op op_aput_wide FALLBACK
- # op op_aput_object FALLBACK
- # op op_aput_boolean FALLBACK
- # op op_aput_byte FALLBACK
- # op op_aput_char FALLBACK
- # op op_aput_short FALLBACK
- # op op_iget FALLBACK
- # op op_iget_wide FALLBACK
- # op op_iget_object FALLBACK
- # op op_iget_boolean FALLBACK
- # op op_iget_byte FALLBACK
- # op op_iget_char FALLBACK
- # op op_iget_short FALLBACK
- # op op_iput FALLBACK
- # op op_iput_wide FALLBACK
- # op op_iput_object FALLBACK
- # op op_iput_boolean FALLBACK
- # op op_iput_byte FALLBACK
- # op op_iput_char FALLBACK
- # op op_iput_short FALLBACK
- # op op_sget FALLBACK
- # op op_sget_wide FALLBACK
- # op op_sget_object FALLBACK
- # op op_sget_boolean FALLBACK
- # op op_sget_byte FALLBACK
- # op op_sget_char FALLBACK
- # op op_sget_short FALLBACK
- # op op_sput FALLBACK
- # op op_sput_wide FALLBACK
- # op op_sput_object FALLBACK
- # op op_sput_boolean FALLBACK
- # op op_sput_byte FALLBACK
- # op op_sput_char FALLBACK
- # op op_sput_short FALLBACK
- # op op_invoke_virtual FALLBACK
- # op op_invoke_super FALLBACK
- # op op_invoke_direct FALLBACK
- # op op_invoke_static FALLBACK
- # op op_invoke_interface FALLBACK
- # op op_return_void_no_barrier FALLBACK
- # op op_invoke_virtual_range FALLBACK
- # op op_invoke_super_range FALLBACK
- # op op_invoke_direct_range FALLBACK
- # op op_invoke_static_range FALLBACK
- # op op_invoke_interface_range FALLBACK
- # op op_unused_79 FALLBACK
- # op op_unused_7a FALLBACK
- # op op_neg_int FALLBACK
- # op op_not_int FALLBACK
- # op op_neg_long FALLBACK
- # op op_not_long FALLBACK
- # op op_neg_float FALLBACK
- # op op_neg_double FALLBACK
- # op op_int_to_long FALLBACK
- # op op_int_to_float FALLBACK
- # op op_int_to_double FALLBACK
- # op op_long_to_int FALLBACK
- # op op_long_to_float FALLBACK
- # op op_long_to_double FALLBACK
- # op op_float_to_int FALLBACK
- # op op_float_to_long FALLBACK
- # op op_float_to_double FALLBACK
- # op op_double_to_int FALLBACK
- # op op_double_to_long FALLBACK
- # op op_double_to_float FALLBACK
- # op op_int_to_byte FALLBACK
- # op op_int_to_char FALLBACK
- # op op_int_to_short FALLBACK
- # op op_add_int FALLBACK
- # op op_sub_int FALLBACK
- # op op_mul_int FALLBACK
- # op op_div_int FALLBACK
- # op op_rem_int FALLBACK
- # op op_and_int FALLBACK
- # op op_or_int FALLBACK
- # op op_xor_int FALLBACK
- # op op_shl_int FALLBACK
- # op op_shr_int FALLBACK
- # op op_ushr_int FALLBACK
- # op op_add_long FALLBACK
- # op op_sub_long FALLBACK
- # op op_mul_long FALLBACK
- # op op_div_long FALLBACK
- # op op_rem_long FALLBACK
- # op op_and_long FALLBACK
- # op op_or_long FALLBACK
- # op op_xor_long FALLBACK
- # op op_shl_long FALLBACK
- # op op_shr_long FALLBACK
- # op op_ushr_long FALLBACK
- # op op_add_float FALLBACK
- # op op_sub_float FALLBACK
- # op op_mul_float FALLBACK
- # op op_div_float FALLBACK
- # op op_rem_float FALLBACK
- # op op_add_double FALLBACK
- # op op_sub_double FALLBACK
- # op op_mul_double FALLBACK
- # op op_div_double FALLBACK
- # op op_rem_double FALLBACK
- # op op_add_int_2addr FALLBACK
- # op op_sub_int_2addr FALLBACK
- # op op_mul_int_2addr FALLBACK
- # op op_div_int_2addr FALLBACK
- # op op_rem_int_2addr FALLBACK
- # op op_and_int_2addr FALLBACK
- # op op_or_int_2addr FALLBACK
- # op op_xor_int_2addr FALLBACK
- # op op_shl_int_2addr FALLBACK
- # op op_shr_int_2addr FALLBACK
- # op op_ushr_int_2addr FALLBACK
- # op op_add_long_2addr FALLBACK
- # op op_sub_long_2addr FALLBACK
- # op op_mul_long_2addr FALLBACK
- # op op_div_long_2addr FALLBACK
- # op op_rem_long_2addr FALLBACK
- # op op_and_long_2addr FALLBACK
- # op op_or_long_2addr FALLBACK
- # op op_xor_long_2addr FALLBACK
- # op op_shl_long_2addr FALLBACK
- # op op_shr_long_2addr FALLBACK
- # op op_ushr_long_2addr FALLBACK
- # op op_add_float_2addr FALLBACK
- # op op_sub_float_2addr FALLBACK
- # op op_mul_float_2addr FALLBACK
- # op op_div_float_2addr FALLBACK
- # op op_rem_float_2addr FALLBACK
- # op op_add_double_2addr FALLBACK
- # op op_sub_double_2addr FALLBACK
- # op op_mul_double_2addr FALLBACK
- # op op_div_double_2addr FALLBACK
- # op op_rem_double_2addr FALLBACK
- # op op_add_int_lit16 FALLBACK
- # op op_rsub_int FALLBACK
- # op op_mul_int_lit16 FALLBACK
- # op op_div_int_lit16 FALLBACK
- # op op_rem_int_lit16 FALLBACK
- # op op_and_int_lit16 FALLBACK
- # op op_or_int_lit16 FALLBACK
- # op op_xor_int_lit16 FALLBACK
- # op op_add_int_lit8 FALLBACK
- # op op_rsub_int_lit8 FALLBACK
- # op op_mul_int_lit8 FALLBACK
- # op op_div_int_lit8 FALLBACK
- # op op_rem_int_lit8 FALLBACK
- # op op_and_int_lit8 FALLBACK
- # op op_or_int_lit8 FALLBACK
- # op op_xor_int_lit8 FALLBACK
- # op op_shl_int_lit8 FALLBACK
- # op op_shr_int_lit8 FALLBACK
- # op op_ushr_int_lit8 FALLBACK
- # op op_iget_quick FALLBACK
- # op op_iget_wide_quick FALLBACK
- # op op_iget_object_quick FALLBACK
- # op op_iput_quick FALLBACK
- # op op_iput_wide_quick FALLBACK
- # op op_iput_object_quick FALLBACK
- # op op_invoke_virtual_quick FALLBACK
- # op op_invoke_virtual_range_quick FALLBACK
- # op op_iput_boolean_quick FALLBACK
- # op op_iput_byte_quick FALLBACK
- # op op_iput_char_quick FALLBACK
- # op op_iput_short_quick FALLBACK
- # op op_iget_boolean_quick FALLBACK
- # op op_iget_byte_quick FALLBACK
- # op op_iget_char_quick FALLBACK
- # op op_iget_short_quick FALLBACK
- # op op_unused_f3 FALLBACK
- # op op_unused_f4 FALLBACK
- # op op_unused_f5 FALLBACK
- # op op_unused_f6 FALLBACK
- # op op_unused_f7 FALLBACK
- # op op_unused_f8 FALLBACK
- # op op_unused_f9 FALLBACK
- # op op_invoke_polymorphic FALLBACK
- # op op_invoke_polymorphic_range FALLBACK
- # op op_invoke_custom FALLBACK
- # op op_invoke_custom_range FALLBACK
- # op op_const_method_handle FALLBACK
- # op op_const_method_type FALLBACK
-op-end
-
-# common subroutines for asm
-import arm/footer.S
diff --git a/runtime/interpreter/mterp/config_arm64 b/runtime/interpreter/mterp/config_arm64
deleted file mode 100644
index 590363f..0000000
--- a/runtime/interpreter/mterp/config_arm64
+++ /dev/null
@@ -1,306 +0,0 @@
-
-# Copyright (C) 2015 The Android Open Source Project
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-# See the License for the specific language governing permissions and
-# limitations under the License.
-
-#
-# Configuration for ARM64
-#
-
-handler-style computed-goto
-handler-size 128
-
-# file header and basic definitions
-import arm64/header.S
-
-# arch-specific entry point to interpreter
-import arm64/entry.S
-
-# Stub to switch to alternate interpreter
-fallback-stub arm64/fallback.S
-
-# opcode list; argument to op-start is default directory
-op-start arm64
- # (override example:) op OP_SUB_FLOAT_2ADDR arm-vfp
- # (fallback example:) op OP_SUB_FLOAT_2ADDR FALLBACK
-
- # op op_nop FALLBACK
- # op op_move FALLBACK
- # op op_move_from16 FALLBACK
- # op op_move_16 FALLBACK
- # op op_move_wide FALLBACK
- # op op_move_wide_from16 FALLBACK
- # op op_move_wide_16 FALLBACK
- # op op_move_object FALLBACK
- # op op_move_object_from16 FALLBACK
- # op op_move_object_16 FALLBACK
- # op op_move_result FALLBACK
- # op op_move_result_wide FALLBACK
- # op op_move_result_object FALLBACK
- # op op_move_exception FALLBACK
- # op op_return_void FALLBACK
- # op op_return FALLBACK
- # op op_return_wide FALLBACK
- # op op_return_object FALLBACK
- # op op_const_4 FALLBACK
- # op op_const_16 FALLBACK
- # op op_const FALLBACK
- # op op_const_high16 FALLBACK
- # op op_const_wide_16 FALLBACK
- # op op_const_wide_32 FALLBACK
- # op op_const_wide FALLBACK
- # op op_const_wide_high16 FALLBACK
- # op op_const_string FALLBACK
- # op op_const_string_jumbo FALLBACK
- # op op_const_class FALLBACK
- # op op_monitor_enter FALLBACK
- # op op_monitor_exit FALLBACK
- # op op_check_cast FALLBACK
- # op op_instance_of FALLBACK
- # op op_array_length FALLBACK
- # op op_new_instance FALLBACK
- # op op_new_array FALLBACK
- # op op_filled_new_array FALLBACK
- # op op_filled_new_array_range FALLBACK
- # op op_fill_array_data FALLBACK
- # op op_throw FALLBACK
- # op op_goto FALLBACK
- # op op_goto_16 FALLBACK
- # op op_goto_32 FALLBACK
- # op op_packed_switch FALLBACK
- # op op_sparse_switch FALLBACK
- # op op_cmpl_float FALLBACK
- # op op_cmpg_float FALLBACK
- # op op_cmpl_double FALLBACK
- # op op_cmpg_double FALLBACK
- # op op_cmp_long FALLBACK
- # op op_if_eq FALLBACK
- # op op_if_ne FALLBACK
- # op op_if_lt FALLBACK
- # op op_if_ge FALLBACK
- # op op_if_gt FALLBACK
- # op op_if_le FALLBACK
- # op op_if_eqz FALLBACK
- # op op_if_nez FALLBACK
- # op op_if_ltz FALLBACK
- # op op_if_gez FALLBACK
- # op op_if_gtz FALLBACK
- # op op_if_lez FALLBACK
- # op op_unused_3e FALLBACK
- # op op_unused_3f FALLBACK
- # op op_unused_40 FALLBACK
- # op op_unused_41 FALLBACK
- # op op_unused_42 FALLBACK
- # op op_unused_43 FALLBACK
- # op op_aget FALLBACK
- # op op_aget_wide FALLBACK
- # op op_aget_object FALLBACK
- # op op_aget_boolean FALLBACK
- # op op_aget_byte FALLBACK
- # op op_aget_char FALLBACK
- # op op_aget_short FALLBACK
- # op op_aput FALLBACK
- # op op_aput_wide FALLBACK
- # op op_aput_object FALLBACK
- # op op_aput_boolean FALLBACK
- # op op_aput_byte FALLBACK
- # op op_aput_char FALLBACK
- # op op_aput_short FALLBACK
- # op op_iget FALLBACK
- # op op_iget_wide FALLBACK
- # op op_iget_object FALLBACK
- # op op_iget_boolean FALLBACK
- # op op_iget_byte FALLBACK
- # op op_iget_char FALLBACK
- # op op_iget_short FALLBACK
- # op op_iput FALLBACK
- # op op_iput_wide FALLBACK
- # op op_iput_object FALLBACK
- # op op_iput_boolean FALLBACK
- # op op_iput_byte FALLBACK
- # op op_iput_char FALLBACK
- # op op_iput_short FALLBACK
- # op op_sget FALLBACK
- # op op_sget_wide FALLBACK
- # op op_sget_object FALLBACK
- # op op_sget_boolean FALLBACK
- # op op_sget_byte FALLBACK
- # op op_sget_char FALLBACK
- # op op_sget_short FALLBACK
- # op op_sput FALLBACK
- # op op_sput_wide FALLBACK
- # op op_sput_object FALLBACK
- # op op_sput_boolean FALLBACK
- # op op_sput_byte FALLBACK
- # op op_sput_char FALLBACK
- # op op_sput_short FALLBACK
- # op op_invoke_virtual FALLBACK
- # op op_invoke_super FALLBACK
- # op op_invoke_direct FALLBACK
- # op op_invoke_static FALLBACK
- # op op_invoke_interface FALLBACK
- # op op_return_void_no_barrier FALLBACK
- # op op_invoke_virtual_range FALLBACK
- # op op_invoke_super_range FALLBACK
- # op op_invoke_direct_range FALLBACK
- # op op_invoke_static_range FALLBACK
- # op op_invoke_interface_range FALLBACK
- # op op_unused_79 FALLBACK
- # op op_unused_7a FALLBACK
- # op op_neg_int FALLBACK
- # op op_not_int FALLBACK
- # op op_neg_long FALLBACK
- # op op_not_long FALLBACK
- # op op_neg_float FALLBACK
- # op op_neg_double FALLBACK
- # op op_int_to_long FALLBACK
- # op op_int_to_float FALLBACK
- # op op_int_to_double FALLBACK
- # op op_long_to_int FALLBACK
- # op op_long_to_float FALLBACK
- # op op_long_to_double FALLBACK
- # op op_float_to_int FALLBACK
- # op op_float_to_long FALLBACK
- # op op_float_to_double FALLBACK
- # op op_double_to_int FALLBACK
- # op op_double_to_long FALLBACK
- # op op_double_to_float FALLBACK
- # op op_int_to_byte FALLBACK
- # op op_int_to_char FALLBACK
- # op op_int_to_short FALLBACK
- # op op_add_int FALLBACK
- # op op_sub_int FALLBACK
- # op op_mul_int FALLBACK
- # op op_div_int FALLBACK
- # op op_rem_int FALLBACK
- # op op_and_int FALLBACK
- # op op_or_int FALLBACK
- # op op_xor_int FALLBACK
- # op op_shl_int FALLBACK
- # op op_shr_int FALLBACK
- # op op_ushr_int FALLBACK
- # op op_add_long FALLBACK
- # op op_sub_long FALLBACK
- # op op_mul_long FALLBACK
- # op op_div_long FALLBACK
- # op op_rem_long FALLBACK
- # op op_and_long FALLBACK
- # op op_or_long FALLBACK
- # op op_xor_long FALLBACK
- # op op_shl_long FALLBACK
- # op op_shr_long FALLBACK
- # op op_ushr_long FALLBACK
- # op op_add_float FALLBACK
- # op op_sub_float FALLBACK
- # op op_mul_float FALLBACK
- # op op_div_float FALLBACK
- # op op_rem_float FALLBACK
- # op op_add_double FALLBACK
- # op op_sub_double FALLBACK
- # op op_mul_double FALLBACK
- # op op_div_double FALLBACK
- # op op_rem_double FALLBACK
- # op op_add_int_2addr FALLBACK
- # op op_sub_int_2addr FALLBACK
- # op op_mul_int_2addr FALLBACK
- # op op_div_int_2addr FALLBACK
- # op op_rem_int_2addr FALLBACK
- # op op_and_int_2addr FALLBACK
- # op op_or_int_2addr FALLBACK
- # op op_xor_int_2addr FALLBACK
- # op op_shl_int_2addr FALLBACK
- # op op_shr_int_2addr FALLBACK
- # op op_ushr_int_2addr FALLBACK
- # op op_add_long_2addr FALLBACK
- # op op_sub_long_2addr FALLBACK
- # op op_mul_long_2addr FALLBACK
- # op op_div_long_2addr FALLBACK
- # op op_rem_long_2addr FALLBACK
- # op op_and_long_2addr FALLBACK
- # op op_or_long_2addr FALLBACK
- # op op_xor_long_2addr FALLBACK
- # op op_shl_long_2addr FALLBACK
- # op op_shr_long_2addr FALLBACK
- # op op_ushr_long_2addr FALLBACK
- # op op_add_float_2addr FALLBACK
- # op op_sub_float_2addr FALLBACK
- # op op_mul_float_2addr FALLBACK
- # op op_div_float_2addr FALLBACK
- # op op_rem_float_2addr FALLBACK
- # op op_add_double_2addr FALLBACK
- # op op_sub_double_2addr FALLBACK
- # op op_mul_double_2addr FALLBACK
- # op op_div_double_2addr FALLBACK
- # op op_rem_double_2addr FALLBACK
- # op op_add_int_lit16 FALLBACK
- # op op_rsub_int FALLBACK
- # op op_mul_int_lit16 FALLBACK
- # op op_div_int_lit16 FALLBACK
- # op op_rem_int_lit16 FALLBACK
- # op op_and_int_lit16 FALLBACK
- # op op_or_int_lit16 FALLBACK
- # op op_xor_int_lit16 FALLBACK
- # op op_add_int_lit8 FALLBACK
- # op op_rsub_int_lit8 FALLBACK
- # op op_mul_int_lit8 FALLBACK
- # op op_div_int_lit8 FALLBACK
- # op op_rem_int_lit8 FALLBACK
- # op op_and_int_lit8 FALLBACK
- # op op_or_int_lit8 FALLBACK
- # op op_xor_int_lit8 FALLBACK
- # op op_shl_int_lit8 FALLBACK
- # op op_shr_int_lit8 FALLBACK
- # op op_ushr_int_lit8 FALLBACK
- # op op_iget_quick FALLBACK
- # op op_iget_wide_quick FALLBACK
- # op op_iget_object_quick FALLBACK
- # op op_iput_quick FALLBACK
- # op op_iput_wide_quick FALLBACK
- # op op_iput_object_quick FALLBACK
- # op op_invoke_virtual_quick FALLBACK
- # op op_invoke_virtual_range_quick FALLBACK
- # op op_iput_boolean_quick FALLBACK
- # op op_iput_byte_quick FALLBACK
- # op op_iput_char_quick FALLBACK
- # op op_iput_short_quick FALLBACK
- # op op_iget_boolean_quick FALLBACK
- # op op_iget_byte_quick FALLBACK
- # op op_iget_char_quick FALLBACK
- # op op_iget_short_quick FALLBACK
- # op op_unused_f3 FALLBACK
- # op op_unused_f4 FALLBACK
- # op op_unused_f5 FALLBACK
- # op op_unused_f6 FALLBACK
- # op op_unused_f7 FALLBACK
- # op op_unused_f8 FALLBACK
- # op op_unused_f9 FALLBACK
- # op op_invoke_polymorphic FALLBACK
- # op op_invoke_polymorphic_range FALLBACK
- # op op_invoke_custom FALLBACK
- # op op_invoke_custom_range FALLBACK
- # op op_const_method_handle FALLBACK
- # op op_const_method_type FALLBACK
-op-end
-
-# common subroutines for asm; we emit the footer before alternate
-# entry stubs, so that TBZ/TBNZ from ops can reach targets in footer
-import arm64/footer.S
-
-# source for alternate entry stub
-asm-alt-stub arm64/alt_stub.S
-
-# emit alternate entry stubs
-alt-ops
-
-# finish by closing .cfi info
-import arm64/close_cfi.S
diff --git a/runtime/interpreter/mterp/config_mips b/runtime/interpreter/mterp/config_mips
deleted file mode 100644
index d6173da..0000000
--- a/runtime/interpreter/mterp/config_mips
+++ /dev/null
@@ -1,298 +0,0 @@
-# Copyright (C) 2016 The Android Open Source Project
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-# See the License for the specific language governing permissions and
-# limitations under the License.
-
-#
-# Configuration for MIPS_32 targets.
-#
-
-handler-style computed-goto
-handler-size 128
-
-# source for alternate entry stub
-asm-alt-stub mips/alt_stub.S
-
-# file header and basic definitions
-import mips/header.S
-
-# arch-specific entry point to interpreter
-import mips/entry.S
-
-# Stub to switch to alternate interpreter
-fallback-stub mips/fallback.S
-
-# opcode list; argument to op-start is default directory
-op-start mips
- # (override example:) op op_sub_float_2addr arm-vfp
- # (fallback example:) op op_sub_float_2addr FALLBACK
-
- # op op_nop FALLBACK
- # op op_move FALLBACK
- # op op_move_from16 FALLBACK
- # op op_move_16 FALLBACK
- # op op_move_wide FALLBACK
- # op op_move_wide_from16 FALLBACK
- # op op_move_wide_16 FALLBACK
- # op op_move_object FALLBACK
- # op op_move_object_from16 FALLBACK
- # op op_move_object_16 FALLBACK
- # op op_move_result FALLBACK
- # op op_move_result_wide FALLBACK
- # op op_move_result_object FALLBACK
- # op op_move_exception FALLBACK
- # op op_return_void FALLBACK
- # op op_return FALLBACK
- # op op_return_wide FALLBACK
- # op op_return_object FALLBACK
- # op op_const_4 FALLBACK
- # op op_const_16 FALLBACK
- # op op_const FALLBACK
- # op op_const_high16 FALLBACK
- # op op_const_wide_16 FALLBACK
- # op op_const_wide_32 FALLBACK
- # op op_const_wide FALLBACK
- # op op_const_wide_high16 FALLBACK
- # op op_const_string FALLBACK
- # op op_const_string_jumbo FALLBACK
- # op op_const_class FALLBACK
- # op op_monitor_enter FALLBACK
- # op op_monitor_exit FALLBACK
- # op op_check_cast FALLBACK
- # op op_instance_of FALLBACK
- # op op_array_length FALLBACK
- # op op_new_instance FALLBACK
- # op op_new_array FALLBACK
- # op op_filled_new_array FALLBACK
- # op op_filled_new_array_range FALLBACK
- # op op_fill_array_data FALLBACK
- # op op_throw FALLBACK
- # op op_goto FALLBACK
- # op op_goto_16 FALLBACK
- # op op_goto_32 FALLBACK
- # op op_packed_switch FALLBACK
- # op op_sparse_switch FALLBACK
- # op op_cmpl_float FALLBACK
- # op op_cmpg_float FALLBACK
- # op op_cmpl_double FALLBACK
- # op op_cmpg_double FALLBACK
- # op op_cmp_long FALLBACK
- # op op_if_eq FALLBACK
- # op op_if_ne FALLBACK
- # op op_if_lt FALLBACK
- # op op_if_ge FALLBACK
- # op op_if_gt FALLBACK
- # op op_if_le FALLBACK
- # op op_if_eqz FALLBACK
- # op op_if_nez FALLBACK
- # op op_if_ltz FALLBACK
- # op op_if_gez FALLBACK
- # op op_if_gtz FALLBACK
- # op op_if_lez FALLBACK
- # op op_unused_3e FALLBACK
- # op op_unused_3f FALLBACK
- # op op_unused_40 FALLBACK
- # op op_unused_41 FALLBACK
- # op op_unused_42 FALLBACK
- # op op_unused_43 FALLBACK
- # op op_aget FALLBACK
- # op op_aget_wide FALLBACK
- # op op_aget_object FALLBACK
- # op op_aget_boolean FALLBACK
- # op op_aget_byte FALLBACK
- # op op_aget_char FALLBACK
- # op op_aget_short FALLBACK
- # op op_aput FALLBACK
- # op op_aput_wide FALLBACK
- # op op_aput_object FALLBACK
- # op op_aput_boolean FALLBACK
- # op op_aput_byte FALLBACK
- # op op_aput_char FALLBACK
- # op op_aput_short FALLBACK
- # op op_iget FALLBACK
- # op op_iget_wide FALLBACK
- # op op_iget_object FALLBACK
- # op op_iget_boolean FALLBACK
- # op op_iget_byte FALLBACK
- # op op_iget_char FALLBACK
- # op op_iget_short FALLBACK
- # op op_iput FALLBACK
- # op op_iput_wide FALLBACK
- # op op_iput_object FALLBACK
- # op op_iput_boolean FALLBACK
- # op op_iput_byte FALLBACK
- # op op_iput_char FALLBACK
- # op op_iput_short FALLBACK
- # op op_sget FALLBACK
- # op op_sget_wide FALLBACK
- # op op_sget_object FALLBACK
- # op op_sget_boolean FALLBACK
- # op op_sget_byte FALLBACK
- # op op_sget_char FALLBACK
- # op op_sget_short FALLBACK
- # op op_sput FALLBACK
- # op op_sput_wide FALLBACK
- # op op_sput_object FALLBACK
- # op op_sput_boolean FALLBACK
- # op op_sput_byte FALLBACK
- # op op_sput_char FALLBACK
- # op op_sput_short FALLBACK
- # op op_invoke_virtual FALLBACK
- # op op_invoke_super FALLBACK
- # op op_invoke_direct FALLBACK
- # op op_invoke_static FALLBACK
- # op op_invoke_interface FALLBACK
- # op op_return_void_no_barrier FALLBACK
- # op op_invoke_virtual_range FALLBACK
- # op op_invoke_super_range FALLBACK
- # op op_invoke_direct_range FALLBACK
- # op op_invoke_static_range FALLBACK
- # op op_invoke_interface_range FALLBACK
- # op op_unused_79 FALLBACK
- # op op_unused_7a FALLBACK
- # op op_neg_int FALLBACK
- # op op_not_int FALLBACK
- # op op_neg_long FALLBACK
- # op op_not_long FALLBACK
- # op op_neg_float FALLBACK
- # op op_neg_double FALLBACK
- # op op_int_to_long FALLBACK
- # op op_int_to_float FALLBACK
- # op op_int_to_double FALLBACK
- # op op_long_to_int FALLBACK
- # op op_long_to_float FALLBACK
- # op op_long_to_double FALLBACK
- # op op_float_to_int FALLBACK
- # op op_float_to_long FALLBACK
- # op op_float_to_double FALLBACK
- # op op_double_to_int FALLBACK
- # op op_double_to_long FALLBACK
- # op op_double_to_float FALLBACK
- # op op_int_to_byte FALLBACK
- # op op_int_to_char FALLBACK
- # op op_int_to_short FALLBACK
- # op op_add_int FALLBACK
- # op op_sub_int FALLBACK
- # op op_mul_int FALLBACK
- # op op_div_int FALLBACK
- # op op_rem_int FALLBACK
- # op op_and_int FALLBACK
- # op op_or_int FALLBACK
- # op op_xor_int FALLBACK
- # op op_shl_int FALLBACK
- # op op_shr_int FALLBACK
- # op op_ushr_int FALLBACK
- # op op_add_long FALLBACK
- # op op_sub_long FALLBACK
- # op op_mul_long FALLBACK
- # op op_div_long FALLBACK
- # op op_rem_long FALLBACK
- # op op_and_long FALLBACK
- # op op_or_long FALLBACK
- # op op_xor_long FALLBACK
- # op op_shl_long FALLBACK
- # op op_shr_long FALLBACK
- # op op_ushr_long FALLBACK
- # op op_add_float FALLBACK
- # op op_sub_float FALLBACK
- # op op_mul_float FALLBACK
- # op op_div_float FALLBACK
- # op op_rem_float FALLBACK
- # op op_add_double FALLBACK
- # op op_sub_double FALLBACK
- # op op_mul_double FALLBACK
- # op op_div_double FALLBACK
- # op op_rem_double FALLBACK
- # op op_add_int_2addr FALLBACK
- # op op_sub_int_2addr FALLBACK
- # op op_mul_int_2addr FALLBACK
- # op op_div_int_2addr FALLBACK
- # op op_rem_int_2addr FALLBACK
- # op op_and_int_2addr FALLBACK
- # op op_or_int_2addr FALLBACK
- # op op_xor_int_2addr FALLBACK
- # op op_shl_int_2addr FALLBACK
- # op op_shr_int_2addr FALLBACK
- # op op_ushr_int_2addr FALLBACK
- # op op_add_long_2addr FALLBACK
- # op op_sub_long_2addr FALLBACK
- # op op_mul_long_2addr FALLBACK
- # op op_div_long_2addr FALLBACK
- # op op_rem_long_2addr FALLBACK
- # op op_and_long_2addr FALLBACK
- # op op_or_long_2addr FALLBACK
- # op op_xor_long_2addr FALLBACK
- # op op_shl_long_2addr FALLBACK
- # op op_shr_long_2addr FALLBACK
- # op op_ushr_long_2addr FALLBACK
- # op op_add_float_2addr FALLBACK
- # op op_sub_float_2addr FALLBACK
- # op op_mul_float_2addr FALLBACK
- # op op_div_float_2addr FALLBACK
- # op op_rem_float_2addr FALLBACK
- # op op_add_double_2addr FALLBACK
- # op op_sub_double_2addr FALLBACK
- # op op_mul_double_2addr FALLBACK
- # op op_div_double_2addr FALLBACK
- # op op_rem_double_2addr FALLBACK
- # op op_add_int_lit16 FALLBACK
- # op op_rsub_int FALLBACK
- # op op_mul_int_lit16 FALLBACK
- # op op_div_int_lit16 FALLBACK
- # op op_rem_int_lit16 FALLBACK
- # op op_and_int_lit16 FALLBACK
- # op op_or_int_lit16 FALLBACK
- # op op_xor_int_lit16 FALLBACK
- # op op_add_int_lit8 FALLBACK
- # op op_rsub_int_lit8 FALLBACK
- # op op_mul_int_lit8 FALLBACK
- # op op_div_int_lit8 FALLBACK
- # op op_rem_int_lit8 FALLBACK
- # op op_and_int_lit8 FALLBACK
- # op op_or_int_lit8 FALLBACK
- # op op_xor_int_lit8 FALLBACK
- # op op_shl_int_lit8 FALLBACK
- # op op_shr_int_lit8 FALLBACK
- # op op_ushr_int_lit8 FALLBACK
- # op op_iget_quick FALLBACK
- # op op_iget_wide_quick FALLBACK
- # op op_iget_object_quick FALLBACK
- # op op_iput_quick FALLBACK
- # op op_iput_wide_quick FALLBACK
- # op op_iput_object_quick FALLBACK
- # op op_invoke_virtual_quick FALLBACK
- # op op_invoke_virtual_range_quick FALLBACK
- # op op_iput_boolean_quick FALLBACK
- # op op_iput_byte_quick FALLBACK
- # op op_iput_char_quick FALLBACK
- # op op_iput_short_quick FALLBACK
- # op op_iget_boolean_quick FALLBACK
- # op op_iget_byte_quick FALLBACK
- # op op_iget_char_quick FALLBACK
- # op op_iget_short_quick FALLBACK
- # op op_unused_f3 FALLBACK
- # op op_unused_f4 FALLBACK
- # op op_unused_f5 FALLBACK
- # op op_unused_f6 FALLBACK
- # op op_unused_f7 FALLBACK
- # op op_unused_f8 FALLBACK
- # op op_unused_f9 FALLBACK
- # op op_invoke_polymorphic FALLBACK
- # op op_invoke_polymorphic_range FALLBACK
- # op op_invoke_custom FALLBACK
- # op op_invoke_custom_range FALLBACK
- # op op_const_method_handle FALLBACK
- # op op_const_method_type FALLBACK
-op-end
-
-# common subroutines for asm
-import mips/footer.S
diff --git a/runtime/interpreter/mterp/config_mips64 b/runtime/interpreter/mterp/config_mips64
deleted file mode 100644
index a9bf362..0000000
--- a/runtime/interpreter/mterp/config_mips64
+++ /dev/null
@@ -1,298 +0,0 @@
-# Copyright (C) 2015 The Android Open Source Project
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-# See the License for the specific language governing permissions and
-# limitations under the License.
-
-#
-# Configuration for MIPS_64
-#
-
-handler-style computed-goto
-handler-size 128
-
-# source for alternate entry stub
-asm-alt-stub mips64/alt_stub.S
-
-# file header and basic definitions
-import mips64/header.S
-
-# arch-specific entry point to interpreter
-import mips64/entry.S
-
-# Stub to switch to alternate interpreter
-fallback-stub mips64/fallback.S
-
-# opcode list; argument to op-start is default directory
-op-start mips64
- # (override example:) op OP_SUB_FLOAT_2ADDR arm-vfp
- # (fallback example:) op OP_SUB_FLOAT_2ADDR FALLBACK
-
- # op op_nop FALLBACK
- # op op_move FALLBACK
- # op op_move_from16 FALLBACK
- # op op_move_16 FALLBACK
- # op op_move_wide FALLBACK
- # op op_move_wide_from16 FALLBACK
- # op op_move_wide_16 FALLBACK
- # op op_move_object FALLBACK
- # op op_move_object_from16 FALLBACK
- # op op_move_object_16 FALLBACK
- # op op_move_result FALLBACK
- # op op_move_result_wide FALLBACK
- # op op_move_result_object FALLBACK
- # op op_move_exception FALLBACK
- # op op_return_void FALLBACK
- # op op_return FALLBACK
- # op op_return_wide FALLBACK
- # op op_return_object FALLBACK
- # op op_const_4 FALLBACK
- # op op_const_16 FALLBACK
- # op op_const FALLBACK
- # op op_const_high16 FALLBACK
- # op op_const_wide_16 FALLBACK
- # op op_const_wide_32 FALLBACK
- # op op_const_wide FALLBACK
- # op op_const_wide_high16 FALLBACK
- # op op_const_string FALLBACK
- # op op_const_string_jumbo FALLBACK
- # op op_const_class FALLBACK
- # op op_monitor_enter FALLBACK
- # op op_monitor_exit FALLBACK
- # op op_check_cast FALLBACK
- # op op_instance_of FALLBACK
- # op op_array_length FALLBACK
- # op op_new_instance FALLBACK
- # op op_new_array FALLBACK
- # op op_filled_new_array FALLBACK
- # op op_filled_new_array_range FALLBACK
- # op op_fill_array_data FALLBACK
- # op op_throw FALLBACK
- # op op_goto FALLBACK
- # op op_goto_16 FALLBACK
- # op op_goto_32 FALLBACK
- # op op_packed_switch FALLBACK
- # op op_sparse_switch FALLBACK
- # op op_cmpl_float FALLBACK
- # op op_cmpg_float FALLBACK
- # op op_cmpl_double FALLBACK
- # op op_cmpg_double FALLBACK
- # op op_cmp_long FALLBACK
- # op op_if_eq FALLBACK
- # op op_if_ne FALLBACK
- # op op_if_lt FALLBACK
- # op op_if_ge FALLBACK
- # op op_if_gt FALLBACK
- # op op_if_le FALLBACK
- # op op_if_eqz FALLBACK
- # op op_if_nez FALLBACK
- # op op_if_ltz FALLBACK
- # op op_if_gez FALLBACK
- # op op_if_gtz FALLBACK
- # op op_if_lez FALLBACK
- # op op_unused_3e FALLBACK
- # op op_unused_3f FALLBACK
- # op op_unused_40 FALLBACK
- # op op_unused_41 FALLBACK
- # op op_unused_42 FALLBACK
- # op op_unused_43 FALLBACK
- # op op_aget FALLBACK
- # op op_aget_wide FALLBACK
- # op op_aget_object FALLBACK
- # op op_aget_boolean FALLBACK
- # op op_aget_byte FALLBACK
- # op op_aget_char FALLBACK
- # op op_aget_short FALLBACK
- # op op_aput FALLBACK
- # op op_aput_wide FALLBACK
- # op op_aput_object FALLBACK
- # op op_aput_boolean FALLBACK
- # op op_aput_byte FALLBACK
- # op op_aput_char FALLBACK
- # op op_aput_short FALLBACK
- # op op_iget FALLBACK
- # op op_iget_wide FALLBACK
- # op op_iget_object FALLBACK
- # op op_iget_boolean FALLBACK
- # op op_iget_byte FALLBACK
- # op op_iget_char FALLBACK
- # op op_iget_short FALLBACK
- # op op_iput FALLBACK
- # op op_iput_wide FALLBACK
- # op op_iput_object FALLBACK
- # op op_iput_boolean FALLBACK
- # op op_iput_byte FALLBACK
- # op op_iput_char FALLBACK
- # op op_iput_short FALLBACK
- # op op_sget FALLBACK
- # op op_sget_wide FALLBACK
- # op op_sget_object FALLBACK
- # op op_sget_boolean FALLBACK
- # op op_sget_byte FALLBACK
- # op op_sget_char FALLBACK
- # op op_sget_short FALLBACK
- # op op_sput FALLBACK
- # op op_sput_wide FALLBACK
- # op op_sput_object FALLBACK
- # op op_sput_boolean FALLBACK
- # op op_sput_byte FALLBACK
- # op op_sput_char FALLBACK
- # op op_sput_short FALLBACK
- # op op_invoke_virtual FALLBACK
- # op op_invoke_super FALLBACK
- # op op_invoke_direct FALLBACK
- # op op_invoke_static FALLBACK
- # op op_invoke_interface FALLBACK
- # op op_return_void_no_barrier FALLBACK
- # op op_invoke_virtual_range FALLBACK
- # op op_invoke_super_range FALLBACK
- # op op_invoke_direct_range FALLBACK
- # op op_invoke_static_range FALLBACK
- # op op_invoke_interface_range FALLBACK
- # op op_unused_79 FALLBACK
- # op op_unused_7a FALLBACK
- # op op_neg_int FALLBACK
- # op op_not_int FALLBACK
- # op op_neg_long FALLBACK
- # op op_not_long FALLBACK
- # op op_neg_float FALLBACK
- # op op_neg_double FALLBACK
- # op op_int_to_long FALLBACK
- # op op_int_to_float FALLBACK
- # op op_int_to_double FALLBACK
- # op op_long_to_int FALLBACK
- # op op_long_to_float FALLBACK
- # op op_long_to_double FALLBACK
- # op op_float_to_int FALLBACK
- # op op_float_to_long FALLBACK
- # op op_float_to_double FALLBACK
- # op op_double_to_int FALLBACK
- # op op_double_to_long FALLBACK
- # op op_double_to_float FALLBACK
- # op op_int_to_byte FALLBACK
- # op op_int_to_char FALLBACK
- # op op_int_to_short FALLBACK
- # op op_add_int FALLBACK
- # op op_sub_int FALLBACK
- # op op_mul_int FALLBACK
- # op op_div_int FALLBACK
- # op op_rem_int FALLBACK
- # op op_and_int FALLBACK
- # op op_or_int FALLBACK
- # op op_xor_int FALLBACK
- # op op_shl_int FALLBACK
- # op op_shr_int FALLBACK
- # op op_ushr_int FALLBACK
- # op op_add_long FALLBACK
- # op op_sub_long FALLBACK
- # op op_mul_long FALLBACK
- # op op_div_long FALLBACK
- # op op_rem_long FALLBACK
- # op op_and_long FALLBACK
- # op op_or_long FALLBACK
- # op op_xor_long FALLBACK
- # op op_shl_long FALLBACK
- # op op_shr_long FALLBACK
- # op op_ushr_long FALLBACK
- # op op_add_float FALLBACK
- # op op_sub_float FALLBACK
- # op op_mul_float FALLBACK
- # op op_div_float FALLBACK
- # op op_rem_float FALLBACK
- # op op_add_double FALLBACK
- # op op_sub_double FALLBACK
- # op op_mul_double FALLBACK
- # op op_div_double FALLBACK
- # op op_rem_double FALLBACK
- # op op_add_int_2addr FALLBACK
- # op op_sub_int_2addr FALLBACK
- # op op_mul_int_2addr FALLBACK
- # op op_div_int_2addr FALLBACK
- # op op_rem_int_2addr FALLBACK
- # op op_and_int_2addr FALLBACK
- # op op_or_int_2addr FALLBACK
- # op op_xor_int_2addr FALLBACK
- # op op_shl_int_2addr FALLBACK
- # op op_shr_int_2addr FALLBACK
- # op op_ushr_int_2addr FALLBACK
- # op op_add_long_2addr FALLBACK
- # op op_sub_long_2addr FALLBACK
- # op op_mul_long_2addr FALLBACK
- # op op_div_long_2addr FALLBACK
- # op op_rem_long_2addr FALLBACK
- # op op_and_long_2addr FALLBACK
- # op op_or_long_2addr FALLBACK
- # op op_xor_long_2addr FALLBACK
- # op op_shl_long_2addr FALLBACK
- # op op_shr_long_2addr FALLBACK
- # op op_ushr_long_2addr FALLBACK
- # op op_add_float_2addr FALLBACK
- # op op_sub_float_2addr FALLBACK
- # op op_mul_float_2addr FALLBACK
- # op op_div_float_2addr FALLBACK
- # op op_rem_float_2addr FALLBACK
- # op op_add_double_2addr FALLBACK
- # op op_sub_double_2addr FALLBACK
- # op op_mul_double_2addr FALLBACK
- # op op_div_double_2addr FALLBACK
- # op op_rem_double_2addr FALLBACK
- # op op_add_int_lit16 FALLBACK
- # op op_rsub_int FALLBACK
- # op op_mul_int_lit16 FALLBACK
- # op op_div_int_lit16 FALLBACK
- # op op_rem_int_lit16 FALLBACK
- # op op_and_int_lit16 FALLBACK
- # op op_or_int_lit16 FALLBACK
- # op op_xor_int_lit16 FALLBACK
- # op op_add_int_lit8 FALLBACK
- # op op_rsub_int_lit8 FALLBACK
- # op op_mul_int_lit8 FALLBACK
- # op op_div_int_lit8 FALLBACK
- # op op_rem_int_lit8 FALLBACK
- # op op_and_int_lit8 FALLBACK
- # op op_or_int_lit8 FALLBACK
- # op op_xor_int_lit8 FALLBACK
- # op op_shl_int_lit8 FALLBACK
- # op op_shr_int_lit8 FALLBACK
- # op op_ushr_int_lit8 FALLBACK
- # op op_iget_quick FALLBACK
- # op op_iget_wide_quick FALLBACK
- # op op_iget_object_quick FALLBACK
- # op op_iput_quick FALLBACK
- # op op_iput_wide_quick FALLBACK
- # op op_iput_object_quick FALLBACK
- # op op_invoke_virtual_quick FALLBACK
- # op op_invoke_virtual_range_quick FALLBACK
- # op op_iput_boolean_quick FALLBACK
- # op op_iput_byte_quick FALLBACK
- # op op_iput_char_quick FALLBACK
- # op op_iput_short_quick FALLBACK
- # op op_iget_boolean_quick FALLBACK
- # op op_iget_byte_quick FALLBACK
- # op op_iget_char_quick FALLBACK
- # op op_iget_short_quick FALLBACK
- # op op_unused_f3 FALLBACK
- # op op_unused_f4 FALLBACK
- # op op_unused_f5 FALLBACK
- # op op_unused_f6 FALLBACK
- # op op_unused_f7 FALLBACK
- # op op_unused_f8 FALLBACK
- # op op_unused_f9 FALLBACK
- # op op_invoke_polymorphic FALLBACK
- # op op_invoke_polymorphic_range FALLBACK
- # op op_invoke_custom FALLBACK
- # op op_invoke_custom_range FALLBACK
- # op op_const_method_handle FALLBACK
- # op op_const_method_type FALLBACK
-op-end
-
-# common subroutines for asm
-import mips64/footer.S
diff --git a/runtime/interpreter/mterp/config_x86 b/runtime/interpreter/mterp/config_x86
deleted file mode 100644
index 2417851..0000000
--- a/runtime/interpreter/mterp/config_x86
+++ /dev/null
@@ -1,302 +0,0 @@
-# Copyright (C) 2015 The Android Open Source Project
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-# See the License for the specific language governing permissions and
-# limitations under the License.
-
-#
-# Configuration for X86
-#
-
-handler-style computed-goto
-handler-size 128
-
-function-type-format FUNCTION_TYPE(%s)
-function-size-format SIZE(%s,%s)
-global-name-format SYMBOL(%s)
-
-# source for alternate entry stub
-asm-alt-stub x86/alt_stub.S
-
-# file header and basic definitions
-import x86/header.S
-
-# arch-specific entry point to interpreter
-import x86/entry.S
-
-# Stub to switch to alternate interpreter
-fallback-stub x86/fallback.S
-
-# opcode list; argument to op-start is default directory
-op-start x86
- # (override example:) op OP_SUB_FLOAT_2ADDR arm-vfp
- # (fallback example:) op OP_SUB_FLOAT_2ADDR FALLBACK
-
- # op op_nop FALLBACK
- # op op_move FALLBACK
- # op op_move_from16 FALLBACK
- # op op_move_16 FALLBACK
- # op op_move_wide FALLBACK
- # op op_move_wide_from16 FALLBACK
- # op op_move_wide_16 FALLBACK
- # op op_move_object FALLBACK
- # op op_move_object_from16 FALLBACK
- # op op_move_object_16 FALLBACK
- # op op_move_result FALLBACK
- # op op_move_result_wide FALLBACK
- # op op_move_result_object FALLBACK
- # op op_move_exception FALLBACK
- # op op_return_void FALLBACK
- # op op_return FALLBACK
- # op op_return_wide FALLBACK
- # op op_return_object FALLBACK
- # op op_const_4 FALLBACK
- # op op_const_16 FALLBACK
- # op op_const FALLBACK
- # op op_const_high16 FALLBACK
- # op op_const_wide_16 FALLBACK
- # op op_const_wide_32 FALLBACK
- # op op_const_wide FALLBACK
- # op op_const_wide_high16 FALLBACK
- # op op_const_string FALLBACK
- # op op_const_string_jumbo FALLBACK
- # op op_const_class FALLBACK
- # op op_monitor_enter FALLBACK
- # op op_monitor_exit FALLBACK
- # op op_check_cast FALLBACK
- # op op_instance_of FALLBACK
- # op op_array_length FALLBACK
- # op op_new_instance FALLBACK
- # op op_new_array FALLBACK
- # op op_filled_new_array FALLBACK
- # op op_filled_new_array_range FALLBACK
- # op op_fill_array_data FALLBACK
- # op op_throw FALLBACK
- # op op_goto FALLBACK
- # op op_goto_16 FALLBACK
- # op op_goto_32 FALLBACK
- # op op_packed_switch FALLBACK
- # op op_sparse_switch FALLBACK
- # op op_cmpl_float FALLBACK
- # op op_cmpg_float FALLBACK
- # op op_cmpl_double FALLBACK
- # op op_cmpg_double FALLBACK
- # op op_cmp_long FALLBACK
- # op op_if_eq FALLBACK
- # op op_if_ne FALLBACK
- # op op_if_lt FALLBACK
- # op op_if_ge FALLBACK
- # op op_if_gt FALLBACK
- # op op_if_le FALLBACK
- # op op_if_eqz FALLBACK
- # op op_if_nez FALLBACK
- # op op_if_ltz FALLBACK
- # op op_if_gez FALLBACK
- # op op_if_gtz FALLBACK
- # op op_if_lez FALLBACK
- # op op_unused_3e FALLBACK
- # op op_unused_3f FALLBACK
- # op op_unused_40 FALLBACK
- # op op_unused_41 FALLBACK
- # op op_unused_42 FALLBACK
- # op op_unused_43 FALLBACK
- # op op_aget FALLBACK
- # op op_aget_wide FALLBACK
- # op op_aget_object FALLBACK
- # op op_aget_boolean FALLBACK
- # op op_aget_byte FALLBACK
- # op op_aget_char FALLBACK
- # op op_aget_short FALLBACK
- # op op_aput FALLBACK
- # op op_aput_wide FALLBACK
- # op op_aput_object FALLBACK
- # op op_aput_boolean FALLBACK
- # op op_aput_byte FALLBACK
- # op op_aput_char FALLBACK
- # op op_aput_short FALLBACK
- # op op_iget FALLBACK
- # op op_iget_wide FALLBACK
- # op op_iget_object FALLBACK
- # op op_iget_boolean FALLBACK
- # op op_iget_byte FALLBACK
- # op op_iget_char FALLBACK
- # op op_iget_short FALLBACK
- # op op_iput FALLBACK
- # op op_iput_wide FALLBACK
- # op op_iput_object FALLBACK
- # op op_iput_boolean FALLBACK
- # op op_iput_byte FALLBACK
- # op op_iput_char FALLBACK
- # op op_iput_short FALLBACK
- # op op_sget FALLBACK
- # op op_sget_wide FALLBACK
- # op op_sget_object FALLBACK
- # op op_sget_boolean FALLBACK
- # op op_sget_byte FALLBACK
- # op op_sget_char FALLBACK
- # op op_sget_short FALLBACK
- # op op_sput FALLBACK
- # op op_sput_wide FALLBACK
- # op op_sput_object FALLBACK
- # op op_sput_boolean FALLBACK
- # op op_sput_byte FALLBACK
- # op op_sput_char FALLBACK
- # op op_sput_short FALLBACK
- # op op_invoke_virtual FALLBACK
- # op op_invoke_super FALLBACK
- # op op_invoke_direct FALLBACK
- # op op_invoke_static FALLBACK
- # op op_invoke_interface FALLBACK
- # op op_return_void_no_barrier FALLBACK
- # op op_invoke_virtual_range FALLBACK
- # op op_invoke_super_range FALLBACK
- # op op_invoke_direct_range FALLBACK
- # op op_invoke_static_range FALLBACK
- # op op_invoke_interface_range FALLBACK
- # op op_unused_79 FALLBACK
- # op op_unused_7a FALLBACK
- # op op_neg_int FALLBACK
- # op op_not_int FALLBACK
- # op op_neg_long FALLBACK
- # op op_not_long FALLBACK
- # op op_neg_float FALLBACK
- # op op_neg_double FALLBACK
- # op op_int_to_long FALLBACK
- # op op_int_to_float FALLBACK
- # op op_int_to_double FALLBACK
- # op op_long_to_int FALLBACK
- # op op_long_to_float FALLBACK
- # op op_long_to_double FALLBACK
- # op op_float_to_int FALLBACK
- # op op_float_to_long FALLBACK
- # op op_float_to_double FALLBACK
- # op op_double_to_int FALLBACK
- # op op_double_to_long FALLBACK
- # op op_double_to_float FALLBACK
- # op op_int_to_byte FALLBACK
- # op op_int_to_char FALLBACK
- # op op_int_to_short FALLBACK
- # op op_add_int FALLBACK
- # op op_sub_int FALLBACK
- # op op_mul_int FALLBACK
- # op op_div_int FALLBACK
- # op op_rem_int FALLBACK
- # op op_and_int FALLBACK
- # op op_or_int FALLBACK
- # op op_xor_int FALLBACK
- # op op_shl_int FALLBACK
- # op op_shr_int FALLBACK
- # op op_ushr_int FALLBACK
- # op op_add_long FALLBACK
- # op op_sub_long FALLBACK
- # op op_mul_long FALLBACK
- # op op_div_long FALLBACK
- # op op_rem_long FALLBACK
- # op op_and_long FALLBACK
- # op op_or_long FALLBACK
- # op op_xor_long FALLBACK
- # op op_shl_long FALLBACK
- # op op_shr_long FALLBACK
- # op op_ushr_long FALLBACK
- # op op_add_float FALLBACK
- # op op_sub_float FALLBACK
- # op op_mul_float FALLBACK
- # op op_div_float FALLBACK
- # op op_rem_float FALLBACK
- # op op_add_double FALLBACK
- # op op_sub_double FALLBACK
- # op op_mul_double FALLBACK
- # op op_div_double FALLBACK
- # op op_rem_double FALLBACK
- # op op_add_int_2addr FALLBACK
- # op op_sub_int_2addr FALLBACK
- # op op_mul_int_2addr FALLBACK
- # op op_div_int_2addr FALLBACK
- # op op_rem_int_2addr FALLBACK
- # op op_and_int_2addr FALLBACK
- # op op_or_int_2addr FALLBACK
- # op op_xor_int_2addr FALLBACK
- # op op_shl_int_2addr FALLBACK
- # op op_shr_int_2addr FALLBACK
- # op op_ushr_int_2addr FALLBACK
- # op op_add_long_2addr FALLBACK
- # op op_sub_long_2addr FALLBACK
- # op op_mul_long_2addr FALLBACK
- # op op_div_long_2addr FALLBACK
- # op op_rem_long_2addr FALLBACK
- # op op_and_long_2addr FALLBACK
- # op op_or_long_2addr FALLBACK
- # op op_xor_long_2addr FALLBACK
- # op op_shl_long_2addr FALLBACK
- # op op_shr_long_2addr FALLBACK
- # op op_ushr_long_2addr FALLBACK
- # op op_add_float_2addr FALLBACK
- # op op_sub_float_2addr FALLBACK
- # op op_mul_float_2addr FALLBACK
- # op op_div_float_2addr FALLBACK
- # op op_rem_float_2addr FALLBACK
- # op op_add_double_2addr FALLBACK
- # op op_sub_double_2addr FALLBACK
- # op op_mul_double_2addr FALLBACK
- # op op_div_double_2addr FALLBACK
- # op op_rem_double_2addr FALLBACK
- # op op_add_int_lit16 FALLBACK
- # op op_rsub_int FALLBACK
- # op op_mul_int_lit16 FALLBACK
- # op op_div_int_lit16 FALLBACK
- # op op_rem_int_lit16 FALLBACK
- # op op_and_int_lit16 FALLBACK
- # op op_or_int_lit16 FALLBACK
- # op op_xor_int_lit16 FALLBACK
- # op op_add_int_lit8 FALLBACK
- # op op_rsub_int_lit8 FALLBACK
- # op op_mul_int_lit8 FALLBACK
- # op op_div_int_lit8 FALLBACK
- # op op_rem_int_lit8 FALLBACK
- # op op_and_int_lit8 FALLBACK
- # op op_or_int_lit8 FALLBACK
- # op op_xor_int_lit8 FALLBACK
- # op op_shl_int_lit8 FALLBACK
- # op op_shr_int_lit8 FALLBACK
- # op op_ushr_int_lit8 FALLBACK
- # op op_iget_quick FALLBACK
- # op op_iget_wide_quick FALLBACK
- # op op_iget_object_quick FALLBACK
- # op op_iput_quick FALLBACK
- # op op_iput_wide_quick FALLBACK
- # op op_iput_object_quick FALLBACK
- # op op_invoke_virtual_quick FALLBACK
- # op op_invoke_virtual_range_quick FALLBACK
- # op op_iput_boolean_quick FALLBACK
- # op op_iput_byte_quick FALLBACK
- # op op_iput_char_quick FALLBACK
- # op op_iput_short_quick FALLBACK
- # op op_iget_boolean_quick FALLBACK
- # op op_iget_byte_quick FALLBACK
- # op op_iget_char_quick FALLBACK
- # op op_iget_short_quick FALLBACK
- # op op_unused_f3 FALLBACK
- # op op_unused_f4 FALLBACK
- # op op_unused_f5 FALLBACK
- # op op_unused_f6 FALLBACK
- # op op_unused_f7 FALLBACK
- # op op_unused_f8 FALLBACK
- # op op_unused_f9 FALLBACK
- # op op_invoke_polymorphic FALLBACK
- # op op_invoke_polymorphic_range FALLBACK
- # op op_invoke_custom FALLBACK
- # op op_invoke_custom_range FALLBACK
- # op op_const_method_handle FALLBACK
- # op op_const_method_type FALLBACK
-op-end
-
-# common subroutines for asm
-import x86/footer.S
diff --git a/runtime/interpreter/mterp/config_x86_64 b/runtime/interpreter/mterp/config_x86_64
deleted file mode 100644
index 89fbf43..0000000
--- a/runtime/interpreter/mterp/config_x86_64
+++ /dev/null
@@ -1,302 +0,0 @@
-# Copyright (C) 2015 The Android Open Source Project
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-# See the License for the specific language governing permissions and
-# limitations under the License.
-
-#
-# Configuration for X86_64
-#
-
-handler-style computed-goto
-handler-size 128
-
-function-type-format FUNCTION_TYPE(%s)
-function-size-format SIZE(%s,%s)
-global-name-format SYMBOL(%s)
-
-# source for alternate entry stub
-asm-alt-stub x86_64/alt_stub.S
-
-# file header and basic definitions
-import x86_64/header.S
-
-# arch-specific entry point to interpreter
-import x86_64/entry.S
-
-# Stub to switch to alternate interpreter
-fallback-stub x86_64/fallback.S
-
-# opcode list; argument to op-start is default directory
-op-start x86_64
- # (override example:) op OP_SUB_FLOAT_2ADDR arm-vfp
- # (fallback example:) op OP_SUB_FLOAT_2ADDR FALLBACK
-
- # op op_nop FALLBACK
- # op op_move FALLBACK
- # op op_move_from16 FALLBACK
- # op op_move_16 FALLBACK
- # op op_move_wide FALLBACK
- # op op_move_wide_from16 FALLBACK
- # op op_move_wide_16 FALLBACK
- # op op_move_object FALLBACK
- # op op_move_object_from16 FALLBACK
- # op op_move_object_16 FALLBACK
- # op op_move_result FALLBACK
- # op op_move_result_wide FALLBACK
- # op op_move_result_object FALLBACK
- # op op_move_exception FALLBACK
- # op op_return_void FALLBACK
- # op op_return FALLBACK
- # op op_return_wide FALLBACK
- # op op_return_object FALLBACK
- # op op_const_4 FALLBACK
- # op op_const_16 FALLBACK
- # op op_const FALLBACK
- # op op_const_high16 FALLBACK
- # op op_const_wide_16 FALLBACK
- # op op_const_wide_32 FALLBACK
- # op op_const_wide FALLBACK
- # op op_const_wide_high16 FALLBACK
- # op op_const_string FALLBACK
- # op op_const_string_jumbo FALLBACK
- # op op_const_class FALLBACK
- # op op_monitor_enter FALLBACK
- # op op_monitor_exit FALLBACK
- # op op_check_cast FALLBACK
- # op op_instance_of FALLBACK
- # op op_array_length FALLBACK
- # op op_new_instance FALLBACK
- # op op_new_array FALLBACK
- # op op_filled_new_array FALLBACK
- # op op_filled_new_array_range FALLBACK
- # op op_fill_array_data FALLBACK
- # op op_throw FALLBACK
- # op op_goto FALLBACK
- # op op_goto_16 FALLBACK
- # op op_goto_32 FALLBACK
- # op op_packed_switch FALLBACK
- # op op_sparse_switch FALLBACK
- # op op_cmpl_float FALLBACK
- # op op_cmpg_float FALLBACK
- # op op_cmpl_double FALLBACK
- # op op_cmpg_double FALLBACK
- # op op_cmp_long FALLBACK
- # op op_if_eq FALLBACK
- # op op_if_ne FALLBACK
- # op op_if_lt FALLBACK
- # op op_if_ge FALLBACK
- # op op_if_gt FALLBACK
- # op op_if_le FALLBACK
- # op op_if_eqz FALLBACK
- # op op_if_nez FALLBACK
- # op op_if_ltz FALLBACK
- # op op_if_gez FALLBACK
- # op op_if_gtz FALLBACK
- # op op_if_lez FALLBACK
- # op op_unused_3e FALLBACK
- # op op_unused_3f FALLBACK
- # op op_unused_40 FALLBACK
- # op op_unused_41 FALLBACK
- # op op_unused_42 FALLBACK
- # op op_unused_43 FALLBACK
- # op op_aget FALLBACK
- # op op_aget_wide FALLBACK
- # op op_aget_object FALLBACK
- # op op_aget_boolean FALLBACK
- # op op_aget_byte FALLBACK
- # op op_aget_char FALLBACK
- # op op_aget_short FALLBACK
- # op op_aput FALLBACK
- # op op_aput_wide FALLBACK
- # op op_aput_object FALLBACK
- # op op_aput_boolean FALLBACK
- # op op_aput_byte FALLBACK
- # op op_aput_char FALLBACK
- # op op_aput_short FALLBACK
- # op op_iget FALLBACK
- # op op_iget_wide FALLBACK
- # op op_iget_object FALLBACK
- # op op_iget_boolean FALLBACK
- # op op_iget_byte FALLBACK
- # op op_iget_char FALLBACK
- # op op_iget_short FALLBACK
- # op op_iput FALLBACK
- # op op_iput_wide FALLBACK
- # op op_iput_object FALLBACK
- # op op_iput_boolean FALLBACK
- # op op_iput_byte FALLBACK
- # op op_iput_char FALLBACK
- # op op_iput_short FALLBACK
- # op op_sget FALLBACK
- # op op_sget_wide FALLBACK
- # op op_sget_object FALLBACK
- # op op_sget_boolean FALLBACK
- # op op_sget_byte FALLBACK
- # op op_sget_char FALLBACK
- # op op_sget_short FALLBACK
- # op op_sput FALLBACK
- # op op_sput_wide FALLBACK
- # op op_sput_object FALLBACK
- # op op_sput_boolean FALLBACK
- # op op_sput_byte FALLBACK
- # op op_sput_char FALLBACK
- # op op_sput_short FALLBACK
- # op op_invoke_virtual FALLBACK
- # op op_invoke_super FALLBACK
- # op op_invoke_direct FALLBACK
- # op op_invoke_static FALLBACK
- # op op_invoke_interface FALLBACK
- # op op_return_void_no_barrier FALLBACK
- # op op_invoke_virtual_range FALLBACK
- # op op_invoke_super_range FALLBACK
- # op op_invoke_direct_range FALLBACK
- # op op_invoke_static_range FALLBACK
- # op op_invoke_interface_range FALLBACK
- # op op_unused_79 FALLBACK
- # op op_unused_7a FALLBACK
- # op op_neg_int FALLBACK
- # op op_not_int FALLBACK
- # op op_neg_long FALLBACK
- # op op_not_long FALLBACK
- # op op_neg_float FALLBACK
- # op op_neg_double FALLBACK
- # op op_int_to_long FALLBACK
- # op op_int_to_float FALLBACK
- # op op_int_to_double FALLBACK
- # op op_long_to_int FALLBACK
- # op op_long_to_float FALLBACK
- # op op_long_to_double FALLBACK
- # op op_float_to_int FALLBACK
- # op op_float_to_long FALLBACK
- # op op_float_to_double FALLBACK
- # op op_double_to_int FALLBACK
- # op op_double_to_long FALLBACK
- # op op_double_to_float FALLBACK
- # op op_int_to_byte FALLBACK
- # op op_int_to_char FALLBACK
- # op op_int_to_short FALLBACK
- # op op_add_int FALLBACK
- # op op_sub_int FALLBACK
- # op op_mul_int FALLBACK
- # op op_div_int FALLBACK
- # op op_rem_int FALLBACK
- # op op_and_int FALLBACK
- # op op_or_int FALLBACK
- # op op_xor_int FALLBACK
- # op op_shl_int FALLBACK
- # op op_shr_int FALLBACK
- # op op_ushr_int FALLBACK
- # op op_add_long FALLBACK
- # op op_sub_long FALLBACK
- # op op_mul_long FALLBACK
- # op op_div_long FALLBACK
- # op op_rem_long FALLBACK
- # op op_and_long FALLBACK
- # op op_or_long FALLBACK
- # op op_xor_long FALLBACK
- # op op_shl_long FALLBACK
- # op op_shr_long FALLBACK
- # op op_ushr_long FALLBACK
- # op op_add_float FALLBACK
- # op op_sub_float FALLBACK
- # op op_mul_float FALLBACK
- # op op_div_float FALLBACK
- # op op_rem_float FALLBACK
- # op op_add_double FALLBACK
- # op op_sub_double FALLBACK
- # op op_mul_double FALLBACK
- # op op_div_double FALLBACK
- # op op_rem_double FALLBACK
- # op op_add_int_2addr FALLBACK
- # op op_sub_int_2addr FALLBACK
- # op op_mul_int_2addr FALLBACK
- # op op_div_int_2addr FALLBACK
- # op op_rem_int_2addr FALLBACK
- # op op_and_int_2addr FALLBACK
- # op op_or_int_2addr FALLBACK
- # op op_xor_int_2addr FALLBACK
- # op op_shl_int_2addr FALLBACK
- # op op_shr_int_2addr FALLBACK
- # op op_ushr_int_2addr FALLBACK
- # op op_add_long_2addr FALLBACK
- # op op_sub_long_2addr FALLBACK
- # op op_mul_long_2addr FALLBACK
- # op op_div_long_2addr FALLBACK
- # op op_rem_long_2addr FALLBACK
- # op op_and_long_2addr FALLBACK
- # op op_or_long_2addr FALLBACK
- # op op_xor_long_2addr FALLBACK
- # op op_shl_long_2addr FALLBACK
- # op op_shr_long_2addr FALLBACK
- # op op_ushr_long_2addr FALLBACK
- # op op_add_float_2addr FALLBACK
- # op op_sub_float_2addr FALLBACK
- # op op_mul_float_2addr FALLBACK
- # op op_div_float_2addr FALLBACK
- # op op_rem_float_2addr FALLBACK
- # op op_add_double_2addr FALLBACK
- # op op_sub_double_2addr FALLBACK
- # op op_mul_double_2addr FALLBACK
- # op op_div_double_2addr FALLBACK
- # op op_rem_double_2addr FALLBACK
- # op op_add_int_lit16 FALLBACK
- # op op_rsub_int FALLBACK
- # op op_mul_int_lit16 FALLBACK
- # op op_div_int_lit16 FALLBACK
- # op op_rem_int_lit16 FALLBACK
- # op op_and_int_lit16 FALLBACK
- # op op_or_int_lit16 FALLBACK
- # op op_xor_int_lit16 FALLBACK
- # op op_add_int_lit8 FALLBACK
- # op op_rsub_int_lit8 FALLBACK
- # op op_mul_int_lit8 FALLBACK
- # op op_div_int_lit8 FALLBACK
- # op op_rem_int_lit8 FALLBACK
- # op op_and_int_lit8 FALLBACK
- # op op_or_int_lit8 FALLBACK
- # op op_xor_int_lit8 FALLBACK
- # op op_shl_int_lit8 FALLBACK
- # op op_shr_int_lit8 FALLBACK
- # op op_ushr_int_lit8 FALLBACK
- # op op_iget_quick FALLBACK
- # op op_iget_wide_quick FALLBACK
- # op op_iget_object_quick FALLBACK
- # op op_iput_quick FALLBACK
- # op op_iput_wide_quick FALLBACK
- # op op_iput_object_quick FALLBACK
- # op op_invoke_virtual_quick FALLBACK
- # op op_invoke_virtual_range_quick FALLBACK
- # op op_iput_boolean_quick FALLBACK
- # op op_iput_byte_quick FALLBACK
- # op op_iput_char_quick FALLBACK
- # op op_iput_short_quick FALLBACK
- # op op_iget_boolean_quick FALLBACK
- # op op_iget_byte_quick FALLBACK
- # op op_iget_char_quick FALLBACK
- # op op_iget_short_quick FALLBACK
- # op op_unused_f3 FALLBACK
- # op op_unused_f4 FALLBACK
- # op op_unused_f5 FALLBACK
- # op op_unused_f6 FALLBACK
- # op op_unused_f7 FALLBACK
- # op op_unused_f8 FALLBACK
- # op op_unused_f9 FALLBACK
- # op op_invoke_polymorphic FALLBACK
- # op op_invoke_polymorphic_range FALLBACK
- # op op_invoke_custom FALLBACK
- # op op_invoke_custom_range FALLBACK
- # op op_const_method_handle FALLBACK
- # op op_const_method_type FALLBACK
-op-end
-
-# common subroutines for asm
-import x86_64/footer.S
diff --git a/runtime/interpreter/mterp/gen_mterp.py b/runtime/interpreter/mterp/gen_mterp.py
index 75c5174..cf69bce 100755
--- a/runtime/interpreter/mterp/gen_mterp.py
+++ b/runtime/interpreter/mterp/gen_mterp.py
@@ -14,605 +14,108 @@
# See the License for the specific language governing permissions and
# limitations under the License.
-#
-# Using instructions from an architecture-specific config file, generate C
-# and assembly source files for the Dalvik interpreter.
-#
+import sys, re
+from os import listdir
+from cStringIO import StringIO
-import sys, string, re, time
-from string import Template
+# This file is included verbatim at the start of the in-memory python script.
+SCRIPT_SETUP_CODE = "common/gen_setup.py"
-interp_defs_file = "../../../libdexfile/dex/dex_instruction_list.h" # need opcode list
-kNumPackedOpcodes = 256
+INTERP_DEFS_FILE = "../../../libdexfile/dex/dex_instruction_list.h" # need opcode list
+NUM_PACKED_OPCODES = 256
-splitops = False
-verbose = False
-handler_size_bits = -1000
-handler_size_bytes = -1000
-in_op_start = 0 # 0=not started, 1=started, 2=ended
-in_alt_op_start = 0 # 0=not started, 1=started, 2=ended
-default_op_dir = None
-default_alt_stub = None
-opcode_locations = {}
-alt_opcode_locations = {}
-asm_stub_text = []
-fallback_stub_text = []
-label_prefix = ".L" # use ".L" to hide labels from gdb
-alt_label_prefix = ".L_ALT" # use ".L" to hide labels from gdb
-style = None # interpreter style
-generate_alt_table = False
-function_type_format = ".type %s, %%function"
-function_size_format = ".size %s, .-%s"
-global_name_format = "%s"
-
-# Exception class.
-class DataParseError(SyntaxError):
- "Failure when parsing data file"
-
-#
-# Set any omnipresent substitution values.
-#
-def getGlobalSubDict():
- return { "handler_size_bits":handler_size_bits,
- "handler_size_bytes":handler_size_bytes }
-
-#
-# Parse arch config file --
-# Set interpreter style.
-#
-def setHandlerStyle(tokens):
- global style
- if len(tokens) != 2:
- raise DataParseError("handler-style requires one argument")
- style = tokens[1]
- if style != "computed-goto":
- raise DataParseError("handler-style (%s) invalid" % style)
-
-#
-# Parse arch config file --
-# Set handler_size_bytes to the value of tokens[1], and handler_size_bits to
-# log2(handler_size_bytes). Throws an exception if "bytes" is not 0 or
-# a power of two.
-#
-def setHandlerSize(tokens):
- global handler_size_bits, handler_size_bytes
- if style != "computed-goto":
- print "Warning: handler-size valid only for computed-goto interpreters"
- if len(tokens) != 2:
- raise DataParseError("handler-size requires one argument")
- if handler_size_bits != -1000:
- raise DataParseError("handler-size may only be set once")
-
- # compute log2(n), and make sure n is 0 or a power of 2
- handler_size_bytes = bytes = int(tokens[1])
- bits = -1
- while bytes > 0:
- bytes //= 2 # halve with truncating division
- bits += 1
-
- if handler_size_bytes == 0 or handler_size_bytes != (1 << bits):
- raise DataParseError("handler-size (%d) must be power of 2" \
- % orig_bytes)
- handler_size_bits = bits
-
-#
-# Parse arch config file --
-# Copy a file in to asm output file.
-#
-def importFile(tokens):
- if len(tokens) != 2:
- raise DataParseError("import requires one argument")
- source = tokens[1]
- if source.endswith(".S"):
- appendSourceFile(tokens[1], getGlobalSubDict(), asm_fp, None)
- else:
- raise DataParseError("don't know how to import %s (expecting .cpp/.S)"
- % source)
-
-#
-# Parse arch config file --
-# Copy a file in to the C or asm output file.
-#
-def setAsmStub(tokens):
- global asm_stub_text
- if len(tokens) != 2:
- raise DataParseError("import requires one argument")
- try:
- stub_fp = open(tokens[1])
- asm_stub_text = stub_fp.readlines()
- except IOError, err:
- stub_fp.close()
- raise DataParseError("unable to load asm-stub: %s" % str(err))
- stub_fp.close()
-
-#
-# Parse arch config file --
-# Copy a file in to the C or asm output file.
-#
-def setFallbackStub(tokens):
- global fallback_stub_text
- if len(tokens) != 2:
- raise DataParseError("import requires one argument")
- try:
- stub_fp = open(tokens[1])
- fallback_stub_text = stub_fp.readlines()
- except IOError, err:
- stub_fp.close()
- raise DataParseError("unable to load fallback-stub: %s" % str(err))
- stub_fp.close()
-#
-# Parse arch config file --
-# Record location of default alt stub
-#
-def setAsmAltStub(tokens):
- global default_alt_stub, generate_alt_table
- if len(tokens) != 2:
- raise DataParseError("import requires one argument")
- default_alt_stub = tokens[1]
- generate_alt_table = True
-#
-# Change the default function type format
-#
-def setFunctionTypeFormat(tokens):
- global function_type_format
- function_type_format = tokens[1]
-#
-# Change the default function size format
-#
-def setFunctionSizeFormat(tokens):
- global function_size_format
- function_size_format = tokens[1]
-#
-# Change the global name format
-#
-def setGlobalNameFormat(tokens):
- global global_name_format
- global_name_format = tokens[1]
-#
-# Parse arch config file --
-# Start of opcode list.
-#
-def opStart(tokens):
- global in_op_start
- global default_op_dir
- if len(tokens) != 2:
- raise DataParseError("opStart takes a directory name argument")
- if in_op_start != 0:
- raise DataParseError("opStart can only be specified once")
- default_op_dir = tokens[1]
- in_op_start = 1
-
-#
-# Parse arch config file --
-# Set location of a single alt opcode's source file.
-#
-def altEntry(tokens):
- global generate_alt_table
- if len(tokens) != 3:
- raise DataParseError("alt requires exactly two arguments")
- if in_op_start != 1:
- raise DataParseError("alt statements must be between opStart/opEnd")
- try:
- index = opcodes.index(tokens[1])
- except ValueError:
- raise DataParseError("unknown opcode %s" % tokens[1])
- if alt_opcode_locations.has_key(tokens[1]):
- print "Note: alt overrides earlier %s (%s -> %s)" \
- % (tokens[1], alt_opcode_locations[tokens[1]], tokens[2])
- alt_opcode_locations[tokens[1]] = tokens[2]
- generate_alt_table = True
-
-#
-# Parse arch config file --
-# Set location of a single opcode's source file.
-#
-def opEntry(tokens):
- #global opcode_locations
- if len(tokens) != 3:
- raise DataParseError("op requires exactly two arguments")
- if in_op_start != 1:
- raise DataParseError("op statements must be between opStart/opEnd")
- try:
- index = opcodes.index(tokens[1])
- except ValueError:
- raise DataParseError("unknown opcode %s" % tokens[1])
- if opcode_locations.has_key(tokens[1]):
- print "Note: op overrides earlier %s (%s -> %s)" \
- % (tokens[1], opcode_locations[tokens[1]], tokens[2])
- opcode_locations[tokens[1]] = tokens[2]
-
-#
-# Parse arch config file --
-# End of opcode list; emit instruction blocks.
-#
-def opEnd(tokens):
- global in_op_start
- if len(tokens) != 1:
- raise DataParseError("opEnd takes no arguments")
- if in_op_start != 1:
- raise DataParseError("opEnd must follow opStart, and only appear once")
- in_op_start = 2
-
- loadAndEmitOpcodes()
- if splitops == False:
- if generate_alt_table:
- loadAndEmitAltOpcodes()
-
-def genaltop(tokens):
- if in_op_start != 2:
- raise DataParseError("alt-op can be specified only after op-end")
- if len(tokens) != 1:
- raise DataParseError("opEnd takes no arguments")
- if generate_alt_table:
- loadAndEmitAltOpcodes()
-
-#
# Extract an ordered list of instructions from the VM sources. We use the
-# "goto table" definition macro, which has exactly kNumPackedOpcodes
-# entries.
-#
+# "goto table" definition macro, which has exactly NUM_PACKED_OPCODES entries.
def getOpcodeList():
- opcodes = []
- opcode_fp = open(interp_defs_file)
- opcode_re = re.compile(r"^\s*V\((....), (\w+),.*", re.DOTALL)
- for line in opcode_fp:
- match = opcode_re.match(line)
- if not match:
- continue
- opcodes.append("op_" + match.group(2).lower())
- opcode_fp.close()
+ opcodes = []
+ opcode_fp = open(INTERP_DEFS_FILE)
+ opcode_re = re.compile(r"^\s*V\((....), (\w+),.*", re.DOTALL)
+ for line in opcode_fp:
+ match = opcode_re.match(line)
+ if not match:
+ continue
+ opcodes.append("op_" + match.group(2).lower())
+ opcode_fp.close()
- if len(opcodes) != kNumPackedOpcodes:
- print "ERROR: found %d opcodes in Interp.h (expected %d)" \
- % (len(opcodes), kNumPackedOpcodes)
- raise SyntaxError, "bad opcode count"
- return opcodes
+ if len(opcodes) != NUM_PACKED_OPCODES:
+ print "ERROR: found %d opcodes in Interp.h (expected %d)" \
+ % (len(opcodes), NUM_PACKED_OPCODES)
+ raise SyntaxError, "bad opcode count"
+ return opcodes
-def emitAlign():
- if style == "computed-goto":
- asm_fp.write(" .balign %d\n" % handler_size_bytes)
+indent_re = re.compile(r"^%( *)")
-#
-# Load and emit opcodes for all kNumPackedOpcodes instructions.
-#
-def loadAndEmitOpcodes():
- sister_list = []
- assert len(opcodes) == kNumPackedOpcodes
- need_dummy_start = False
+# Finds variable references in text: $foo or ${foo}
+escape_re = re.compile(r'''
+ (?<!\$) # Look-back: must not be preceded by another $.
+ \$
+ (\{)? # May be enclosed by { } pair.
+ (?P<name>\w+) # Save the symbol in named group.
+ (?(1)\}) # Expect } if and only if { was present.
+''', re.VERBOSE)
- loadAndEmitGenericAsm("instruction_start")
+def generate_script(arch, setup_code):
+ # Create new python script and write the initial setup code.
+ script = StringIO() # File-like in-memory buffer.
+ script.write("# DO NOT EDIT: This file was generated by gen-mterp.py.\n")
+ script.write('arch = "' + arch + '"\n')
+ script.write(setup_code)
+ opcodes = getOpcodeList()
+ script.write("def opcodes(is_alt):\n")
+ for i in xrange(NUM_PACKED_OPCODES):
+ script.write(' write_opcode({0}, "{1}", {1}, is_alt)\n'.format(i, opcodes[i]))
- for i in xrange(kNumPackedOpcodes):
- op = opcodes[i]
+ # Find all template files and translate them into python code.
+ files = listdir(arch)
+ for file in sorted(files):
+ f = open(arch + "/" + file, "r")
+ indent = ""
+ for line in f.readlines():
+ line = line.rstrip()
+ if line.startswith("%"):
+ script.write(line.lstrip("%") + "\n")
+ indent = indent_re.match(line).group(1)
+ if line.endswith(":"):
+ indent += " "
+ else:
+ line = escape_re.sub(r"''' + \g<name> + '''", line)
+ line = line.replace("\\", "\\\\")
+ line = line.replace("$$", "$")
+ script.write(indent + "write_line('''" + line + "''')\n")
+ script.write("\n")
+ f.close()
- if opcode_locations.has_key(op):
- location = opcode_locations[op]
- else:
- location = default_op_dir
+ # TODO: Remove the concept of sister snippets. It is barely used.
+ script.write("def write_sister():\n")
+ if arch == "arm":
+ script.write(" op_float_to_long_sister_code()\n")
+ script.write(" op_double_to_long_sister_code()\n")
+ if arch == "mips":
+ script.write(" global opnum, opcode\n")
+ names = [
+ "op_float_to_long",
+ "op_double_to_long",
+ "op_mul_long",
+ "op_shl_long",
+ "op_shr_long",
+ "op_ushr_long",
+ "op_shl_long_2addr",
+ "op_shr_long_2addr",
+ "op_ushr_long_2addr"
+ ]
+ for name in names:
+ script.write(' opcode = "' + name + '"\n')
+ script.write(" " + name + "_sister_code()\n")
+ script.write(" pass\n")
- if location == "FALLBACK":
- emitFallback(i)
- else:
- loadAndEmitAsm(location, i, sister_list)
+ script.write('generate()\n')
+ script.seek(0)
+ return script.read()
- # For a 100% C implementation, there are no asm handlers or stubs. We
- # need to have the MterpAsmInstructionStart label point at op_nop, and it's
- # too annoying to try to slide it in after the alignment psuedo-op, so
- # we take the low road and just emit a dummy op_nop here.
- if need_dummy_start:
- emitAlign()
- asm_fp.write(label_prefix + "_op_nop: /* dummy */\n");
-
- emitAlign()
-
- loadAndEmitGenericAsm("instruction_end")
-
- if style == "computed-goto":
- emitSectionComment("Sister implementations", asm_fp)
- loadAndEmitGenericAsm("instruction_start_sister")
- asm_fp.writelines(sister_list)
- loadAndEmitGenericAsm("instruction_end_sister")
-
-#
-# Load an alternate entry stub
-#
-def loadAndEmitAltStub(source, opindex):
- op = opcodes[opindex]
- if verbose:
- print " alt emit %s --> stub" % source
- dict = getGlobalSubDict()
- dict.update({ "opcode":op, "opnum":opindex })
-
- emitAsmHeader(asm_fp, dict, alt_label_prefix)
- appendSourceFile(source, dict, asm_fp, None)
-
-#
-# Load and emit alternate opcodes for all kNumPackedOpcodes instructions.
-#
-def loadAndEmitAltOpcodes():
- assert len(opcodes) == kNumPackedOpcodes
- start_label = global_name_format % "artMterpAsmAltInstructionStart"
- end_label = global_name_format % "artMterpAsmAltInstructionEnd"
-
- loadAndEmitGenericAsm("instruction_start_alt")
-
- for i in xrange(kNumPackedOpcodes):
- op = opcodes[i]
- if alt_opcode_locations.has_key(op):
- source = "%s/alt_%s.S" % (alt_opcode_locations[op], op)
- else:
- source = default_alt_stub
- loadAndEmitAltStub(source, i)
-
- emitAlign()
-
- loadAndEmitGenericAsm("instruction_end_alt")
-
-#
-# Load an assembly fragment and emit it.
-#
-def loadAndEmitAsm(location, opindex, sister_list):
- op = opcodes[opindex]
- source = "%s/%s.S" % (location, op)
- dict = getGlobalSubDict()
- dict.update({ "opcode":op, "opnum":opindex })
- if verbose:
- print " emit %s --> asm" % source
-
- emitAsmHeader(asm_fp, dict, label_prefix)
- appendSourceFile(source, dict, asm_fp, sister_list)
-
-#
-# Load a non-handler assembly fragment and emit it.
-#
-def loadAndEmitGenericAsm(name):
- source = "%s/%s.S" % (default_op_dir, name)
- dict = getGlobalSubDict()
- appendSourceFile(source, dict, asm_fp, None)
-
-#
-# Emit fallback fragment
-#
-def emitFallback(opindex):
- op = opcodes[opindex]
- dict = getGlobalSubDict()
- dict.update({ "opcode":op, "opnum":opindex })
- emitAsmHeader(asm_fp, dict, label_prefix)
- for line in fallback_stub_text:
- asm_fp.write(line)
- asm_fp.write("\n")
-
-#
-# Output the alignment directive and label for an assembly piece.
-#
-def emitAsmHeader(outfp, dict, prefix):
- outfp.write("/* ------------------------------ */\n")
- # The alignment directive ensures that the handler occupies
- # at least the correct amount of space. We don't try to deal
- # with overflow here.
- emitAlign()
- # Emit a label so that gdb will say the right thing. We prepend an
- # underscore so the symbol name doesn't clash with the Opcode enum.
- outfp.write(prefix + "_%(opcode)s: /* 0x%(opnum)02x */\n" % dict)
-
-#
-# Output a generic instruction stub that updates the "glue" struct and
-# calls the C implementation.
-#
-def emitAsmStub(outfp, dict):
- emitAsmHeader(outfp, dict, label_prefix)
- for line in asm_stub_text:
- templ = Template(line)
- outfp.write(templ.substitute(dict))
-
-#
-# Append the file specified by "source" to the open "outfp". Each line will
-# be template-replaced using the substitution dictionary "dict".
-#
-# If the first line of the file starts with "%" it is taken as a directive.
-# A "%include" line contains a filename and, optionally, a Python-style
-# dictionary declaration with substitution strings. (This is implemented
-# with recursion.)
-#
-# If "sister_list" is provided, and we find a line that contains only "&",
-# all subsequent lines from the file will be appended to sister_list instead
-# of copied to the output.
-#
-# This may modify "dict".
-#
-def appendSourceFile(source, dict, outfp, sister_list):
- outfp.write("/* File: %s */\n" % source)
- infp = open(source, "r")
- in_sister = False
- for line in infp:
- if line.startswith("%include"):
- # Parse the "include" line
- tokens = line.strip().split(' ', 2)
- if len(tokens) < 2:
- raise DataParseError("malformed %%include in %s" % source)
-
- alt_source = tokens[1].strip("\"")
- if alt_source == source:
- raise DataParseError("self-referential %%include in %s"
- % source)
-
- new_dict = dict.copy()
- if len(tokens) == 3:
- new_dict.update(eval(tokens[2]))
- #print " including src=%s dict=%s" % (alt_source, new_dict)
- appendSourceFile(alt_source, new_dict, outfp, sister_list)
- continue
-
- elif line.startswith("%default"):
- # copy keywords into dictionary
- tokens = line.strip().split(' ', 1)
- if len(tokens) < 2:
- raise DataParseError("malformed %%default in %s" % source)
- defaultValues = eval(tokens[1])
- for entry in defaultValues:
- dict.setdefault(entry, defaultValues[entry])
- continue
-
- elif line.startswith("%break") and sister_list != None:
- # allow more than one %break, ignoring all following the first
- if style == "computed-goto" and not in_sister:
- in_sister = True
- sister_list.append("\n/* continuation for %(opcode)s */\n"%dict)
- continue
-
- # perform keyword substitution if a dictionary was provided
- if dict != None:
- templ = Template(line)
- try:
- subline = templ.substitute(dict)
- except KeyError, err:
- raise DataParseError("keyword substitution failed in %s: %s"
- % (source, str(err)))
- except:
- print "ERROR: substitution failed: " + line
- raise
- else:
- subline = line
-
- # write output to appropriate file
- if in_sister:
- sister_list.append(subline)
- else:
- outfp.write(subline)
- outfp.write("\n")
- infp.close()
-
-#
-# Emit a C-style section header comment.
-#
-def emitSectionComment(str, fp):
- equals = "========================================" \
- "==================================="
-
- fp.write("\n/*\n * %s\n * %s\n * %s\n */\n" %
- (equals, str, equals))
-
-
-#
-# ===========================================================================
-# "main" code
-#
-
-#
-# Check args.
-#
-if len(sys.argv) != 3:
- print "Usage: %s target-arch output-dir" % sys.argv[0]
- sys.exit(2)
-
-target_arch = sys.argv[1]
-output_dir = sys.argv[2]
-
-#
-# Extract opcode list.
-#
-opcodes = getOpcodeList()
-#for op in opcodes:
-# print " %s" % op
-
-#
-# Open config file.
-#
-try:
- config_fp = open("config_%s" % target_arch)
-except:
- print "Unable to open config file 'config_%s'" % target_arch
- sys.exit(1)
-
-#
-# Open and prepare output files.
-#
-try:
- asm_fp = open("%s/mterp_%s.S" % (output_dir, target_arch), "w")
-except:
- print "Unable to open output files"
- print "Make sure directory '%s' exists and existing files are writable" \
- % output_dir
- # Ideally we'd remove the files to avoid confusing "make", but if they
- # failed to open we probably won't be able to remove them either.
- sys.exit(1)
-
-print "Generating %s" % (asm_fp.name)
-
-file_header = """/*
- * This file was generated automatically by gen-mterp.py for '%s'.
- *
- * --> DO NOT EDIT <--
- */
-
-""" % (target_arch)
-
-asm_fp.write(file_header)
-
-#
-# Process the config file.
-#
-failed = False
-try:
- for line in config_fp:
- line = line.strip() # remove CRLF, leading spaces
- tokens = line.split(' ') # tokenize
- #print "%d: %s" % (len(tokens), tokens)
- if len(tokens[0]) == 0:
- #print " blank"
- pass
- elif tokens[0][0] == '#':
- #print " comment"
- pass
- else:
- if tokens[0] == "handler-size":
- setHandlerSize(tokens)
- elif tokens[0] == "import":
- importFile(tokens)
- elif tokens[0] == "asm-stub":
- setAsmStub(tokens)
- elif tokens[0] == "asm-alt-stub":
- setAsmAltStub(tokens)
- elif tokens[0] == "op-start":
- opStart(tokens)
- elif tokens[0] == "op-end":
- opEnd(tokens)
- elif tokens[0] == "alt":
- altEntry(tokens)
- elif tokens[0] == "op":
- opEntry(tokens)
- elif tokens[0] == "handler-style":
- setHandlerStyle(tokens)
- elif tokens[0] == "alt-ops":
- genaltop(tokens)
- elif tokens[0] == "split-ops":
- splitops = True
- elif tokens[0] == "fallback-stub":
- setFallbackStub(tokens)
- elif tokens[0] == "function-type-format":
- setFunctionTypeFormat(tokens)
- elif tokens[0] == "function-size-format":
- setFunctionSizeFormat(tokens)
- elif tokens[0] == "global-name-format":
- setGlobalNameFormat(tokens)
- else:
- raise DataParseError, "unrecognized command '%s'" % tokens[0]
- if style == None:
- print "tokens[0] = %s" % tokens[0]
- raise DataParseError, "handler-style must be first command"
-except DataParseError, err:
- print "Failed: " + str(err)
- # TODO: remove output files so "make" doesn't get confused
- failed = True
- asm_fp.close()
- asm_fp = None
-
-config_fp.close()
-
-#
-# Done!
-#
-if asm_fp:
- asm_fp.close()
-
-sys.exit(failed)
+# Generate the script for each architecture and execute it.
+for arch in ["arm", "arm64", "mips", "mips64", "x86", "x86_64"]:
+ with open(SCRIPT_SETUP_CODE, "r") as setup_code_file:
+ script = generate_script(arch, setup_code_file.read())
+ filename = "out/mterp_" + arch + ".py" # Name to report in error messages.
+ # open(filename, "w").write(script) # Write the script to disk for debugging.
+ exec(compile(script, filename, mode='exec'))
diff --git a/runtime/interpreter/mterp/mips/alt_stub.S b/runtime/interpreter/mterp/mips/alt_stub.S
index de13313..1ce7561 100644
--- a/runtime/interpreter/mterp/mips/alt_stub.S
+++ b/runtime/interpreter/mterp/mips/alt_stub.S
@@ -1,3 +1,4 @@
+%def alt_stub():
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
diff --git a/runtime/interpreter/mterp/mips/bincmp.S b/runtime/interpreter/mterp/mips/bincmp.S
index 68df5c3..b4b671f 100644
--- a/runtime/interpreter/mterp/mips/bincmp.S
+++ b/runtime/interpreter/mterp/mips/bincmp.S
@@ -1,3 +1,4 @@
+%def bincmp(condition=""):
/*
* Generic two-operand compare-and-branch operation. Provide a "condition"
* fragment that specifies the comparison to perform.
diff --git a/runtime/interpreter/mterp/mips/binop.S b/runtime/interpreter/mterp/mips/binop.S
index 862d95a..062b22d 100644
--- a/runtime/interpreter/mterp/mips/binop.S
+++ b/runtime/interpreter/mterp/mips/binop.S
@@ -1,4 +1,4 @@
-%default {"preinstr":"", "result":"a0", "chkzero":"0"}
+%def binop(preinstr="", result="a0", chkzero="0", instr=""):
/*
* Generic 32-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = a0 op a1".
diff --git a/runtime/interpreter/mterp/mips/binop2addr.S b/runtime/interpreter/mterp/mips/binop2addr.S
index 17aa8eb..89af6e1 100644
--- a/runtime/interpreter/mterp/mips/binop2addr.S
+++ b/runtime/interpreter/mterp/mips/binop2addr.S
@@ -1,4 +1,4 @@
-%default {"preinstr":"", "result":"a0", "chkzero":"0"}
+%def binop2addr(preinstr="", result="a0", chkzero="0", instr=""):
/*
* Generic 32-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
diff --git a/runtime/interpreter/mterp/mips/binopLit16.S b/runtime/interpreter/mterp/mips/binopLit16.S
index 0696e7a..9ae0da7 100644
--- a/runtime/interpreter/mterp/mips/binopLit16.S
+++ b/runtime/interpreter/mterp/mips/binopLit16.S
@@ -1,4 +1,4 @@
-%default {"preinstr":"", "result":"a0", "chkzero":"0"}
+%def binopLit16(preinstr="", result="a0", chkzero="0", instr=""):
/*
* Generic 32-bit "lit16" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
diff --git a/runtime/interpreter/mterp/mips/binopLit8.S b/runtime/interpreter/mterp/mips/binopLit8.S
index 382dd2b..ecf08c2 100644
--- a/runtime/interpreter/mterp/mips/binopLit8.S
+++ b/runtime/interpreter/mterp/mips/binopLit8.S
@@ -1,4 +1,4 @@
-%default {"preinstr":"", "result":"a0", "chkzero":"0"}
+%def binopLit8(preinstr="", result="a0", chkzero="0", instr=""):
/*
* Generic 32-bit "lit8" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
diff --git a/runtime/interpreter/mterp/mips/binopWide.S b/runtime/interpreter/mterp/mips/binopWide.S
index 604134d..5768e95 100644
--- a/runtime/interpreter/mterp/mips/binopWide.S
+++ b/runtime/interpreter/mterp/mips/binopWide.S
@@ -1,4 +1,4 @@
-%default {"preinstr":"", "result0":"a0", "result1":"a1", "chkzero":"0", "arg0":"a0", "arg1":"a1", "arg2":"a2", "arg3":"a3"}
+%def binopWide(preinstr="", result0="a0", result1="a1", chkzero="0", arg0="a0", arg1="a1", arg2="a2", arg3="a3", instr=""):
/*
* Generic 64-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = a0-a1 op a2-a3".
diff --git a/runtime/interpreter/mterp/mips/binopWide2addr.S b/runtime/interpreter/mterp/mips/binopWide2addr.S
index f96fdb2..4e00c81 100644
--- a/runtime/interpreter/mterp/mips/binopWide2addr.S
+++ b/runtime/interpreter/mterp/mips/binopWide2addr.S
@@ -1,4 +1,4 @@
-%default {"preinstr":"", "result0":"a0", "result1":"a1", "chkzero":"0", "arg0":"a0", "arg1":"a1", "arg2":"a2", "arg3":"a3"}
+%def binopWide2addr(preinstr="", result0="a0", result1="a1", chkzero="0", arg0="a0", arg1="a1", arg2="a2", arg3="a3", instr=""):
/*
* Generic 64-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0-a1 op a2-a3".
diff --git a/runtime/interpreter/mterp/mips/const.S b/runtime/interpreter/mterp/mips/const.S
index 5d8379d..403dfc7 100644
--- a/runtime/interpreter/mterp/mips/const.S
+++ b/runtime/interpreter/mterp/mips/const.S
@@ -1,4 +1,4 @@
-%default { "helper":"UndefinedConstHandler" }
+%def const(helper="UndefinedConstHandler"):
/* const/class vAA, type@BBBB */
/* const/method-handle vAA, method_handle@BBBB */
/* const/method-type vAA, proto@BBBB */
diff --git a/runtime/interpreter/mterp/mips/entry.S b/runtime/interpreter/mterp/mips/entry.S
index d342354..e40fc02 100644
--- a/runtime/interpreter/mterp/mips/entry.S
+++ b/runtime/interpreter/mterp/mips/entry.S
@@ -1,3 +1,4 @@
+%def entry():
/*
* Copyright (C) 2016 The Android Open Source Project
*
diff --git a/runtime/interpreter/mterp/mips/fallback.S b/runtime/interpreter/mterp/mips/fallback.S
index 82cbc63..6133d9f 100644
--- a/runtime/interpreter/mterp/mips/fallback.S
+++ b/runtime/interpreter/mterp/mips/fallback.S
@@ -1,2 +1,3 @@
+%def fallback():
/* Transfer stub to alternate interpreter */
b MterpFallback
diff --git a/runtime/interpreter/mterp/mips/fbinop.S b/runtime/interpreter/mterp/mips/fbinop.S
index 6c1468c..7cbf73f 100644
--- a/runtime/interpreter/mterp/mips/fbinop.S
+++ b/runtime/interpreter/mterp/mips/fbinop.S
@@ -1,3 +1,4 @@
+%def fbinop(instr=""):
/*
* Generic 32-bit binary float operation.
*
diff --git a/runtime/interpreter/mterp/mips/fbinop2addr.S b/runtime/interpreter/mterp/mips/fbinop2addr.S
index 2caaf9c..ea9970f 100644
--- a/runtime/interpreter/mterp/mips/fbinop2addr.S
+++ b/runtime/interpreter/mterp/mips/fbinop2addr.S
@@ -1,3 +1,4 @@
+%def fbinop2addr(instr=""):
/*
* Generic 32-bit "/2addr" binary operation. Provide an "instr"
* that specifies an instruction that performs "fv0 = fa0 op fa1".
diff --git a/runtime/interpreter/mterp/mips/fbinopWide.S b/runtime/interpreter/mterp/mips/fbinopWide.S
index a1fe91e..1b5c0c1 100644
--- a/runtime/interpreter/mterp/mips/fbinopWide.S
+++ b/runtime/interpreter/mterp/mips/fbinopWide.S
@@ -1,3 +1,4 @@
+%def fbinopWide(instr=""):
/*
* Generic 64-bit floating-point binary operation. Provide an "instr"
* line that specifies an instruction that performs "fv0 = fa0 op fa1".
diff --git a/runtime/interpreter/mterp/mips/fbinopWide2addr.S b/runtime/interpreter/mterp/mips/fbinopWide2addr.S
index 7303441..e36f1f8 100644
--- a/runtime/interpreter/mterp/mips/fbinopWide2addr.S
+++ b/runtime/interpreter/mterp/mips/fbinopWide2addr.S
@@ -1,3 +1,4 @@
+%def fbinopWide2addr(instr=""):
/*
* Generic 64-bit floating-point "/2addr" binary operation.
* Provide an "instr" line that specifies an instruction that
diff --git a/runtime/interpreter/mterp/mips/field.S b/runtime/interpreter/mterp/mips/field.S
index 1333ed7..d61b06a 100644
--- a/runtime/interpreter/mterp/mips/field.S
+++ b/runtime/interpreter/mterp/mips/field.S
@@ -1 +1,2 @@
+%def field(helper=""):
TODO
diff --git a/runtime/interpreter/mterp/mips/footer.S b/runtime/interpreter/mterp/mips/footer.S
index 1c784ef..0f641d2 100644
--- a/runtime/interpreter/mterp/mips/footer.S
+++ b/runtime/interpreter/mterp/mips/footer.S
@@ -1,3 +1,4 @@
+%def footer():
/*
* ===========================================================================
* Common subroutines and data
diff --git a/runtime/interpreter/mterp/mips/funop.S b/runtime/interpreter/mterp/mips/funop.S
index b2b22c9..64f40ac 100644
--- a/runtime/interpreter/mterp/mips/funop.S
+++ b/runtime/interpreter/mterp/mips/funop.S
@@ -1,3 +1,4 @@
+%def funop(instr=""):
/*
* Generic 32-bit floating-point unary operation. Provide an "instr"
* line that specifies an instruction that performs "fv0 = op fa0".
diff --git a/runtime/interpreter/mterp/mips/funopWider.S b/runtime/interpreter/mterp/mips/funopWider.S
index 6862e24..afc45ee 100644
--- a/runtime/interpreter/mterp/mips/funopWider.S
+++ b/runtime/interpreter/mterp/mips/funopWider.S
@@ -1,3 +1,4 @@
+%def funopWider(instr=""):
/*
* Generic 32bit-to-64bit floating-point unary operation. Provide an "instr"
* line that specifies an instruction that performs "fv0 = op fa0".
diff --git a/runtime/interpreter/mterp/mips/header.S b/runtime/interpreter/mterp/mips/header.S
index bef9eeb..57339d0 100644
--- a/runtime/interpreter/mterp/mips/header.S
+++ b/runtime/interpreter/mterp/mips/header.S
@@ -1,3 +1,4 @@
+%def header():
/*
* Copyright (C) 2016 The Android Open Source Project
*
@@ -663,7 +664,6 @@
#define STORE64_F(rlo, rhi, rbase) STORE64_off_F(rlo, rhi, rbase, 0)
#define LOAD64_F(rlo, rhi, rbase) LOAD64_off_F(rlo, rhi, rbase, 0)
-
#define LOAD_base_offMirrorArray_length(rd, rbase) LOAD_RB_OFF(rd, rbase, MIRROR_ARRAY_LENGTH_OFFSET)
#define STACK_STORE(rd, off) sw rd, off(sp)
diff --git a/runtime/interpreter/mterp/mips/instruction_end.S b/runtime/interpreter/mterp/mips/instruction_end.S
index 32c725c..3d44293 100644
--- a/runtime/interpreter/mterp/mips/instruction_end.S
+++ b/runtime/interpreter/mterp/mips/instruction_end.S
@@ -1,3 +1,4 @@
+%def instruction_end():
.global artMterpAsmInstructionEnd
artMterpAsmInstructionEnd:
diff --git a/runtime/interpreter/mterp/mips/instruction_end_alt.S b/runtime/interpreter/mterp/mips/instruction_end_alt.S
index f90916f..86a1068 100644
--- a/runtime/interpreter/mterp/mips/instruction_end_alt.S
+++ b/runtime/interpreter/mterp/mips/instruction_end_alt.S
@@ -1,3 +1,4 @@
+%def instruction_end_alt():
.global artMterpAsmAltInstructionEnd
artMterpAsmAltInstructionEnd:
diff --git a/runtime/interpreter/mterp/mips/instruction_end_sister.S b/runtime/interpreter/mterp/mips/instruction_end_sister.S
index c5f4886..8cc4513 100644
--- a/runtime/interpreter/mterp/mips/instruction_end_sister.S
+++ b/runtime/interpreter/mterp/mips/instruction_end_sister.S
@@ -1,3 +1,4 @@
+%def instruction_end_sister():
.global artMterpAsmSisterEnd
artMterpAsmSisterEnd:
diff --git a/runtime/interpreter/mterp/mips/instruction_start.S b/runtime/interpreter/mterp/mips/instruction_start.S
index 8874c20..4b777f2 100644
--- a/runtime/interpreter/mterp/mips/instruction_start.S
+++ b/runtime/interpreter/mterp/mips/instruction_start.S
@@ -1,3 +1,4 @@
+%def instruction_start():
.global artMterpAsmInstructionStart
artMterpAsmInstructionStart = .L_op_nop
diff --git a/runtime/interpreter/mterp/mips/instruction_start_alt.S b/runtime/interpreter/mterp/mips/instruction_start_alt.S
index 0c9ffdb..e7731b7 100644
--- a/runtime/interpreter/mterp/mips/instruction_start_alt.S
+++ b/runtime/interpreter/mterp/mips/instruction_start_alt.S
@@ -1,3 +1,4 @@
+%def instruction_start_alt():
.global artMterpAsmAltInstructionStart
artMterpAsmAltInstructionStart = .L_ALT_op_nop
diff --git a/runtime/interpreter/mterp/mips/instruction_start_sister.S b/runtime/interpreter/mterp/mips/instruction_start_sister.S
index 2ec51f7..e09ea90 100644
--- a/runtime/interpreter/mterp/mips/instruction_start_sister.S
+++ b/runtime/interpreter/mterp/mips/instruction_start_sister.S
@@ -1,3 +1,4 @@
+%def instruction_start_sister():
.global artMterpAsmSisterStart
.text
diff --git a/runtime/interpreter/mterp/mips/invoke.S b/runtime/interpreter/mterp/mips/invoke.S
index db3b8af..fa74452 100644
--- a/runtime/interpreter/mterp/mips/invoke.S
+++ b/runtime/interpreter/mterp/mips/invoke.S
@@ -1,4 +1,4 @@
-%default { "helper":"UndefinedInvokeHandler" }
+%def invoke(helper="UndefinedInvokeHandler"):
/*
* Generic invoke handler wrapper.
*/
diff --git a/runtime/interpreter/mterp/mips/invoke_polymorphic.S b/runtime/interpreter/mterp/mips/invoke_polymorphic.S
index 5c963f0..f2532e7 100644
--- a/runtime/interpreter/mterp/mips/invoke_polymorphic.S
+++ b/runtime/interpreter/mterp/mips/invoke_polymorphic.S
@@ -1,4 +1,4 @@
-%default { "helper":"UndefinedInvokeHandler" }
+%def invoke_polymorphic(helper="UndefinedInvokeHandler"):
/*
* invoke-polymorphic handler wrapper.
*/
diff --git a/runtime/interpreter/mterp/mips/op_add_double.S b/runtime/interpreter/mterp/mips/op_add_double.S
index 12ef0cf3..8308cdc 100644
--- a/runtime/interpreter/mterp/mips/op_add_double.S
+++ b/runtime/interpreter/mterp/mips/op_add_double.S
@@ -1 +1,2 @@
-%include "mips/fbinopWide.S" {"instr":"add.d fv0, fa0, fa1"}
+%def op_add_double():
+% fbinopWide(instr="add.d fv0, fa0, fa1")
diff --git a/runtime/interpreter/mterp/mips/op_add_double_2addr.S b/runtime/interpreter/mterp/mips/op_add_double_2addr.S
index c57add5..41b0996 100644
--- a/runtime/interpreter/mterp/mips/op_add_double_2addr.S
+++ b/runtime/interpreter/mterp/mips/op_add_double_2addr.S
@@ -1 +1,2 @@
-%include "mips/fbinopWide2addr.S" {"instr":"add.d fv0, fa0, fa1"}
+%def op_add_double_2addr():
+% fbinopWide2addr(instr="add.d fv0, fa0, fa1")
diff --git a/runtime/interpreter/mterp/mips/op_add_float.S b/runtime/interpreter/mterp/mips/op_add_float.S
index 6a46cf0..807ea97 100644
--- a/runtime/interpreter/mterp/mips/op_add_float.S
+++ b/runtime/interpreter/mterp/mips/op_add_float.S
@@ -1 +1,2 @@
-%include "mips/fbinop.S" {"instr":"add.s fv0, fa0, fa1"}
+%def op_add_float():
+% fbinop(instr="add.s fv0, fa0, fa1")
diff --git a/runtime/interpreter/mterp/mips/op_add_float_2addr.S b/runtime/interpreter/mterp/mips/op_add_float_2addr.S
index 6ab5cc1..c5735ae 100644
--- a/runtime/interpreter/mterp/mips/op_add_float_2addr.S
+++ b/runtime/interpreter/mterp/mips/op_add_float_2addr.S
@@ -1 +1,2 @@
-%include "mips/fbinop2addr.S" {"instr":"add.s fv0, fa0, fa1"}
+%def op_add_float_2addr():
+% fbinop2addr(instr="add.s fv0, fa0, fa1")
diff --git a/runtime/interpreter/mterp/mips/op_add_int.S b/runtime/interpreter/mterp/mips/op_add_int.S
index 53a0cb1..ed0fc01 100644
--- a/runtime/interpreter/mterp/mips/op_add_int.S
+++ b/runtime/interpreter/mterp/mips/op_add_int.S
@@ -1 +1,2 @@
-%include "mips/binop.S" {"instr":"addu a0, a0, a1"}
+%def op_add_int():
+% binop(instr="addu a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips/op_add_int_2addr.S b/runtime/interpreter/mterp/mips/op_add_int_2addr.S
index ddd9214..ed0b131 100644
--- a/runtime/interpreter/mterp/mips/op_add_int_2addr.S
+++ b/runtime/interpreter/mterp/mips/op_add_int_2addr.S
@@ -1 +1,2 @@
-%include "mips/binop2addr.S" {"instr":"addu a0, a0, a1"}
+%def op_add_int_2addr():
+% binop2addr(instr="addu a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips/op_add_int_lit16.S b/runtime/interpreter/mterp/mips/op_add_int_lit16.S
index 05535c1..126807a 100644
--- a/runtime/interpreter/mterp/mips/op_add_int_lit16.S
+++ b/runtime/interpreter/mterp/mips/op_add_int_lit16.S
@@ -1 +1,2 @@
-%include "mips/binopLit16.S" {"instr":"addu a0, a0, a1"}
+%def op_add_int_lit16():
+% binopLit16(instr="addu a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips/op_add_int_lit8.S b/runtime/interpreter/mterp/mips/op_add_int_lit8.S
index fd021b3..30184c4 100644
--- a/runtime/interpreter/mterp/mips/op_add_int_lit8.S
+++ b/runtime/interpreter/mterp/mips/op_add_int_lit8.S
@@ -1 +1,2 @@
-%include "mips/binopLit8.S" {"instr":"addu a0, a0, a1"}
+%def op_add_int_lit8():
+% binopLit8(instr="addu a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips/op_add_long.S b/runtime/interpreter/mterp/mips/op_add_long.S
index faacc6a..3220506 100644
--- a/runtime/interpreter/mterp/mips/op_add_long.S
+++ b/runtime/interpreter/mterp/mips/op_add_long.S
@@ -1,3 +1,4 @@
+%def op_add_long():
/*
* The compiler generates the following sequence for
* [v1 v0] = [a1 a0] + [a3 a2];
@@ -6,4 +7,4 @@
* sltu v1,v0,a2
* addu v1,v1,a1
*/
-%include "mips/binopWide.S" { "result0":"v0", "result1":"v1", "preinstr":"addu v0, a2, a0", "instr":"addu a1, a3, a1; sltu v1, v0, a2; addu v1, v1, a1" }
+% binopWide(result0="v0", result1="v1", preinstr="addu v0, a2, a0", instr="addu a1, a3, a1; sltu v1, v0, a2; addu v1, v1, a1")
diff --git a/runtime/interpreter/mterp/mips/op_add_long_2addr.S b/runtime/interpreter/mterp/mips/op_add_long_2addr.S
index bf827c1..3bbc1f3 100644
--- a/runtime/interpreter/mterp/mips/op_add_long_2addr.S
+++ b/runtime/interpreter/mterp/mips/op_add_long_2addr.S
@@ -1,4 +1,5 @@
+%def op_add_long_2addr():
/*
* See op_add_long.S for details
*/
-%include "mips/binopWide2addr.S" { "result0":"v0", "result1":"v1", "preinstr":"addu v0, a2, a0", "instr":"addu a1, a3, a1; sltu v1, v0, a2; addu v1, v1, a1" }
+% binopWide2addr(result0="v0", result1="v1", preinstr="addu v0, a2, a0", instr="addu a1, a3, a1; sltu v1, v0, a2; addu v1, v1, a1")
diff --git a/runtime/interpreter/mterp/mips/op_aget.S b/runtime/interpreter/mterp/mips/op_aget.S
index e88402c..026095f 100644
--- a/runtime/interpreter/mterp/mips/op_aget.S
+++ b/runtime/interpreter/mterp/mips/op_aget.S
@@ -1,4 +1,4 @@
-%default { "load":"lw", "shift":"2", "data_offset":"MIRROR_INT_ARRAY_DATA_OFFSET" }
+%def op_aget(load="lw", shift="2", data_offset="MIRROR_INT_ARRAY_DATA_OFFSET"):
/*
* Array get, 32 bits or less. vAA <- vBB[vCC].
*
diff --git a/runtime/interpreter/mterp/mips/op_aget_boolean.S b/runtime/interpreter/mterp/mips/op_aget_boolean.S
index 59f7f82..7b28bc8 100644
--- a/runtime/interpreter/mterp/mips/op_aget_boolean.S
+++ b/runtime/interpreter/mterp/mips/op_aget_boolean.S
@@ -1 +1,2 @@
-%include "mips/op_aget.S" { "load":"lbu", "shift":"0", "data_offset":"MIRROR_BOOLEAN_ARRAY_DATA_OFFSET" }
+%def op_aget_boolean():
+% op_aget(load="lbu", shift="0", data_offset="MIRROR_BOOLEAN_ARRAY_DATA_OFFSET")
diff --git a/runtime/interpreter/mterp/mips/op_aget_byte.S b/runtime/interpreter/mterp/mips/op_aget_byte.S
index 11038fa..a4a0b7e 100644
--- a/runtime/interpreter/mterp/mips/op_aget_byte.S
+++ b/runtime/interpreter/mterp/mips/op_aget_byte.S
@@ -1 +1,2 @@
-%include "mips/op_aget.S" { "load":"lb", "shift":"0", "data_offset":"MIRROR_BYTE_ARRAY_DATA_OFFSET" }
+%def op_aget_byte():
+% op_aget(load="lb", shift="0", data_offset="MIRROR_BYTE_ARRAY_DATA_OFFSET")
diff --git a/runtime/interpreter/mterp/mips/op_aget_char.S b/runtime/interpreter/mterp/mips/op_aget_char.S
index 96f2ab6..465de09 100644
--- a/runtime/interpreter/mterp/mips/op_aget_char.S
+++ b/runtime/interpreter/mterp/mips/op_aget_char.S
@@ -1 +1,2 @@
-%include "mips/op_aget.S" { "load":"lhu", "shift":"1", "data_offset":"MIRROR_CHAR_ARRAY_DATA_OFFSET" }
+%def op_aget_char():
+% op_aget(load="lhu", shift="1", data_offset="MIRROR_CHAR_ARRAY_DATA_OFFSET")
diff --git a/runtime/interpreter/mterp/mips/op_aget_object.S b/runtime/interpreter/mterp/mips/op_aget_object.S
index 9c49dfe..17a1e0c 100644
--- a/runtime/interpreter/mterp/mips/op_aget_object.S
+++ b/runtime/interpreter/mterp/mips/op_aget_object.S
@@ -1,3 +1,4 @@
+%def op_aget_object():
/*
* Array object get. vAA <- vBB[vCC].
*
diff --git a/runtime/interpreter/mterp/mips/op_aget_short.S b/runtime/interpreter/mterp/mips/op_aget_short.S
index cd7f7bf..4faa9ad 100644
--- a/runtime/interpreter/mterp/mips/op_aget_short.S
+++ b/runtime/interpreter/mterp/mips/op_aget_short.S
@@ -1 +1,2 @@
-%include "mips/op_aget.S" { "load":"lh", "shift":"1", "data_offset":"MIRROR_SHORT_ARRAY_DATA_OFFSET" }
+%def op_aget_short():
+% op_aget(load="lh", shift="1", data_offset="MIRROR_SHORT_ARRAY_DATA_OFFSET")
diff --git a/runtime/interpreter/mterp/mips/op_aget_wide.S b/runtime/interpreter/mterp/mips/op_aget_wide.S
index 08822f5..4045c11 100644
--- a/runtime/interpreter/mterp/mips/op_aget_wide.S
+++ b/runtime/interpreter/mterp/mips/op_aget_wide.S
@@ -1,3 +1,4 @@
+%def op_aget_wide():
/*
* Array get, 64 bits. vAA <- vBB[vCC].
*
diff --git a/runtime/interpreter/mterp/mips/op_and_int.S b/runtime/interpreter/mterp/mips/op_and_int.S
index 98fe4af..740411d 100644
--- a/runtime/interpreter/mterp/mips/op_and_int.S
+++ b/runtime/interpreter/mterp/mips/op_and_int.S
@@ -1 +1,2 @@
-%include "mips/binop.S" {"instr":"and a0, a0, a1"}
+%def op_and_int():
+% binop(instr="and a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips/op_and_int_2addr.S b/runtime/interpreter/mterp/mips/op_and_int_2addr.S
index 7f90ed4..8224e5f 100644
--- a/runtime/interpreter/mterp/mips/op_and_int_2addr.S
+++ b/runtime/interpreter/mterp/mips/op_and_int_2addr.S
@@ -1 +1,2 @@
-%include "mips/binop2addr.S" {"instr":"and a0, a0, a1"}
+%def op_and_int_2addr():
+% binop2addr(instr="and a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips/op_and_int_lit16.S b/runtime/interpreter/mterp/mips/op_and_int_lit16.S
index e46f23b..5031f50 100644
--- a/runtime/interpreter/mterp/mips/op_and_int_lit16.S
+++ b/runtime/interpreter/mterp/mips/op_and_int_lit16.S
@@ -1 +1,2 @@
-%include "mips/binopLit16.S" {"instr":"and a0, a0, a1"}
+%def op_and_int_lit16():
+% binopLit16(instr="and a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips/op_and_int_lit8.S b/runtime/interpreter/mterp/mips/op_and_int_lit8.S
index 3332883..7a7b8b5 100644
--- a/runtime/interpreter/mterp/mips/op_and_int_lit8.S
+++ b/runtime/interpreter/mterp/mips/op_and_int_lit8.S
@@ -1 +1,2 @@
-%include "mips/binopLit8.S" {"instr":"and a0, a0, a1"}
+%def op_and_int_lit8():
+% binopLit8(instr="and a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips/op_and_long.S b/runtime/interpreter/mterp/mips/op_and_long.S
index a98a6df..210e6a1 100644
--- a/runtime/interpreter/mterp/mips/op_and_long.S
+++ b/runtime/interpreter/mterp/mips/op_and_long.S
@@ -1 +1,2 @@
-%include "mips/binopWide.S" {"preinstr":"and a0, a0, a2", "instr":"and a1, a1, a3"}
+%def op_and_long():
+% binopWide(preinstr="and a0, a0, a2", instr="and a1, a1, a3")
diff --git a/runtime/interpreter/mterp/mips/op_and_long_2addr.S b/runtime/interpreter/mterp/mips/op_and_long_2addr.S
index 350c044..c76a5af 100644
--- a/runtime/interpreter/mterp/mips/op_and_long_2addr.S
+++ b/runtime/interpreter/mterp/mips/op_and_long_2addr.S
@@ -1 +1,2 @@
-%include "mips/binopWide2addr.S" {"preinstr":"and a0, a0, a2", "instr":"and a1, a1, a3"}
+%def op_and_long_2addr():
+% binopWide2addr(preinstr="and a0, a0, a2", instr="and a1, a1, a3")
diff --git a/runtime/interpreter/mterp/mips/op_aput.S b/runtime/interpreter/mterp/mips/op_aput.S
index 46dcaee..6561f8f 100644
--- a/runtime/interpreter/mterp/mips/op_aput.S
+++ b/runtime/interpreter/mterp/mips/op_aput.S
@@ -1,4 +1,4 @@
-%default { "store":"sw", "shift":"2", "data_offset":"MIRROR_INT_ARRAY_DATA_OFFSET" }
+%def op_aput(store="sw", shift="2", data_offset="MIRROR_INT_ARRAY_DATA_OFFSET"):
/*
* Array put, 32 bits or less. vBB[vCC] <- vAA.
diff --git a/runtime/interpreter/mterp/mips/op_aput_boolean.S b/runtime/interpreter/mterp/mips/op_aput_boolean.S
index 9cae5ef..098bbcd 100644
--- a/runtime/interpreter/mterp/mips/op_aput_boolean.S
+++ b/runtime/interpreter/mterp/mips/op_aput_boolean.S
@@ -1 +1,2 @@
-%include "mips/op_aput.S" { "store":"sb", "shift":"0", "data_offset":"MIRROR_BOOLEAN_ARRAY_DATA_OFFSET" }
+%def op_aput_boolean():
+% op_aput(store="sb", shift="0", data_offset="MIRROR_BOOLEAN_ARRAY_DATA_OFFSET")
diff --git a/runtime/interpreter/mterp/mips/op_aput_byte.S b/runtime/interpreter/mterp/mips/op_aput_byte.S
index 3bbd12c..f4b42ee 100644
--- a/runtime/interpreter/mterp/mips/op_aput_byte.S
+++ b/runtime/interpreter/mterp/mips/op_aput_byte.S
@@ -1 +1,2 @@
-%include "mips/op_aput.S" { "store":"sb", "shift":"0", "data_offset":"MIRROR_BYTE_ARRAY_DATA_OFFSET" }
+%def op_aput_byte():
+% op_aput(store="sb", shift="0", data_offset="MIRROR_BYTE_ARRAY_DATA_OFFSET")
diff --git a/runtime/interpreter/mterp/mips/op_aput_char.S b/runtime/interpreter/mterp/mips/op_aput_char.S
index ae69717..18eedae 100644
--- a/runtime/interpreter/mterp/mips/op_aput_char.S
+++ b/runtime/interpreter/mterp/mips/op_aput_char.S
@@ -1 +1,2 @@
-%include "mips/op_aput.S" { "store":"sh", "shift":"1", "data_offset":"MIRROR_CHAR_ARRAY_DATA_OFFSET" }
+%def op_aput_char():
+% op_aput(store="sh", shift="1", data_offset="MIRROR_CHAR_ARRAY_DATA_OFFSET")
diff --git a/runtime/interpreter/mterp/mips/op_aput_object.S b/runtime/interpreter/mterp/mips/op_aput_object.S
index 55b13b1..89c72ba 100644
--- a/runtime/interpreter/mterp/mips/op_aput_object.S
+++ b/runtime/interpreter/mterp/mips/op_aput_object.S
@@ -1,3 +1,4 @@
+%def op_aput_object():
/*
* Store an object into an array. vBB[vCC] <- vAA.
*
diff --git a/runtime/interpreter/mterp/mips/op_aput_short.S b/runtime/interpreter/mterp/mips/op_aput_short.S
index 9586259..61a3c0d 100644
--- a/runtime/interpreter/mterp/mips/op_aput_short.S
+++ b/runtime/interpreter/mterp/mips/op_aput_short.S
@@ -1 +1,2 @@
-%include "mips/op_aput.S" { "store":"sh", "shift":"1", "data_offset":"MIRROR_SHORT_ARRAY_DATA_OFFSET" }
+%def op_aput_short():
+% op_aput(store="sh", shift="1", data_offset="MIRROR_SHORT_ARRAY_DATA_OFFSET")
diff --git a/runtime/interpreter/mterp/mips/op_aput_wide.S b/runtime/interpreter/mterp/mips/op_aput_wide.S
index c3cff56..2fd0cbb 100644
--- a/runtime/interpreter/mterp/mips/op_aput_wide.S
+++ b/runtime/interpreter/mterp/mips/op_aput_wide.S
@@ -1,3 +1,4 @@
+%def op_aput_wide():
/*
* Array put, 64 bits. vBB[vCC] <- vAA.
*/
diff --git a/runtime/interpreter/mterp/mips/op_array_length.S b/runtime/interpreter/mterp/mips/op_array_length.S
index ae2fe68..12348bd 100644
--- a/runtime/interpreter/mterp/mips/op_array_length.S
+++ b/runtime/interpreter/mterp/mips/op_array_length.S
@@ -1,3 +1,4 @@
+%def op_array_length():
/*
* Return the length of an array.
*/
diff --git a/runtime/interpreter/mterp/mips/op_check_cast.S b/runtime/interpreter/mterp/mips/op_check_cast.S
index 3875ce6..4d0f286 100644
--- a/runtime/interpreter/mterp/mips/op_check_cast.S
+++ b/runtime/interpreter/mterp/mips/op_check_cast.S
@@ -1,3 +1,4 @@
+%def op_check_cast():
/*
* Check to see if a cast from one class to another is allowed.
*/
diff --git a/runtime/interpreter/mterp/mips/op_cmp_long.S b/runtime/interpreter/mterp/mips/op_cmp_long.S
index 44806c3..7d40b0e 100644
--- a/runtime/interpreter/mterp/mips/op_cmp_long.S
+++ b/runtime/interpreter/mterp/mips/op_cmp_long.S
@@ -1,3 +1,4 @@
+%def op_cmp_long():
/*
* Compare two 64-bit values
* x = y return 0
diff --git a/runtime/interpreter/mterp/mips/op_cmpg_double.S b/runtime/interpreter/mterp/mips/op_cmpg_double.S
index b2e7532..8e3d181 100644
--- a/runtime/interpreter/mterp/mips/op_cmpg_double.S
+++ b/runtime/interpreter/mterp/mips/op_cmpg_double.S
@@ -1 +1,2 @@
-%include "mips/op_cmpl_double.S" { "gt_bias":"1" }
+%def op_cmpg_double():
+% op_cmpl_double(gt_bias="1")
diff --git a/runtime/interpreter/mterp/mips/op_cmpg_float.S b/runtime/interpreter/mterp/mips/op_cmpg_float.S
index 76550b5..d8afa2a 100644
--- a/runtime/interpreter/mterp/mips/op_cmpg_float.S
+++ b/runtime/interpreter/mterp/mips/op_cmpg_float.S
@@ -1 +1,2 @@
-%include "mips/op_cmpl_float.S" { "gt_bias":"1" }
+%def op_cmpg_float():
+% op_cmpl_float(gt_bias="1")
diff --git a/runtime/interpreter/mterp/mips/op_cmpl_double.S b/runtime/interpreter/mterp/mips/op_cmpl_double.S
index 369e5b3..ab6dd49 100644
--- a/runtime/interpreter/mterp/mips/op_cmpl_double.S
+++ b/runtime/interpreter/mterp/mips/op_cmpl_double.S
@@ -1,4 +1,4 @@
-%default { "gt_bias":"0" }
+%def op_cmpl_double(gt_bias="0"):
/*
* Compare two floating-point values. Puts 0(==), 1(>), or -1(<)
* into the destination register based on the comparison results.
diff --git a/runtime/interpreter/mterp/mips/op_cmpl_float.S b/runtime/interpreter/mterp/mips/op_cmpl_float.S
index 1dd5506..6542844 100644
--- a/runtime/interpreter/mterp/mips/op_cmpl_float.S
+++ b/runtime/interpreter/mterp/mips/op_cmpl_float.S
@@ -1,4 +1,4 @@
-%default { "gt_bias":"0" }
+%def op_cmpl_float(gt_bias="0"):
/*
* Compare two floating-point values. Puts 0(==), 1(>), or -1(<)
* into the destination register based on the comparison results.
diff --git a/runtime/interpreter/mterp/mips/op_const.S b/runtime/interpreter/mterp/mips/op_const.S
index bd9f873..5b429d4 100644
--- a/runtime/interpreter/mterp/mips/op_const.S
+++ b/runtime/interpreter/mterp/mips/op_const.S
@@ -1,3 +1,4 @@
+%def op_const():
/* const vAA, +BBBBbbbb */
GET_OPA(a3) # a3 <- AA
FETCH(a0, 1) # a0 <- bbbb (low)
diff --git a/runtime/interpreter/mterp/mips/op_const_16.S b/runtime/interpreter/mterp/mips/op_const_16.S
index 2ffb30f..85669a9 100644
--- a/runtime/interpreter/mterp/mips/op_const_16.S
+++ b/runtime/interpreter/mterp/mips/op_const_16.S
@@ -1,3 +1,4 @@
+%def op_const_16():
/* const/16 vAA, +BBBB */
FETCH_S(a0, 1) # a0 <- ssssBBBB (sign-extended)
GET_OPA(a3) # a3 <- AA
diff --git a/runtime/interpreter/mterp/mips/op_const_4.S b/runtime/interpreter/mterp/mips/op_const_4.S
index 6866c78..158a246 100644
--- a/runtime/interpreter/mterp/mips/op_const_4.S
+++ b/runtime/interpreter/mterp/mips/op_const_4.S
@@ -1,3 +1,4 @@
+%def op_const_4():
/* const/4 vA, +B */
sll a1, rINST, 16 # a1 <- Bxxx0000
GET_OPA(a0) # a0 <- A+
diff --git a/runtime/interpreter/mterp/mips/op_const_class.S b/runtime/interpreter/mterp/mips/op_const_class.S
index 5b3c968..db12ec3 100644
--- a/runtime/interpreter/mterp/mips/op_const_class.S
+++ b/runtime/interpreter/mterp/mips/op_const_class.S
@@ -1 +1,2 @@
-%include "mips/const.S" { "helper":"MterpConstClass" }
+%def op_const_class():
+% const(helper="MterpConstClass")
diff --git a/runtime/interpreter/mterp/mips/op_const_high16.S b/runtime/interpreter/mterp/mips/op_const_high16.S
index 5162402..fee5296 100644
--- a/runtime/interpreter/mterp/mips/op_const_high16.S
+++ b/runtime/interpreter/mterp/mips/op_const_high16.S
@@ -1,3 +1,4 @@
+%def op_const_high16():
/* const/high16 vAA, +BBBB0000 */
FETCH(a0, 1) # a0 <- 0000BBBB (zero-extended)
GET_OPA(a3) # a3 <- AA
diff --git a/runtime/interpreter/mterp/mips/op_const_method_handle.S b/runtime/interpreter/mterp/mips/op_const_method_handle.S
index 4011e43..2680c17 100644
--- a/runtime/interpreter/mterp/mips/op_const_method_handle.S
+++ b/runtime/interpreter/mterp/mips/op_const_method_handle.S
@@ -1 +1,2 @@
-%include "mips/const.S" { "helper":"MterpConstMethodHandle" }
+%def op_const_method_handle():
+% const(helper="MterpConstMethodHandle")
diff --git a/runtime/interpreter/mterp/mips/op_const_method_type.S b/runtime/interpreter/mterp/mips/op_const_method_type.S
index 18a5e0f..ea814bf 100644
--- a/runtime/interpreter/mterp/mips/op_const_method_type.S
+++ b/runtime/interpreter/mterp/mips/op_const_method_type.S
@@ -1 +1,2 @@
-%include "mips/const.S" { "helper":"MterpConstMethodType" }
+%def op_const_method_type():
+% const(helper="MterpConstMethodType")
diff --git a/runtime/interpreter/mterp/mips/op_const_string.S b/runtime/interpreter/mterp/mips/op_const_string.S
index 0bab6b4..41376f8 100644
--- a/runtime/interpreter/mterp/mips/op_const_string.S
+++ b/runtime/interpreter/mterp/mips/op_const_string.S
@@ -1 +1,2 @@
-%include "mips/const.S" { "helper":"MterpConstString" }
+%def op_const_string():
+% const(helper="MterpConstString")
diff --git a/runtime/interpreter/mterp/mips/op_const_string_jumbo.S b/runtime/interpreter/mterp/mips/op_const_string_jumbo.S
index 54cec97..0a031f3 100644
--- a/runtime/interpreter/mterp/mips/op_const_string_jumbo.S
+++ b/runtime/interpreter/mterp/mips/op_const_string_jumbo.S
@@ -1,3 +1,4 @@
+%def op_const_string_jumbo():
/* const/string vAA, string@BBBBBBBB */
EXPORT_PC()
FETCH(a0, 1) # a0 <- bbbb (low)
diff --git a/runtime/interpreter/mterp/mips/op_const_wide.S b/runtime/interpreter/mterp/mips/op_const_wide.S
index f8911e3..b424237 100644
--- a/runtime/interpreter/mterp/mips/op_const_wide.S
+++ b/runtime/interpreter/mterp/mips/op_const_wide.S
@@ -1,3 +1,4 @@
+%def op_const_wide():
/* const-wide vAA, +HHHHhhhhBBBBbbbb */
FETCH(a0, 1) # a0 <- bbbb (low)
FETCH(a1, 2) # a1 <- BBBB (low middle)
diff --git a/runtime/interpreter/mterp/mips/op_const_wide_16.S b/runtime/interpreter/mterp/mips/op_const_wide_16.S
index 2ca5ab9..d89a2b6 100644
--- a/runtime/interpreter/mterp/mips/op_const_wide_16.S
+++ b/runtime/interpreter/mterp/mips/op_const_wide_16.S
@@ -1,3 +1,4 @@
+%def op_const_wide_16():
/* const-wide/16 vAA, +BBBB */
FETCH_S(a0, 1) # a0 <- ssssBBBB (sign-extended)
GET_OPA(a3) # a3 <- AA
diff --git a/runtime/interpreter/mterp/mips/op_const_wide_32.S b/runtime/interpreter/mterp/mips/op_const_wide_32.S
index bf802ca..f9db953 100644
--- a/runtime/interpreter/mterp/mips/op_const_wide_32.S
+++ b/runtime/interpreter/mterp/mips/op_const_wide_32.S
@@ -1,3 +1,4 @@
+%def op_const_wide_32():
/* const-wide/32 vAA, +BBBBbbbb */
FETCH(a0, 1) # a0 <- 0000bbbb (low)
GET_OPA(a3) # a3 <- AA
diff --git a/runtime/interpreter/mterp/mips/op_const_wide_high16.S b/runtime/interpreter/mterp/mips/op_const_wide_high16.S
index 04b90fa..dd0cd94 100644
--- a/runtime/interpreter/mterp/mips/op_const_wide_high16.S
+++ b/runtime/interpreter/mterp/mips/op_const_wide_high16.S
@@ -1,3 +1,4 @@
+%def op_const_wide_high16():
/* const-wide/high16 vAA, +BBBB000000000000 */
FETCH(a1, 1) # a1 <- 0000BBBB (zero-extended)
GET_OPA(a3) # a3 <- AA
diff --git a/runtime/interpreter/mterp/mips/op_div_double.S b/runtime/interpreter/mterp/mips/op_div_double.S
index 84e4c4e..e1324d0 100644
--- a/runtime/interpreter/mterp/mips/op_div_double.S
+++ b/runtime/interpreter/mterp/mips/op_div_double.S
@@ -1 +1,2 @@
-%include "mips/fbinopWide.S" {"instr":"div.d fv0, fa0, fa1"}
+%def op_div_double():
+% fbinopWide(instr="div.d fv0, fa0, fa1")
diff --git a/runtime/interpreter/mterp/mips/op_div_double_2addr.S b/runtime/interpreter/mterp/mips/op_div_double_2addr.S
index 65b92e3..aa6d16d 100644
--- a/runtime/interpreter/mterp/mips/op_div_double_2addr.S
+++ b/runtime/interpreter/mterp/mips/op_div_double_2addr.S
@@ -1 +1,2 @@
-%include "mips/fbinopWide2addr.S" {"instr":"div.d fv0, fa0, fa1"}
+%def op_div_double_2addr():
+% fbinopWide2addr(instr="div.d fv0, fa0, fa1")
diff --git a/runtime/interpreter/mterp/mips/op_div_float.S b/runtime/interpreter/mterp/mips/op_div_float.S
index 44b8d47..b00c44c 100644
--- a/runtime/interpreter/mterp/mips/op_div_float.S
+++ b/runtime/interpreter/mterp/mips/op_div_float.S
@@ -1 +1,2 @@
-%include "mips/fbinop.S" {"instr":"div.s fv0, fa0, fa1"}
+%def op_div_float():
+% fbinop(instr="div.s fv0, fa0, fa1")
diff --git a/runtime/interpreter/mterp/mips/op_div_float_2addr.S b/runtime/interpreter/mterp/mips/op_div_float_2addr.S
index e5fff92..5201603 100644
--- a/runtime/interpreter/mterp/mips/op_div_float_2addr.S
+++ b/runtime/interpreter/mterp/mips/op_div_float_2addr.S
@@ -1 +1,2 @@
-%include "mips/fbinop2addr.S" {"instr":"div.s fv0, fa0, fa1"}
+%def op_div_float_2addr():
+% fbinop2addr(instr="div.s fv0, fa0, fa1")
diff --git a/runtime/interpreter/mterp/mips/op_div_int.S b/runtime/interpreter/mterp/mips/op_div_int.S
index 5d28c84..2b49fd2 100644
--- a/runtime/interpreter/mterp/mips/op_div_int.S
+++ b/runtime/interpreter/mterp/mips/op_div_int.S
@@ -1,5 +1,6 @@
+%def op_div_int():
#ifdef MIPS32REVGE6
-%include "mips/binop.S" {"instr":"div a0, a0, a1", "chkzero":"1"}
+% binop(instr="div a0, a0, a1", chkzero="1")
#else
-%include "mips/binop.S" {"preinstr":"div zero, a0, a1", "instr":"mflo a0", "chkzero":"1"}
+% binop(preinstr="div zero, a0, a1", instr="mflo a0", chkzero="1")
#endif
diff --git a/runtime/interpreter/mterp/mips/op_div_int_2addr.S b/runtime/interpreter/mterp/mips/op_div_int_2addr.S
index 6c079e0..325a5e6 100644
--- a/runtime/interpreter/mterp/mips/op_div_int_2addr.S
+++ b/runtime/interpreter/mterp/mips/op_div_int_2addr.S
@@ -1,5 +1,6 @@
+%def op_div_int_2addr():
#ifdef MIPS32REVGE6
-%include "mips/binop2addr.S" {"instr":"div a0, a0, a1", "chkzero":"1"}
+% binop2addr(instr="div a0, a0, a1", chkzero="1")
#else
-%include "mips/binop2addr.S" {"preinstr":"div zero, a0, a1", "instr":"mflo a0", "chkzero":"1"}
+% binop2addr(preinstr="div zero, a0, a1", instr="mflo a0", chkzero="1")
#endif
diff --git a/runtime/interpreter/mterp/mips/op_div_int_lit16.S b/runtime/interpreter/mterp/mips/op_div_int_lit16.S
index ee7452c..7eaf340 100644
--- a/runtime/interpreter/mterp/mips/op_div_int_lit16.S
+++ b/runtime/interpreter/mterp/mips/op_div_int_lit16.S
@@ -1,5 +1,6 @@
+%def op_div_int_lit16():
#ifdef MIPS32REVGE6
-%include "mips/binopLit16.S" {"instr":"div a0, a0, a1", "chkzero":"1"}
+% binopLit16(instr="div a0, a0, a1", chkzero="1")
#else
-%include "mips/binopLit16.S" {"preinstr":"div zero, a0, a1", "instr":"mflo a0", "chkzero":"1"}
+% binopLit16(preinstr="div zero, a0, a1", instr="mflo a0", chkzero="1")
#endif
diff --git a/runtime/interpreter/mterp/mips/op_div_int_lit8.S b/runtime/interpreter/mterp/mips/op_div_int_lit8.S
index d2964b8..b6aebb7 100644
--- a/runtime/interpreter/mterp/mips/op_div_int_lit8.S
+++ b/runtime/interpreter/mterp/mips/op_div_int_lit8.S
@@ -1,5 +1,6 @@
+%def op_div_int_lit8():
#ifdef MIPS32REVGE6
-%include "mips/binopLit8.S" {"instr":"div a0, a0, a1", "chkzero":"1"}
+% binopLit8(instr="div a0, a0, a1", chkzero="1")
#else
-%include "mips/binopLit8.S" {"preinstr":"div zero, a0, a1", "instr":"mflo a0", "chkzero":"1"}
+% binopLit8(preinstr="div zero, a0, a1", instr="mflo a0", chkzero="1")
#endif
diff --git a/runtime/interpreter/mterp/mips/op_div_long.S b/runtime/interpreter/mterp/mips/op_div_long.S
index 2097866..6311259 100644
--- a/runtime/interpreter/mterp/mips/op_div_long.S
+++ b/runtime/interpreter/mterp/mips/op_div_long.S
@@ -1 +1,2 @@
-%include "mips/binopWide.S" {"result0":"v0", "result1":"v1", "instr":"JAL(__divdi3)", "chkzero":"1"}
+%def op_div_long():
+% binopWide(result0="v0", result1="v1", instr="JAL(__divdi3)", chkzero="1")
diff --git a/runtime/interpreter/mterp/mips/op_div_long_2addr.S b/runtime/interpreter/mterp/mips/op_div_long_2addr.S
index c279305..b3f7293 100644
--- a/runtime/interpreter/mterp/mips/op_div_long_2addr.S
+++ b/runtime/interpreter/mterp/mips/op_div_long_2addr.S
@@ -1 +1,2 @@
-%include "mips/binopWide2addr.S" {"result0":"v0", "result1":"v1", "instr":"JAL(__divdi3)", "chkzero":"1"}
+%def op_div_long_2addr():
+% binopWide2addr(result0="v0", result1="v1", instr="JAL(__divdi3)", chkzero="1")
diff --git a/runtime/interpreter/mterp/mips/op_double_to_float.S b/runtime/interpreter/mterp/mips/op_double_to_float.S
index 1d32c2e..c3f2fed 100644
--- a/runtime/interpreter/mterp/mips/op_double_to_float.S
+++ b/runtime/interpreter/mterp/mips/op_double_to_float.S
@@ -1 +1,2 @@
-%include "mips/unopNarrower.S" {"instr":"cvt.s.d fv0, fa0"}
+%def op_double_to_float():
+% unopNarrower(instr="cvt.s.d fv0, fa0")
diff --git a/runtime/interpreter/mterp/mips/op_double_to_int.S b/runtime/interpreter/mterp/mips/op_double_to_int.S
index 6d7c6ca..a522c9c 100644
--- a/runtime/interpreter/mterp/mips/op_double_to_int.S
+++ b/runtime/interpreter/mterp/mips/op_double_to_int.S
@@ -1,3 +1,4 @@
+%def op_double_to_int():
/*
* double-to-int
*
diff --git a/runtime/interpreter/mterp/mips/op_double_to_long.S b/runtime/interpreter/mterp/mips/op_double_to_long.S
index 459ab7e..bfc17f5 100644
--- a/runtime/interpreter/mterp/mips/op_double_to_long.S
+++ b/runtime/interpreter/mterp/mips/op_double_to_long.S
@@ -1,3 +1,4 @@
+%def op_double_to_long():
/*
* double-to-long
*
@@ -40,7 +41,7 @@
GET_INST_OPCODE(t1) # extract opcode from rINST
b .L${opcode}_set_vreg
#endif
-%break
+%def op_double_to_long_sister_code():
#ifndef MIPS32REVGE6
.L${opcode}_get_opcode:
diff --git a/runtime/interpreter/mterp/mips/op_fill_array_data.S b/runtime/interpreter/mterp/mips/op_fill_array_data.S
index c3cd371..558f68e 100644
--- a/runtime/interpreter/mterp/mips/op_fill_array_data.S
+++ b/runtime/interpreter/mterp/mips/op_fill_array_data.S
@@ -1,3 +1,4 @@
+%def op_fill_array_data():
/* fill-array-data vAA, +BBBBBBBB */
EXPORT_PC()
FETCH(a1, 1) # a1 <- bbbb (lo)
diff --git a/runtime/interpreter/mterp/mips/op_filled_new_array.S b/runtime/interpreter/mterp/mips/op_filled_new_array.S
index 9511578..6ac6314 100644
--- a/runtime/interpreter/mterp/mips/op_filled_new_array.S
+++ b/runtime/interpreter/mterp/mips/op_filled_new_array.S
@@ -1,4 +1,4 @@
-%default { "helper":"MterpFilledNewArray" }
+%def op_filled_new_array(helper="MterpFilledNewArray"):
/*
* Create a new array with elements filled from registers.
*
diff --git a/runtime/interpreter/mterp/mips/op_filled_new_array_range.S b/runtime/interpreter/mterp/mips/op_filled_new_array_range.S
index f8dcb0e..1667de1 100644
--- a/runtime/interpreter/mterp/mips/op_filled_new_array_range.S
+++ b/runtime/interpreter/mterp/mips/op_filled_new_array_range.S
@@ -1 +1,2 @@
-%include "mips/op_filled_new_array.S" { "helper":"MterpFilledNewArrayRange" }
+%def op_filled_new_array_range():
+% op_filled_new_array(helper="MterpFilledNewArrayRange")
diff --git a/runtime/interpreter/mterp/mips/op_float_to_double.S b/runtime/interpreter/mterp/mips/op_float_to_double.S
index 1315255..c0235a8 100644
--- a/runtime/interpreter/mterp/mips/op_float_to_double.S
+++ b/runtime/interpreter/mterp/mips/op_float_to_double.S
@@ -1 +1,2 @@
-%include "mips/funopWider.S" {"instr":"cvt.d.s fv0, fa0"}
+%def op_float_to_double():
+% funopWider(instr="cvt.d.s fv0, fa0")
diff --git a/runtime/interpreter/mterp/mips/op_float_to_int.S b/runtime/interpreter/mterp/mips/op_float_to_int.S
index 26a0988..2c0c418 100644
--- a/runtime/interpreter/mterp/mips/op_float_to_int.S
+++ b/runtime/interpreter/mterp/mips/op_float_to_int.S
@@ -1,3 +1,4 @@
+%def op_float_to_int():
/*
* float-to-int
*
diff --git a/runtime/interpreter/mterp/mips/op_float_to_long.S b/runtime/interpreter/mterp/mips/op_float_to_long.S
index b8f8efb..2134e63 100644
--- a/runtime/interpreter/mterp/mips/op_float_to_long.S
+++ b/runtime/interpreter/mterp/mips/op_float_to_long.S
@@ -1,3 +1,4 @@
+%def op_float_to_long():
/*
* float-to-long
*
@@ -38,7 +39,7 @@
GET_INST_OPCODE(t1) # extract opcode from rINST
b .L${opcode}_set_vreg
#endif
-%break
+%def op_float_to_long_sister_code():
#ifndef MIPS32REVGE6
.L${opcode}_get_opcode:
diff --git a/runtime/interpreter/mterp/mips/op_goto.S b/runtime/interpreter/mterp/mips/op_goto.S
index 57182a5..8da1339 100644
--- a/runtime/interpreter/mterp/mips/op_goto.S
+++ b/runtime/interpreter/mterp/mips/op_goto.S
@@ -1,3 +1,4 @@
+%def op_goto():
/*
* Unconditional branch, 8-bit offset.
*
diff --git a/runtime/interpreter/mterp/mips/op_goto_16.S b/runtime/interpreter/mterp/mips/op_goto_16.S
index 06c96cd..55a055b 100644
--- a/runtime/interpreter/mterp/mips/op_goto_16.S
+++ b/runtime/interpreter/mterp/mips/op_goto_16.S
@@ -1,3 +1,4 @@
+%def op_goto_16():
/*
* Unconditional branch, 16-bit offset.
*
diff --git a/runtime/interpreter/mterp/mips/op_goto_32.S b/runtime/interpreter/mterp/mips/op_goto_32.S
index ef5bf6b..e969bd2 100644
--- a/runtime/interpreter/mterp/mips/op_goto_32.S
+++ b/runtime/interpreter/mterp/mips/op_goto_32.S
@@ -1,3 +1,4 @@
+%def op_goto_32():
/*
* Unconditional branch, 32-bit offset.
*
diff --git a/runtime/interpreter/mterp/mips/op_if_eq.S b/runtime/interpreter/mterp/mips/op_if_eq.S
index d6f9987..da58674 100644
--- a/runtime/interpreter/mterp/mips/op_if_eq.S
+++ b/runtime/interpreter/mterp/mips/op_if_eq.S
@@ -1 +1,2 @@
-%include "mips/bincmp.S" { "condition":"eq" }
+%def op_if_eq():
+% bincmp(condition="eq")
diff --git a/runtime/interpreter/mterp/mips/op_if_eqz.S b/runtime/interpreter/mterp/mips/op_if_eqz.S
index c52b76a..0639664 100644
--- a/runtime/interpreter/mterp/mips/op_if_eqz.S
+++ b/runtime/interpreter/mterp/mips/op_if_eqz.S
@@ -1 +1,2 @@
-%include "mips/zcmp.S" { "condition":"eq" }
+%def op_if_eqz():
+% zcmp(condition="eq")
diff --git a/runtime/interpreter/mterp/mips/op_if_ge.S b/runtime/interpreter/mterp/mips/op_if_ge.S
index bd06ff5..5b6ed2f 100644
--- a/runtime/interpreter/mterp/mips/op_if_ge.S
+++ b/runtime/interpreter/mterp/mips/op_if_ge.S
@@ -1 +1,2 @@
-%include "mips/bincmp.S" { "condition":"ge" }
+%def op_if_ge():
+% bincmp(condition="ge")
diff --git a/runtime/interpreter/mterp/mips/op_if_gez.S b/runtime/interpreter/mterp/mips/op_if_gez.S
index 549231a..ea6cda7 100644
--- a/runtime/interpreter/mterp/mips/op_if_gez.S
+++ b/runtime/interpreter/mterp/mips/op_if_gez.S
@@ -1 +1,2 @@
-%include "mips/zcmp.S" { "condition":"ge" }
+%def op_if_gez():
+% zcmp(condition="ge")
diff --git a/runtime/interpreter/mterp/mips/op_if_gt.S b/runtime/interpreter/mterp/mips/op_if_gt.S
index 0be3091..201decf 100644
--- a/runtime/interpreter/mterp/mips/op_if_gt.S
+++ b/runtime/interpreter/mterp/mips/op_if_gt.S
@@ -1 +1,2 @@
-%include "mips/bincmp.S" { "condition":"gt" }
+%def op_if_gt():
+% bincmp(condition="gt")
diff --git a/runtime/interpreter/mterp/mips/op_if_gtz.S b/runtime/interpreter/mterp/mips/op_if_gtz.S
index 5c7bcc4..1fdbb6e 100644
--- a/runtime/interpreter/mterp/mips/op_if_gtz.S
+++ b/runtime/interpreter/mterp/mips/op_if_gtz.S
@@ -1 +1,2 @@
-%include "mips/zcmp.S" { "condition":"gt" }
+%def op_if_gtz():
+% zcmp(condition="gt")
diff --git a/runtime/interpreter/mterp/mips/op_if_le.S b/runtime/interpreter/mterp/mips/op_if_le.S
index c35c1a2..e6024f2 100644
--- a/runtime/interpreter/mterp/mips/op_if_le.S
+++ b/runtime/interpreter/mterp/mips/op_if_le.S
@@ -1 +1,2 @@
-%include "mips/bincmp.S" { "condition":"le" }
+%def op_if_le():
+% bincmp(condition="le")
diff --git a/runtime/interpreter/mterp/mips/op_if_lez.S b/runtime/interpreter/mterp/mips/op_if_lez.S
index 3dc6543..62c0d2c 100644
--- a/runtime/interpreter/mterp/mips/op_if_lez.S
+++ b/runtime/interpreter/mterp/mips/op_if_lez.S
@@ -1 +1,2 @@
-%include "mips/zcmp.S" { "condition":"le" }
+%def op_if_lez():
+% zcmp(condition="le")
diff --git a/runtime/interpreter/mterp/mips/op_if_lt.S b/runtime/interpreter/mterp/mips/op_if_lt.S
index 3f3386c..4ef22fd 100644
--- a/runtime/interpreter/mterp/mips/op_if_lt.S
+++ b/runtime/interpreter/mterp/mips/op_if_lt.S
@@ -1 +1,2 @@
-%include "mips/bincmp.S" { "condition":"lt" }
+%def op_if_lt():
+% bincmp(condition="lt")
diff --git a/runtime/interpreter/mterp/mips/op_if_ltz.S b/runtime/interpreter/mterp/mips/op_if_ltz.S
index e6d6ed6..84b2d0b 100644
--- a/runtime/interpreter/mterp/mips/op_if_ltz.S
+++ b/runtime/interpreter/mterp/mips/op_if_ltz.S
@@ -1 +1,2 @@
-%include "mips/zcmp.S" { "condition":"lt" }
+%def op_if_ltz():
+% zcmp(condition="lt")
diff --git a/runtime/interpreter/mterp/mips/op_if_ne.S b/runtime/interpreter/mterp/mips/op_if_ne.S
index 3d7bf35..ec3a688 100644
--- a/runtime/interpreter/mterp/mips/op_if_ne.S
+++ b/runtime/interpreter/mterp/mips/op_if_ne.S
@@ -1 +1,2 @@
-%include "mips/bincmp.S" { "condition":"ne" }
+%def op_if_ne():
+% bincmp(condition="ne")
diff --git a/runtime/interpreter/mterp/mips/op_if_nez.S b/runtime/interpreter/mterp/mips/op_if_nez.S
index d121eae..7009c3a 100644
--- a/runtime/interpreter/mterp/mips/op_if_nez.S
+++ b/runtime/interpreter/mterp/mips/op_if_nez.S
@@ -1 +1,2 @@
-%include "mips/zcmp.S" { "condition":"ne" }
+%def op_if_nez():
+% zcmp(condition="ne")
diff --git a/runtime/interpreter/mterp/mips/op_iget.S b/runtime/interpreter/mterp/mips/op_iget.S
index e218272..d09edc0 100644
--- a/runtime/interpreter/mterp/mips/op_iget.S
+++ b/runtime/interpreter/mterp/mips/op_iget.S
@@ -1,2 +1,2 @@
-%default { "is_object":"0", "helper":"MterpIGetU32"}
-%include "mips/field.S" { }
+%def op_iget(is_object="0", helper="MterpIGetU32"):
+% field(helper=helper)
diff --git a/runtime/interpreter/mterp/mips/op_iget_boolean.S b/runtime/interpreter/mterp/mips/op_iget_boolean.S
index f2ef68d..cb8edee 100644
--- a/runtime/interpreter/mterp/mips/op_iget_boolean.S
+++ b/runtime/interpreter/mterp/mips/op_iget_boolean.S
@@ -1 +1,2 @@
-%include "mips/op_iget.S" { "helper":"MterpIGetU8" }
+%def op_iget_boolean():
+% op_iget(helper="MterpIGetU8")
diff --git a/runtime/interpreter/mterp/mips/op_iget_boolean_quick.S b/runtime/interpreter/mterp/mips/op_iget_boolean_quick.S
index f3032b3..f3d2cb1 100644
--- a/runtime/interpreter/mterp/mips/op_iget_boolean_quick.S
+++ b/runtime/interpreter/mterp/mips/op_iget_boolean_quick.S
@@ -1 +1,2 @@
-%include "mips/op_iget_quick.S" { "load":"lbu" }
+%def op_iget_boolean_quick():
+% op_iget_quick(load="lbu")
diff --git a/runtime/interpreter/mterp/mips/op_iget_byte.S b/runtime/interpreter/mterp/mips/op_iget_byte.S
index 0c8fb7c..2b87fb1 100644
--- a/runtime/interpreter/mterp/mips/op_iget_byte.S
+++ b/runtime/interpreter/mterp/mips/op_iget_byte.S
@@ -1 +1,2 @@
-%include "mips/op_iget.S" { "helper":"MterpIGetI8" }
+%def op_iget_byte():
+% op_iget(helper="MterpIGetI8")
diff --git a/runtime/interpreter/mterp/mips/op_iget_byte_quick.S b/runtime/interpreter/mterp/mips/op_iget_byte_quick.S
index d93f844..ddb469b 100644
--- a/runtime/interpreter/mterp/mips/op_iget_byte_quick.S
+++ b/runtime/interpreter/mterp/mips/op_iget_byte_quick.S
@@ -1 +1,2 @@
-%include "mips/op_iget_quick.S" { "load":"lb" }
+%def op_iget_byte_quick():
+% op_iget_quick(load="lb")
diff --git a/runtime/interpreter/mterp/mips/op_iget_char.S b/runtime/interpreter/mterp/mips/op_iget_char.S
index 69d04c4..001bd03 100644
--- a/runtime/interpreter/mterp/mips/op_iget_char.S
+++ b/runtime/interpreter/mterp/mips/op_iget_char.S
@@ -1 +1,2 @@
-%include "mips/op_iget.S" { "helper":"MterpIGetU16" }
+%def op_iget_char():
+% op_iget(helper="MterpIGetU16")
diff --git a/runtime/interpreter/mterp/mips/op_iget_char_quick.S b/runtime/interpreter/mterp/mips/op_iget_char_quick.S
index 6f6d608..ef0b350 100644
--- a/runtime/interpreter/mterp/mips/op_iget_char_quick.S
+++ b/runtime/interpreter/mterp/mips/op_iget_char_quick.S
@@ -1 +1,2 @@
-%include "mips/op_iget_quick.S" { "load":"lhu" }
+%def op_iget_char_quick():
+% op_iget_quick(load="lhu")
diff --git a/runtime/interpreter/mterp/mips/op_iget_object.S b/runtime/interpreter/mterp/mips/op_iget_object.S
index bea330a..4e5f769 100644
--- a/runtime/interpreter/mterp/mips/op_iget_object.S
+++ b/runtime/interpreter/mterp/mips/op_iget_object.S
@@ -1 +1,2 @@
-%include "mips/op_iget.S" { "is_object":"1", "helper":"MterpIGetObj" }
+%def op_iget_object():
+% op_iget(is_object="1", helper="MterpIGetObj")
diff --git a/runtime/interpreter/mterp/mips/op_iget_object_quick.S b/runtime/interpreter/mterp/mips/op_iget_object_quick.S
index 95c34d7..8bfd40b 100644
--- a/runtime/interpreter/mterp/mips/op_iget_object_quick.S
+++ b/runtime/interpreter/mterp/mips/op_iget_object_quick.S
@@ -1,3 +1,4 @@
+%def op_iget_object_quick():
/* For: iget-object-quick */
/* op vA, vB, offset@CCCC */
GET_OPB(a2) # a2 <- B
diff --git a/runtime/interpreter/mterp/mips/op_iget_quick.S b/runtime/interpreter/mterp/mips/op_iget_quick.S
index 46277d3..b8892fd 100644
--- a/runtime/interpreter/mterp/mips/op_iget_quick.S
+++ b/runtime/interpreter/mterp/mips/op_iget_quick.S
@@ -1,4 +1,4 @@
-%default { "load":"lw" }
+%def op_iget_quick(load="lw"):
/* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick */
/* op vA, vB, offset@CCCC */
GET_OPB(a2) # a2 <- B
diff --git a/runtime/interpreter/mterp/mips/op_iget_short.S b/runtime/interpreter/mterp/mips/op_iget_short.S
index 357c791..a62c4d9 100644
--- a/runtime/interpreter/mterp/mips/op_iget_short.S
+++ b/runtime/interpreter/mterp/mips/op_iget_short.S
@@ -1 +1,2 @@
-%include "mips/op_iget.S" { "helper":"MterpIGetI16" }
+%def op_iget_short():
+% op_iget(helper="MterpIGetI16")
diff --git a/runtime/interpreter/mterp/mips/op_iget_short_quick.S b/runtime/interpreter/mterp/mips/op_iget_short_quick.S
index 899a0fe..5957cb4 100644
--- a/runtime/interpreter/mterp/mips/op_iget_short_quick.S
+++ b/runtime/interpreter/mterp/mips/op_iget_short_quick.S
@@ -1 +1,2 @@
-%include "mips/op_iget_quick.S" { "load":"lh" }
+%def op_iget_short_quick():
+% op_iget_quick(load="lh")
diff --git a/runtime/interpreter/mterp/mips/op_iget_wide.S b/runtime/interpreter/mterp/mips/op_iget_wide.S
index 885372a..9643cc3 100644
--- a/runtime/interpreter/mterp/mips/op_iget_wide.S
+++ b/runtime/interpreter/mterp/mips/op_iget_wide.S
@@ -1 +1,2 @@
-%include "mips/op_iget.S" { "helper":"MterpIGetU64" }
+%def op_iget_wide():
+% op_iget(helper="MterpIGetU64")
diff --git a/runtime/interpreter/mterp/mips/op_iget_wide_quick.S b/runtime/interpreter/mterp/mips/op_iget_wide_quick.S
index 128be57..5bc9076 100644
--- a/runtime/interpreter/mterp/mips/op_iget_wide_quick.S
+++ b/runtime/interpreter/mterp/mips/op_iget_wide_quick.S
@@ -1,3 +1,4 @@
+%def op_iget_wide_quick():
/* iget-wide-quick vA, vB, offset@CCCC */
GET_OPB(a2) # a2 <- B
GET_VREG(a3, a2) # a3 <- object we're operating on
diff --git a/runtime/interpreter/mterp/mips/op_instance_of.S b/runtime/interpreter/mterp/mips/op_instance_of.S
index 706dcf3..9312e72 100644
--- a/runtime/interpreter/mterp/mips/op_instance_of.S
+++ b/runtime/interpreter/mterp/mips/op_instance_of.S
@@ -1,3 +1,4 @@
+%def op_instance_of():
/*
* Check to see if an object reference is an instance of a class.
*
diff --git a/runtime/interpreter/mterp/mips/op_int_to_byte.S b/runtime/interpreter/mterp/mips/op_int_to_byte.S
index 9266aab..5841725 100644
--- a/runtime/interpreter/mterp/mips/op_int_to_byte.S
+++ b/runtime/interpreter/mterp/mips/op_int_to_byte.S
@@ -1 +1,2 @@
-%include "mips/unop.S" {"instr":"SEB(a0, a0)"}
+%def op_int_to_byte():
+% unop(instr="SEB(a0, a0)")
diff --git a/runtime/interpreter/mterp/mips/op_int_to_char.S b/runtime/interpreter/mterp/mips/op_int_to_char.S
index 1b74a6e..7fda637 100644
--- a/runtime/interpreter/mterp/mips/op_int_to_char.S
+++ b/runtime/interpreter/mterp/mips/op_int_to_char.S
@@ -1 +1,2 @@
-%include "mips/unop.S" {"preinstr":"", "instr":"and a0, 0xffff"}
+%def op_int_to_char():
+% unop(preinstr="", instr="and a0, 0xffff")
diff --git a/runtime/interpreter/mterp/mips/op_int_to_double.S b/runtime/interpreter/mterp/mips/op_int_to_double.S
index 89484ce..736ebb3 100644
--- a/runtime/interpreter/mterp/mips/op_int_to_double.S
+++ b/runtime/interpreter/mterp/mips/op_int_to_double.S
@@ -1 +1,2 @@
-%include "mips/funopWider.S" {"instr":"cvt.d.w fv0, fa0"}
+%def op_int_to_double():
+% funopWider(instr="cvt.d.w fv0, fa0")
diff --git a/runtime/interpreter/mterp/mips/op_int_to_float.S b/runtime/interpreter/mterp/mips/op_int_to_float.S
index d6f4b36..45ab4c8 100644
--- a/runtime/interpreter/mterp/mips/op_int_to_float.S
+++ b/runtime/interpreter/mterp/mips/op_int_to_float.S
@@ -1 +1,2 @@
-%include "mips/funop.S" {"instr":"cvt.s.w fv0, fa0"}
+%def op_int_to_float():
+% funop(instr="cvt.s.w fv0, fa0")
diff --git a/runtime/interpreter/mterp/mips/op_int_to_long.S b/runtime/interpreter/mterp/mips/op_int_to_long.S
index 9907463..093f181 100644
--- a/runtime/interpreter/mterp/mips/op_int_to_long.S
+++ b/runtime/interpreter/mterp/mips/op_int_to_long.S
@@ -1 +1,2 @@
-%include "mips/unopWider.S" {"instr":"sra a1, a0, 31"}
+%def op_int_to_long():
+% unopWider(instr="sra a1, a0, 31")
diff --git a/runtime/interpreter/mterp/mips/op_int_to_short.S b/runtime/interpreter/mterp/mips/op_int_to_short.S
index 8749cd8..38bc451 100644
--- a/runtime/interpreter/mterp/mips/op_int_to_short.S
+++ b/runtime/interpreter/mterp/mips/op_int_to_short.S
@@ -1 +1,2 @@
-%include "mips/unop.S" {"instr":"SEH(a0, a0)"}
+%def op_int_to_short():
+% unop(instr="SEH(a0, a0)")
diff --git a/runtime/interpreter/mterp/mips/op_invoke_custom.S b/runtime/interpreter/mterp/mips/op_invoke_custom.S
index f9241c4..4bba9ee 100644
--- a/runtime/interpreter/mterp/mips/op_invoke_custom.S
+++ b/runtime/interpreter/mterp/mips/op_invoke_custom.S
@@ -1 +1,2 @@
-%include "mips/invoke.S" { "helper":"MterpInvokeCustom" }
+%def op_invoke_custom():
+% invoke(helper="MterpInvokeCustom")
diff --git a/runtime/interpreter/mterp/mips/op_invoke_custom_range.S b/runtime/interpreter/mterp/mips/op_invoke_custom_range.S
index 862a614..57e61af 100644
--- a/runtime/interpreter/mterp/mips/op_invoke_custom_range.S
+++ b/runtime/interpreter/mterp/mips/op_invoke_custom_range.S
@@ -1 +1,2 @@
-%include "mips/invoke.S" { "helper":"MterpInvokeCustomRange" }
+%def op_invoke_custom_range():
+% invoke(helper="MterpInvokeCustomRange")
diff --git a/runtime/interpreter/mterp/mips/op_invoke_direct.S b/runtime/interpreter/mterp/mips/op_invoke_direct.S
index 1ef198a..d3139cf 100644
--- a/runtime/interpreter/mterp/mips/op_invoke_direct.S
+++ b/runtime/interpreter/mterp/mips/op_invoke_direct.S
@@ -1 +1,2 @@
-%include "mips/invoke.S" { "helper":"MterpInvokeDirect" }
+%def op_invoke_direct():
+% invoke(helper="MterpInvokeDirect")
diff --git a/runtime/interpreter/mterp/mips/op_invoke_direct_range.S b/runtime/interpreter/mterp/mips/op_invoke_direct_range.S
index af7477f..b4a161f 100644
--- a/runtime/interpreter/mterp/mips/op_invoke_direct_range.S
+++ b/runtime/interpreter/mterp/mips/op_invoke_direct_range.S
@@ -1 +1,2 @@
-%include "mips/invoke.S" { "helper":"MterpInvokeDirectRange" }
+%def op_invoke_direct_range():
+% invoke(helper="MterpInvokeDirectRange")
diff --git a/runtime/interpreter/mterp/mips/op_invoke_interface.S b/runtime/interpreter/mterp/mips/op_invoke_interface.S
index 80a485a..2e749aa 100644
--- a/runtime/interpreter/mterp/mips/op_invoke_interface.S
+++ b/runtime/interpreter/mterp/mips/op_invoke_interface.S
@@ -1 +1,2 @@
-%include "mips/invoke.S" { "helper":"MterpInvokeInterface" }
+%def op_invoke_interface():
+% invoke(helper="MterpInvokeInterface")
diff --git a/runtime/interpreter/mterp/mips/op_invoke_interface_range.S b/runtime/interpreter/mterp/mips/op_invoke_interface_range.S
index 8d725dc..2989115 100644
--- a/runtime/interpreter/mterp/mips/op_invoke_interface_range.S
+++ b/runtime/interpreter/mterp/mips/op_invoke_interface_range.S
@@ -1 +1,2 @@
-%include "mips/invoke.S" { "helper":"MterpInvokeInterfaceRange" }
+%def op_invoke_interface_range():
+% invoke(helper="MterpInvokeInterfaceRange")
diff --git a/runtime/interpreter/mterp/mips/op_invoke_polymorphic.S b/runtime/interpreter/mterp/mips/op_invoke_polymorphic.S
index 85e01e7..ce61f5a 100644
--- a/runtime/interpreter/mterp/mips/op_invoke_polymorphic.S
+++ b/runtime/interpreter/mterp/mips/op_invoke_polymorphic.S
@@ -1 +1,2 @@
-%include "mips/invoke_polymorphic.S" { "helper":"MterpInvokePolymorphic" }
+%def op_invoke_polymorphic():
+% invoke_polymorphic(helper="MterpInvokePolymorphic")
diff --git a/runtime/interpreter/mterp/mips/op_invoke_polymorphic_range.S b/runtime/interpreter/mterp/mips/op_invoke_polymorphic_range.S
index ce63978..16731bd 100644
--- a/runtime/interpreter/mterp/mips/op_invoke_polymorphic_range.S
+++ b/runtime/interpreter/mterp/mips/op_invoke_polymorphic_range.S
@@ -1 +1,2 @@
-%include "mips/invoke_polymorphic.S" { "helper":"MterpInvokePolymorphicRange" }
+%def op_invoke_polymorphic_range():
+% invoke_polymorphic(helper="MterpInvokePolymorphicRange")
diff --git a/runtime/interpreter/mterp/mips/op_invoke_static.S b/runtime/interpreter/mterp/mips/op_invoke_static.S
index 46253cb..8b104a6 100644
--- a/runtime/interpreter/mterp/mips/op_invoke_static.S
+++ b/runtime/interpreter/mterp/mips/op_invoke_static.S
@@ -1 +1,2 @@
-%include "mips/invoke.S" { "helper":"MterpInvokeStatic" }
+%def op_invoke_static():
+% invoke(helper="MterpInvokeStatic")
diff --git a/runtime/interpreter/mterp/mips/op_invoke_static_range.S b/runtime/interpreter/mterp/mips/op_invoke_static_range.S
index 96abafe..e0a546c 100644
--- a/runtime/interpreter/mterp/mips/op_invoke_static_range.S
+++ b/runtime/interpreter/mterp/mips/op_invoke_static_range.S
@@ -1 +1,2 @@
-%include "mips/invoke.S" { "helper":"MterpInvokeStaticRange" }
+%def op_invoke_static_range():
+% invoke(helper="MterpInvokeStaticRange")
diff --git a/runtime/interpreter/mterp/mips/op_invoke_super.S b/runtime/interpreter/mterp/mips/op_invoke_super.S
index 473951b..e5921f3 100644
--- a/runtime/interpreter/mterp/mips/op_invoke_super.S
+++ b/runtime/interpreter/mterp/mips/op_invoke_super.S
@@ -1 +1,2 @@
-%include "mips/invoke.S" { "helper":"MterpInvokeSuper" }
+%def op_invoke_super():
+% invoke(helper="MterpInvokeSuper")
diff --git a/runtime/interpreter/mterp/mips/op_invoke_super_range.S b/runtime/interpreter/mterp/mips/op_invoke_super_range.S
index 963ff27..caeafaa 100644
--- a/runtime/interpreter/mterp/mips/op_invoke_super_range.S
+++ b/runtime/interpreter/mterp/mips/op_invoke_super_range.S
@@ -1 +1,2 @@
-%include "mips/invoke.S" { "helper":"MterpInvokeSuperRange" }
+%def op_invoke_super_range():
+% invoke(helper="MterpInvokeSuperRange")
diff --git a/runtime/interpreter/mterp/mips/op_invoke_virtual.S b/runtime/interpreter/mterp/mips/op_invoke_virtual.S
index ea51e98..8767741 100644
--- a/runtime/interpreter/mterp/mips/op_invoke_virtual.S
+++ b/runtime/interpreter/mterp/mips/op_invoke_virtual.S
@@ -1 +1,2 @@
-%include "mips/invoke.S" { "helper":"MterpInvokeVirtual" }
+%def op_invoke_virtual():
+% invoke(helper="MterpInvokeVirtual")
diff --git a/runtime/interpreter/mterp/mips/op_invoke_virtual_quick.S b/runtime/interpreter/mterp/mips/op_invoke_virtual_quick.S
index 0c00091..ea72c17 100644
--- a/runtime/interpreter/mterp/mips/op_invoke_virtual_quick.S
+++ b/runtime/interpreter/mterp/mips/op_invoke_virtual_quick.S
@@ -1 +1,2 @@
-%include "mips/invoke.S" { "helper":"MterpInvokeVirtualQuick" }
+%def op_invoke_virtual_quick():
+% invoke(helper="MterpInvokeVirtualQuick")
diff --git a/runtime/interpreter/mterp/mips/op_invoke_virtual_range.S b/runtime/interpreter/mterp/mips/op_invoke_virtual_range.S
index 82201e7..baa0779 100644
--- a/runtime/interpreter/mterp/mips/op_invoke_virtual_range.S
+++ b/runtime/interpreter/mterp/mips/op_invoke_virtual_range.S
@@ -1 +1,2 @@
-%include "mips/invoke.S" { "helper":"MterpInvokeVirtualRange" }
+%def op_invoke_virtual_range():
+% invoke(helper="MterpInvokeVirtualRange")
diff --git a/runtime/interpreter/mterp/mips/op_invoke_virtual_range_quick.S b/runtime/interpreter/mterp/mips/op_invoke_virtual_range_quick.S
index c783675..1d961a0 100644
--- a/runtime/interpreter/mterp/mips/op_invoke_virtual_range_quick.S
+++ b/runtime/interpreter/mterp/mips/op_invoke_virtual_range_quick.S
@@ -1 +1,2 @@
-%include "mips/invoke.S" { "helper":"MterpInvokeVirtualQuickRange" }
+%def op_invoke_virtual_range_quick():
+% invoke(helper="MterpInvokeVirtualQuickRange")
diff --git a/runtime/interpreter/mterp/mips/op_iput.S b/runtime/interpreter/mterp/mips/op_iput.S
index efbdfba..e5351ba 100644
--- a/runtime/interpreter/mterp/mips/op_iput.S
+++ b/runtime/interpreter/mterp/mips/op_iput.S
@@ -1,2 +1,2 @@
-%default { "is_object":"0", "helper":"MterpIPutU32" }
-%include "mips/field.S" { }
+%def op_iput(is_object="0", helper="MterpIPutU32"):
+% field(helper=helper)
diff --git a/runtime/interpreter/mterp/mips/op_iput_boolean.S b/runtime/interpreter/mterp/mips/op_iput_boolean.S
index 55ac4ce..9eb8498 100644
--- a/runtime/interpreter/mterp/mips/op_iput_boolean.S
+++ b/runtime/interpreter/mterp/mips/op_iput_boolean.S
@@ -1 +1,2 @@
-%include "mips/op_iput.S" { "helper":"MterpIPutU8" }
+%def op_iput_boolean():
+% op_iput(helper="MterpIPutU8")
diff --git a/runtime/interpreter/mterp/mips/op_iput_boolean_quick.S b/runtime/interpreter/mterp/mips/op_iput_boolean_quick.S
index 7d5caf6..3d818a5 100644
--- a/runtime/interpreter/mterp/mips/op_iput_boolean_quick.S
+++ b/runtime/interpreter/mterp/mips/op_iput_boolean_quick.S
@@ -1 +1,2 @@
-%include "mips/op_iput_quick.S" { "store":"sb" }
+%def op_iput_boolean_quick():
+% op_iput_quick(store="sb")
diff --git a/runtime/interpreter/mterp/mips/op_iput_byte.S b/runtime/interpreter/mterp/mips/op_iput_byte.S
index 61e489b..4b74f9f 100644
--- a/runtime/interpreter/mterp/mips/op_iput_byte.S
+++ b/runtime/interpreter/mterp/mips/op_iput_byte.S
@@ -1 +1,2 @@
-%include "mips/op_iput.S" { "helper":"MterpIPutI8" }
+%def op_iput_byte():
+% op_iput(helper="MterpIPutI8")
diff --git a/runtime/interpreter/mterp/mips/op_iput_byte_quick.S b/runtime/interpreter/mterp/mips/op_iput_byte_quick.S
index 7d5caf6..06dc24e 100644
--- a/runtime/interpreter/mterp/mips/op_iput_byte_quick.S
+++ b/runtime/interpreter/mterp/mips/op_iput_byte_quick.S
@@ -1 +1,2 @@
-%include "mips/op_iput_quick.S" { "store":"sb" }
+%def op_iput_byte_quick():
+% op_iput_quick(store="sb")
diff --git a/runtime/interpreter/mterp/mips/op_iput_char.S b/runtime/interpreter/mterp/mips/op_iput_char.S
index 2caad1e..64a249f 100644
--- a/runtime/interpreter/mterp/mips/op_iput_char.S
+++ b/runtime/interpreter/mterp/mips/op_iput_char.S
@@ -1 +1,2 @@
-%include "mips/op_iput.S" { "helper":"MterpIPutU16" }
+%def op_iput_char():
+% op_iput(helper="MterpIPutU16")
diff --git a/runtime/interpreter/mterp/mips/op_iput_char_quick.S b/runtime/interpreter/mterp/mips/op_iput_char_quick.S
index 4bc84eb..3b6af5b 100644
--- a/runtime/interpreter/mterp/mips/op_iput_char_quick.S
+++ b/runtime/interpreter/mterp/mips/op_iput_char_quick.S
@@ -1 +1,2 @@
-%include "mips/op_iput_quick.S" { "store":"sh" }
+%def op_iput_char_quick():
+% op_iput_quick(store="sh")
diff --git a/runtime/interpreter/mterp/mips/op_iput_object.S b/runtime/interpreter/mterp/mips/op_iput_object.S
index 6f7e7b7..131edd5 100644
--- a/runtime/interpreter/mterp/mips/op_iput_object.S
+++ b/runtime/interpreter/mterp/mips/op_iput_object.S
@@ -1 +1,2 @@
-%include "mips/op_iput.S" { "is_object":"1", "helper":"MterpIPutObj" }
+%def op_iput_object():
+% op_iput(is_object="1", helper="MterpIPutObj")
diff --git a/runtime/interpreter/mterp/mips/op_iput_object_quick.S b/runtime/interpreter/mterp/mips/op_iput_object_quick.S
index 82044f5..bb3cbe8 100644
--- a/runtime/interpreter/mterp/mips/op_iput_object_quick.S
+++ b/runtime/interpreter/mterp/mips/op_iput_object_quick.S
@@ -1,3 +1,4 @@
+%def op_iput_object_quick():
/* For: iput-object-quick */
/* op vA, vB, offset@CCCC */
EXPORT_PC()
diff --git a/runtime/interpreter/mterp/mips/op_iput_quick.S b/runtime/interpreter/mterp/mips/op_iput_quick.S
index d9753b1..55067be 100644
--- a/runtime/interpreter/mterp/mips/op_iput_quick.S
+++ b/runtime/interpreter/mterp/mips/op_iput_quick.S
@@ -1,4 +1,4 @@
-%default { "store":"sw" }
+%def op_iput_quick(store="sw"):
/* For: iput-quick, iput-object-quick */
/* op vA, vB, offset@CCCC */
GET_OPB(a2) # a2 <- B
diff --git a/runtime/interpreter/mterp/mips/op_iput_short.S b/runtime/interpreter/mterp/mips/op_iput_short.S
index 414a15b..e631a3b 100644
--- a/runtime/interpreter/mterp/mips/op_iput_short.S
+++ b/runtime/interpreter/mterp/mips/op_iput_short.S
@@ -1 +1,2 @@
-%include "mips/op_iput.S" { "helper":"MterpIPutI16" }
+%def op_iput_short():
+% op_iput(helper="MterpIPutI16")
diff --git a/runtime/interpreter/mterp/mips/op_iput_short_quick.S b/runtime/interpreter/mterp/mips/op_iput_short_quick.S
index 4bc84eb..fade093 100644
--- a/runtime/interpreter/mterp/mips/op_iput_short_quick.S
+++ b/runtime/interpreter/mterp/mips/op_iput_short_quick.S
@@ -1 +1,2 @@
-%include "mips/op_iput_quick.S" { "store":"sh" }
+%def op_iput_short_quick():
+% op_iput_quick(store="sh")
diff --git a/runtime/interpreter/mterp/mips/op_iput_wide.S b/runtime/interpreter/mterp/mips/op_iput_wide.S
index fc862e4..2f34fd3 100644
--- a/runtime/interpreter/mterp/mips/op_iput_wide.S
+++ b/runtime/interpreter/mterp/mips/op_iput_wide.S
@@ -1 +1,2 @@
-%include "mips/op_iput.S" { "helper":"MterpIPutU64" }
+%def op_iput_wide():
+% op_iput(helper="MterpIPutU64")
diff --git a/runtime/interpreter/mterp/mips/op_iput_wide_quick.S b/runtime/interpreter/mterp/mips/op_iput_wide_quick.S
index 0eb228d..7b8e632 100644
--- a/runtime/interpreter/mterp/mips/op_iput_wide_quick.S
+++ b/runtime/interpreter/mterp/mips/op_iput_wide_quick.S
@@ -1,3 +1,4 @@
+%def op_iput_wide_quick():
/* iput-wide-quick vA, vB, offset@CCCC */
GET_OPA4(a0) # a0 <- A(+)
GET_OPB(a1) # a1 <- B
diff --git a/runtime/interpreter/mterp/mips/op_long_to_double.S b/runtime/interpreter/mterp/mips/op_long_to_double.S
index 153f582..5dfc76b 100644
--- a/runtime/interpreter/mterp/mips/op_long_to_double.S
+++ b/runtime/interpreter/mterp/mips/op_long_to_double.S
@@ -1,3 +1,4 @@
+%def op_long_to_double():
/*
* long-to-double
*/
diff --git a/runtime/interpreter/mterp/mips/op_long_to_float.S b/runtime/interpreter/mterp/mips/op_long_to_float.S
index dd1ab81..fcf2a2e 100644
--- a/runtime/interpreter/mterp/mips/op_long_to_float.S
+++ b/runtime/interpreter/mterp/mips/op_long_to_float.S
@@ -1,3 +1,4 @@
+%def op_long_to_float():
/*
* long-to-float
*/
diff --git a/runtime/interpreter/mterp/mips/op_long_to_int.S b/runtime/interpreter/mterp/mips/op_long_to_int.S
index 949c180..eacb8f5 100644
--- a/runtime/interpreter/mterp/mips/op_long_to_int.S
+++ b/runtime/interpreter/mterp/mips/op_long_to_int.S
@@ -1,2 +1,3 @@
+%def op_long_to_int():
/* we ignore the high word, making this equivalent to a 32-bit reg move */
-%include "mips/op_move.S"
+% op_move()
diff --git a/runtime/interpreter/mterp/mips/op_monitor_enter.S b/runtime/interpreter/mterp/mips/op_monitor_enter.S
index 20d9029..66e3af5 100644
--- a/runtime/interpreter/mterp/mips/op_monitor_enter.S
+++ b/runtime/interpreter/mterp/mips/op_monitor_enter.S
@@ -1,3 +1,4 @@
+%def op_monitor_enter():
/*
* Synchronize on an object.
*/
diff --git a/runtime/interpreter/mterp/mips/op_monitor_exit.S b/runtime/interpreter/mterp/mips/op_monitor_exit.S
index 1eadff9..d32d75c 100644
--- a/runtime/interpreter/mterp/mips/op_monitor_exit.S
+++ b/runtime/interpreter/mterp/mips/op_monitor_exit.S
@@ -1,3 +1,4 @@
+%def op_monitor_exit():
/*
* Unlock an object.
*
diff --git a/runtime/interpreter/mterp/mips/op_move.S b/runtime/interpreter/mterp/mips/op_move.S
index 547ea3a..a0c1c31 100644
--- a/runtime/interpreter/mterp/mips/op_move.S
+++ b/runtime/interpreter/mterp/mips/op_move.S
@@ -1,4 +1,4 @@
-%default { "is_object":"0" }
+%def op_move(is_object="0"):
/* for move, move-object, long-to-int */
/* op vA, vB */
GET_OPB(a1) # a1 <- B from 15:12
diff --git a/runtime/interpreter/mterp/mips/op_move_16.S b/runtime/interpreter/mterp/mips/op_move_16.S
index 91b7399..273858e 100644
--- a/runtime/interpreter/mterp/mips/op_move_16.S
+++ b/runtime/interpreter/mterp/mips/op_move_16.S
@@ -1,4 +1,4 @@
-%default { "is_object":"0" }
+%def op_move_16(is_object="0"):
/* for: move/16, move-object/16 */
/* op vAAAA, vBBBB */
FETCH(a1, 2) # a1 <- BBBB
diff --git a/runtime/interpreter/mterp/mips/op_move_exception.S b/runtime/interpreter/mterp/mips/op_move_exception.S
index f1bece7..80c554b 100644
--- a/runtime/interpreter/mterp/mips/op_move_exception.S
+++ b/runtime/interpreter/mterp/mips/op_move_exception.S
@@ -1,3 +1,4 @@
+%def op_move_exception():
/* move-exception vAA */
GET_OPA(a2) # a2 <- AA
lw a3, THREAD_EXCEPTION_OFFSET(rSELF) # get exception obj
diff --git a/runtime/interpreter/mterp/mips/op_move_from16.S b/runtime/interpreter/mterp/mips/op_move_from16.S
index 90c25c9..7306ed8 100644
--- a/runtime/interpreter/mterp/mips/op_move_from16.S
+++ b/runtime/interpreter/mterp/mips/op_move_from16.S
@@ -1,4 +1,4 @@
-%default { "is_object":"0" }
+%def op_move_from16(is_object="0"):
/* for: move/from16, move-object/from16 */
/* op vAA, vBBBB */
FETCH(a1, 1) # a1 <- BBBB
diff --git a/runtime/interpreter/mterp/mips/op_move_object.S b/runtime/interpreter/mterp/mips/op_move_object.S
index 9420ff3..dbb4d59 100644
--- a/runtime/interpreter/mterp/mips/op_move_object.S
+++ b/runtime/interpreter/mterp/mips/op_move_object.S
@@ -1 +1,2 @@
-%include "mips/op_move.S" {"is_object":"1"}
+%def op_move_object():
+% op_move(is_object="1")
diff --git a/runtime/interpreter/mterp/mips/op_move_object_16.S b/runtime/interpreter/mterp/mips/op_move_object_16.S
index d6454c2..4012037 100644
--- a/runtime/interpreter/mterp/mips/op_move_object_16.S
+++ b/runtime/interpreter/mterp/mips/op_move_object_16.S
@@ -1 +1,2 @@
-%include "mips/op_move_16.S" {"is_object":"1"}
+%def op_move_object_16():
+% op_move_16(is_object="1")
diff --git a/runtime/interpreter/mterp/mips/op_move_object_from16.S b/runtime/interpreter/mterp/mips/op_move_object_from16.S
index db0aca1..c82698e 100644
--- a/runtime/interpreter/mterp/mips/op_move_object_from16.S
+++ b/runtime/interpreter/mterp/mips/op_move_object_from16.S
@@ -1 +1,2 @@
-%include "mips/op_move_from16.S" {"is_object":"1"}
+%def op_move_object_from16():
+% op_move_from16(is_object="1")
diff --git a/runtime/interpreter/mterp/mips/op_move_result.S b/runtime/interpreter/mterp/mips/op_move_result.S
index a4d5bfe..20651d9 100644
--- a/runtime/interpreter/mterp/mips/op_move_result.S
+++ b/runtime/interpreter/mterp/mips/op_move_result.S
@@ -1,4 +1,4 @@
-%default { "is_object":"0" }
+%def op_move_result(is_object="0"):
/* for: move-result, move-result-object */
/* op vAA */
GET_OPA(a2) # a2 <- AA
diff --git a/runtime/interpreter/mterp/mips/op_move_result_object.S b/runtime/interpreter/mterp/mips/op_move_result_object.S
index fcbffee..87aea26 100644
--- a/runtime/interpreter/mterp/mips/op_move_result_object.S
+++ b/runtime/interpreter/mterp/mips/op_move_result_object.S
@@ -1 +1,2 @@
-%include "mips/op_move_result.S" {"is_object":"1"}
+%def op_move_result_object():
+% op_move_result(is_object="1")
diff --git a/runtime/interpreter/mterp/mips/op_move_result_wide.S b/runtime/interpreter/mterp/mips/op_move_result_wide.S
index 1259218..205f174 100644
--- a/runtime/interpreter/mterp/mips/op_move_result_wide.S
+++ b/runtime/interpreter/mterp/mips/op_move_result_wide.S
@@ -1,3 +1,4 @@
+%def op_move_result_wide():
/* move-result-wide vAA */
GET_OPA(a2) # a2 <- AA
lw a3, OFF_FP_RESULT_REGISTER(rFP) # get pointer to result JType
diff --git a/runtime/interpreter/mterp/mips/op_move_wide.S b/runtime/interpreter/mterp/mips/op_move_wide.S
index 01d0949..ad71022 100644
--- a/runtime/interpreter/mterp/mips/op_move_wide.S
+++ b/runtime/interpreter/mterp/mips/op_move_wide.S
@@ -1,3 +1,4 @@
+%def op_move_wide():
/* move-wide vA, vB */
/* NOTE: regs can overlap, e.g. "move v6, v7" or "move v7, v6" */
GET_OPA4(a2) # a2 <- A(+)
diff --git a/runtime/interpreter/mterp/mips/op_move_wide_16.S b/runtime/interpreter/mterp/mips/op_move_wide_16.S
index 587ba04..60d41a5 100644
--- a/runtime/interpreter/mterp/mips/op_move_wide_16.S
+++ b/runtime/interpreter/mterp/mips/op_move_wide_16.S
@@ -1,3 +1,4 @@
+%def op_move_wide_16():
/* move-wide/16 vAAAA, vBBBB */
/* NOTE: regs can overlap, e.g. "move v6, v7" or "move v7, v6" */
FETCH(a3, 2) # a3 <- BBBB
diff --git a/runtime/interpreter/mterp/mips/op_move_wide_from16.S b/runtime/interpreter/mterp/mips/op_move_wide_from16.S
index 5003fbd..0a970ef 100644
--- a/runtime/interpreter/mterp/mips/op_move_wide_from16.S
+++ b/runtime/interpreter/mterp/mips/op_move_wide_from16.S
@@ -1,3 +1,4 @@
+%def op_move_wide_from16():
/* move-wide/from16 vAA, vBBBB */
/* NOTE: regs can overlap, e.g. "move v6, v7" or "move v7, v6" */
FETCH(a3, 1) # a3 <- BBBB
diff --git a/runtime/interpreter/mterp/mips/op_mul_double.S b/runtime/interpreter/mterp/mips/op_mul_double.S
index 44a473b..609a462 100644
--- a/runtime/interpreter/mterp/mips/op_mul_double.S
+++ b/runtime/interpreter/mterp/mips/op_mul_double.S
@@ -1 +1,2 @@
-%include "mips/fbinopWide.S" {"instr":"mul.d fv0, fa0, fa1"}
+%def op_mul_double():
+% fbinopWide(instr="mul.d fv0, fa0, fa1")
diff --git a/runtime/interpreter/mterp/mips/op_mul_double_2addr.S b/runtime/interpreter/mterp/mips/op_mul_double_2addr.S
index 4e5c230..ae0b13f 100644
--- a/runtime/interpreter/mterp/mips/op_mul_double_2addr.S
+++ b/runtime/interpreter/mterp/mips/op_mul_double_2addr.S
@@ -1 +1,2 @@
-%include "mips/fbinopWide2addr.S" {"instr":"mul.d fv0, fa0, fa1"}
+%def op_mul_double_2addr():
+% fbinopWide2addr(instr="mul.d fv0, fa0, fa1")
diff --git a/runtime/interpreter/mterp/mips/op_mul_float.S b/runtime/interpreter/mterp/mips/op_mul_float.S
index abc9390..e4a578e 100644
--- a/runtime/interpreter/mterp/mips/op_mul_float.S
+++ b/runtime/interpreter/mterp/mips/op_mul_float.S
@@ -1 +1,2 @@
-%include "mips/fbinop.S" {"instr":"mul.s fv0, fa0, fa1"}
+%def op_mul_float():
+% fbinop(instr="mul.s fv0, fa0, fa1")
diff --git a/runtime/interpreter/mterp/mips/op_mul_float_2addr.S b/runtime/interpreter/mterp/mips/op_mul_float_2addr.S
index 2469109..38b2a88 100644
--- a/runtime/interpreter/mterp/mips/op_mul_float_2addr.S
+++ b/runtime/interpreter/mterp/mips/op_mul_float_2addr.S
@@ -1 +1,2 @@
-%include "mips/fbinop2addr.S" {"instr":"mul.s fv0, fa0, fa1"}
+%def op_mul_float_2addr():
+% fbinop2addr(instr="mul.s fv0, fa0, fa1")
diff --git a/runtime/interpreter/mterp/mips/op_mul_int.S b/runtime/interpreter/mterp/mips/op_mul_int.S
index 266823c..34e42f0 100644
--- a/runtime/interpreter/mterp/mips/op_mul_int.S
+++ b/runtime/interpreter/mterp/mips/op_mul_int.S
@@ -1 +1,2 @@
-%include "mips/binop.S" {"instr":"mul a0, a0, a1"}
+%def op_mul_int():
+% binop(instr="mul a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips/op_mul_int_2addr.S b/runtime/interpreter/mterp/mips/op_mul_int_2addr.S
index b7dc5d3..0224a6e 100644
--- a/runtime/interpreter/mterp/mips/op_mul_int_2addr.S
+++ b/runtime/interpreter/mterp/mips/op_mul_int_2addr.S
@@ -1 +1,2 @@
-%include "mips/binop2addr.S" {"instr":"mul a0, a0, a1"}
+%def op_mul_int_2addr():
+% binop2addr(instr="mul a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips/op_mul_int_lit16.S b/runtime/interpreter/mterp/mips/op_mul_int_lit16.S
index fb4c8ec..935d632 100644
--- a/runtime/interpreter/mterp/mips/op_mul_int_lit16.S
+++ b/runtime/interpreter/mterp/mips/op_mul_int_lit16.S
@@ -1 +1,2 @@
-%include "mips/binopLit16.S" {"instr":"mul a0, a0, a1"}
+%def op_mul_int_lit16():
+% binopLit16(instr="mul a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips/op_mul_int_lit8.S b/runtime/interpreter/mterp/mips/op_mul_int_lit8.S
index 6d2e7de..4a2bfca 100644
--- a/runtime/interpreter/mterp/mips/op_mul_int_lit8.S
+++ b/runtime/interpreter/mterp/mips/op_mul_int_lit8.S
@@ -1 +1,2 @@
-%include "mips/binopLit8.S" {"instr":"mul a0, a0, a1"}
+%def op_mul_int_lit8():
+% binopLit8(instr="mul a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips/op_mul_long.S b/runtime/interpreter/mterp/mips/op_mul_long.S
index 74b049a..ae31e19 100644
--- a/runtime/interpreter/mterp/mips/op_mul_long.S
+++ b/runtime/interpreter/mterp/mips/op_mul_long.S
@@ -1,3 +1,4 @@
+%def op_mul_long():
/*
* Signed 64-bit integer multiply.
* a1 a0
@@ -35,7 +36,7 @@
GET_OPA(a0) # a0 <- AA
FETCH_ADVANCE_INST(2) # advance rPC, load rINST
b .L${opcode}_finish
-%break
+%def op_mul_long_sister_code():
.L${opcode}_finish:
GET_INST_OPCODE(t0) # extract opcode from rINST
diff --git a/runtime/interpreter/mterp/mips/op_mul_long_2addr.S b/runtime/interpreter/mterp/mips/op_mul_long_2addr.S
index 683b055..ef53254 100644
--- a/runtime/interpreter/mterp/mips/op_mul_long_2addr.S
+++ b/runtime/interpreter/mterp/mips/op_mul_long_2addr.S
@@ -1,3 +1,4 @@
+%def op_mul_long_2addr():
/*
* See op_mul_long.S for more details
*/
diff --git a/runtime/interpreter/mterp/mips/op_neg_double.S b/runtime/interpreter/mterp/mips/op_neg_double.S
index 89cc918..b53ccbb 100644
--- a/runtime/interpreter/mterp/mips/op_neg_double.S
+++ b/runtime/interpreter/mterp/mips/op_neg_double.S
@@ -1 +1,2 @@
-%include "mips/unopWide.S" {"instr":"addu a1, a1, 0x80000000"}
+%def op_neg_double():
+% unopWide(instr="addu a1, a1, 0x80000000")
diff --git a/runtime/interpreter/mterp/mips/op_neg_float.S b/runtime/interpreter/mterp/mips/op_neg_float.S
index e702755..655d827 100644
--- a/runtime/interpreter/mterp/mips/op_neg_float.S
+++ b/runtime/interpreter/mterp/mips/op_neg_float.S
@@ -1 +1,2 @@
-%include "mips/unop.S" {"instr":"addu a0, a0, 0x80000000"}
+%def op_neg_float():
+% unop(instr="addu a0, a0, 0x80000000")
diff --git a/runtime/interpreter/mterp/mips/op_neg_int.S b/runtime/interpreter/mterp/mips/op_neg_int.S
index 4461731..acc3440 100644
--- a/runtime/interpreter/mterp/mips/op_neg_int.S
+++ b/runtime/interpreter/mterp/mips/op_neg_int.S
@@ -1 +1,2 @@
-%include "mips/unop.S" {"instr":"negu a0, a0"}
+%def op_neg_int():
+% unop(instr="negu a0, a0")
diff --git a/runtime/interpreter/mterp/mips/op_neg_long.S b/runtime/interpreter/mterp/mips/op_neg_long.S
index 71e60f5..9108b2b 100644
--- a/runtime/interpreter/mterp/mips/op_neg_long.S
+++ b/runtime/interpreter/mterp/mips/op_neg_long.S
@@ -1 +1,2 @@
-%include "mips/unopWide.S" {"result0":"v0", "result1":"v1", "preinstr":"negu v0, a0", "instr":"negu v1, a1; sltu a0, zero, v0; subu v1, v1, a0"}
+%def op_neg_long():
+% unopWide(result0="v0", result1="v1", preinstr="negu v0, a0", instr="negu v1, a1; sltu a0, zero, v0; subu v1, v1, a0")
diff --git a/runtime/interpreter/mterp/mips/op_new_array.S b/runtime/interpreter/mterp/mips/op_new_array.S
index 4a6512d..6ae04cc 100644
--- a/runtime/interpreter/mterp/mips/op_new_array.S
+++ b/runtime/interpreter/mterp/mips/op_new_array.S
@@ -1,3 +1,4 @@
+%def op_new_array():
/*
* Allocate an array of objects, specified with the array class
* and a count.
diff --git a/runtime/interpreter/mterp/mips/op_new_instance.S b/runtime/interpreter/mterp/mips/op_new_instance.S
index 3c9e83f..0c98c93 100644
--- a/runtime/interpreter/mterp/mips/op_new_instance.S
+++ b/runtime/interpreter/mterp/mips/op_new_instance.S
@@ -1,3 +1,4 @@
+%def op_new_instance():
/*
* Create a new instance of a class.
*/
diff --git a/runtime/interpreter/mterp/mips/op_nop.S b/runtime/interpreter/mterp/mips/op_nop.S
index 3565631..10f6074 100644
--- a/runtime/interpreter/mterp/mips/op_nop.S
+++ b/runtime/interpreter/mterp/mips/op_nop.S
@@ -1,3 +1,4 @@
+%def op_nop():
FETCH_ADVANCE_INST(1) # advance rPC, load rINST
GET_INST_OPCODE(t0) # extract opcode from rINST
GOTO_OPCODE(t0) # jump to next instruction
diff --git a/runtime/interpreter/mterp/mips/op_not_int.S b/runtime/interpreter/mterp/mips/op_not_int.S
index 55d8cc1..7dc7aeb 100644
--- a/runtime/interpreter/mterp/mips/op_not_int.S
+++ b/runtime/interpreter/mterp/mips/op_not_int.S
@@ -1 +1,2 @@
-%include "mips/unop.S" {"instr":"not a0, a0"}
+%def op_not_int():
+% unop(instr="not a0, a0")
diff --git a/runtime/interpreter/mterp/mips/op_not_long.S b/runtime/interpreter/mterp/mips/op_not_long.S
index 9e7c95b..0bca4bd 100644
--- a/runtime/interpreter/mterp/mips/op_not_long.S
+++ b/runtime/interpreter/mterp/mips/op_not_long.S
@@ -1 +1,2 @@
-%include "mips/unopWide.S" {"preinstr":"not a0, a0", "instr":"not a1, a1"}
+%def op_not_long():
+% unopWide(preinstr="not a0, a0", instr="not a1, a1")
diff --git a/runtime/interpreter/mterp/mips/op_or_int.S b/runtime/interpreter/mterp/mips/op_or_int.S
index c7ce760..df60be5 100644
--- a/runtime/interpreter/mterp/mips/op_or_int.S
+++ b/runtime/interpreter/mterp/mips/op_or_int.S
@@ -1 +1,2 @@
-%include "mips/binop.S" {"instr":"or a0, a0, a1"}
+%def op_or_int():
+% binop(instr="or a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips/op_or_int_2addr.S b/runtime/interpreter/mterp/mips/op_or_int_2addr.S
index 192d611..c202e67 100644
--- a/runtime/interpreter/mterp/mips/op_or_int_2addr.S
+++ b/runtime/interpreter/mterp/mips/op_or_int_2addr.S
@@ -1 +1,2 @@
-%include "mips/binop2addr.S" {"instr":"or a0, a0, a1"}
+%def op_or_int_2addr():
+% binop2addr(instr="or a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips/op_or_int_lit16.S b/runtime/interpreter/mterp/mips/op_or_int_lit16.S
index f4ef75f..09961e8 100644
--- a/runtime/interpreter/mterp/mips/op_or_int_lit16.S
+++ b/runtime/interpreter/mterp/mips/op_or_int_lit16.S
@@ -1 +1,2 @@
-%include "mips/binopLit16.S" {"instr":"or a0, a0, a1"}
+%def op_or_int_lit16():
+% binopLit16(instr="or a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips/op_or_int_lit8.S b/runtime/interpreter/mterp/mips/op_or_int_lit8.S
index f6212e2..1bd6809 100644
--- a/runtime/interpreter/mterp/mips/op_or_int_lit8.S
+++ b/runtime/interpreter/mterp/mips/op_or_int_lit8.S
@@ -1 +1,2 @@
-%include "mips/binopLit8.S" {"instr":"or a0, a0, a1"}
+%def op_or_int_lit8():
+% binopLit8(instr="or a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips/op_or_long.S b/runtime/interpreter/mterp/mips/op_or_long.S
index 0f94486..5f53085 100644
--- a/runtime/interpreter/mterp/mips/op_or_long.S
+++ b/runtime/interpreter/mterp/mips/op_or_long.S
@@ -1 +1,2 @@
-%include "mips/binopWide.S" {"preinstr":"or a0, a0, a2", "instr":"or a1, a1, a3"}
+%def op_or_long():
+% binopWide(preinstr="or a0, a0, a2", instr="or a1, a1, a3")
diff --git a/runtime/interpreter/mterp/mips/op_or_long_2addr.S b/runtime/interpreter/mterp/mips/op_or_long_2addr.S
index 43c3d05..f9b2f9c 100644
--- a/runtime/interpreter/mterp/mips/op_or_long_2addr.S
+++ b/runtime/interpreter/mterp/mips/op_or_long_2addr.S
@@ -1 +1,2 @@
-%include "mips/binopWide2addr.S" {"preinstr":"or a0, a0, a2", "instr":"or a1, a1, a3"}
+%def op_or_long_2addr():
+% binopWide2addr(preinstr="or a0, a0, a2", instr="or a1, a1, a3")
diff --git a/runtime/interpreter/mterp/mips/op_packed_switch.S b/runtime/interpreter/mterp/mips/op_packed_switch.S
index 0a1ff98..e18a652 100644
--- a/runtime/interpreter/mterp/mips/op_packed_switch.S
+++ b/runtime/interpreter/mterp/mips/op_packed_switch.S
@@ -1,4 +1,4 @@
-%default { "func":"MterpDoPackedSwitch" }
+%def op_packed_switch(func="MterpDoPackedSwitch"):
/*
* Handle a packed-switch or sparse-switch instruction. In both cases
* we decode it and hand it off to a helper function.
diff --git a/runtime/interpreter/mterp/mips/op_rem_double.S b/runtime/interpreter/mterp/mips/op_rem_double.S
index a6890a8..99857a3 100644
--- a/runtime/interpreter/mterp/mips/op_rem_double.S
+++ b/runtime/interpreter/mterp/mips/op_rem_double.S
@@ -1 +1,2 @@
-%include "mips/fbinopWide.S" {"instr":"JAL(fmod)"}
+%def op_rem_double():
+% fbinopWide(instr="JAL(fmod)")
diff --git a/runtime/interpreter/mterp/mips/op_rem_double_2addr.S b/runtime/interpreter/mterp/mips/op_rem_double_2addr.S
index a24e160..cf2d3a7 100644
--- a/runtime/interpreter/mterp/mips/op_rem_double_2addr.S
+++ b/runtime/interpreter/mterp/mips/op_rem_double_2addr.S
@@ -1 +1,2 @@
-%include "mips/fbinopWide2addr.S" {"instr":"JAL(fmod)"}
+%def op_rem_double_2addr():
+% fbinopWide2addr(instr="JAL(fmod)")
diff --git a/runtime/interpreter/mterp/mips/op_rem_float.S b/runtime/interpreter/mterp/mips/op_rem_float.S
index ac3d50c..2295ae5 100644
--- a/runtime/interpreter/mterp/mips/op_rem_float.S
+++ b/runtime/interpreter/mterp/mips/op_rem_float.S
@@ -1 +1,2 @@
-%include "mips/fbinop.S" {"instr":"JAL(fmodf)"}
+%def op_rem_float():
+% fbinop(instr="JAL(fmodf)")
diff --git a/runtime/interpreter/mterp/mips/op_rem_float_2addr.S b/runtime/interpreter/mterp/mips/op_rem_float_2addr.S
index 7f0a932..9f6abee 100644
--- a/runtime/interpreter/mterp/mips/op_rem_float_2addr.S
+++ b/runtime/interpreter/mterp/mips/op_rem_float_2addr.S
@@ -1 +1,2 @@
-%include "mips/fbinop2addr.S" {"instr":"JAL(fmodf)"}
+%def op_rem_float_2addr():
+% fbinop2addr(instr="JAL(fmodf)")
diff --git a/runtime/interpreter/mterp/mips/op_rem_int.S b/runtime/interpreter/mterp/mips/op_rem_int.S
index c2a334a..2f67adc 100644
--- a/runtime/interpreter/mterp/mips/op_rem_int.S
+++ b/runtime/interpreter/mterp/mips/op_rem_int.S
@@ -1,5 +1,6 @@
+%def op_rem_int():
#ifdef MIPS32REVGE6
-%include "mips/binop.S" {"instr":"mod a0, a0, a1", "chkzero":"1"}
+% binop(instr="mod a0, a0, a1", chkzero="1")
#else
-%include "mips/binop.S" {"preinstr":"div zero, a0, a1", "instr":"mfhi a0", "chkzero":"1"}
+% binop(preinstr="div zero, a0, a1", instr="mfhi a0", chkzero="1")
#endif
diff --git a/runtime/interpreter/mterp/mips/op_rem_int_2addr.S b/runtime/interpreter/mterp/mips/op_rem_int_2addr.S
index 46c353f..78766a7 100644
--- a/runtime/interpreter/mterp/mips/op_rem_int_2addr.S
+++ b/runtime/interpreter/mterp/mips/op_rem_int_2addr.S
@@ -1,5 +1,6 @@
+%def op_rem_int_2addr():
#ifdef MIPS32REVGE6
-%include "mips/binop2addr.S" {"instr":"mod a0, a0, a1", "chkzero":"1"}
+% binop2addr(instr="mod a0, a0, a1", chkzero="1")
#else
-%include "mips/binop2addr.S" {"preinstr":"div zero, a0, a1", "instr":"mfhi a0", "chkzero":"1"}
+% binop2addr(preinstr="div zero, a0, a1", instr="mfhi a0", chkzero="1")
#endif
diff --git a/runtime/interpreter/mterp/mips/op_rem_int_lit16.S b/runtime/interpreter/mterp/mips/op_rem_int_lit16.S
index 2894ad3..ce136cb 100644
--- a/runtime/interpreter/mterp/mips/op_rem_int_lit16.S
+++ b/runtime/interpreter/mterp/mips/op_rem_int_lit16.S
@@ -1,5 +1,6 @@
+%def op_rem_int_lit16():
#ifdef MIPS32REVGE6
-%include "mips/binopLit16.S" {"instr":"mod a0, a0, a1", "chkzero":"1"}
+% binopLit16(instr="mod a0, a0, a1", chkzero="1")
#else
-%include "mips/binopLit16.S" {"preinstr":"div zero, a0, a1", "instr":"mfhi a0", "chkzero":"1"}
+% binopLit16(preinstr="div zero, a0, a1", instr="mfhi a0", chkzero="1")
#endif
diff --git a/runtime/interpreter/mterp/mips/op_rem_int_lit8.S b/runtime/interpreter/mterp/mips/op_rem_int_lit8.S
index 582248b..0a50844 100644
--- a/runtime/interpreter/mterp/mips/op_rem_int_lit8.S
+++ b/runtime/interpreter/mterp/mips/op_rem_int_lit8.S
@@ -1,5 +1,6 @@
+%def op_rem_int_lit8():
#ifdef MIPS32REVGE6
-%include "mips/binopLit8.S" {"instr":"mod a0, a0, a1", "chkzero":"1"}
+% binopLit8(instr="mod a0, a0, a1", chkzero="1")
#else
-%include "mips/binopLit8.S" {"preinstr":"div zero, a0, a1", "instr":"mfhi a0", "chkzero":"1"}
+% binopLit8(preinstr="div zero, a0, a1", instr="mfhi a0", chkzero="1")
#endif
diff --git a/runtime/interpreter/mterp/mips/op_rem_long.S b/runtime/interpreter/mterp/mips/op_rem_long.S
index e3eb19b..2403dec 100644
--- a/runtime/interpreter/mterp/mips/op_rem_long.S
+++ b/runtime/interpreter/mterp/mips/op_rem_long.S
@@ -1 +1,2 @@
-%include "mips/binopWide.S" { "result0":"v0", "result1":"v1", "instr":"JAL(__moddi3)", "chkzero":"1"}
+%def op_rem_long():
+% binopWide(result0="v0", result1="v1", instr="JAL(__moddi3)", chkzero="1")
diff --git a/runtime/interpreter/mterp/mips/op_rem_long_2addr.S b/runtime/interpreter/mterp/mips/op_rem_long_2addr.S
index 8fc9fdb..6cf3c09 100644
--- a/runtime/interpreter/mterp/mips/op_rem_long_2addr.S
+++ b/runtime/interpreter/mterp/mips/op_rem_long_2addr.S
@@ -1 +1,2 @@
-%include "mips/binopWide2addr.S" { "result0":"v0", "result1":"v1", "instr":"JAL(__moddi3)", "chkzero":"1"}
+%def op_rem_long_2addr():
+% binopWide2addr(result0="v0", result1="v1", instr="JAL(__moddi3)", chkzero="1")
diff --git a/runtime/interpreter/mterp/mips/op_return.S b/runtime/interpreter/mterp/mips/op_return.S
index 44b9395..4e422d2 100644
--- a/runtime/interpreter/mterp/mips/op_return.S
+++ b/runtime/interpreter/mterp/mips/op_return.S
@@ -1,3 +1,4 @@
+%def op_return():
/*
* Return a 32-bit value.
*
diff --git a/runtime/interpreter/mterp/mips/op_return_object.S b/runtime/interpreter/mterp/mips/op_return_object.S
index 7350e00..2eeec0b 100644
--- a/runtime/interpreter/mterp/mips/op_return_object.S
+++ b/runtime/interpreter/mterp/mips/op_return_object.S
@@ -1 +1,2 @@
-%include "mips/op_return.S"
+%def op_return_object():
+% op_return()
diff --git a/runtime/interpreter/mterp/mips/op_return_void.S b/runtime/interpreter/mterp/mips/op_return_void.S
index 1f616ea..14e532b 100644
--- a/runtime/interpreter/mterp/mips/op_return_void.S
+++ b/runtime/interpreter/mterp/mips/op_return_void.S
@@ -1,3 +1,4 @@
+%def op_return_void():
.extern MterpThreadFenceForConstructor
JAL(MterpThreadFenceForConstructor)
lw ra, THREAD_FLAGS_OFFSET(rSELF)
diff --git a/runtime/interpreter/mterp/mips/op_return_void_no_barrier.S b/runtime/interpreter/mterp/mips/op_return_void_no_barrier.S
index e670c28..a74f085 100644
--- a/runtime/interpreter/mterp/mips/op_return_void_no_barrier.S
+++ b/runtime/interpreter/mterp/mips/op_return_void_no_barrier.S
@@ -1,3 +1,4 @@
+%def op_return_void_no_barrier():
lw ra, THREAD_FLAGS_OFFSET(rSELF)
move a0, rSELF
and ra, THREAD_SUSPEND_OR_CHECKPOINT_REQUEST
diff --git a/runtime/interpreter/mterp/mips/op_return_wide.S b/runtime/interpreter/mterp/mips/op_return_wide.S
index f0f679d..fb065a5 100644
--- a/runtime/interpreter/mterp/mips/op_return_wide.S
+++ b/runtime/interpreter/mterp/mips/op_return_wide.S
@@ -1,3 +1,4 @@
+%def op_return_wide():
/*
* Return a 64-bit value.
*/
diff --git a/runtime/interpreter/mterp/mips/op_rsub_int.S b/runtime/interpreter/mterp/mips/op_rsub_int.S
index f7e61bb..21ead06 100644
--- a/runtime/interpreter/mterp/mips/op_rsub_int.S
+++ b/runtime/interpreter/mterp/mips/op_rsub_int.S
@@ -1,2 +1,3 @@
+%def op_rsub_int():
/* this op is "rsub-int", but can be thought of as "rsub-int/lit16" */
-%include "mips/binopLit16.S" {"instr":"subu a0, a1, a0"}
+% binopLit16(instr="subu a0, a1, a0")
diff --git a/runtime/interpreter/mterp/mips/op_rsub_int_lit8.S b/runtime/interpreter/mterp/mips/op_rsub_int_lit8.S
index 3968a5e..b9b214d 100644
--- a/runtime/interpreter/mterp/mips/op_rsub_int_lit8.S
+++ b/runtime/interpreter/mterp/mips/op_rsub_int_lit8.S
@@ -1 +1,2 @@
-%include "mips/binopLit8.S" {"instr":"subu a0, a1, a0"}
+%def op_rsub_int_lit8():
+% binopLit8(instr="subu a0, a1, a0")
diff --git a/runtime/interpreter/mterp/mips/op_sget.S b/runtime/interpreter/mterp/mips/op_sget.S
index 92d6673..8a6a66a 100644
--- a/runtime/interpreter/mterp/mips/op_sget.S
+++ b/runtime/interpreter/mterp/mips/op_sget.S
@@ -1,2 +1,2 @@
-%default { "is_object":"0", "helper":"MterpSGetU32" }
-%include "mips/field.S" { }
+%def op_sget(is_object="0", helper="MterpSGetU32"):
+% field(helper=helper)
diff --git a/runtime/interpreter/mterp/mips/op_sget_boolean.S b/runtime/interpreter/mterp/mips/op_sget_boolean.S
index 7a7012e..d9c12c9 100644
--- a/runtime/interpreter/mterp/mips/op_sget_boolean.S
+++ b/runtime/interpreter/mterp/mips/op_sget_boolean.S
@@ -1 +1,2 @@
-%include "mips/op_sget.S" {"helper":"MterpSGetU8"}
+%def op_sget_boolean():
+% op_sget(helper="MterpSGetU8")
diff --git a/runtime/interpreter/mterp/mips/op_sget_byte.S b/runtime/interpreter/mterp/mips/op_sget_byte.S
index a2f1dbf..37c6879 100644
--- a/runtime/interpreter/mterp/mips/op_sget_byte.S
+++ b/runtime/interpreter/mterp/mips/op_sget_byte.S
@@ -1 +1,2 @@
-%include "mips/op_sget.S" {"helper":"MterpSGetI8"}
+%def op_sget_byte():
+% op_sget(helper="MterpSGetI8")
diff --git a/runtime/interpreter/mterp/mips/op_sget_char.S b/runtime/interpreter/mterp/mips/op_sget_char.S
index 07d4041..003bcd1 100644
--- a/runtime/interpreter/mterp/mips/op_sget_char.S
+++ b/runtime/interpreter/mterp/mips/op_sget_char.S
@@ -1 +1,2 @@
-%include "mips/op_sget.S" {"helper":"MterpSGetU16"}
+%def op_sget_char():
+% op_sget(helper="MterpSGetU16")
diff --git a/runtime/interpreter/mterp/mips/op_sget_object.S b/runtime/interpreter/mterp/mips/op_sget_object.S
index 0a3c9ee..7cf3597 100644
--- a/runtime/interpreter/mterp/mips/op_sget_object.S
+++ b/runtime/interpreter/mterp/mips/op_sget_object.S
@@ -1 +1,2 @@
-%include "mips/op_sget.S" {"is_object":"1", "helper":"MterpSGetObj"}
+%def op_sget_object():
+% op_sget(is_object="1", helper="MterpSGetObj")
diff --git a/runtime/interpreter/mterp/mips/op_sget_short.S b/runtime/interpreter/mterp/mips/op_sget_short.S
index 2960443..afacb57 100644
--- a/runtime/interpreter/mterp/mips/op_sget_short.S
+++ b/runtime/interpreter/mterp/mips/op_sget_short.S
@@ -1 +1,2 @@
-%include "mips/op_sget.S" {"helper":"MterpSGetI16"}
+%def op_sget_short():
+% op_sget(helper="MterpSGetI16")
diff --git a/runtime/interpreter/mterp/mips/op_sget_wide.S b/runtime/interpreter/mterp/mips/op_sget_wide.S
index be4ae02..fff2be6 100644
--- a/runtime/interpreter/mterp/mips/op_sget_wide.S
+++ b/runtime/interpreter/mterp/mips/op_sget_wide.S
@@ -1 +1,2 @@
-%include "mips/op_sget.S" {"helper":"MterpSGetU64"}
+%def op_sget_wide():
+% op_sget(helper="MterpSGetU64")
diff --git a/runtime/interpreter/mterp/mips/op_shl_int.S b/runtime/interpreter/mterp/mips/op_shl_int.S
index 15cbe94..efd213c 100644
--- a/runtime/interpreter/mterp/mips/op_shl_int.S
+++ b/runtime/interpreter/mterp/mips/op_shl_int.S
@@ -1 +1,2 @@
-%include "mips/binop.S" {"instr":"sll a0, a0, a1"}
+%def op_shl_int():
+% binop(instr="sll a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips/op_shl_int_2addr.S b/runtime/interpreter/mterp/mips/op_shl_int_2addr.S
index ef9bd65..0901e6b 100644
--- a/runtime/interpreter/mterp/mips/op_shl_int_2addr.S
+++ b/runtime/interpreter/mterp/mips/op_shl_int_2addr.S
@@ -1 +1,2 @@
-%include "mips/binop2addr.S" {"instr":"sll a0, a0, a1"}
+%def op_shl_int_2addr():
+% binop2addr(instr="sll a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips/op_shl_int_lit8.S b/runtime/interpreter/mterp/mips/op_shl_int_lit8.S
index d2afb53..2263ec7 100644
--- a/runtime/interpreter/mterp/mips/op_shl_int_lit8.S
+++ b/runtime/interpreter/mterp/mips/op_shl_int_lit8.S
@@ -1 +1,2 @@
-%include "mips/binopLit8.S" {"instr":"sll a0, a0, a1"}
+%def op_shl_int_lit8():
+% binopLit8(instr="sll a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips/op_shl_long.S b/runtime/interpreter/mterp/mips/op_shl_long.S
index cc08112..8bb4216 100644
--- a/runtime/interpreter/mterp/mips/op_shl_long.S
+++ b/runtime/interpreter/mterp/mips/op_shl_long.S
@@ -1,3 +1,4 @@
+%def op_shl_long():
/*
* Long integer shift. This is different from the generic 32/64-bit
* binary operations because vAA/vBB are 64-bit but vCC (the shift
@@ -25,7 +26,7 @@
sll v1, a1, a2 # rhi<- ahi << (shift&31)
or v1, a0 # rhi<- rhi | alo
SET_VREG64_GOTO(v0, v1, t2, t0) # vAA/vAA+1 <- v0/v1
-%break
+%def op_shl_long_sister_code():
.L${opcode}_finish:
SET_VREG64_GOTO(zero, v0, t2, t0) # vAA/vAA+1 <- rlo/rhi
diff --git a/runtime/interpreter/mterp/mips/op_shl_long_2addr.S b/runtime/interpreter/mterp/mips/op_shl_long_2addr.S
index 93c5783..12015f5 100644
--- a/runtime/interpreter/mterp/mips/op_shl_long_2addr.S
+++ b/runtime/interpreter/mterp/mips/op_shl_long_2addr.S
@@ -1,3 +1,4 @@
+%def op_shl_long_2addr():
/*
* Long integer shift, 2addr version. vA is 64-bit value/result, vB is
* 32-bit shift distance.
@@ -21,7 +22,7 @@
sll v1, a1, a2 # rhi<- ahi << (shift&31)
or v1, a0 # rhi<- rhi | alo
SET_VREG64_GOTO(v0, v1, rOBJ, t0) # vA/vA+1 <- v0/v1
-%break
+%def op_shl_long_2addr_sister_code():
.L${opcode}_finish:
SET_VREG64_GOTO(zero, v0, rOBJ, t0) # vA/vA+1 <- rlo/rhi
diff --git a/runtime/interpreter/mterp/mips/op_shr_int.S b/runtime/interpreter/mterp/mips/op_shr_int.S
index 61108399..8d55e7a 100644
--- a/runtime/interpreter/mterp/mips/op_shr_int.S
+++ b/runtime/interpreter/mterp/mips/op_shr_int.S
@@ -1 +1,2 @@
-%include "mips/binop.S" {"instr":"sra a0, a0, a1"}
+%def op_shr_int():
+% binop(instr="sra a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips/op_shr_int_2addr.S b/runtime/interpreter/mterp/mips/op_shr_int_2addr.S
index e00ff5b..e102baa 100644
--- a/runtime/interpreter/mterp/mips/op_shr_int_2addr.S
+++ b/runtime/interpreter/mterp/mips/op_shr_int_2addr.S
@@ -1 +1,2 @@
-%include "mips/binop2addr.S" {"instr":"sra a0, a0, a1"}
+%def op_shr_int_2addr():
+% binop2addr(instr="sra a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips/op_shr_int_lit8.S b/runtime/interpreter/mterp/mips/op_shr_int_lit8.S
index d058f58..437c5c4 100644
--- a/runtime/interpreter/mterp/mips/op_shr_int_lit8.S
+++ b/runtime/interpreter/mterp/mips/op_shr_int_lit8.S
@@ -1 +1,2 @@
-%include "mips/binopLit8.S" {"instr":"sra a0, a0, a1"}
+%def op_shr_int_lit8():
+% binopLit8(instr="sra a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips/op_shr_long.S b/runtime/interpreter/mterp/mips/op_shr_long.S
index ea032fe..adffa61 100644
--- a/runtime/interpreter/mterp/mips/op_shr_long.S
+++ b/runtime/interpreter/mterp/mips/op_shr_long.S
@@ -1,3 +1,4 @@
+%def op_shr_long():
/*
* Long integer shift. This is different from the generic 32/64-bit
* binary operations because vAA/vBB are 64-bit but vCC (the shift
@@ -24,7 +25,7 @@
sll a1, a0 # ahi<- ahi << (32-(shift&31))
or v0, a1 # rlo<- rlo | ahi
SET_VREG64_GOTO(v0, v1, t3, t0) # vAA/VAA+1 <- v0/v1
-%break
+%def op_shr_long_sister_code():
.L${opcode}_finish:
sra a3, a1, 31 # a3<- sign(ah)
diff --git a/runtime/interpreter/mterp/mips/op_shr_long_2addr.S b/runtime/interpreter/mterp/mips/op_shr_long_2addr.S
index c805ea4..d8acb79 100644
--- a/runtime/interpreter/mterp/mips/op_shr_long_2addr.S
+++ b/runtime/interpreter/mterp/mips/op_shr_long_2addr.S
@@ -1,3 +1,4 @@
+%def op_shr_long_2addr():
/*
* Long integer shift, 2addr version. vA is 64-bit value/result, vB is
* 32-bit shift distance.
@@ -20,7 +21,7 @@
sll a1, a0 # ahi<- ahi << (32-(shift&31))
or v0, a1 # rlo<- rlo | ahi
SET_VREG64_GOTO(v0, v1, t2, t0) # vA/vA+1 <- v0/v1
-%break
+%def op_shr_long_2addr_sister_code():
.L${opcode}_finish:
sra a3, a1, 31 # a3<- sign(ah)
diff --git a/runtime/interpreter/mterp/mips/op_sparse_switch.S b/runtime/interpreter/mterp/mips/op_sparse_switch.S
index 670f464..b74d7da 100644
--- a/runtime/interpreter/mterp/mips/op_sparse_switch.S
+++ b/runtime/interpreter/mterp/mips/op_sparse_switch.S
@@ -1 +1,2 @@
-%include "mips/op_packed_switch.S" { "func":"MterpDoSparseSwitch" }
+%def op_sparse_switch():
+% op_packed_switch(func="MterpDoSparseSwitch")
diff --git a/runtime/interpreter/mterp/mips/op_sput.S b/runtime/interpreter/mterp/mips/op_sput.S
index c858679..cbd6ee9 100644
--- a/runtime/interpreter/mterp/mips/op_sput.S
+++ b/runtime/interpreter/mterp/mips/op_sput.S
@@ -1,2 +1,2 @@
-%default { "is_object":"0", "helper":"MterpSPutU32"}
-%include "mips/field.S" { }
+%def op_sput(is_object="0", helper="MterpSPutU32"):
+% field(helper=helper)
diff --git a/runtime/interpreter/mterp/mips/op_sput_boolean.S b/runtime/interpreter/mterp/mips/op_sput_boolean.S
index 0137430..36fba84 100644
--- a/runtime/interpreter/mterp/mips/op_sput_boolean.S
+++ b/runtime/interpreter/mterp/mips/op_sput_boolean.S
@@ -1 +1,2 @@
-%include "mips/op_sput.S" {"helper":"MterpSPutU8"}
+%def op_sput_boolean():
+% op_sput(helper="MterpSPutU8")
diff --git a/runtime/interpreter/mterp/mips/op_sput_byte.S b/runtime/interpreter/mterp/mips/op_sput_byte.S
index 5ae4256..84ad4a0 100644
--- a/runtime/interpreter/mterp/mips/op_sput_byte.S
+++ b/runtime/interpreter/mterp/mips/op_sput_byte.S
@@ -1 +1,2 @@
-%include "mips/op_sput.S" {"helper":"MterpSPutI8"}
+%def op_sput_byte():
+% op_sput(helper="MterpSPutI8")
diff --git a/runtime/interpreter/mterp/mips/op_sput_char.S b/runtime/interpreter/mterp/mips/op_sput_char.S
index 83787a7..9b8eeba 100644
--- a/runtime/interpreter/mterp/mips/op_sput_char.S
+++ b/runtime/interpreter/mterp/mips/op_sput_char.S
@@ -1 +1,2 @@
-%include "mips/op_sput.S" {"helper":"MterpSPutU16"}
+%def op_sput_char():
+% op_sput(helper="MterpSPutU16")
diff --git a/runtime/interpreter/mterp/mips/op_sput_object.S b/runtime/interpreter/mterp/mips/op_sput_object.S
index 683b767..081360c 100644
--- a/runtime/interpreter/mterp/mips/op_sput_object.S
+++ b/runtime/interpreter/mterp/mips/op_sput_object.S
@@ -1 +1,2 @@
-%include "mips/op_sput.S" {"is_object":"1", "helper":"MterpSPutObj"}
+%def op_sput_object():
+% op_sput(is_object="1", helper="MterpSPutObj")
diff --git a/runtime/interpreter/mterp/mips/op_sput_short.S b/runtime/interpreter/mterp/mips/op_sput_short.S
index df99b44..ee16513 100644
--- a/runtime/interpreter/mterp/mips/op_sput_short.S
+++ b/runtime/interpreter/mterp/mips/op_sput_short.S
@@ -1 +1,2 @@
-%include "mips/op_sput.S" {"helper":"MterpSPutI16"}
+%def op_sput_short():
+% op_sput(helper="MterpSPutI16")
diff --git a/runtime/interpreter/mterp/mips/op_sput_wide.S b/runtime/interpreter/mterp/mips/op_sput_wide.S
index 1d2ed19..44c1a18 100644
--- a/runtime/interpreter/mterp/mips/op_sput_wide.S
+++ b/runtime/interpreter/mterp/mips/op_sput_wide.S
@@ -1 +1,2 @@
-%include "mips/op_sput.S" {"helper":"MterpSPutU64"}
+%def op_sput_wide():
+% op_sput(helper="MterpSPutU64")
diff --git a/runtime/interpreter/mterp/mips/op_sub_double.S b/runtime/interpreter/mterp/mips/op_sub_double.S
index 9473218..ad8f12c 100644
--- a/runtime/interpreter/mterp/mips/op_sub_double.S
+++ b/runtime/interpreter/mterp/mips/op_sub_double.S
@@ -1 +1,2 @@
-%include "mips/fbinopWide.S" {"instr":"sub.d fv0, fa0, fa1"}
+%def op_sub_double():
+% fbinopWide(instr="sub.d fv0, fa0, fa1")
diff --git a/runtime/interpreter/mterp/mips/op_sub_double_2addr.S b/runtime/interpreter/mterp/mips/op_sub_double_2addr.S
index 7ce7c74..ed5598d 100644
--- a/runtime/interpreter/mterp/mips/op_sub_double_2addr.S
+++ b/runtime/interpreter/mterp/mips/op_sub_double_2addr.S
@@ -1 +1,2 @@
-%include "mips/fbinopWide2addr.S" {"instr":"sub.d fv0, fa0, fa1"}
+%def op_sub_double_2addr():
+% fbinopWide2addr(instr="sub.d fv0, fa0, fa1")
diff --git a/runtime/interpreter/mterp/mips/op_sub_float.S b/runtime/interpreter/mterp/mips/op_sub_float.S
index 04650d9..402fa2c 100644
--- a/runtime/interpreter/mterp/mips/op_sub_float.S
+++ b/runtime/interpreter/mterp/mips/op_sub_float.S
@@ -1 +1,2 @@
-%include "mips/fbinop.S" {"instr":"sub.s fv0, fa0, fa1"}
+%def op_sub_float():
+% fbinop(instr="sub.s fv0, fa0, fa1")
diff --git a/runtime/interpreter/mterp/mips/op_sub_float_2addr.S b/runtime/interpreter/mterp/mips/op_sub_float_2addr.S
index dfe935c..1d38188 100644
--- a/runtime/interpreter/mterp/mips/op_sub_float_2addr.S
+++ b/runtime/interpreter/mterp/mips/op_sub_float_2addr.S
@@ -1 +1,2 @@
-%include "mips/fbinop2addr.S" {"instr":"sub.s fv0, fa0, fa1"}
+%def op_sub_float_2addr():
+% fbinop2addr(instr="sub.s fv0, fa0, fa1")
diff --git a/runtime/interpreter/mterp/mips/op_sub_int.S b/runtime/interpreter/mterp/mips/op_sub_int.S
index 43da1b6..57f618d 100644
--- a/runtime/interpreter/mterp/mips/op_sub_int.S
+++ b/runtime/interpreter/mterp/mips/op_sub_int.S
@@ -1 +1,2 @@
-%include "mips/binop.S" {"instr":"subu a0, a0, a1"}
+%def op_sub_int():
+% binop(instr="subu a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips/op_sub_int_2addr.S b/runtime/interpreter/mterp/mips/op_sub_int_2addr.S
index cf34aa6..445ffca 100644
--- a/runtime/interpreter/mterp/mips/op_sub_int_2addr.S
+++ b/runtime/interpreter/mterp/mips/op_sub_int_2addr.S
@@ -1 +1,2 @@
-%include "mips/binop2addr.S" {"instr":"subu a0, a0, a1"}
+%def op_sub_int_2addr():
+% binop2addr(instr="subu a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips/op_sub_long.S b/runtime/interpreter/mterp/mips/op_sub_long.S
index 0f58e8e..a54460b 100644
--- a/runtime/interpreter/mterp/mips/op_sub_long.S
+++ b/runtime/interpreter/mterp/mips/op_sub_long.S
@@ -1,3 +1,4 @@
+%def op_sub_long():
/*
* For little endian the code sequence looks as follows:
* subu v0,a0,a2
@@ -5,4 +6,4 @@
* sltu a0,a0,v0
* subu v1,v1,a0
*/
-%include "mips/binopWide.S" { "result0":"v0", "result1":"v1", "preinstr":"subu v0, a0, a2", "instr":"subu v1, a1, a3; sltu a0, a0, v0; subu v1, v1, a0" }
+% binopWide(result0="v0", result1="v1", preinstr="subu v0, a0, a2", instr="subu v1, a1, a3; sltu a0, a0, v0; subu v1, v1, a0")
diff --git a/runtime/interpreter/mterp/mips/op_sub_long_2addr.S b/runtime/interpreter/mterp/mips/op_sub_long_2addr.S
index aa256c2..b3dd6b2 100644
--- a/runtime/interpreter/mterp/mips/op_sub_long_2addr.S
+++ b/runtime/interpreter/mterp/mips/op_sub_long_2addr.S
@@ -1,4 +1,5 @@
+%def op_sub_long_2addr():
/*
* See op_sub_long.S for more details
*/
-%include "mips/binopWide2addr.S" { "result0":"v0", "result1":"v1", "preinstr":"subu v0, a0, a2", "instr":"subu v1, a1, a3; sltu a0, a0, v0; subu v1, v1, a0" }
+% binopWide2addr(result0="v0", result1="v1", preinstr="subu v0, a0, a2", instr="subu v1, a1, a3; sltu a0, a0, v0; subu v1, v1, a0")
diff --git a/runtime/interpreter/mterp/mips/op_throw.S b/runtime/interpreter/mterp/mips/op_throw.S
index adc8b04..84b9e5e 100644
--- a/runtime/interpreter/mterp/mips/op_throw.S
+++ b/runtime/interpreter/mterp/mips/op_throw.S
@@ -1,3 +1,4 @@
+%def op_throw():
/*
* Throw an exception object in the current thread.
*/
diff --git a/runtime/interpreter/mterp/mips/op_unused_3e.S b/runtime/interpreter/mterp/mips/op_unused_3e.S
index 99ef3cf..d889f1a 100644
--- a/runtime/interpreter/mterp/mips/op_unused_3e.S
+++ b/runtime/interpreter/mterp/mips/op_unused_3e.S
@@ -1 +1,2 @@
-%include "mips/unused.S"
+%def op_unused_3e():
+% unused()
diff --git a/runtime/interpreter/mterp/mips/op_unused_3f.S b/runtime/interpreter/mterp/mips/op_unused_3f.S
index 99ef3cf..b3ebcfa 100644
--- a/runtime/interpreter/mterp/mips/op_unused_3f.S
+++ b/runtime/interpreter/mterp/mips/op_unused_3f.S
@@ -1 +1,2 @@
-%include "mips/unused.S"
+%def op_unused_3f():
+% unused()
diff --git a/runtime/interpreter/mterp/mips/op_unused_40.S b/runtime/interpreter/mterp/mips/op_unused_40.S
index 99ef3cf..7920fb3 100644
--- a/runtime/interpreter/mterp/mips/op_unused_40.S
+++ b/runtime/interpreter/mterp/mips/op_unused_40.S
@@ -1 +1,2 @@
-%include "mips/unused.S"
+%def op_unused_40():
+% unused()
diff --git a/runtime/interpreter/mterp/mips/op_unused_41.S b/runtime/interpreter/mterp/mips/op_unused_41.S
index 99ef3cf..5ed03b8 100644
--- a/runtime/interpreter/mterp/mips/op_unused_41.S
+++ b/runtime/interpreter/mterp/mips/op_unused_41.S
@@ -1 +1,2 @@
-%include "mips/unused.S"
+%def op_unused_41():
+% unused()
diff --git a/runtime/interpreter/mterp/mips/op_unused_42.S b/runtime/interpreter/mterp/mips/op_unused_42.S
index 99ef3cf..ac32521 100644
--- a/runtime/interpreter/mterp/mips/op_unused_42.S
+++ b/runtime/interpreter/mterp/mips/op_unused_42.S
@@ -1 +1,2 @@
-%include "mips/unused.S"
+%def op_unused_42():
+% unused()
diff --git a/runtime/interpreter/mterp/mips/op_unused_43.S b/runtime/interpreter/mterp/mips/op_unused_43.S
index 99ef3cf..33e2aa1 100644
--- a/runtime/interpreter/mterp/mips/op_unused_43.S
+++ b/runtime/interpreter/mterp/mips/op_unused_43.S
@@ -1 +1,2 @@
-%include "mips/unused.S"
+%def op_unused_43():
+% unused()
diff --git a/runtime/interpreter/mterp/mips/op_unused_73.S b/runtime/interpreter/mterp/mips/op_unused_73.S
index 99ef3cf..e3267a3 100644
--- a/runtime/interpreter/mterp/mips/op_unused_73.S
+++ b/runtime/interpreter/mterp/mips/op_unused_73.S
@@ -1 +1,2 @@
-%include "mips/unused.S"
+%def op_unused_73():
+% unused()
diff --git a/runtime/interpreter/mterp/mips/op_unused_79.S b/runtime/interpreter/mterp/mips/op_unused_79.S
index 99ef3cf..3c6dafc 100644
--- a/runtime/interpreter/mterp/mips/op_unused_79.S
+++ b/runtime/interpreter/mterp/mips/op_unused_79.S
@@ -1 +1,2 @@
-%include "mips/unused.S"
+%def op_unused_79():
+% unused()
diff --git a/runtime/interpreter/mterp/mips/op_unused_7a.S b/runtime/interpreter/mterp/mips/op_unused_7a.S
index 99ef3cf..9c03cd5 100644
--- a/runtime/interpreter/mterp/mips/op_unused_7a.S
+++ b/runtime/interpreter/mterp/mips/op_unused_7a.S
@@ -1 +1,2 @@
-%include "mips/unused.S"
+%def op_unused_7a():
+% unused()
diff --git a/runtime/interpreter/mterp/mips/op_unused_f3.S b/runtime/interpreter/mterp/mips/op_unused_f3.S
index 99ef3cf..ab10b78 100644
--- a/runtime/interpreter/mterp/mips/op_unused_f3.S
+++ b/runtime/interpreter/mterp/mips/op_unused_f3.S
@@ -1 +1,2 @@
-%include "mips/unused.S"
+%def op_unused_f3():
+% unused()
diff --git a/runtime/interpreter/mterp/mips/op_unused_f4.S b/runtime/interpreter/mterp/mips/op_unused_f4.S
index 99ef3cf..09229d6 100644
--- a/runtime/interpreter/mterp/mips/op_unused_f4.S
+++ b/runtime/interpreter/mterp/mips/op_unused_f4.S
@@ -1 +1,2 @@
-%include "mips/unused.S"
+%def op_unused_f4():
+% unused()
diff --git a/runtime/interpreter/mterp/mips/op_unused_f5.S b/runtime/interpreter/mterp/mips/op_unused_f5.S
index 99ef3cf..0d6149b 100644
--- a/runtime/interpreter/mterp/mips/op_unused_f5.S
+++ b/runtime/interpreter/mterp/mips/op_unused_f5.S
@@ -1 +1,2 @@
-%include "mips/unused.S"
+%def op_unused_f5():
+% unused()
diff --git a/runtime/interpreter/mterp/mips/op_unused_f6.S b/runtime/interpreter/mterp/mips/op_unused_f6.S
index 99ef3cf..117b03d 100644
--- a/runtime/interpreter/mterp/mips/op_unused_f6.S
+++ b/runtime/interpreter/mterp/mips/op_unused_f6.S
@@ -1 +1,2 @@
-%include "mips/unused.S"
+%def op_unused_f6():
+% unused()
diff --git a/runtime/interpreter/mterp/mips/op_unused_f7.S b/runtime/interpreter/mterp/mips/op_unused_f7.S
index 99ef3cf..4e3a0f3 100644
--- a/runtime/interpreter/mterp/mips/op_unused_f7.S
+++ b/runtime/interpreter/mterp/mips/op_unused_f7.S
@@ -1 +1,2 @@
-%include "mips/unused.S"
+%def op_unused_f7():
+% unused()
diff --git a/runtime/interpreter/mterp/mips/op_unused_f8.S b/runtime/interpreter/mterp/mips/op_unused_f8.S
index 99ef3cf..d122075 100644
--- a/runtime/interpreter/mterp/mips/op_unused_f8.S
+++ b/runtime/interpreter/mterp/mips/op_unused_f8.S
@@ -1 +1,2 @@
-%include "mips/unused.S"
+%def op_unused_f8():
+% unused()
diff --git a/runtime/interpreter/mterp/mips/op_unused_f9.S b/runtime/interpreter/mterp/mips/op_unused_f9.S
index 99ef3cf..7d09a0e 100644
--- a/runtime/interpreter/mterp/mips/op_unused_f9.S
+++ b/runtime/interpreter/mterp/mips/op_unused_f9.S
@@ -1 +1,2 @@
-%include "mips/unused.S"
+%def op_unused_f9():
+% unused()
diff --git a/runtime/interpreter/mterp/mips/op_unused_fc.S b/runtime/interpreter/mterp/mips/op_unused_fc.S
index 99ef3cf..0697819 100644
--- a/runtime/interpreter/mterp/mips/op_unused_fc.S
+++ b/runtime/interpreter/mterp/mips/op_unused_fc.S
@@ -1 +1,2 @@
-%include "mips/unused.S"
+%def op_unused_fc():
+% unused()
diff --git a/runtime/interpreter/mterp/mips/op_unused_fd.S b/runtime/interpreter/mterp/mips/op_unused_fd.S
index 99ef3cf..4bc2b4b 100644
--- a/runtime/interpreter/mterp/mips/op_unused_fd.S
+++ b/runtime/interpreter/mterp/mips/op_unused_fd.S
@@ -1 +1,2 @@
-%include "mips/unused.S"
+%def op_unused_fd():
+% unused()
diff --git a/runtime/interpreter/mterp/mips/op_ushr_int.S b/runtime/interpreter/mterp/mips/op_ushr_int.S
index b95472b..98d2dfb 100644
--- a/runtime/interpreter/mterp/mips/op_ushr_int.S
+++ b/runtime/interpreter/mterp/mips/op_ushr_int.S
@@ -1 +1,2 @@
-%include "mips/binop.S" {"instr":"srl a0, a0, a1"}
+%def op_ushr_int():
+% binop(instr="srl a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips/op_ushr_int_2addr.S b/runtime/interpreter/mterp/mips/op_ushr_int_2addr.S
index fc17778..4b09cac 100644
--- a/runtime/interpreter/mterp/mips/op_ushr_int_2addr.S
+++ b/runtime/interpreter/mterp/mips/op_ushr_int_2addr.S
@@ -1 +1,2 @@
-%include "mips/binop2addr.S" {"instr":"srl a0, a0, a1 "}
+%def op_ushr_int_2addr():
+% binop2addr(instr="srl a0, a0, a1 ")
diff --git a/runtime/interpreter/mterp/mips/op_ushr_int_lit8.S b/runtime/interpreter/mterp/mips/op_ushr_int_lit8.S
index c82cfba..531c30a 100644
--- a/runtime/interpreter/mterp/mips/op_ushr_int_lit8.S
+++ b/runtime/interpreter/mterp/mips/op_ushr_int_lit8.S
@@ -1 +1,2 @@
-%include "mips/binopLit8.S" {"instr":"srl a0, a0, a1"}
+%def op_ushr_int_lit8():
+% binopLit8(instr="srl a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips/op_ushr_long.S b/runtime/interpreter/mterp/mips/op_ushr_long.S
index 2e227a9..b09e7b3 100644
--- a/runtime/interpreter/mterp/mips/op_ushr_long.S
+++ b/runtime/interpreter/mterp/mips/op_ushr_long.S
@@ -1,3 +1,4 @@
+%def op_ushr_long():
/*
* Long integer shift. This is different from the generic 32/64-bit
* binary operations because vAA/vBB are 64-bit but vCC (the shift
@@ -25,7 +26,7 @@
sll a1, a0 # ahi<- ahi << (32-(shift&31))
or v0, a1 # rlo<- rlo | ahi
SET_VREG64_GOTO(v0, v1, rOBJ, t0) # vAA/vAA+1 <- v0/v1
-%break
+%def op_ushr_long_sister_code():
.L${opcode}_finish:
SET_VREG64_GOTO(v1, zero, rOBJ, t0) # vAA/vAA+1 <- rlo/rhi
diff --git a/runtime/interpreter/mterp/mips/op_ushr_long_2addr.S b/runtime/interpreter/mterp/mips/op_ushr_long_2addr.S
index 9e93f34..0da2011 100644
--- a/runtime/interpreter/mterp/mips/op_ushr_long_2addr.S
+++ b/runtime/interpreter/mterp/mips/op_ushr_long_2addr.S
@@ -1,3 +1,4 @@
+%def op_ushr_long_2addr():
/*
* Long integer shift, 2addr version. vA is 64-bit value/result, vB is
* 32-bit shift distance.
@@ -21,7 +22,7 @@
sll a1, a0 # ahi<- ahi << (32-(shift&31))
or v0, a1 # rlo<- rlo | ahi
SET_VREG64_GOTO(v0, v1, t3, t0) # vA/vA+1 <- v0/v1
-%break
+%def op_ushr_long_2addr_sister_code():
.L${opcode}_finish:
SET_VREG64_GOTO(v1, zero, t3, t0) # vA/vA+1 <- rlo/rhi
diff --git a/runtime/interpreter/mterp/mips/op_xor_int.S b/runtime/interpreter/mterp/mips/op_xor_int.S
index 6c23f1f..1379a34 100644
--- a/runtime/interpreter/mterp/mips/op_xor_int.S
+++ b/runtime/interpreter/mterp/mips/op_xor_int.S
@@ -1 +1,2 @@
-%include "mips/binop.S" {"instr":"xor a0, a0, a1"}
+%def op_xor_int():
+% binop(instr="xor a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips/op_xor_int_2addr.S b/runtime/interpreter/mterp/mips/op_xor_int_2addr.S
index 5ee1667..6dbe11c 100644
--- a/runtime/interpreter/mterp/mips/op_xor_int_2addr.S
+++ b/runtime/interpreter/mterp/mips/op_xor_int_2addr.S
@@ -1 +1,2 @@
-%include "mips/binop2addr.S" {"instr":"xor a0, a0, a1"}
+%def op_xor_int_2addr():
+% binop2addr(instr="xor a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips/op_xor_int_lit16.S b/runtime/interpreter/mterp/mips/op_xor_int_lit16.S
index 2af37a6..f8cbce0 100644
--- a/runtime/interpreter/mterp/mips/op_xor_int_lit16.S
+++ b/runtime/interpreter/mterp/mips/op_xor_int_lit16.S
@@ -1 +1,2 @@
-%include "mips/binopLit16.S" {"instr":"xor a0, a0, a1"}
+%def op_xor_int_lit16():
+% binopLit16(instr="xor a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips/op_xor_int_lit8.S b/runtime/interpreter/mterp/mips/op_xor_int_lit8.S
index 944ed69..268a43a 100644
--- a/runtime/interpreter/mterp/mips/op_xor_int_lit8.S
+++ b/runtime/interpreter/mterp/mips/op_xor_int_lit8.S
@@ -1 +1,2 @@
-%include "mips/binopLit8.S" {"instr":"xor a0, a0, a1"}
+%def op_xor_int_lit8():
+% binopLit8(instr="xor a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips/op_xor_long.S b/runtime/interpreter/mterp/mips/op_xor_long.S
index 93f8f70..5c0c641 100644
--- a/runtime/interpreter/mterp/mips/op_xor_long.S
+++ b/runtime/interpreter/mterp/mips/op_xor_long.S
@@ -1 +1,2 @@
-%include "mips/binopWide.S" {"preinstr":"xor a0, a0, a2", "instr":"xor a1, a1, a3"}
+%def op_xor_long():
+% binopWide(preinstr="xor a0, a0, a2", instr="xor a1, a1, a3")
diff --git a/runtime/interpreter/mterp/mips/op_xor_long_2addr.S b/runtime/interpreter/mterp/mips/op_xor_long_2addr.S
index 49f3fa4..a84e9f0 100644
--- a/runtime/interpreter/mterp/mips/op_xor_long_2addr.S
+++ b/runtime/interpreter/mterp/mips/op_xor_long_2addr.S
@@ -1 +1,2 @@
-%include "mips/binopWide2addr.S" {"preinstr":"xor a0, a0, a2", "instr":"xor a1, a1, a3"}
+%def op_xor_long_2addr():
+% binopWide2addr(preinstr="xor a0, a0, a2", instr="xor a1, a1, a3")
diff --git a/runtime/interpreter/mterp/mips/unop.S b/runtime/interpreter/mterp/mips/unop.S
index bc99263..34eb118 100644
--- a/runtime/interpreter/mterp/mips/unop.S
+++ b/runtime/interpreter/mterp/mips/unop.S
@@ -1,4 +1,4 @@
-%default {"preinstr":"", "result0":"a0"}
+%def unop(preinstr="", result0="a0", instr=""):
/*
* Generic 32-bit unary operation. Provide an "instr" line that
* specifies an instruction that performs "result0 = op a0".
diff --git a/runtime/interpreter/mterp/mips/unopNarrower.S b/runtime/interpreter/mterp/mips/unopNarrower.S
index 0196e27..4f0bb1d 100644
--- a/runtime/interpreter/mterp/mips/unopNarrower.S
+++ b/runtime/interpreter/mterp/mips/unopNarrower.S
@@ -1,4 +1,4 @@
-%default {"load":"LOAD64_F(fa0, fa0f, a3)"}
+%def unopNarrower(load="LOAD64_F(fa0, fa0f, a3)", instr=""):
/*
* Generic 64bit-to-32bit floating-point unary operation. Provide an "instr"
* line that specifies an instruction that performs "fv0 = op fa0".
diff --git a/runtime/interpreter/mterp/mips/unopWide.S b/runtime/interpreter/mterp/mips/unopWide.S
index 135d9fa..269a296 100644
--- a/runtime/interpreter/mterp/mips/unopWide.S
+++ b/runtime/interpreter/mterp/mips/unopWide.S
@@ -1,4 +1,4 @@
-%default {"preinstr":"", "result0":"a0", "result1":"a1"}
+%def unopWide(preinstr="", result0="a0", result1="a1", instr=""):
/*
* Generic 64-bit unary operation. Provide an "instr" line that
* specifies an instruction that performs "result0/result1 = op a0/a1".
diff --git a/runtime/interpreter/mterp/mips/unopWider.S b/runtime/interpreter/mterp/mips/unopWider.S
index ca888ad..7767d6e 100644
--- a/runtime/interpreter/mterp/mips/unopWider.S
+++ b/runtime/interpreter/mterp/mips/unopWider.S
@@ -1,4 +1,4 @@
-%default {"preinstr":"", "result0":"a0", "result1":"a1"}
+%def unopWider(preinstr="", result0="a0", result1="a1", instr=""):
/*
* Generic 32bit-to-64bit unary operation. Provide an "instr" line
* that specifies an instruction that performs "result0/result1 = op a0".
diff --git a/runtime/interpreter/mterp/mips/unused.S b/runtime/interpreter/mterp/mips/unused.S
index ffa00be..3f37e74 100644
--- a/runtime/interpreter/mterp/mips/unused.S
+++ b/runtime/interpreter/mterp/mips/unused.S
@@ -1,3 +1,4 @@
+%def unused():
/*
* Bail to reference interpreter to throw.
*/
diff --git a/runtime/interpreter/mterp/mips/zcmp.S b/runtime/interpreter/mterp/mips/zcmp.S
index 8d3a198..eb23eea 100644
--- a/runtime/interpreter/mterp/mips/zcmp.S
+++ b/runtime/interpreter/mterp/mips/zcmp.S
@@ -1,3 +1,4 @@
+%def zcmp(condition=""):
/*
* Generic one-operand compare-and-branch operation. Provide a "condition"
* fragment that specifies the comparison to perform.
diff --git a/runtime/interpreter/mterp/mips64/alt_stub.S b/runtime/interpreter/mterp/mips64/alt_stub.S
index 12fa84d..17558bb 100644
--- a/runtime/interpreter/mterp/mips64/alt_stub.S
+++ b/runtime/interpreter/mterp/mips64/alt_stub.S
@@ -1,3 +1,4 @@
+%def alt_stub():
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
diff --git a/runtime/interpreter/mterp/mips64/bincmp.S b/runtime/interpreter/mterp/mips64/bincmp.S
index c2bca91..bdf01dc 100644
--- a/runtime/interpreter/mterp/mips64/bincmp.S
+++ b/runtime/interpreter/mterp/mips64/bincmp.S
@@ -1,3 +1,4 @@
+%def bincmp(condition=""):
/*
* Generic two-operand compare-and-branch operation. Provide a "condition"
* fragment that specifies the comparison to perform, e.g. for
diff --git a/runtime/interpreter/mterp/mips64/binop.S b/runtime/interpreter/mterp/mips64/binop.S
index fab48b7..9332fad 100644
--- a/runtime/interpreter/mterp/mips64/binop.S
+++ b/runtime/interpreter/mterp/mips64/binop.S
@@ -1,4 +1,4 @@
-%default {"preinstr":"", "result":"a0", "chkzero":"0"}
+%def binop(preinstr="", result="a0", chkzero="0", instr=""):
/*
* Generic 32-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = a0 op a1".
diff --git a/runtime/interpreter/mterp/mips64/binop2addr.S b/runtime/interpreter/mterp/mips64/binop2addr.S
index 1ae73f5..19f1815 100644
--- a/runtime/interpreter/mterp/mips64/binop2addr.S
+++ b/runtime/interpreter/mterp/mips64/binop2addr.S
@@ -1,4 +1,4 @@
-%default {"preinstr":"", "result":"a0", "chkzero":"0"}
+%def binop2addr(preinstr="", result="a0", chkzero="0", instr=""):
/*
* Generic 32-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
diff --git a/runtime/interpreter/mterp/mips64/binopLit16.S b/runtime/interpreter/mterp/mips64/binopLit16.S
index 9257758..7cb2b97 100644
--- a/runtime/interpreter/mterp/mips64/binopLit16.S
+++ b/runtime/interpreter/mterp/mips64/binopLit16.S
@@ -1,4 +1,4 @@
-%default {"preinstr":"", "result":"a0", "chkzero":"0"}
+%def binopLit16(preinstr="", result="a0", chkzero="0", instr=""):
/*
* Generic 32-bit "lit16" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
diff --git a/runtime/interpreter/mterp/mips64/binopLit8.S b/runtime/interpreter/mterp/mips64/binopLit8.S
index f4a0bba..3c0449f 100644
--- a/runtime/interpreter/mterp/mips64/binopLit8.S
+++ b/runtime/interpreter/mterp/mips64/binopLit8.S
@@ -1,4 +1,4 @@
-%default {"preinstr":"", "result":"a0", "chkzero":"0"}
+%def binopLit8(preinstr="", result="a0", chkzero="0", instr=""):
/*
* Generic 32-bit "lit8" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
diff --git a/runtime/interpreter/mterp/mips64/binopWide.S b/runtime/interpreter/mterp/mips64/binopWide.S
index 732f0d6..2206b31 100644
--- a/runtime/interpreter/mterp/mips64/binopWide.S
+++ b/runtime/interpreter/mterp/mips64/binopWide.S
@@ -1,4 +1,4 @@
-%default {"preinstr":"", "result":"a0", "chkzero":"0"}
+%def binopWide(preinstr="", result="a0", chkzero="0", instr=""):
/*
* Generic 64-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = a0 op a1".
diff --git a/runtime/interpreter/mterp/mips64/binopWide2addr.S b/runtime/interpreter/mterp/mips64/binopWide2addr.S
index 45d8d82..8758a80 100644
--- a/runtime/interpreter/mterp/mips64/binopWide2addr.S
+++ b/runtime/interpreter/mterp/mips64/binopWide2addr.S
@@ -1,4 +1,4 @@
-%default {"preinstr":"", "result":"a0", "chkzero":"0"}
+%def binopWide2addr(preinstr="", result="a0", chkzero="0", instr=""):
/*
* Generic 64-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
diff --git a/runtime/interpreter/mterp/mips64/const.S b/runtime/interpreter/mterp/mips64/const.S
index 2ec1173..5de2404 100644
--- a/runtime/interpreter/mterp/mips64/const.S
+++ b/runtime/interpreter/mterp/mips64/const.S
@@ -1,4 +1,4 @@
-%default { "helper":"UndefinedConstHandler" }
+%def const(helper="UndefinedConstHandler"):
/* const/class vAA, type@BBBB */
/* const/method-handle vAA, method_handle@BBBB */
/* const/method-type vAA, proto@BBBB */
diff --git a/runtime/interpreter/mterp/mips64/entry.S b/runtime/interpreter/mterp/mips64/entry.S
index ed965aa..0c64137 100644
--- a/runtime/interpreter/mterp/mips64/entry.S
+++ b/runtime/interpreter/mterp/mips64/entry.S
@@ -1,3 +1,4 @@
+%def entry():
/*
* Copyright (C) 2016 The Android Open Source Project
*
diff --git a/runtime/interpreter/mterp/mips64/fallback.S b/runtime/interpreter/mterp/mips64/fallback.S
index 560b994..71abfeb 100644
--- a/runtime/interpreter/mterp/mips64/fallback.S
+++ b/runtime/interpreter/mterp/mips64/fallback.S
@@ -1,2 +1,3 @@
+%def fallback():
/* Transfer stub to alternate interpreter */
b MterpFallback
diff --git a/runtime/interpreter/mterp/mips64/fbinop.S b/runtime/interpreter/mterp/mips64/fbinop.S
index f19dd1c..5090528 100644
--- a/runtime/interpreter/mterp/mips64/fbinop.S
+++ b/runtime/interpreter/mterp/mips64/fbinop.S
@@ -1,4 +1,4 @@
-%default {}
+%def fbinop(instr=""):
/*:
* Generic 32-bit floating-point operation.
*
diff --git a/runtime/interpreter/mterp/mips64/fbinop2addr.S b/runtime/interpreter/mterp/mips64/fbinop2addr.S
index 2e2cd7e..fe5ad2b 100644
--- a/runtime/interpreter/mterp/mips64/fbinop2addr.S
+++ b/runtime/interpreter/mterp/mips64/fbinop2addr.S
@@ -1,4 +1,4 @@
-%default {}
+%def fbinop2addr(instr=""):
/*:
* Generic 32-bit "/2addr" floating-point operation.
*
diff --git a/runtime/interpreter/mterp/mips64/fbinopWide.S b/runtime/interpreter/mterp/mips64/fbinopWide.S
index 8915c94..ca7765b 100644
--- a/runtime/interpreter/mterp/mips64/fbinopWide.S
+++ b/runtime/interpreter/mterp/mips64/fbinopWide.S
@@ -1,4 +1,4 @@
-%default {}
+%def fbinopWide(instr=""):
/*:
* Generic 64-bit floating-point operation.
*
diff --git a/runtime/interpreter/mterp/mips64/fbinopWide2addr.S b/runtime/interpreter/mterp/mips64/fbinopWide2addr.S
index a3f4eaa..a4dfd4c 100644
--- a/runtime/interpreter/mterp/mips64/fbinopWide2addr.S
+++ b/runtime/interpreter/mterp/mips64/fbinopWide2addr.S
@@ -1,4 +1,4 @@
-%default {}
+%def fbinopWide2addr(instr=""):
/*:
* Generic 64-bit "/2addr" floating-point operation.
*
diff --git a/runtime/interpreter/mterp/mips64/fcmp.S b/runtime/interpreter/mterp/mips64/fcmp.S
index 2e1a3e4..bc40f96 100644
--- a/runtime/interpreter/mterp/mips64/fcmp.S
+++ b/runtime/interpreter/mterp/mips64/fcmp.S
@@ -1,4 +1,4 @@
-%default {}
+%def fcmp(gt_bias=""):
/*
* Compare two floating-point values. Puts 0, 1, or -1 into the
* destination register based on the results of the comparison.
diff --git a/runtime/interpreter/mterp/mips64/fcmpWide.S b/runtime/interpreter/mterp/mips64/fcmpWide.S
index 2a3a341..05f33e6 100644
--- a/runtime/interpreter/mterp/mips64/fcmpWide.S
+++ b/runtime/interpreter/mterp/mips64/fcmpWide.S
@@ -1,4 +1,4 @@
-%default {}
+%def fcmpWide(gt_bias=""):
/*
* Compare two floating-point values. Puts 0, 1, or -1 into the
* destination register based on the results of the comparison.
diff --git a/runtime/interpreter/mterp/mips64/fcvtFooter.S b/runtime/interpreter/mterp/mips64/fcvtFooter.S
index 06e9507..711f3f3 100644
--- a/runtime/interpreter/mterp/mips64/fcvtFooter.S
+++ b/runtime/interpreter/mterp/mips64/fcvtFooter.S
@@ -1,3 +1,4 @@
+%def fcvtFooter(suffix="", valreg=""):
/*
* Stores a specified register containing the result of conversion
* from or to a floating-point type and jumps to the next instruction.
diff --git a/runtime/interpreter/mterp/mips64/fcvtHeader.S b/runtime/interpreter/mterp/mips64/fcvtHeader.S
index 8742e42..688b6be 100644
--- a/runtime/interpreter/mterp/mips64/fcvtHeader.S
+++ b/runtime/interpreter/mterp/mips64/fcvtHeader.S
@@ -1,3 +1,4 @@
+%def fcvtHeader(suffix="", valreg=""):
/*
* Loads a specified register from vB. Used primarily for conversions
* from or to a floating-point type.
diff --git a/runtime/interpreter/mterp/mips64/field.S b/runtime/interpreter/mterp/mips64/field.S
index 1333ed7..d61b06a 100644
--- a/runtime/interpreter/mterp/mips64/field.S
+++ b/runtime/interpreter/mterp/mips64/field.S
@@ -1 +1,2 @@
+%def field(helper=""):
TODO
diff --git a/runtime/interpreter/mterp/mips64/footer.S b/runtime/interpreter/mterp/mips64/footer.S
index 779b1fb..5673151 100644
--- a/runtime/interpreter/mterp/mips64/footer.S
+++ b/runtime/interpreter/mterp/mips64/footer.S
@@ -1,3 +1,4 @@
+%def footer():
/*
* We've detected a condition that will result in an exception, but the exception
* has not yet been thrown. Just bail out to the reference interpreter to deal with it.
diff --git a/runtime/interpreter/mterp/mips64/header.S b/runtime/interpreter/mterp/mips64/header.S
index 7e1446c..42c7126 100644
--- a/runtime/interpreter/mterp/mips64/header.S
+++ b/runtime/interpreter/mterp/mips64/header.S
@@ -1,3 +1,4 @@
+%def header():
/*
* Copyright (C) 2016 The Android Open Source Project
*
diff --git a/runtime/interpreter/mterp/mips64/instruction_end.S b/runtime/interpreter/mterp/mips64/instruction_end.S
index 32c725c..3d44293 100644
--- a/runtime/interpreter/mterp/mips64/instruction_end.S
+++ b/runtime/interpreter/mterp/mips64/instruction_end.S
@@ -1,3 +1,4 @@
+%def instruction_end():
.global artMterpAsmInstructionEnd
artMterpAsmInstructionEnd:
diff --git a/runtime/interpreter/mterp/mips64/instruction_end_alt.S b/runtime/interpreter/mterp/mips64/instruction_end_alt.S
index f90916f..86a1068 100644
--- a/runtime/interpreter/mterp/mips64/instruction_end_alt.S
+++ b/runtime/interpreter/mterp/mips64/instruction_end_alt.S
@@ -1,3 +1,4 @@
+%def instruction_end_alt():
.global artMterpAsmAltInstructionEnd
artMterpAsmAltInstructionEnd:
diff --git a/runtime/interpreter/mterp/mips64/instruction_end_sister.S b/runtime/interpreter/mterp/mips64/instruction_end_sister.S
index c5f4886..8cc4513 100644
--- a/runtime/interpreter/mterp/mips64/instruction_end_sister.S
+++ b/runtime/interpreter/mterp/mips64/instruction_end_sister.S
@@ -1,3 +1,4 @@
+%def instruction_end_sister():
.global artMterpAsmSisterEnd
artMterpAsmSisterEnd:
diff --git a/runtime/interpreter/mterp/mips64/instruction_start.S b/runtime/interpreter/mterp/mips64/instruction_start.S
index 8874c20..4b777f2 100644
--- a/runtime/interpreter/mterp/mips64/instruction_start.S
+++ b/runtime/interpreter/mterp/mips64/instruction_start.S
@@ -1,3 +1,4 @@
+%def instruction_start():
.global artMterpAsmInstructionStart
artMterpAsmInstructionStart = .L_op_nop
diff --git a/runtime/interpreter/mterp/mips64/instruction_start_alt.S b/runtime/interpreter/mterp/mips64/instruction_start_alt.S
index 0c9ffdb..e7731b7 100644
--- a/runtime/interpreter/mterp/mips64/instruction_start_alt.S
+++ b/runtime/interpreter/mterp/mips64/instruction_start_alt.S
@@ -1,3 +1,4 @@
+%def instruction_start_alt():
.global artMterpAsmAltInstructionStart
artMterpAsmAltInstructionStart = .L_ALT_op_nop
diff --git a/runtime/interpreter/mterp/mips64/instruction_start_sister.S b/runtime/interpreter/mterp/mips64/instruction_start_sister.S
index 2ec51f7..e09ea90 100644
--- a/runtime/interpreter/mterp/mips64/instruction_start_sister.S
+++ b/runtime/interpreter/mterp/mips64/instruction_start_sister.S
@@ -1,3 +1,4 @@
+%def instruction_start_sister():
.global artMterpAsmSisterStart
.text
diff --git a/runtime/interpreter/mterp/mips64/invoke.S b/runtime/interpreter/mterp/mips64/invoke.S
index be647b6..caf5698 100644
--- a/runtime/interpreter/mterp/mips64/invoke.S
+++ b/runtime/interpreter/mterp/mips64/invoke.S
@@ -1,4 +1,4 @@
-%default { "helper":"UndefinedInvokeHandler" }
+%def invoke(helper="UndefinedInvokeHandler"):
/*
* Generic invoke handler wrapper.
*/
diff --git a/runtime/interpreter/mterp/mips64/invoke_polymorphic.S b/runtime/interpreter/mterp/mips64/invoke_polymorphic.S
index fa82083..3a10554 100644
--- a/runtime/interpreter/mterp/mips64/invoke_polymorphic.S
+++ b/runtime/interpreter/mterp/mips64/invoke_polymorphic.S
@@ -1,4 +1,4 @@
-%default { "helper":"UndefinedInvokeHandler" }
+%def invoke_polymorphic(helper="UndefinedInvokeHandler"):
/*
* invoke-polymorphic handler wrapper.
*/
diff --git a/runtime/interpreter/mterp/mips64/op_add_double.S b/runtime/interpreter/mterp/mips64/op_add_double.S
index 1520e32..0c1f6a2 100644
--- a/runtime/interpreter/mterp/mips64/op_add_double.S
+++ b/runtime/interpreter/mterp/mips64/op_add_double.S
@@ -1 +1,2 @@
-%include "mips64/fbinopWide.S" {"instr":"add.d f0, f0, f1"}
+%def op_add_double():
+% fbinopWide(instr="add.d f0, f0, f1")
diff --git a/runtime/interpreter/mterp/mips64/op_add_double_2addr.S b/runtime/interpreter/mterp/mips64/op_add_double_2addr.S
index c14382e..f667996 100644
--- a/runtime/interpreter/mterp/mips64/op_add_double_2addr.S
+++ b/runtime/interpreter/mterp/mips64/op_add_double_2addr.S
@@ -1 +1,2 @@
-%include "mips64/fbinopWide2addr.S" {"instr":"add.d f0, f0, f1"}
+%def op_add_double_2addr():
+% fbinopWide2addr(instr="add.d f0, f0, f1")
diff --git a/runtime/interpreter/mterp/mips64/op_add_float.S b/runtime/interpreter/mterp/mips64/op_add_float.S
index c6ed558..4c0f88c 100644
--- a/runtime/interpreter/mterp/mips64/op_add_float.S
+++ b/runtime/interpreter/mterp/mips64/op_add_float.S
@@ -1 +1,2 @@
-%include "mips64/fbinop.S" {"instr":"add.s f0, f0, f1"}
+%def op_add_float():
+% fbinop(instr="add.s f0, f0, f1")
diff --git a/runtime/interpreter/mterp/mips64/op_add_float_2addr.S b/runtime/interpreter/mterp/mips64/op_add_float_2addr.S
index 4c20547..0bcc91a 100644
--- a/runtime/interpreter/mterp/mips64/op_add_float_2addr.S
+++ b/runtime/interpreter/mterp/mips64/op_add_float_2addr.S
@@ -1 +1,2 @@
-%include "mips64/fbinop2addr.S" {"instr":"add.s f0, f0, f1"}
+%def op_add_float_2addr():
+% fbinop2addr(instr="add.s f0, f0, f1")
diff --git a/runtime/interpreter/mterp/mips64/op_add_int.S b/runtime/interpreter/mterp/mips64/op_add_int.S
index 6e569de..ed0fc01 100644
--- a/runtime/interpreter/mterp/mips64/op_add_int.S
+++ b/runtime/interpreter/mterp/mips64/op_add_int.S
@@ -1 +1,2 @@
-%include "mips64/binop.S" {"instr":"addu a0, a0, a1"}
+%def op_add_int():
+% binop(instr="addu a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips64/op_add_int_2addr.S b/runtime/interpreter/mterp/mips64/op_add_int_2addr.S
index 2a84124..ed0b131 100644
--- a/runtime/interpreter/mterp/mips64/op_add_int_2addr.S
+++ b/runtime/interpreter/mterp/mips64/op_add_int_2addr.S
@@ -1 +1,2 @@
-%include "mips64/binop2addr.S" {"instr":"addu a0, a0, a1"}
+%def op_add_int_2addr():
+% binop2addr(instr="addu a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips64/op_add_int_lit16.S b/runtime/interpreter/mterp/mips64/op_add_int_lit16.S
index 94b053b..126807a 100644
--- a/runtime/interpreter/mterp/mips64/op_add_int_lit16.S
+++ b/runtime/interpreter/mterp/mips64/op_add_int_lit16.S
@@ -1 +1,2 @@
-%include "mips64/binopLit16.S" {"instr":"addu a0, a0, a1"}
+%def op_add_int_lit16():
+% binopLit16(instr="addu a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips64/op_add_int_lit8.S b/runtime/interpreter/mterp/mips64/op_add_int_lit8.S
index 3b6d734..30184c4 100644
--- a/runtime/interpreter/mterp/mips64/op_add_int_lit8.S
+++ b/runtime/interpreter/mterp/mips64/op_add_int_lit8.S
@@ -1 +1,2 @@
-%include "mips64/binopLit8.S" {"instr":"addu a0, a0, a1"}
+%def op_add_int_lit8():
+% binopLit8(instr="addu a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips64/op_add_long.S b/runtime/interpreter/mterp/mips64/op_add_long.S
index c8d702f..72a1f24 100644
--- a/runtime/interpreter/mterp/mips64/op_add_long.S
+++ b/runtime/interpreter/mterp/mips64/op_add_long.S
@@ -1 +1,2 @@
-%include "mips64/binopWide.S" {"instr":"daddu a0, a0, a1"}
+%def op_add_long():
+% binopWide(instr="daddu a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips64/op_add_long_2addr.S b/runtime/interpreter/mterp/mips64/op_add_long_2addr.S
index 928ff54..caf29e2 100644
--- a/runtime/interpreter/mterp/mips64/op_add_long_2addr.S
+++ b/runtime/interpreter/mterp/mips64/op_add_long_2addr.S
@@ -1 +1,2 @@
-%include "mips64/binopWide2addr.S" {"instr":"daddu a0, a0, a1"}
+%def op_add_long_2addr():
+% binopWide2addr(instr="daddu a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips64/op_aget.S b/runtime/interpreter/mterp/mips64/op_aget.S
index 0472a06..60be23d 100644
--- a/runtime/interpreter/mterp/mips64/op_aget.S
+++ b/runtime/interpreter/mterp/mips64/op_aget.S
@@ -1,4 +1,4 @@
-%default { "load":"lw", "shift":"2", "data_offset":"MIRROR_INT_ARRAY_DATA_OFFSET" }
+%def op_aget(load="lw", shift="2", data_offset="MIRROR_INT_ARRAY_DATA_OFFSET"):
/*
* Array get, 32 bits or less. vAA <- vBB[vCC].
*
diff --git a/runtime/interpreter/mterp/mips64/op_aget_boolean.S b/runtime/interpreter/mterp/mips64/op_aget_boolean.S
index d5be01b..7b28bc8 100644
--- a/runtime/interpreter/mterp/mips64/op_aget_boolean.S
+++ b/runtime/interpreter/mterp/mips64/op_aget_boolean.S
@@ -1 +1,2 @@
-%include "mips64/op_aget.S" { "load":"lbu", "shift":"0", "data_offset":"MIRROR_BOOLEAN_ARRAY_DATA_OFFSET" }
+%def op_aget_boolean():
+% op_aget(load="lbu", shift="0", data_offset="MIRROR_BOOLEAN_ARRAY_DATA_OFFSET")
diff --git a/runtime/interpreter/mterp/mips64/op_aget_byte.S b/runtime/interpreter/mterp/mips64/op_aget_byte.S
index 084de8d..a4a0b7e 100644
--- a/runtime/interpreter/mterp/mips64/op_aget_byte.S
+++ b/runtime/interpreter/mterp/mips64/op_aget_byte.S
@@ -1 +1,2 @@
-%include "mips64/op_aget.S" { "load":"lb", "shift":"0", "data_offset":"MIRROR_BYTE_ARRAY_DATA_OFFSET" }
+%def op_aget_byte():
+% op_aget(load="lb", shift="0", data_offset="MIRROR_BYTE_ARRAY_DATA_OFFSET")
diff --git a/runtime/interpreter/mterp/mips64/op_aget_char.S b/runtime/interpreter/mterp/mips64/op_aget_char.S
index 6c99ed5..465de09 100644
--- a/runtime/interpreter/mterp/mips64/op_aget_char.S
+++ b/runtime/interpreter/mterp/mips64/op_aget_char.S
@@ -1 +1,2 @@
-%include "mips64/op_aget.S" { "load":"lhu", "shift":"1", "data_offset":"MIRROR_CHAR_ARRAY_DATA_OFFSET" }
+%def op_aget_char():
+% op_aget(load="lhu", shift="1", data_offset="MIRROR_CHAR_ARRAY_DATA_OFFSET")
diff --git a/runtime/interpreter/mterp/mips64/op_aget_object.S b/runtime/interpreter/mterp/mips64/op_aget_object.S
index 6374a05..48d751b 100644
--- a/runtime/interpreter/mterp/mips64/op_aget_object.S
+++ b/runtime/interpreter/mterp/mips64/op_aget_object.S
@@ -1,3 +1,4 @@
+%def op_aget_object():
/*
* Array object get. vAA <- vBB[vCC].
*
diff --git a/runtime/interpreter/mterp/mips64/op_aget_short.S b/runtime/interpreter/mterp/mips64/op_aget_short.S
index 0158b0a..4faa9ad 100644
--- a/runtime/interpreter/mterp/mips64/op_aget_short.S
+++ b/runtime/interpreter/mterp/mips64/op_aget_short.S
@@ -1 +1,2 @@
-%include "mips64/op_aget.S" { "load":"lh", "shift":"1", "data_offset":"MIRROR_SHORT_ARRAY_DATA_OFFSET" }
+%def op_aget_short():
+% op_aget(load="lh", shift="1", data_offset="MIRROR_SHORT_ARRAY_DATA_OFFSET")
diff --git a/runtime/interpreter/mterp/mips64/op_aget_wide.S b/runtime/interpreter/mterp/mips64/op_aget_wide.S
index 0945aca..99b0de9 100644
--- a/runtime/interpreter/mterp/mips64/op_aget_wide.S
+++ b/runtime/interpreter/mterp/mips64/op_aget_wide.S
@@ -1,3 +1,4 @@
+%def op_aget_wide():
/*
* Array get, 64 bits. vAA <- vBB[vCC].
*
diff --git a/runtime/interpreter/mterp/mips64/op_and_int.S b/runtime/interpreter/mterp/mips64/op_and_int.S
index f0792a8..740411d 100644
--- a/runtime/interpreter/mterp/mips64/op_and_int.S
+++ b/runtime/interpreter/mterp/mips64/op_and_int.S
@@ -1 +1,2 @@
-%include "mips64/binop.S" {"instr":"and a0, a0, a1"}
+%def op_and_int():
+% binop(instr="and a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips64/op_and_int_2addr.S b/runtime/interpreter/mterp/mips64/op_and_int_2addr.S
index 08dc615..8224e5f 100644
--- a/runtime/interpreter/mterp/mips64/op_and_int_2addr.S
+++ b/runtime/interpreter/mterp/mips64/op_and_int_2addr.S
@@ -1 +1,2 @@
-%include "mips64/binop2addr.S" {"instr":"and a0, a0, a1"}
+%def op_and_int_2addr():
+% binop2addr(instr="and a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips64/op_and_int_lit16.S b/runtime/interpreter/mterp/mips64/op_and_int_lit16.S
index 65d28ad..5031f50 100644
--- a/runtime/interpreter/mterp/mips64/op_and_int_lit16.S
+++ b/runtime/interpreter/mterp/mips64/op_and_int_lit16.S
@@ -1 +1,2 @@
-%include "mips64/binopLit16.S" {"instr":"and a0, a0, a1"}
+%def op_and_int_lit16():
+% binopLit16(instr="and a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips64/op_and_int_lit8.S b/runtime/interpreter/mterp/mips64/op_and_int_lit8.S
index ab84bb7..7a7b8b5 100644
--- a/runtime/interpreter/mterp/mips64/op_and_int_lit8.S
+++ b/runtime/interpreter/mterp/mips64/op_and_int_lit8.S
@@ -1 +1,2 @@
-%include "mips64/binopLit8.S" {"instr":"and a0, a0, a1"}
+%def op_and_int_lit8():
+% binopLit8(instr="and a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips64/op_and_long.S b/runtime/interpreter/mterp/mips64/op_and_long.S
index e383ba0..242ddf2 100644
--- a/runtime/interpreter/mterp/mips64/op_and_long.S
+++ b/runtime/interpreter/mterp/mips64/op_and_long.S
@@ -1 +1,2 @@
-%include "mips64/binopWide.S" {"instr":"and a0, a0, a1"}
+%def op_and_long():
+% binopWide(instr="and a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips64/op_and_long_2addr.S b/runtime/interpreter/mterp/mips64/op_and_long_2addr.S
index f863bb9..64b5a7e 100644
--- a/runtime/interpreter/mterp/mips64/op_and_long_2addr.S
+++ b/runtime/interpreter/mterp/mips64/op_and_long_2addr.S
@@ -1 +1,2 @@
-%include "mips64/binopWide2addr.S" {"instr":"and a0, a0, a1"}
+%def op_and_long_2addr():
+% binopWide2addr(instr="and a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips64/op_aput.S b/runtime/interpreter/mterp/mips64/op_aput.S
index 9bfda97..f4c04d0 100644
--- a/runtime/interpreter/mterp/mips64/op_aput.S
+++ b/runtime/interpreter/mterp/mips64/op_aput.S
@@ -1,4 +1,4 @@
-%default { "store":"sw", "shift":"2", "data_offset":"MIRROR_INT_ARRAY_DATA_OFFSET" }
+%def op_aput(store="sw", shift="2", data_offset="MIRROR_INT_ARRAY_DATA_OFFSET"):
/*
* Array put, 32 bits or less. vBB[vCC] <- vAA.
*
diff --git a/runtime/interpreter/mterp/mips64/op_aput_boolean.S b/runtime/interpreter/mterp/mips64/op_aput_boolean.S
index 6707a1f..098bbcd 100644
--- a/runtime/interpreter/mterp/mips64/op_aput_boolean.S
+++ b/runtime/interpreter/mterp/mips64/op_aput_boolean.S
@@ -1 +1,2 @@
-%include "mips64/op_aput.S" { "store":"sb", "shift":"0", "data_offset":"MIRROR_BOOLEAN_ARRAY_DATA_OFFSET" }
+%def op_aput_boolean():
+% op_aput(store="sb", shift="0", data_offset="MIRROR_BOOLEAN_ARRAY_DATA_OFFSET")
diff --git a/runtime/interpreter/mterp/mips64/op_aput_byte.S b/runtime/interpreter/mterp/mips64/op_aput_byte.S
index 7b9ce48..f4b42ee 100644
--- a/runtime/interpreter/mterp/mips64/op_aput_byte.S
+++ b/runtime/interpreter/mterp/mips64/op_aput_byte.S
@@ -1 +1,2 @@
-%include "mips64/op_aput.S" { "store":"sb", "shift":"0", "data_offset":"MIRROR_BYTE_ARRAY_DATA_OFFSET" }
+%def op_aput_byte():
+% op_aput(store="sb", shift="0", data_offset="MIRROR_BYTE_ARRAY_DATA_OFFSET")
diff --git a/runtime/interpreter/mterp/mips64/op_aput_char.S b/runtime/interpreter/mterp/mips64/op_aput_char.S
index 82bc8f7..18eedae 100644
--- a/runtime/interpreter/mterp/mips64/op_aput_char.S
+++ b/runtime/interpreter/mterp/mips64/op_aput_char.S
@@ -1 +1,2 @@
-%include "mips64/op_aput.S" { "store":"sh", "shift":"1", "data_offset":"MIRROR_CHAR_ARRAY_DATA_OFFSET" }
+%def op_aput_char():
+% op_aput(store="sh", shift="1", data_offset="MIRROR_CHAR_ARRAY_DATA_OFFSET")
diff --git a/runtime/interpreter/mterp/mips64/op_aput_object.S b/runtime/interpreter/mterp/mips64/op_aput_object.S
index b132456..6b23e90 100644
--- a/runtime/interpreter/mterp/mips64/op_aput_object.S
+++ b/runtime/interpreter/mterp/mips64/op_aput_object.S
@@ -1,3 +1,4 @@
+%def op_aput_object():
/*
* Store an object into an array. vBB[vCC] <- vAA.
*/
diff --git a/runtime/interpreter/mterp/mips64/op_aput_short.S b/runtime/interpreter/mterp/mips64/op_aput_short.S
index a7af294..61a3c0d 100644
--- a/runtime/interpreter/mterp/mips64/op_aput_short.S
+++ b/runtime/interpreter/mterp/mips64/op_aput_short.S
@@ -1 +1,2 @@
-%include "mips64/op_aput.S" { "store":"sh", "shift":"1", "data_offset":"MIRROR_SHORT_ARRAY_DATA_OFFSET" }
+%def op_aput_short():
+% op_aput(store="sh", shift="1", data_offset="MIRROR_SHORT_ARRAY_DATA_OFFSET")
diff --git a/runtime/interpreter/mterp/mips64/op_aput_wide.S b/runtime/interpreter/mterp/mips64/op_aput_wide.S
index a1d7a3b..4fad5c4 100644
--- a/runtime/interpreter/mterp/mips64/op_aput_wide.S
+++ b/runtime/interpreter/mterp/mips64/op_aput_wide.S
@@ -1,3 +1,4 @@
+%def op_aput_wide():
/*
* Array put, 64 bits. vBB[vCC] <- vAA.
*
diff --git a/runtime/interpreter/mterp/mips64/op_array_length.S b/runtime/interpreter/mterp/mips64/op_array_length.S
index 2d9e172..13b9a13 100644
--- a/runtime/interpreter/mterp/mips64/op_array_length.S
+++ b/runtime/interpreter/mterp/mips64/op_array_length.S
@@ -1,3 +1,4 @@
+%def op_array_length():
/*
* Return the length of an array.
*/
diff --git a/runtime/interpreter/mterp/mips64/op_check_cast.S b/runtime/interpreter/mterp/mips64/op_check_cast.S
index 472595d..b5f0f1f 100644
--- a/runtime/interpreter/mterp/mips64/op_check_cast.S
+++ b/runtime/interpreter/mterp/mips64/op_check_cast.S
@@ -1,3 +1,4 @@
+%def op_check_cast():
/*
* Check to see if a cast from one class to another is allowed.
*/
diff --git a/runtime/interpreter/mterp/mips64/op_cmp_long.S b/runtime/interpreter/mterp/mips64/op_cmp_long.S
index 6e9376c..87eba44 100644
--- a/runtime/interpreter/mterp/mips64/op_cmp_long.S
+++ b/runtime/interpreter/mterp/mips64/op_cmp_long.S
@@ -1,3 +1,4 @@
+%def op_cmp_long():
/* cmp-long vAA, vBB, vCC */
lbu a2, 2(rPC) # a2 <- BB
lbu a3, 3(rPC) # a3 <- CC
diff --git a/runtime/interpreter/mterp/mips64/op_cmpg_double.S b/runtime/interpreter/mterp/mips64/op_cmpg_double.S
index a8e2ef9..4c3117b 100644
--- a/runtime/interpreter/mterp/mips64/op_cmpg_double.S
+++ b/runtime/interpreter/mterp/mips64/op_cmpg_double.S
@@ -1 +1,2 @@
-%include "mips64/fcmpWide.S" {"gt_bias":"1"}
+%def op_cmpg_double():
+% fcmpWide(gt_bias="1")
diff --git a/runtime/interpreter/mterp/mips64/op_cmpg_float.S b/runtime/interpreter/mterp/mips64/op_cmpg_float.S
index 0c93eac..99c4530 100644
--- a/runtime/interpreter/mterp/mips64/op_cmpg_float.S
+++ b/runtime/interpreter/mterp/mips64/op_cmpg_float.S
@@ -1 +1,2 @@
-%include "mips64/fcmp.S" {"gt_bias":"1"}
+%def op_cmpg_float():
+% fcmp(gt_bias="1")
diff --git a/runtime/interpreter/mterp/mips64/op_cmpl_double.S b/runtime/interpreter/mterp/mips64/op_cmpl_double.S
index 9111b06..4900bdd 100644
--- a/runtime/interpreter/mterp/mips64/op_cmpl_double.S
+++ b/runtime/interpreter/mterp/mips64/op_cmpl_double.S
@@ -1 +1,2 @@
-%include "mips64/fcmpWide.S" {"gt_bias":"0"}
+%def op_cmpl_double():
+% fcmpWide(gt_bias="0")
diff --git a/runtime/interpreter/mterp/mips64/op_cmpl_float.S b/runtime/interpreter/mterp/mips64/op_cmpl_float.S
index b047451..159c66d 100644
--- a/runtime/interpreter/mterp/mips64/op_cmpl_float.S
+++ b/runtime/interpreter/mterp/mips64/op_cmpl_float.S
@@ -1 +1,2 @@
-%include "mips64/fcmp.S" {"gt_bias":"0"}
+%def op_cmpl_float():
+% fcmp(gt_bias="0")
diff --git a/runtime/interpreter/mterp/mips64/op_const.S b/runtime/interpreter/mterp/mips64/op_const.S
index 4b0d69b..6193042 100644
--- a/runtime/interpreter/mterp/mips64/op_const.S
+++ b/runtime/interpreter/mterp/mips64/op_const.S
@@ -1,3 +1,4 @@
+%def op_const():
/* const vAA, #+BBBBbbbb */
srl a2, rINST, 8 # a2 <- AA
lh a0, 2(rPC) # a0 <- bbbb (low)
diff --git a/runtime/interpreter/mterp/mips64/op_const_16.S b/runtime/interpreter/mterp/mips64/op_const_16.S
index 51e68a7..aac542d 100644
--- a/runtime/interpreter/mterp/mips64/op_const_16.S
+++ b/runtime/interpreter/mterp/mips64/op_const_16.S
@@ -1,3 +1,4 @@
+%def op_const_16():
/* const/16 vAA, #+BBBB */
srl a2, rINST, 8 # a2 <- AA
lh a0, 2(rPC) # a0 <- sign-extended BBBB
diff --git a/runtime/interpreter/mterp/mips64/op_const_4.S b/runtime/interpreter/mterp/mips64/op_const_4.S
index 0a58bff..d26f4e5 100644
--- a/runtime/interpreter/mterp/mips64/op_const_4.S
+++ b/runtime/interpreter/mterp/mips64/op_const_4.S
@@ -1,3 +1,4 @@
+%def op_const_4():
/* const/4 vA, #+B */
ext a2, rINST, 8, 4 # a2 <- A
seh a0, rINST # sign extend B in rINST
diff --git a/runtime/interpreter/mterp/mips64/op_const_class.S b/runtime/interpreter/mterp/mips64/op_const_class.S
index 3f0c716..db12ec3 100644
--- a/runtime/interpreter/mterp/mips64/op_const_class.S
+++ b/runtime/interpreter/mterp/mips64/op_const_class.S
@@ -1 +1,2 @@
-%include "mips64/const.S" { "helper":"MterpConstClass" }
+%def op_const_class():
+% const(helper="MterpConstClass")
diff --git a/runtime/interpreter/mterp/mips64/op_const_high16.S b/runtime/interpreter/mterp/mips64/op_const_high16.S
index 43effb6..bf14ab6 100644
--- a/runtime/interpreter/mterp/mips64/op_const_high16.S
+++ b/runtime/interpreter/mterp/mips64/op_const_high16.S
@@ -1,3 +1,4 @@
+%def op_const_high16():
/* const/high16 vAA, #+BBBB0000 */
srl a2, rINST, 8 # a2 <- AA
lh a0, 2(rPC) # a0 <- BBBB
diff --git a/runtime/interpreter/mterp/mips64/op_const_method_handle.S b/runtime/interpreter/mterp/mips64/op_const_method_handle.S
index 43584d1..2680c17 100644
--- a/runtime/interpreter/mterp/mips64/op_const_method_handle.S
+++ b/runtime/interpreter/mterp/mips64/op_const_method_handle.S
@@ -1 +1,2 @@
-%include "mips64/const.S" { "helper":"MterpConstMethodHandle" }
+%def op_const_method_handle():
+% const(helper="MterpConstMethodHandle")
diff --git a/runtime/interpreter/mterp/mips64/op_const_method_type.S b/runtime/interpreter/mterp/mips64/op_const_method_type.S
index 553b284..ea814bf 100644
--- a/runtime/interpreter/mterp/mips64/op_const_method_type.S
+++ b/runtime/interpreter/mterp/mips64/op_const_method_type.S
@@ -1 +1,2 @@
-%include "mips64/const.S" { "helper":"MterpConstMethodType" }
+%def op_const_method_type():
+% const(helper="MterpConstMethodType")
diff --git a/runtime/interpreter/mterp/mips64/op_const_string.S b/runtime/interpreter/mterp/mips64/op_const_string.S
index 96cbb5a..41376f8 100644
--- a/runtime/interpreter/mterp/mips64/op_const_string.S
+++ b/runtime/interpreter/mterp/mips64/op_const_string.S
@@ -1 +1,2 @@
-%include "mips64/const.S" { "helper":"MterpConstString" }
+%def op_const_string():
+% const(helper="MterpConstString")
diff --git a/runtime/interpreter/mterp/mips64/op_const_string_jumbo.S b/runtime/interpreter/mterp/mips64/op_const_string_jumbo.S
index 47f2101..25ec0e2 100644
--- a/runtime/interpreter/mterp/mips64/op_const_string_jumbo.S
+++ b/runtime/interpreter/mterp/mips64/op_const_string_jumbo.S
@@ -1,3 +1,4 @@
+%def op_const_string_jumbo():
/* const/string vAA, String//BBBBBBBB */
.extern MterpConstString
EXPORT_PC
diff --git a/runtime/interpreter/mterp/mips64/op_const_wide.S b/runtime/interpreter/mterp/mips64/op_const_wide.S
index f7eaf7c..7c4a99a 100644
--- a/runtime/interpreter/mterp/mips64/op_const_wide.S
+++ b/runtime/interpreter/mterp/mips64/op_const_wide.S
@@ -1,3 +1,4 @@
+%def op_const_wide():
/* const-wide vAA, #+HHHHhhhhBBBBbbbb */
srl a4, rINST, 8 # a4 <- AA
lh a0, 2(rPC) # a0 <- bbbb (low)
diff --git a/runtime/interpreter/mterp/mips64/op_const_wide_16.S b/runtime/interpreter/mterp/mips64/op_const_wide_16.S
index 3a70937..65f3068 100644
--- a/runtime/interpreter/mterp/mips64/op_const_wide_16.S
+++ b/runtime/interpreter/mterp/mips64/op_const_wide_16.S
@@ -1,3 +1,4 @@
+%def op_const_wide_16():
/* const-wide/16 vAA, #+BBBB */
srl a2, rINST, 8 # a2 <- AA
lh a0, 2(rPC) # a0 <- sign-extended BBBB
diff --git a/runtime/interpreter/mterp/mips64/op_const_wide_32.S b/runtime/interpreter/mterp/mips64/op_const_wide_32.S
index 867197c..39fa0f9 100644
--- a/runtime/interpreter/mterp/mips64/op_const_wide_32.S
+++ b/runtime/interpreter/mterp/mips64/op_const_wide_32.S
@@ -1,3 +1,4 @@
+%def op_const_wide_32():
/* const-wide/32 vAA, #+BBBBbbbb */
srl a2, rINST, 8 # a2 <- AA
lh a0, 2(rPC) # a0 <- bbbb (low)
diff --git a/runtime/interpreter/mterp/mips64/op_const_wide_high16.S b/runtime/interpreter/mterp/mips64/op_const_wide_high16.S
index d741631..7c538c1 100644
--- a/runtime/interpreter/mterp/mips64/op_const_wide_high16.S
+++ b/runtime/interpreter/mterp/mips64/op_const_wide_high16.S
@@ -1,3 +1,4 @@
+%def op_const_wide_high16():
/* const-wide/high16 vAA, #+BBBB000000000000 */
srl a2, rINST, 8 # a2 <- AA
lh a0, 2(rPC) # a0 <- BBBB
diff --git a/runtime/interpreter/mterp/mips64/op_div_double.S b/runtime/interpreter/mterp/mips64/op_div_double.S
index 44998f0..c134dfb 100644
--- a/runtime/interpreter/mterp/mips64/op_div_double.S
+++ b/runtime/interpreter/mterp/mips64/op_div_double.S
@@ -1 +1,2 @@
-%include "mips64/fbinopWide.S" {"instr":"div.d f0, f0, f1"}
+%def op_div_double():
+% fbinopWide(instr="div.d f0, f0, f1")
diff --git a/runtime/interpreter/mterp/mips64/op_div_double_2addr.S b/runtime/interpreter/mterp/mips64/op_div_double_2addr.S
index 396af79..6ac1d75 100644
--- a/runtime/interpreter/mterp/mips64/op_div_double_2addr.S
+++ b/runtime/interpreter/mterp/mips64/op_div_double_2addr.S
@@ -1 +1,2 @@
-%include "mips64/fbinopWide2addr.S" {"instr":"div.d f0, f0, f1"}
+%def op_div_double_2addr():
+% fbinopWide2addr(instr="div.d f0, f0, f1")
diff --git a/runtime/interpreter/mterp/mips64/op_div_float.S b/runtime/interpreter/mterp/mips64/op_div_float.S
index 7b09d52..9753032 100644
--- a/runtime/interpreter/mterp/mips64/op_div_float.S
+++ b/runtime/interpreter/mterp/mips64/op_div_float.S
@@ -1 +1,2 @@
-%include "mips64/fbinop.S" {"instr":"div.s f0, f0, f1"}
+%def op_div_float():
+% fbinop(instr="div.s f0, f0, f1")
diff --git a/runtime/interpreter/mterp/mips64/op_div_float_2addr.S b/runtime/interpreter/mterp/mips64/op_div_float_2addr.S
index e74fdda..53421ce 100644
--- a/runtime/interpreter/mterp/mips64/op_div_float_2addr.S
+++ b/runtime/interpreter/mterp/mips64/op_div_float_2addr.S
@@ -1 +1,2 @@
-%include "mips64/fbinop2addr.S" {"instr":"div.s f0, f0, f1"}
+%def op_div_float_2addr():
+% fbinop2addr(instr="div.s f0, f0, f1")
diff --git a/runtime/interpreter/mterp/mips64/op_div_int.S b/runtime/interpreter/mterp/mips64/op_div_int.S
index fb04acb..da9bfcb 100644
--- a/runtime/interpreter/mterp/mips64/op_div_int.S
+++ b/runtime/interpreter/mterp/mips64/op_div_int.S
@@ -1 +1,2 @@
-%include "mips64/binop.S" {"instr":"div a0, a0, a1", "chkzero":"1"}
+%def op_div_int():
+% binop(instr="div a0, a0, a1", chkzero="1")
diff --git a/runtime/interpreter/mterp/mips64/op_div_int_2addr.S b/runtime/interpreter/mterp/mips64/op_div_int_2addr.S
index db29b84..7c94442 100644
--- a/runtime/interpreter/mterp/mips64/op_div_int_2addr.S
+++ b/runtime/interpreter/mterp/mips64/op_div_int_2addr.S
@@ -1 +1,2 @@
-%include "mips64/binop2addr.S" {"instr":"div a0, a0, a1", "chkzero":"1"}
+%def op_div_int_2addr():
+% binop2addr(instr="div a0, a0, a1", chkzero="1")
diff --git a/runtime/interpreter/mterp/mips64/op_div_int_lit16.S b/runtime/interpreter/mterp/mips64/op_div_int_lit16.S
index e903dde..4afe80e 100644
--- a/runtime/interpreter/mterp/mips64/op_div_int_lit16.S
+++ b/runtime/interpreter/mterp/mips64/op_div_int_lit16.S
@@ -1 +1,2 @@
-%include "mips64/binopLit16.S" {"instr":"div a0, a0, a1", "chkzero":"1"}
+%def op_div_int_lit16():
+% binopLit16(instr="div a0, a0, a1", chkzero="1")
diff --git a/runtime/interpreter/mterp/mips64/op_div_int_lit8.S b/runtime/interpreter/mterp/mips64/op_div_int_lit8.S
index 0559605..7e2df1b 100644
--- a/runtime/interpreter/mterp/mips64/op_div_int_lit8.S
+++ b/runtime/interpreter/mterp/mips64/op_div_int_lit8.S
@@ -1 +1,2 @@
-%include "mips64/binopLit8.S" {"instr":"div a0, a0, a1", "chkzero":"1"}
+%def op_div_int_lit8():
+% binopLit8(instr="div a0, a0, a1", chkzero="1")
diff --git a/runtime/interpreter/mterp/mips64/op_div_long.S b/runtime/interpreter/mterp/mips64/op_div_long.S
index 01fc2b2..93c2187 100644
--- a/runtime/interpreter/mterp/mips64/op_div_long.S
+++ b/runtime/interpreter/mterp/mips64/op_div_long.S
@@ -1 +1,2 @@
-%include "mips64/binopWide.S" {"instr":"ddiv a0, a0, a1", "chkzero":"1"}
+%def op_div_long():
+% binopWide(instr="ddiv a0, a0, a1", chkzero="1")
diff --git a/runtime/interpreter/mterp/mips64/op_div_long_2addr.S b/runtime/interpreter/mterp/mips64/op_div_long_2addr.S
index 9627ab8..74ecb20 100644
--- a/runtime/interpreter/mterp/mips64/op_div_long_2addr.S
+++ b/runtime/interpreter/mterp/mips64/op_div_long_2addr.S
@@ -1 +1,2 @@
-%include "mips64/binopWide2addr.S" {"instr":"ddiv a0, a0, a1", "chkzero":"1"}
+%def op_div_long_2addr():
+% binopWide2addr(instr="ddiv a0, a0, a1", chkzero="1")
diff --git a/runtime/interpreter/mterp/mips64/op_double_to_float.S b/runtime/interpreter/mterp/mips64/op_double_to_float.S
index 2b2acee..f19b47f 100644
--- a/runtime/interpreter/mterp/mips64/op_double_to_float.S
+++ b/runtime/interpreter/mterp/mips64/op_double_to_float.S
@@ -1,8 +1,9 @@
+%def op_double_to_float():
/*
* Conversion from or to floating-point happens in a floating-point register.
* Therefore we load the input and store the output into or from a
* floating-point register irrespective of the type.
*/
-%include "mips64/fcvtHeader.S" { "suffix":"_DOUBLE", "valreg":"f0" }
+% fcvtHeader(suffix="_DOUBLE", valreg="f0")
cvt.s.d f0, f0
-%include "mips64/fcvtFooter.S" { "suffix":"_FLOAT", "valreg":"f0" }
+% fcvtFooter(suffix="_FLOAT", valreg="f0")
diff --git a/runtime/interpreter/mterp/mips64/op_double_to_int.S b/runtime/interpreter/mterp/mips64/op_double_to_int.S
index d099522..ba370a2 100644
--- a/runtime/interpreter/mterp/mips64/op_double_to_int.S
+++ b/runtime/interpreter/mterp/mips64/op_double_to_int.S
@@ -1,3 +1,4 @@
-%include "mips64/fcvtHeader.S" { "suffix":"_DOUBLE", "valreg":"f0" }
+%def op_double_to_int():
+% fcvtHeader(suffix="_DOUBLE", valreg="f0")
trunc.w.d f0, f0
-%include "mips64/fcvtFooter.S" { "suffix":"_FLOAT", "valreg":"f0" }
+% fcvtFooter(suffix="_FLOAT", valreg="f0")
diff --git a/runtime/interpreter/mterp/mips64/op_double_to_long.S b/runtime/interpreter/mterp/mips64/op_double_to_long.S
index 9b65da5..1050a72 100644
--- a/runtime/interpreter/mterp/mips64/op_double_to_long.S
+++ b/runtime/interpreter/mterp/mips64/op_double_to_long.S
@@ -1,3 +1,4 @@
-%include "mips64/fcvtHeader.S" { "suffix":"_DOUBLE", "valreg":"f0" }
+%def op_double_to_long():
+% fcvtHeader(suffix="_DOUBLE", valreg="f0")
trunc.l.d f0, f0
-%include "mips64/fcvtFooter.S" { "suffix":"_DOUBLE", "valreg":"f0" }
+% fcvtFooter(suffix="_DOUBLE", valreg="f0")
diff --git a/runtime/interpreter/mterp/mips64/op_fill_array_data.S b/runtime/interpreter/mterp/mips64/op_fill_array_data.S
index c90f0b9..5ccff91 100644
--- a/runtime/interpreter/mterp/mips64/op_fill_array_data.S
+++ b/runtime/interpreter/mterp/mips64/op_fill_array_data.S
@@ -1,3 +1,4 @@
+%def op_fill_array_data():
/* fill-array-data vAA, +BBBBBBBB */
.extern MterpFillArrayData
EXPORT_PC
diff --git a/runtime/interpreter/mterp/mips64/op_filled_new_array.S b/runtime/interpreter/mterp/mips64/op_filled_new_array.S
index 35f55c2..d86ce16 100644
--- a/runtime/interpreter/mterp/mips64/op_filled_new_array.S
+++ b/runtime/interpreter/mterp/mips64/op_filled_new_array.S
@@ -1,4 +1,4 @@
-%default { "helper":"MterpFilledNewArray" }
+%def op_filled_new_array(helper="MterpFilledNewArray"):
/*
* Create a new array with elements filled from registers.
*
diff --git a/runtime/interpreter/mterp/mips64/op_filled_new_array_range.S b/runtime/interpreter/mterp/mips64/op_filled_new_array_range.S
index a4e18f6..1667de1 100644
--- a/runtime/interpreter/mterp/mips64/op_filled_new_array_range.S
+++ b/runtime/interpreter/mterp/mips64/op_filled_new_array_range.S
@@ -1 +1,2 @@
-%include "mips64/op_filled_new_array.S" { "helper":"MterpFilledNewArrayRange" }
+%def op_filled_new_array_range():
+% op_filled_new_array(helper="MterpFilledNewArrayRange")
diff --git a/runtime/interpreter/mterp/mips64/op_float_to_double.S b/runtime/interpreter/mterp/mips64/op_float_to_double.S
index 6accfee..feebdd8 100644
--- a/runtime/interpreter/mterp/mips64/op_float_to_double.S
+++ b/runtime/interpreter/mterp/mips64/op_float_to_double.S
@@ -1,8 +1,9 @@
+%def op_float_to_double():
/*
* Conversion from or to floating-point happens in a floating-point register.
* Therefore we load the input and store the output into or from a
* floating-point register irrespective of the type.
*/
-%include "mips64/fcvtHeader.S" { "suffix":"_FLOAT", "valreg":"f0" }
+% fcvtHeader(suffix="_FLOAT", valreg="f0")
cvt.d.s f0, f0
-%include "mips64/fcvtFooter.S" { "suffix":"_DOUBLE", "valreg":"f0" }
+% fcvtFooter(suffix="_DOUBLE", valreg="f0")
diff --git a/runtime/interpreter/mterp/mips64/op_float_to_int.S b/runtime/interpreter/mterp/mips64/op_float_to_int.S
index 2806973..cbfe853 100644
--- a/runtime/interpreter/mterp/mips64/op_float_to_int.S
+++ b/runtime/interpreter/mterp/mips64/op_float_to_int.S
@@ -1,3 +1,4 @@
-%include "mips64/fcvtHeader.S" { "suffix":"_FLOAT", "valreg":"f0" }
+%def op_float_to_int():
+% fcvtHeader(suffix="_FLOAT", valreg="f0")
trunc.w.s f0, f0
-%include "mips64/fcvtFooter.S" { "suffix":"_FLOAT", "valreg":"f0" }
+% fcvtFooter(suffix="_FLOAT", valreg="f0")
diff --git a/runtime/interpreter/mterp/mips64/op_float_to_long.S b/runtime/interpreter/mterp/mips64/op_float_to_long.S
index c40c8a6..ccf23b1 100644
--- a/runtime/interpreter/mterp/mips64/op_float_to_long.S
+++ b/runtime/interpreter/mterp/mips64/op_float_to_long.S
@@ -1,3 +1,4 @@
-%include "mips64/fcvtHeader.S" { "suffix":"_FLOAT", "valreg":"f0" }
+%def op_float_to_long():
+% fcvtHeader(suffix="_FLOAT", valreg="f0")
trunc.l.s f0, f0
-%include "mips64/fcvtFooter.S" { "suffix":"_DOUBLE", "valreg":"f0" }
+% fcvtFooter(suffix="_DOUBLE", valreg="f0")
diff --git a/runtime/interpreter/mterp/mips64/op_goto.S b/runtime/interpreter/mterp/mips64/op_goto.S
index 68fc83d..371bae7 100644
--- a/runtime/interpreter/mterp/mips64/op_goto.S
+++ b/runtime/interpreter/mterp/mips64/op_goto.S
@@ -1,3 +1,4 @@
+%def op_goto():
/*
* Unconditional branch, 8-bit offset.
*
diff --git a/runtime/interpreter/mterp/mips64/op_goto_16.S b/runtime/interpreter/mterp/mips64/op_goto_16.S
index ae56066..3b0b52a 100644
--- a/runtime/interpreter/mterp/mips64/op_goto_16.S
+++ b/runtime/interpreter/mterp/mips64/op_goto_16.S
@@ -1,3 +1,4 @@
+%def op_goto_16():
/*
* Unconditional branch, 16-bit offset.
*
diff --git a/runtime/interpreter/mterp/mips64/op_goto_32.S b/runtime/interpreter/mterp/mips64/op_goto_32.S
index 498b6d6..d48f0a0 100644
--- a/runtime/interpreter/mterp/mips64/op_goto_32.S
+++ b/runtime/interpreter/mterp/mips64/op_goto_32.S
@@ -1,3 +1,4 @@
+%def op_goto_32():
/*
* Unconditional branch, 32-bit offset.
*
diff --git a/runtime/interpreter/mterp/mips64/op_if_eq.S b/runtime/interpreter/mterp/mips64/op_if_eq.S
index aa35cad..da58674 100644
--- a/runtime/interpreter/mterp/mips64/op_if_eq.S
+++ b/runtime/interpreter/mterp/mips64/op_if_eq.S
@@ -1 +1,2 @@
-%include "mips64/bincmp.S" { "condition":"eq" }
+%def op_if_eq():
+% bincmp(condition="eq")
diff --git a/runtime/interpreter/mterp/mips64/op_if_eqz.S b/runtime/interpreter/mterp/mips64/op_if_eqz.S
index 0fe3418..0639664 100644
--- a/runtime/interpreter/mterp/mips64/op_if_eqz.S
+++ b/runtime/interpreter/mterp/mips64/op_if_eqz.S
@@ -1 +1,2 @@
-%include "mips64/zcmp.S" { "condition":"eq" }
+%def op_if_eqz():
+% zcmp(condition="eq")
diff --git a/runtime/interpreter/mterp/mips64/op_if_ge.S b/runtime/interpreter/mterp/mips64/op_if_ge.S
index 59fdcc5..5b6ed2f 100644
--- a/runtime/interpreter/mterp/mips64/op_if_ge.S
+++ b/runtime/interpreter/mterp/mips64/op_if_ge.S
@@ -1 +1,2 @@
-%include "mips64/bincmp.S" { "condition":"ge" }
+%def op_if_ge():
+% bincmp(condition="ge")
diff --git a/runtime/interpreter/mterp/mips64/op_if_gez.S b/runtime/interpreter/mterp/mips64/op_if_gez.S
index 57f1f66..ea6cda7 100644
--- a/runtime/interpreter/mterp/mips64/op_if_gez.S
+++ b/runtime/interpreter/mterp/mips64/op_if_gez.S
@@ -1 +1,2 @@
-%include "mips64/zcmp.S" { "condition":"ge" }
+%def op_if_gez():
+% zcmp(condition="ge")
diff --git a/runtime/interpreter/mterp/mips64/op_if_gt.S b/runtime/interpreter/mterp/mips64/op_if_gt.S
index 26cc119..201decf 100644
--- a/runtime/interpreter/mterp/mips64/op_if_gt.S
+++ b/runtime/interpreter/mterp/mips64/op_if_gt.S
@@ -1 +1,2 @@
-%include "mips64/bincmp.S" { "condition":"gt" }
+%def op_if_gt():
+% bincmp(condition="gt")
diff --git a/runtime/interpreter/mterp/mips64/op_if_gtz.S b/runtime/interpreter/mterp/mips64/op_if_gtz.S
index 69fcacb..1fdbb6e 100644
--- a/runtime/interpreter/mterp/mips64/op_if_gtz.S
+++ b/runtime/interpreter/mterp/mips64/op_if_gtz.S
@@ -1 +1,2 @@
-%include "mips64/zcmp.S" { "condition":"gt" }
+%def op_if_gtz():
+% zcmp(condition="gt")
diff --git a/runtime/interpreter/mterp/mips64/op_if_le.S b/runtime/interpreter/mterp/mips64/op_if_le.S
index a7fce17..e6024f2 100644
--- a/runtime/interpreter/mterp/mips64/op_if_le.S
+++ b/runtime/interpreter/mterp/mips64/op_if_le.S
@@ -1 +1,2 @@
-%include "mips64/bincmp.S" { "condition":"le" }
+%def op_if_le():
+% bincmp(condition="le")
diff --git a/runtime/interpreter/mterp/mips64/op_if_lez.S b/runtime/interpreter/mterp/mips64/op_if_lez.S
index f3edcc6..62c0d2c 100644
--- a/runtime/interpreter/mterp/mips64/op_if_lez.S
+++ b/runtime/interpreter/mterp/mips64/op_if_lez.S
@@ -1 +1,2 @@
-%include "mips64/zcmp.S" { "condition":"le" }
+%def op_if_lez():
+% zcmp(condition="le")
diff --git a/runtime/interpreter/mterp/mips64/op_if_lt.S b/runtime/interpreter/mterp/mips64/op_if_lt.S
index a975a31..4ef22fd 100644
--- a/runtime/interpreter/mterp/mips64/op_if_lt.S
+++ b/runtime/interpreter/mterp/mips64/op_if_lt.S
@@ -1 +1,2 @@
-%include "mips64/bincmp.S" { "condition":"lt" }
+%def op_if_lt():
+% bincmp(condition="lt")
diff --git a/runtime/interpreter/mterp/mips64/op_if_ltz.S b/runtime/interpreter/mterp/mips64/op_if_ltz.S
index c1d730d..84b2d0b 100644
--- a/runtime/interpreter/mterp/mips64/op_if_ltz.S
+++ b/runtime/interpreter/mterp/mips64/op_if_ltz.S
@@ -1 +1,2 @@
-%include "mips64/zcmp.S" { "condition":"lt" }
+%def op_if_ltz():
+% zcmp(condition="lt")
diff --git a/runtime/interpreter/mterp/mips64/op_if_ne.S b/runtime/interpreter/mterp/mips64/op_if_ne.S
index f143ee9..ec3a688 100644
--- a/runtime/interpreter/mterp/mips64/op_if_ne.S
+++ b/runtime/interpreter/mterp/mips64/op_if_ne.S
@@ -1 +1,2 @@
-%include "mips64/bincmp.S" { "condition":"ne" }
+%def op_if_ne():
+% bincmp(condition="ne")
diff --git a/runtime/interpreter/mterp/mips64/op_if_nez.S b/runtime/interpreter/mterp/mips64/op_if_nez.S
index 1856b96..7009c3a 100644
--- a/runtime/interpreter/mterp/mips64/op_if_nez.S
+++ b/runtime/interpreter/mterp/mips64/op_if_nez.S
@@ -1 +1,2 @@
-%include "mips64/zcmp.S" { "condition":"ne" }
+%def op_if_nez():
+% zcmp(condition="ne")
diff --git a/runtime/interpreter/mterp/mips64/op_iget.S b/runtime/interpreter/mterp/mips64/op_iget.S
index e91f099..d09edc0 100644
--- a/runtime/interpreter/mterp/mips64/op_iget.S
+++ b/runtime/interpreter/mterp/mips64/op_iget.S
@@ -1,2 +1,2 @@
-%default { "is_object":"0", "helper":"MterpIGetU32"}
-%include "mips64/field.S" { }
+%def op_iget(is_object="0", helper="MterpIGetU32"):
+% field(helper=helper)
diff --git a/runtime/interpreter/mterp/mips64/op_iget_boolean.S b/runtime/interpreter/mterp/mips64/op_iget_boolean.S
index dc2a42a..cb8edee 100644
--- a/runtime/interpreter/mterp/mips64/op_iget_boolean.S
+++ b/runtime/interpreter/mterp/mips64/op_iget_boolean.S
@@ -1 +1,2 @@
-%include "mips64/op_iget.S" { "helper":"MterpIGetU8" }
+%def op_iget_boolean():
+% op_iget(helper="MterpIGetU8")
diff --git a/runtime/interpreter/mterp/mips64/op_iget_boolean_quick.S b/runtime/interpreter/mterp/mips64/op_iget_boolean_quick.S
index 979dc70..f3d2cb1 100644
--- a/runtime/interpreter/mterp/mips64/op_iget_boolean_quick.S
+++ b/runtime/interpreter/mterp/mips64/op_iget_boolean_quick.S
@@ -1 +1,2 @@
-%include "mips64/op_iget_quick.S" { "load":"lbu" }
+%def op_iget_boolean_quick():
+% op_iget_quick(load="lbu")
diff --git a/runtime/interpreter/mterp/mips64/op_iget_byte.S b/runtime/interpreter/mterp/mips64/op_iget_byte.S
index c5bf650..2b87fb1 100644
--- a/runtime/interpreter/mterp/mips64/op_iget_byte.S
+++ b/runtime/interpreter/mterp/mips64/op_iget_byte.S
@@ -1 +1,2 @@
-%include "mips64/op_iget.S" { "helper":"MterpIGetI8" }
+%def op_iget_byte():
+% op_iget(helper="MterpIGetI8")
diff --git a/runtime/interpreter/mterp/mips64/op_iget_byte_quick.S b/runtime/interpreter/mterp/mips64/op_iget_byte_quick.S
index cb35556..ddb469b 100644
--- a/runtime/interpreter/mterp/mips64/op_iget_byte_quick.S
+++ b/runtime/interpreter/mterp/mips64/op_iget_byte_quick.S
@@ -1 +1,2 @@
-%include "mips64/op_iget_quick.S" { "load":"lb" }
+%def op_iget_byte_quick():
+% op_iget_quick(load="lb")
diff --git a/runtime/interpreter/mterp/mips64/op_iget_char.S b/runtime/interpreter/mterp/mips64/op_iget_char.S
index 3bf0c5a..001bd03 100644
--- a/runtime/interpreter/mterp/mips64/op_iget_char.S
+++ b/runtime/interpreter/mterp/mips64/op_iget_char.S
@@ -1 +1,2 @@
-%include "mips64/op_iget.S" { "helper":"MterpIGetU16" }
+%def op_iget_char():
+% op_iget(helper="MterpIGetU16")
diff --git a/runtime/interpreter/mterp/mips64/op_iget_char_quick.S b/runtime/interpreter/mterp/mips64/op_iget_char_quick.S
index 6034567..ef0b350 100644
--- a/runtime/interpreter/mterp/mips64/op_iget_char_quick.S
+++ b/runtime/interpreter/mterp/mips64/op_iget_char_quick.S
@@ -1 +1,2 @@
-%include "mips64/op_iget_quick.S" { "load":"lhu" }
+%def op_iget_char_quick():
+% op_iget_quick(load="lhu")
diff --git a/runtime/interpreter/mterp/mips64/op_iget_object.S b/runtime/interpreter/mterp/mips64/op_iget_object.S
index 23fa187..4e5f769 100644
--- a/runtime/interpreter/mterp/mips64/op_iget_object.S
+++ b/runtime/interpreter/mterp/mips64/op_iget_object.S
@@ -1 +1,2 @@
-%include "mips64/op_iget.S" { "is_object":"1", "helper":"MterpIGetObj" }
+%def op_iget_object():
+% op_iget(is_object="1", helper="MterpIGetObj")
diff --git a/runtime/interpreter/mterp/mips64/op_iget_object_quick.S b/runtime/interpreter/mterp/mips64/op_iget_object_quick.S
index 171d543..518b747 100644
--- a/runtime/interpreter/mterp/mips64/op_iget_object_quick.S
+++ b/runtime/interpreter/mterp/mips64/op_iget_object_quick.S
@@ -1,3 +1,4 @@
+%def op_iget_object_quick():
/* For: iget-object-quick */
/* op vA, vB, offset//CCCC */
.extern artIGetObjectFromMterp
diff --git a/runtime/interpreter/mterp/mips64/op_iget_quick.S b/runtime/interpreter/mterp/mips64/op_iget_quick.S
index fee6ab7..eb59796 100644
--- a/runtime/interpreter/mterp/mips64/op_iget_quick.S
+++ b/runtime/interpreter/mterp/mips64/op_iget_quick.S
@@ -1,4 +1,4 @@
-%default { "load":"lw" }
+%def op_iget_quick(load="lw"):
/* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick */
/* op vA, vB, offset//CCCC */
srl a2, rINST, 12 # a2 <- B
diff --git a/runtime/interpreter/mterp/mips64/op_iget_short.S b/runtime/interpreter/mterp/mips64/op_iget_short.S
index a9927fc..a62c4d9 100644
--- a/runtime/interpreter/mterp/mips64/op_iget_short.S
+++ b/runtime/interpreter/mterp/mips64/op_iget_short.S
@@ -1 +1,2 @@
-%include "mips64/op_iget.S" { "helper":"MterpIGetI16" }
+%def op_iget_short():
+% op_iget(helper="MterpIGetI16")
diff --git a/runtime/interpreter/mterp/mips64/op_iget_short_quick.S b/runtime/interpreter/mterp/mips64/op_iget_short_quick.S
index 6e152db..5957cb4 100644
--- a/runtime/interpreter/mterp/mips64/op_iget_short_quick.S
+++ b/runtime/interpreter/mterp/mips64/op_iget_short_quick.S
@@ -1 +1,2 @@
-%include "mips64/op_iget_quick.S" { "load":"lh" }
+%def op_iget_short_quick():
+% op_iget_quick(load="lh")
diff --git a/runtime/interpreter/mterp/mips64/op_iget_wide.S b/runtime/interpreter/mterp/mips64/op_iget_wide.S
index 40f3645..9643cc3 100644
--- a/runtime/interpreter/mterp/mips64/op_iget_wide.S
+++ b/runtime/interpreter/mterp/mips64/op_iget_wide.S
@@ -1 +1,2 @@
-%include "mips64/op_iget.S" { "helper":"MterpIGetU64" }
+%def op_iget_wide():
+% op_iget(helper="MterpIGetU64")
diff --git a/runtime/interpreter/mterp/mips64/op_iget_wide_quick.S b/runtime/interpreter/mterp/mips64/op_iget_wide_quick.S
index 2adc6ad..e914e0d 100644
--- a/runtime/interpreter/mterp/mips64/op_iget_wide_quick.S
+++ b/runtime/interpreter/mterp/mips64/op_iget_wide_quick.S
@@ -1,3 +1,4 @@
+%def op_iget_wide_quick():
/* iget-wide-quick vA, vB, offset//CCCC */
srl a2, rINST, 12 # a2 <- B
lhu a4, 2(rPC) # a4 <- field byte offset
diff --git a/runtime/interpreter/mterp/mips64/op_instance_of.S b/runtime/interpreter/mterp/mips64/op_instance_of.S
index 39a5dc7..1929944 100644
--- a/runtime/interpreter/mterp/mips64/op_instance_of.S
+++ b/runtime/interpreter/mterp/mips64/op_instance_of.S
@@ -1,3 +1,4 @@
+%def op_instance_of():
/*
* Check to see if an object reference is an instance of a class.
*
diff --git a/runtime/interpreter/mterp/mips64/op_int_to_byte.S b/runtime/interpreter/mterp/mips64/op_int_to_byte.S
index 1993e07..47440c6 100644
--- a/runtime/interpreter/mterp/mips64/op_int_to_byte.S
+++ b/runtime/interpreter/mterp/mips64/op_int_to_byte.S
@@ -1 +1,2 @@
-%include "mips64/unop.S" {"instr":"seb a0, a0"}
+%def op_int_to_byte():
+% unop(instr="seb a0, a0")
diff --git a/runtime/interpreter/mterp/mips64/op_int_to_char.S b/runtime/interpreter/mterp/mips64/op_int_to_char.S
index 8f03acd..bea4e9e 100644
--- a/runtime/interpreter/mterp/mips64/op_int_to_char.S
+++ b/runtime/interpreter/mterp/mips64/op_int_to_char.S
@@ -1 +1,2 @@
-%include "mips64/unop.S" {"instr":"and a0, a0, 0xffff"}
+%def op_int_to_char():
+% unop(instr="and a0, a0, 0xffff")
diff --git a/runtime/interpreter/mterp/mips64/op_int_to_double.S b/runtime/interpreter/mterp/mips64/op_int_to_double.S
index 6df71be..6cc83ae 100644
--- a/runtime/interpreter/mterp/mips64/op_int_to_double.S
+++ b/runtime/interpreter/mterp/mips64/op_int_to_double.S
@@ -1,8 +1,9 @@
+%def op_int_to_double():
/*
* Conversion from or to floating-point happens in a floating-point register.
* Therefore we load the input and store the output into or from a
* floating-point register irrespective of the type.
*/
-%include "mips64/fcvtHeader.S" { "suffix":"_FLOAT", "valreg":"f0" }
+% fcvtHeader(suffix="_FLOAT", valreg="f0")
cvt.d.w f0, f0
-%include "mips64/fcvtFooter.S" { "suffix":"_DOUBLE", "valreg":"f0" }
+% fcvtFooter(suffix="_DOUBLE", valreg="f0")
diff --git a/runtime/interpreter/mterp/mips64/op_int_to_float.S b/runtime/interpreter/mterp/mips64/op_int_to_float.S
index 77e9eba..837f8f9 100644
--- a/runtime/interpreter/mterp/mips64/op_int_to_float.S
+++ b/runtime/interpreter/mterp/mips64/op_int_to_float.S
@@ -1,8 +1,9 @@
+%def op_int_to_float():
/*
* Conversion from or to floating-point happens in a floating-point register.
* Therefore we load the input and store the output into or from a
* floating-point register irrespective of the type.
*/
-%include "mips64/fcvtHeader.S" { "suffix":"_FLOAT", "valreg":"f0" }
+% fcvtHeader(suffix="_FLOAT", valreg="f0")
cvt.s.w f0, f0
-%include "mips64/fcvtFooter.S" { "suffix":"_FLOAT", "valreg":"f0" }
+% fcvtFooter(suffix="_FLOAT", valreg="f0")
diff --git a/runtime/interpreter/mterp/mips64/op_int_to_long.S b/runtime/interpreter/mterp/mips64/op_int_to_long.S
index 7b9ad86..c0cfd72 100644
--- a/runtime/interpreter/mterp/mips64/op_int_to_long.S
+++ b/runtime/interpreter/mterp/mips64/op_int_to_long.S
@@ -1,3 +1,4 @@
+%def op_int_to_long():
/* int-to-long vA, vB */
ext a3, rINST, 12, 4 # a3 <- B
GET_VREG a0, a3 # a0 <- vB (sign-extended to 64 bits)
diff --git a/runtime/interpreter/mterp/mips64/op_int_to_short.S b/runtime/interpreter/mterp/mips64/op_int_to_short.S
index 4a3f234..3d90de3 100644
--- a/runtime/interpreter/mterp/mips64/op_int_to_short.S
+++ b/runtime/interpreter/mterp/mips64/op_int_to_short.S
@@ -1 +1,2 @@
-%include "mips64/unop.S" {"instr":"seh a0, a0"}
+%def op_int_to_short():
+% unop(instr="seh a0, a0")
diff --git a/runtime/interpreter/mterp/mips64/op_invoke_custom.S b/runtime/interpreter/mterp/mips64/op_invoke_custom.S
index 964253d..4bba9ee 100644
--- a/runtime/interpreter/mterp/mips64/op_invoke_custom.S
+++ b/runtime/interpreter/mterp/mips64/op_invoke_custom.S
@@ -1 +1,2 @@
-%include "mips64/invoke.S" { "helper":"MterpInvokeCustom" }
+%def op_invoke_custom():
+% invoke(helper="MterpInvokeCustom")
diff --git a/runtime/interpreter/mterp/mips64/op_invoke_custom_range.S b/runtime/interpreter/mterp/mips64/op_invoke_custom_range.S
index e6585e3..57e61af 100644
--- a/runtime/interpreter/mterp/mips64/op_invoke_custom_range.S
+++ b/runtime/interpreter/mterp/mips64/op_invoke_custom_range.S
@@ -1 +1,2 @@
-%include "mips64/invoke.S" { "helper":"MterpInvokeCustomRange" }
+%def op_invoke_custom_range():
+% invoke(helper="MterpInvokeCustomRange")
diff --git a/runtime/interpreter/mterp/mips64/op_invoke_direct.S b/runtime/interpreter/mterp/mips64/op_invoke_direct.S
index 5047118..d3139cf 100644
--- a/runtime/interpreter/mterp/mips64/op_invoke_direct.S
+++ b/runtime/interpreter/mterp/mips64/op_invoke_direct.S
@@ -1 +1,2 @@
-%include "mips64/invoke.S" { "helper":"MterpInvokeDirect" }
+%def op_invoke_direct():
+% invoke(helper="MterpInvokeDirect")
diff --git a/runtime/interpreter/mterp/mips64/op_invoke_direct_range.S b/runtime/interpreter/mterp/mips64/op_invoke_direct_range.S
index 5c9b95f..b4a161f 100644
--- a/runtime/interpreter/mterp/mips64/op_invoke_direct_range.S
+++ b/runtime/interpreter/mterp/mips64/op_invoke_direct_range.S
@@ -1 +1,2 @@
-%include "mips64/invoke.S" { "helper":"MterpInvokeDirectRange" }
+%def op_invoke_direct_range():
+% invoke(helper="MterpInvokeDirectRange")
diff --git a/runtime/interpreter/mterp/mips64/op_invoke_interface.S b/runtime/interpreter/mterp/mips64/op_invoke_interface.S
index ed148ad..b064126 100644
--- a/runtime/interpreter/mterp/mips64/op_invoke_interface.S
+++ b/runtime/interpreter/mterp/mips64/op_invoke_interface.S
@@ -1,4 +1,5 @@
-%include "mips64/invoke.S" { "helper":"MterpInvokeInterface" }
+%def op_invoke_interface():
+% invoke(helper="MterpInvokeInterface")
/*
* Handle an interface method call.
*
diff --git a/runtime/interpreter/mterp/mips64/op_invoke_interface_range.S b/runtime/interpreter/mterp/mips64/op_invoke_interface_range.S
index 91c231e..2989115 100644
--- a/runtime/interpreter/mterp/mips64/op_invoke_interface_range.S
+++ b/runtime/interpreter/mterp/mips64/op_invoke_interface_range.S
@@ -1 +1,2 @@
-%include "mips64/invoke.S" { "helper":"MterpInvokeInterfaceRange" }
+%def op_invoke_interface_range():
+% invoke(helper="MterpInvokeInterfaceRange")
diff --git a/runtime/interpreter/mterp/mips64/op_invoke_polymorphic.S b/runtime/interpreter/mterp/mips64/op_invoke_polymorphic.S
index d9324d7..ce61f5a 100644
--- a/runtime/interpreter/mterp/mips64/op_invoke_polymorphic.S
+++ b/runtime/interpreter/mterp/mips64/op_invoke_polymorphic.S
@@ -1 +1,2 @@
-%include "mips64/invoke_polymorphic.S" { "helper":"MterpInvokePolymorphic" }
+%def op_invoke_polymorphic():
+% invoke_polymorphic(helper="MterpInvokePolymorphic")
diff --git a/runtime/interpreter/mterp/mips64/op_invoke_polymorphic_range.S b/runtime/interpreter/mterp/mips64/op_invoke_polymorphic_range.S
index 8e0ecb5..16731bd 100644
--- a/runtime/interpreter/mterp/mips64/op_invoke_polymorphic_range.S
+++ b/runtime/interpreter/mterp/mips64/op_invoke_polymorphic_range.S
@@ -1 +1,2 @@
-%include "mips64/invoke_polymorphic.S" { "helper":"MterpInvokePolymorphicRange" }
+%def op_invoke_polymorphic_range():
+% invoke_polymorphic(helper="MterpInvokePolymorphicRange")
diff --git a/runtime/interpreter/mterp/mips64/op_invoke_static.S b/runtime/interpreter/mterp/mips64/op_invoke_static.S
index 44f5cb7..8b104a6 100644
--- a/runtime/interpreter/mterp/mips64/op_invoke_static.S
+++ b/runtime/interpreter/mterp/mips64/op_invoke_static.S
@@ -1 +1,2 @@
-%include "mips64/invoke.S" { "helper":"MterpInvokeStatic" }
+%def op_invoke_static():
+% invoke(helper="MterpInvokeStatic")
diff --git a/runtime/interpreter/mterp/mips64/op_invoke_static_range.S b/runtime/interpreter/mterp/mips64/op_invoke_static_range.S
index 289e5aa..e0a546c 100644
--- a/runtime/interpreter/mterp/mips64/op_invoke_static_range.S
+++ b/runtime/interpreter/mterp/mips64/op_invoke_static_range.S
@@ -1 +1,2 @@
-%include "mips64/invoke.S" { "helper":"MterpInvokeStaticRange" }
+%def op_invoke_static_range():
+% invoke(helper="MterpInvokeStaticRange")
diff --git a/runtime/interpreter/mterp/mips64/op_invoke_super.S b/runtime/interpreter/mterp/mips64/op_invoke_super.S
index b13fffe..3c34c99 100644
--- a/runtime/interpreter/mterp/mips64/op_invoke_super.S
+++ b/runtime/interpreter/mterp/mips64/op_invoke_super.S
@@ -1,4 +1,5 @@
-%include "mips64/invoke.S" { "helper":"MterpInvokeSuper" }
+%def op_invoke_super():
+% invoke(helper="MterpInvokeSuper")
/*
* Handle a "super" method call.
*
diff --git a/runtime/interpreter/mterp/mips64/op_invoke_super_range.S b/runtime/interpreter/mterp/mips64/op_invoke_super_range.S
index 350b975..caeafaa 100644
--- a/runtime/interpreter/mterp/mips64/op_invoke_super_range.S
+++ b/runtime/interpreter/mterp/mips64/op_invoke_super_range.S
@@ -1 +1,2 @@
-%include "mips64/invoke.S" { "helper":"MterpInvokeSuperRange" }
+%def op_invoke_super_range():
+% invoke(helper="MterpInvokeSuperRange")
diff --git a/runtime/interpreter/mterp/mips64/op_invoke_virtual.S b/runtime/interpreter/mterp/mips64/op_invoke_virtual.S
index 0d26cda..249177b 100644
--- a/runtime/interpreter/mterp/mips64/op_invoke_virtual.S
+++ b/runtime/interpreter/mterp/mips64/op_invoke_virtual.S
@@ -1,4 +1,5 @@
-%include "mips64/invoke.S" { "helper":"MterpInvokeVirtual" }
+%def op_invoke_virtual():
+% invoke(helper="MterpInvokeVirtual")
/*
* Handle a virtual method call.
*
diff --git a/runtime/interpreter/mterp/mips64/op_invoke_virtual_quick.S b/runtime/interpreter/mterp/mips64/op_invoke_virtual_quick.S
index f39562c..ea72c17 100644
--- a/runtime/interpreter/mterp/mips64/op_invoke_virtual_quick.S
+++ b/runtime/interpreter/mterp/mips64/op_invoke_virtual_quick.S
@@ -1 +1,2 @@
-%include "mips64/invoke.S" { "helper":"MterpInvokeVirtualQuick" }
+%def op_invoke_virtual_quick():
+% invoke(helper="MterpInvokeVirtualQuick")
diff --git a/runtime/interpreter/mterp/mips64/op_invoke_virtual_range.S b/runtime/interpreter/mterp/mips64/op_invoke_virtual_range.S
index 0bb43f8..baa0779 100644
--- a/runtime/interpreter/mterp/mips64/op_invoke_virtual_range.S
+++ b/runtime/interpreter/mterp/mips64/op_invoke_virtual_range.S
@@ -1 +1,2 @@
-%include "mips64/invoke.S" { "helper":"MterpInvokeVirtualRange" }
+%def op_invoke_virtual_range():
+% invoke(helper="MterpInvokeVirtualRange")
diff --git a/runtime/interpreter/mterp/mips64/op_invoke_virtual_range_quick.S b/runtime/interpreter/mterp/mips64/op_invoke_virtual_range_quick.S
index c448851..1d961a0 100644
--- a/runtime/interpreter/mterp/mips64/op_invoke_virtual_range_quick.S
+++ b/runtime/interpreter/mterp/mips64/op_invoke_virtual_range_quick.S
@@ -1 +1,2 @@
-%include "mips64/invoke.S" { "helper":"MterpInvokeVirtualQuickRange" }
+%def op_invoke_virtual_range_quick():
+% invoke(helper="MterpInvokeVirtualQuickRange")
diff --git a/runtime/interpreter/mterp/mips64/op_iput.S b/runtime/interpreter/mterp/mips64/op_iput.S
index 81ab911..e5351ba 100644
--- a/runtime/interpreter/mterp/mips64/op_iput.S
+++ b/runtime/interpreter/mterp/mips64/op_iput.S
@@ -1,2 +1,2 @@
-%default { "is_object":"0", "helper":"MterpIPutU32" }
-%include "mips64/field.S" { }
+%def op_iput(is_object="0", helper="MterpIPutU32"):
+% field(helper=helper)
diff --git a/runtime/interpreter/mterp/mips64/op_iput_boolean.S b/runtime/interpreter/mterp/mips64/op_iput_boolean.S
index 8e1d083..9eb8498 100644
--- a/runtime/interpreter/mterp/mips64/op_iput_boolean.S
+++ b/runtime/interpreter/mterp/mips64/op_iput_boolean.S
@@ -1 +1,2 @@
-%include "mips64/op_iput.S" { "helper":"MterpIPutU8" }
+%def op_iput_boolean():
+% op_iput(helper="MterpIPutU8")
diff --git a/runtime/interpreter/mterp/mips64/op_iput_boolean_quick.S b/runtime/interpreter/mterp/mips64/op_iput_boolean_quick.S
index df99948..3d818a5 100644
--- a/runtime/interpreter/mterp/mips64/op_iput_boolean_quick.S
+++ b/runtime/interpreter/mterp/mips64/op_iput_boolean_quick.S
@@ -1 +1,2 @@
-%include "mips64/op_iput_quick.S" { "store":"sb" }
+%def op_iput_boolean_quick():
+% op_iput_quick(store="sb")
diff --git a/runtime/interpreter/mterp/mips64/op_iput_byte.S b/runtime/interpreter/mterp/mips64/op_iput_byte.S
index ce3b614..4b74f9f 100644
--- a/runtime/interpreter/mterp/mips64/op_iput_byte.S
+++ b/runtime/interpreter/mterp/mips64/op_iput_byte.S
@@ -1 +1,2 @@
-%include "mips64/op_iput.S" { "helper":"MterpIPutI8" }
+%def op_iput_byte():
+% op_iput(helper="MterpIPutI8")
diff --git a/runtime/interpreter/mterp/mips64/op_iput_byte_quick.S b/runtime/interpreter/mterp/mips64/op_iput_byte_quick.S
index df99948..06dc24e 100644
--- a/runtime/interpreter/mterp/mips64/op_iput_byte_quick.S
+++ b/runtime/interpreter/mterp/mips64/op_iput_byte_quick.S
@@ -1 +1,2 @@
-%include "mips64/op_iput_quick.S" { "store":"sb" }
+%def op_iput_byte_quick():
+% op_iput_quick(store="sb")
diff --git a/runtime/interpreter/mterp/mips64/op_iput_char.S b/runtime/interpreter/mterp/mips64/op_iput_char.S
index 1d587fa..64a249f 100644
--- a/runtime/interpreter/mterp/mips64/op_iput_char.S
+++ b/runtime/interpreter/mterp/mips64/op_iput_char.S
@@ -1 +1,2 @@
-%include "mips64/op_iput.S" { "helper":"MterpIPutU16" }
+%def op_iput_char():
+% op_iput(helper="MterpIPutU16")
diff --git a/runtime/interpreter/mterp/mips64/op_iput_char_quick.S b/runtime/interpreter/mterp/mips64/op_iput_char_quick.S
index a6286b7..3b6af5b 100644
--- a/runtime/interpreter/mterp/mips64/op_iput_char_quick.S
+++ b/runtime/interpreter/mterp/mips64/op_iput_char_quick.S
@@ -1 +1,2 @@
-%include "mips64/op_iput_quick.S" { "store":"sh" }
+%def op_iput_char_quick():
+% op_iput_quick(store="sh")
diff --git a/runtime/interpreter/mterp/mips64/op_iput_object.S b/runtime/interpreter/mterp/mips64/op_iput_object.S
index d3316dd..131edd5 100644
--- a/runtime/interpreter/mterp/mips64/op_iput_object.S
+++ b/runtime/interpreter/mterp/mips64/op_iput_object.S
@@ -1 +1,2 @@
-%include "mips64/op_iput.S" { "is_object":"1", "helper":"MterpIPutObj" }
+%def op_iput_object():
+% op_iput(is_object="1", helper="MterpIPutObj")
diff --git a/runtime/interpreter/mterp/mips64/op_iput_object_quick.S b/runtime/interpreter/mterp/mips64/op_iput_object_quick.S
index 658ef42..0a15857 100644
--- a/runtime/interpreter/mterp/mips64/op_iput_object_quick.S
+++ b/runtime/interpreter/mterp/mips64/op_iput_object_quick.S
@@ -1,3 +1,4 @@
+%def op_iput_object_quick():
.extern MterpIputObjectQuick
EXPORT_PC
daddu a0, rFP, OFF_FP_SHADOWFRAME
diff --git a/runtime/interpreter/mterp/mips64/op_iput_quick.S b/runtime/interpreter/mterp/mips64/op_iput_quick.S
index b95adfc..b38b753 100644
--- a/runtime/interpreter/mterp/mips64/op_iput_quick.S
+++ b/runtime/interpreter/mterp/mips64/op_iput_quick.S
@@ -1,4 +1,4 @@
-%default { "store":"sw" }
+%def op_iput_quick(store="sw"):
/* For: iput-quick, iput-boolean-quick, iput-byte-quick, iput-char-quick, iput-short-quick */
/* op vA, vB, offset//CCCC */
srl a2, rINST, 12 # a2 <- B
diff --git a/runtime/interpreter/mterp/mips64/op_iput_short.S b/runtime/interpreter/mterp/mips64/op_iput_short.S
index dd68bbe..e631a3b 100644
--- a/runtime/interpreter/mterp/mips64/op_iput_short.S
+++ b/runtime/interpreter/mterp/mips64/op_iput_short.S
@@ -1 +1,2 @@
-%include "mips64/op_iput.S" { "helper":"MterpIPutI16" }
+%def op_iput_short():
+% op_iput(helper="MterpIPutI16")
diff --git a/runtime/interpreter/mterp/mips64/op_iput_short_quick.S b/runtime/interpreter/mterp/mips64/op_iput_short_quick.S
index a6286b7..fade093 100644
--- a/runtime/interpreter/mterp/mips64/op_iput_short_quick.S
+++ b/runtime/interpreter/mterp/mips64/op_iput_short_quick.S
@@ -1 +1,2 @@
-%include "mips64/op_iput_quick.S" { "store":"sh" }
+%def op_iput_short_quick():
+% op_iput_quick(store="sh")
diff --git a/runtime/interpreter/mterp/mips64/op_iput_wide.S b/runtime/interpreter/mterp/mips64/op_iput_wide.S
index 05194b3..2f34fd3 100644
--- a/runtime/interpreter/mterp/mips64/op_iput_wide.S
+++ b/runtime/interpreter/mterp/mips64/op_iput_wide.S
@@ -1 +1,2 @@
-%include "mips64/op_iput.S" { "helper":"MterpIPutU64" }
+%def op_iput_wide():
+% op_iput(helper="MterpIPutU64")
diff --git a/runtime/interpreter/mterp/mips64/op_iput_wide_quick.S b/runtime/interpreter/mterp/mips64/op_iput_wide_quick.S
index 95a8ad8..240f902 100644
--- a/runtime/interpreter/mterp/mips64/op_iput_wide_quick.S
+++ b/runtime/interpreter/mterp/mips64/op_iput_wide_quick.S
@@ -1,3 +1,4 @@
+%def op_iput_wide_quick():
/* iput-wide-quick vA, vB, offset//CCCC */
srl a2, rINST, 12 # a2 <- B
lhu a3, 2(rPC) # a3 <- field byte offset
diff --git a/runtime/interpreter/mterp/mips64/op_long_to_double.S b/runtime/interpreter/mterp/mips64/op_long_to_double.S
index 8503e76..f4d346c 100644
--- a/runtime/interpreter/mterp/mips64/op_long_to_double.S
+++ b/runtime/interpreter/mterp/mips64/op_long_to_double.S
@@ -1,8 +1,9 @@
+%def op_long_to_double():
/*
* Conversion from or to floating-point happens in a floating-point register.
* Therefore we load the input and store the output into or from a
* floating-point register irrespective of the type.
*/
-%include "mips64/fcvtHeader.S" { "suffix":"_DOUBLE", "valreg":"f0" }
+% fcvtHeader(suffix="_DOUBLE", valreg="f0")
cvt.d.l f0, f0
-%include "mips64/fcvtFooter.S" { "suffix":"_DOUBLE", "valreg":"f0" }
+% fcvtFooter(suffix="_DOUBLE", valreg="f0")
diff --git a/runtime/interpreter/mterp/mips64/op_long_to_float.S b/runtime/interpreter/mterp/mips64/op_long_to_float.S
index 31f5c0e..3c616d1 100644
--- a/runtime/interpreter/mterp/mips64/op_long_to_float.S
+++ b/runtime/interpreter/mterp/mips64/op_long_to_float.S
@@ -1,8 +1,9 @@
+%def op_long_to_float():
/*
* Conversion from or to floating-point happens in a floating-point register.
* Therefore we load the input and store the output into or from a
* floating-point register irrespective of the type.
*/
-%include "mips64/fcvtHeader.S" { "suffix":"_DOUBLE", "valreg":"f0" }
+% fcvtHeader(suffix="_DOUBLE", valreg="f0")
cvt.s.l f0, f0
-%include "mips64/fcvtFooter.S" { "suffix":"_FLOAT", "valreg":"f0" }
+% fcvtFooter(suffix="_FLOAT", valreg="f0")
diff --git a/runtime/interpreter/mterp/mips64/op_long_to_int.S b/runtime/interpreter/mterp/mips64/op_long_to_int.S
index 4ef4b51..eacb8f5 100644
--- a/runtime/interpreter/mterp/mips64/op_long_to_int.S
+++ b/runtime/interpreter/mterp/mips64/op_long_to_int.S
@@ -1,2 +1,3 @@
+%def op_long_to_int():
/* we ignore the high word, making this equivalent to a 32-bit reg move */
-%include "mips64/op_move.S"
+% op_move()
diff --git a/runtime/interpreter/mterp/mips64/op_monitor_enter.S b/runtime/interpreter/mterp/mips64/op_monitor_enter.S
index 36ae503..47184f9 100644
--- a/runtime/interpreter/mterp/mips64/op_monitor_enter.S
+++ b/runtime/interpreter/mterp/mips64/op_monitor_enter.S
@@ -1,3 +1,4 @@
+%def op_monitor_enter():
/*
* Synchronize on an object.
*/
diff --git a/runtime/interpreter/mterp/mips64/op_monitor_exit.S b/runtime/interpreter/mterp/mips64/op_monitor_exit.S
index 9945952..58f8541 100644
--- a/runtime/interpreter/mterp/mips64/op_monitor_exit.S
+++ b/runtime/interpreter/mterp/mips64/op_monitor_exit.S
@@ -1,3 +1,4 @@
+%def op_monitor_exit():
/*
* Unlock an object.
*
diff --git a/runtime/interpreter/mterp/mips64/op_move.S b/runtime/interpreter/mterp/mips64/op_move.S
index c79f6cd..c6de44c 100644
--- a/runtime/interpreter/mterp/mips64/op_move.S
+++ b/runtime/interpreter/mterp/mips64/op_move.S
@@ -1,4 +1,4 @@
-%default { "is_object":"0" }
+%def op_move(is_object="0"):
/* for move, move-object, long-to-int */
/* op vA, vB */
ext a2, rINST, 8, 4 # a2 <- A
diff --git a/runtime/interpreter/mterp/mips64/op_move_16.S b/runtime/interpreter/mterp/mips64/op_move_16.S
index 9d5c4dc..68b7037 100644
--- a/runtime/interpreter/mterp/mips64/op_move_16.S
+++ b/runtime/interpreter/mterp/mips64/op_move_16.S
@@ -1,4 +1,4 @@
-%default { "is_object":"0" }
+%def op_move_16(is_object="0"):
/* for: move/16, move-object/16 */
/* op vAAAA, vBBBB */
lhu a3, 4(rPC) # a3 <- BBBB
diff --git a/runtime/interpreter/mterp/mips64/op_move_exception.S b/runtime/interpreter/mterp/mips64/op_move_exception.S
index d226718..8f441c7 100644
--- a/runtime/interpreter/mterp/mips64/op_move_exception.S
+++ b/runtime/interpreter/mterp/mips64/op_move_exception.S
@@ -1,3 +1,4 @@
+%def op_move_exception():
/* move-exception vAA */
srl a2, rINST, 8 # a2 <- AA
ld a0, THREAD_EXCEPTION_OFFSET(rSELF) # load exception obj
diff --git a/runtime/interpreter/mterp/mips64/op_move_from16.S b/runtime/interpreter/mterp/mips64/op_move_from16.S
index 6d6bde0..f4c254c 100644
--- a/runtime/interpreter/mterp/mips64/op_move_from16.S
+++ b/runtime/interpreter/mterp/mips64/op_move_from16.S
@@ -1,4 +1,4 @@
-%default { "is_object":"0" }
+%def op_move_from16(is_object="0"):
/* for: move/from16, move-object/from16 */
/* op vAA, vBBBB */
lhu a3, 2(rPC) # a3 <- BBBB
diff --git a/runtime/interpreter/mterp/mips64/op_move_object.S b/runtime/interpreter/mterp/mips64/op_move_object.S
index 47e0272..dbb4d59 100644
--- a/runtime/interpreter/mterp/mips64/op_move_object.S
+++ b/runtime/interpreter/mterp/mips64/op_move_object.S
@@ -1 +1,2 @@
-%include "mips64/op_move.S" {"is_object":"1"}
+%def op_move_object():
+% op_move(is_object="1")
diff --git a/runtime/interpreter/mterp/mips64/op_move_object_16.S b/runtime/interpreter/mterp/mips64/op_move_object_16.S
index a777dcd..4012037 100644
--- a/runtime/interpreter/mterp/mips64/op_move_object_16.S
+++ b/runtime/interpreter/mterp/mips64/op_move_object_16.S
@@ -1 +1,2 @@
-%include "mips64/op_move_16.S" {"is_object":"1"}
+%def op_move_object_16():
+% op_move_16(is_object="1")
diff --git a/runtime/interpreter/mterp/mips64/op_move_object_from16.S b/runtime/interpreter/mterp/mips64/op_move_object_from16.S
index ab55ebd..c82698e 100644
--- a/runtime/interpreter/mterp/mips64/op_move_object_from16.S
+++ b/runtime/interpreter/mterp/mips64/op_move_object_from16.S
@@ -1 +1,2 @@
-%include "mips64/op_move_from16.S" {"is_object":"1"}
+%def op_move_object_from16():
+% op_move_from16(is_object="1")
diff --git a/runtime/interpreter/mterp/mips64/op_move_result.S b/runtime/interpreter/mterp/mips64/op_move_result.S
index 1ec28cb..9d4bdfe 100644
--- a/runtime/interpreter/mterp/mips64/op_move_result.S
+++ b/runtime/interpreter/mterp/mips64/op_move_result.S
@@ -1,4 +1,4 @@
-%default { "is_object":"0" }
+%def op_move_result(is_object="0"):
/* for: move-result, move-result-object */
/* op vAA */
srl a2, rINST, 8 # a2 <- AA
diff --git a/runtime/interpreter/mterp/mips64/op_move_result_object.S b/runtime/interpreter/mterp/mips64/op_move_result_object.S
index e76bc22..87aea26 100644
--- a/runtime/interpreter/mterp/mips64/op_move_result_object.S
+++ b/runtime/interpreter/mterp/mips64/op_move_result_object.S
@@ -1 +1,2 @@
-%include "mips64/op_move_result.S" {"is_object":"1"}
+%def op_move_result_object():
+% op_move_result(is_object="1")
diff --git a/runtime/interpreter/mterp/mips64/op_move_result_wide.S b/runtime/interpreter/mterp/mips64/op_move_result_wide.S
index 3ba0d72..048ab3f 100644
--- a/runtime/interpreter/mterp/mips64/op_move_result_wide.S
+++ b/runtime/interpreter/mterp/mips64/op_move_result_wide.S
@@ -1,3 +1,4 @@
+%def op_move_result_wide():
/* for: move-result-wide */
/* op vAA */
srl a2, rINST, 8 # a2 <- AA
diff --git a/runtime/interpreter/mterp/mips64/op_move_wide.S b/runtime/interpreter/mterp/mips64/op_move_wide.S
index ea23f87..94cfa47 100644
--- a/runtime/interpreter/mterp/mips64/op_move_wide.S
+++ b/runtime/interpreter/mterp/mips64/op_move_wide.S
@@ -1,3 +1,4 @@
+%def op_move_wide():
/* move-wide vA, vB */
/* NOTE: regs can overlap, e.g. "move v6,v7" or "move v7,v6" */
ext a3, rINST, 12, 4 # a3 <- B
diff --git a/runtime/interpreter/mterp/mips64/op_move_wide_16.S b/runtime/interpreter/mterp/mips64/op_move_wide_16.S
index 8ec6068..f3a923e 100644
--- a/runtime/interpreter/mterp/mips64/op_move_wide_16.S
+++ b/runtime/interpreter/mterp/mips64/op_move_wide_16.S
@@ -1,3 +1,4 @@
+%def op_move_wide_16():
/* move-wide/16 vAAAA, vBBBB */
/* NOTE: regs can overlap, e.g. "move v6,v7" or "move v7,v6" */
lhu a3, 4(rPC) # a3 <- BBBB
diff --git a/runtime/interpreter/mterp/mips64/op_move_wide_from16.S b/runtime/interpreter/mterp/mips64/op_move_wide_from16.S
index 11d5603..822035e 100644
--- a/runtime/interpreter/mterp/mips64/op_move_wide_from16.S
+++ b/runtime/interpreter/mterp/mips64/op_move_wide_from16.S
@@ -1,3 +1,4 @@
+%def op_move_wide_from16():
/* move-wide/from16 vAA, vBBBB */
/* NOTE: regs can overlap, e.g. "move v6,v7" or "move v7,v6" */
lhu a3, 2(rPC) # a3 <- BBBB
diff --git a/runtime/interpreter/mterp/mips64/op_mul_double.S b/runtime/interpreter/mterp/mips64/op_mul_double.S
index e7e17f7..84cf5af 100644
--- a/runtime/interpreter/mterp/mips64/op_mul_double.S
+++ b/runtime/interpreter/mterp/mips64/op_mul_double.S
@@ -1 +1,2 @@
-%include "mips64/fbinopWide.S" {"instr":"mul.d f0, f0, f1"}
+%def op_mul_double():
+% fbinopWide(instr="mul.d f0, f0, f1")
diff --git a/runtime/interpreter/mterp/mips64/op_mul_double_2addr.S b/runtime/interpreter/mterp/mips64/op_mul_double_2addr.S
index f404d46..1ba6740 100644
--- a/runtime/interpreter/mterp/mips64/op_mul_double_2addr.S
+++ b/runtime/interpreter/mterp/mips64/op_mul_double_2addr.S
@@ -1 +1,2 @@
-%include "mips64/fbinopWide2addr.S" {"instr":"mul.d f0, f0, f1"}
+%def op_mul_double_2addr():
+% fbinopWide2addr(instr="mul.d f0, f0, f1")
diff --git a/runtime/interpreter/mterp/mips64/op_mul_float.S b/runtime/interpreter/mterp/mips64/op_mul_float.S
index 9a695fc..16594ed 100644
--- a/runtime/interpreter/mterp/mips64/op_mul_float.S
+++ b/runtime/interpreter/mterp/mips64/op_mul_float.S
@@ -1 +1,2 @@
-%include "mips64/fbinop.S" {"instr":"mul.s f0, f0, f1"}
+%def op_mul_float():
+% fbinop(instr="mul.s f0, f0, f1")
diff --git a/runtime/interpreter/mterp/mips64/op_mul_float_2addr.S b/runtime/interpreter/mterp/mips64/op_mul_float_2addr.S
index a134a34..318ddab 100644
--- a/runtime/interpreter/mterp/mips64/op_mul_float_2addr.S
+++ b/runtime/interpreter/mterp/mips64/op_mul_float_2addr.S
@@ -1 +1,2 @@
-%include "mips64/fbinop2addr.S" {"instr":"mul.s f0, f0, f1"}
+%def op_mul_float_2addr():
+% fbinop2addr(instr="mul.s f0, f0, f1")
diff --git a/runtime/interpreter/mterp/mips64/op_mul_int.S b/runtime/interpreter/mterp/mips64/op_mul_int.S
index e1b90ff..34e42f0 100644
--- a/runtime/interpreter/mterp/mips64/op_mul_int.S
+++ b/runtime/interpreter/mterp/mips64/op_mul_int.S
@@ -1 +1,2 @@
-%include "mips64/binop.S" {"instr":"mul a0, a0, a1"}
+%def op_mul_int():
+% binop(instr="mul a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips64/op_mul_int_2addr.S b/runtime/interpreter/mterp/mips64/op_mul_int_2addr.S
index c0c4063..0224a6e 100644
--- a/runtime/interpreter/mterp/mips64/op_mul_int_2addr.S
+++ b/runtime/interpreter/mterp/mips64/op_mul_int_2addr.S
@@ -1 +1,2 @@
-%include "mips64/binop2addr.S" {"instr":"mul a0, a0, a1"}
+%def op_mul_int_2addr():
+% binop2addr(instr="mul a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips64/op_mul_int_lit16.S b/runtime/interpreter/mterp/mips64/op_mul_int_lit16.S
index bb4fff8..935d632 100644
--- a/runtime/interpreter/mterp/mips64/op_mul_int_lit16.S
+++ b/runtime/interpreter/mterp/mips64/op_mul_int_lit16.S
@@ -1 +1,2 @@
-%include "mips64/binopLit16.S" {"instr":"mul a0, a0, a1"}
+%def op_mul_int_lit16():
+% binopLit16(instr="mul a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips64/op_mul_int_lit8.S b/runtime/interpreter/mterp/mips64/op_mul_int_lit8.S
index da11ea9..4a2bfca 100644
--- a/runtime/interpreter/mterp/mips64/op_mul_int_lit8.S
+++ b/runtime/interpreter/mterp/mips64/op_mul_int_lit8.S
@@ -1 +1,2 @@
-%include "mips64/binopLit8.S" {"instr":"mul a0, a0, a1"}
+%def op_mul_int_lit8():
+% binopLit8(instr="mul a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips64/op_mul_long.S b/runtime/interpreter/mterp/mips64/op_mul_long.S
index ec32850..296138d 100644
--- a/runtime/interpreter/mterp/mips64/op_mul_long.S
+++ b/runtime/interpreter/mterp/mips64/op_mul_long.S
@@ -1 +1,2 @@
-%include "mips64/binopWide.S" {"instr":"dmul a0, a0, a1"}
+%def op_mul_long():
+% binopWide(instr="dmul a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips64/op_mul_long_2addr.S b/runtime/interpreter/mterp/mips64/op_mul_long_2addr.S
index eb50cda..a99eaa4 100644
--- a/runtime/interpreter/mterp/mips64/op_mul_long_2addr.S
+++ b/runtime/interpreter/mterp/mips64/op_mul_long_2addr.S
@@ -1 +1,2 @@
-%include "mips64/binopWide2addr.S" {"instr":"dmul a0, a0, a1"}
+%def op_mul_long_2addr():
+% binopWide2addr(instr="dmul a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips64/op_neg_double.S b/runtime/interpreter/mterp/mips64/op_neg_double.S
index a135d61..aa24c32 100644
--- a/runtime/interpreter/mterp/mips64/op_neg_double.S
+++ b/runtime/interpreter/mterp/mips64/op_neg_double.S
@@ -1,3 +1,4 @@
-%include "mips64/fcvtHeader.S" { "suffix":"_DOUBLE", "valreg":"f0" }
+%def op_neg_double():
+% fcvtHeader(suffix="_DOUBLE", valreg="f0")
neg.d f0, f0
-%include "mips64/fcvtFooter.S" { "suffix":"_DOUBLE", "valreg":"f0" }
+% fcvtFooter(suffix="_DOUBLE", valreg="f0")
diff --git a/runtime/interpreter/mterp/mips64/op_neg_float.S b/runtime/interpreter/mterp/mips64/op_neg_float.S
index 78019f0..1554a4d 100644
--- a/runtime/interpreter/mterp/mips64/op_neg_float.S
+++ b/runtime/interpreter/mterp/mips64/op_neg_float.S
@@ -1,3 +1,4 @@
-%include "mips64/fcvtHeader.S" { "suffix":"_FLOAT", "valreg":"f0" }
+%def op_neg_float():
+% fcvtHeader(suffix="_FLOAT", valreg="f0")
neg.s f0, f0
-%include "mips64/fcvtFooter.S" { "suffix":"_FLOAT", "valreg":"f0" }
+% fcvtFooter(suffix="_FLOAT", valreg="f0")
diff --git a/runtime/interpreter/mterp/mips64/op_neg_int.S b/runtime/interpreter/mterp/mips64/op_neg_int.S
index 31538c0..9243a21 100644
--- a/runtime/interpreter/mterp/mips64/op_neg_int.S
+++ b/runtime/interpreter/mterp/mips64/op_neg_int.S
@@ -1 +1,2 @@
-%include "mips64/unop.S" {"instr":"subu a0, zero, a0"}
+%def op_neg_int():
+% unop(instr="subu a0, zero, a0")
diff --git a/runtime/interpreter/mterp/mips64/op_neg_long.S b/runtime/interpreter/mterp/mips64/op_neg_long.S
index bc80d06..ad9d559 100644
--- a/runtime/interpreter/mterp/mips64/op_neg_long.S
+++ b/runtime/interpreter/mterp/mips64/op_neg_long.S
@@ -1 +1,2 @@
-%include "mips64/unopWide.S" {"instr":"dsubu a0, zero, a0"}
+%def op_neg_long():
+% unopWide(instr="dsubu a0, zero, a0")
diff --git a/runtime/interpreter/mterp/mips64/op_new_array.S b/runtime/interpreter/mterp/mips64/op_new_array.S
index d78b4ac..8da7d83 100644
--- a/runtime/interpreter/mterp/mips64/op_new_array.S
+++ b/runtime/interpreter/mterp/mips64/op_new_array.S
@@ -1,3 +1,4 @@
+%def op_new_array():
/*
* Allocate an array of objects, specified with the array class
* and a count.
diff --git a/runtime/interpreter/mterp/mips64/op_new_instance.S b/runtime/interpreter/mterp/mips64/op_new_instance.S
index cc5e13e..a14fd8f 100644
--- a/runtime/interpreter/mterp/mips64/op_new_instance.S
+++ b/runtime/interpreter/mterp/mips64/op_new_instance.S
@@ -1,3 +1,4 @@
+%def op_new_instance():
/*
* Create a new instance of a class.
*/
diff --git a/runtime/interpreter/mterp/mips64/op_nop.S b/runtime/interpreter/mterp/mips64/op_nop.S
index cc803a7..925fe4c 100644
--- a/runtime/interpreter/mterp/mips64/op_nop.S
+++ b/runtime/interpreter/mterp/mips64/op_nop.S
@@ -1,3 +1,4 @@
+%def op_nop():
FETCH_ADVANCE_INST 1 # advance rPC, load rINST
GET_INST_OPCODE v0 # extract opcode from rINST
GOTO_OPCODE v0 # jump to next instruction
diff --git a/runtime/interpreter/mterp/mips64/op_not_int.S b/runtime/interpreter/mterp/mips64/op_not_int.S
index 5954095..2fc1dd7 100644
--- a/runtime/interpreter/mterp/mips64/op_not_int.S
+++ b/runtime/interpreter/mterp/mips64/op_not_int.S
@@ -1 +1,2 @@
-%include "mips64/unop.S" {"instr":"nor a0, zero, a0"}
+%def op_not_int():
+% unop(instr="nor a0, zero, a0")
diff --git a/runtime/interpreter/mterp/mips64/op_not_long.S b/runtime/interpreter/mterp/mips64/op_not_long.S
index c8f5da7..a551b31 100644
--- a/runtime/interpreter/mterp/mips64/op_not_long.S
+++ b/runtime/interpreter/mterp/mips64/op_not_long.S
@@ -1 +1,2 @@
-%include "mips64/unopWide.S" {"instr":"nor a0, zero, a0"}
+%def op_not_long():
+% unopWide(instr="nor a0, zero, a0")
diff --git a/runtime/interpreter/mterp/mips64/op_or_int.S b/runtime/interpreter/mterp/mips64/op_or_int.S
index 0102355..df60be5 100644
--- a/runtime/interpreter/mterp/mips64/op_or_int.S
+++ b/runtime/interpreter/mterp/mips64/op_or_int.S
@@ -1 +1,2 @@
-%include "mips64/binop.S" {"instr":"or a0, a0, a1"}
+%def op_or_int():
+% binop(instr="or a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips64/op_or_int_2addr.S b/runtime/interpreter/mterp/mips64/op_or_int_2addr.S
index eed8900..c202e67 100644
--- a/runtime/interpreter/mterp/mips64/op_or_int_2addr.S
+++ b/runtime/interpreter/mterp/mips64/op_or_int_2addr.S
@@ -1 +1,2 @@
-%include "mips64/binop2addr.S" {"instr":"or a0, a0, a1"}
+%def op_or_int_2addr():
+% binop2addr(instr="or a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips64/op_or_int_lit16.S b/runtime/interpreter/mterp/mips64/op_or_int_lit16.S
index 16a0f3e..09961e8 100644
--- a/runtime/interpreter/mterp/mips64/op_or_int_lit16.S
+++ b/runtime/interpreter/mterp/mips64/op_or_int_lit16.S
@@ -1 +1,2 @@
-%include "mips64/binopLit16.S" {"instr":"or a0, a0, a1"}
+%def op_or_int_lit16():
+% binopLit16(instr="or a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips64/op_or_int_lit8.S b/runtime/interpreter/mterp/mips64/op_or_int_lit8.S
index dbbf790..1bd6809 100644
--- a/runtime/interpreter/mterp/mips64/op_or_int_lit8.S
+++ b/runtime/interpreter/mterp/mips64/op_or_int_lit8.S
@@ -1 +1,2 @@
-%include "mips64/binopLit8.S" {"instr":"or a0, a0, a1"}
+%def op_or_int_lit8():
+% binopLit8(instr="or a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips64/op_or_long.S b/runtime/interpreter/mterp/mips64/op_or_long.S
index e6f8639..65d4c44c 100644
--- a/runtime/interpreter/mterp/mips64/op_or_long.S
+++ b/runtime/interpreter/mterp/mips64/op_or_long.S
@@ -1 +1,2 @@
-%include "mips64/binopWide.S" {"instr":"or a0, a0, a1"}
+%def op_or_long():
+% binopWide(instr="or a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips64/op_or_long_2addr.S b/runtime/interpreter/mterp/mips64/op_or_long_2addr.S
index ad5e6c8..5ad0113 100644
--- a/runtime/interpreter/mterp/mips64/op_or_long_2addr.S
+++ b/runtime/interpreter/mterp/mips64/op_or_long_2addr.S
@@ -1 +1,2 @@
-%include "mips64/binopWide2addr.S" {"instr":"or a0, a0, a1"}
+%def op_or_long_2addr():
+% binopWide2addr(instr="or a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips64/op_packed_switch.S b/runtime/interpreter/mterp/mips64/op_packed_switch.S
index 44e77a4..36c2107 100644
--- a/runtime/interpreter/mterp/mips64/op_packed_switch.S
+++ b/runtime/interpreter/mterp/mips64/op_packed_switch.S
@@ -1,4 +1,4 @@
-%default { "func":"MterpDoPackedSwitch" }
+%def op_packed_switch(func="MterpDoPackedSwitch"):
/*
* Handle a packed-switch or sparse-switch instruction. In both cases
* we decode it and hand it off to a helper function.
diff --git a/runtime/interpreter/mterp/mips64/op_rem_double.S b/runtime/interpreter/mterp/mips64/op_rem_double.S
index ba61cfd..16ad357 100644
--- a/runtime/interpreter/mterp/mips64/op_rem_double.S
+++ b/runtime/interpreter/mterp/mips64/op_rem_double.S
@@ -1,3 +1,4 @@
+%def op_rem_double():
/* rem-double vAA, vBB, vCC */
.extern fmod
lbu a2, 2(rPC) # a2 <- BB
diff --git a/runtime/interpreter/mterp/mips64/op_rem_double_2addr.S b/runtime/interpreter/mterp/mips64/op_rem_double_2addr.S
index c649f0d..230d70b 100644
--- a/runtime/interpreter/mterp/mips64/op_rem_double_2addr.S
+++ b/runtime/interpreter/mterp/mips64/op_rem_double_2addr.S
@@ -1,3 +1,4 @@
+%def op_rem_double_2addr():
/* rem-double/2addr vA, vB */
.extern fmod
ext a2, rINST, 8, 4 # a2 <- A
diff --git a/runtime/interpreter/mterp/mips64/op_rem_float.S b/runtime/interpreter/mterp/mips64/op_rem_float.S
index 3967b0b..08c6516 100644
--- a/runtime/interpreter/mterp/mips64/op_rem_float.S
+++ b/runtime/interpreter/mterp/mips64/op_rem_float.S
@@ -1,3 +1,4 @@
+%def op_rem_float():
/* rem-float vAA, vBB, vCC */
.extern fmodf
lbu a2, 2(rPC) # a2 <- BB
diff --git a/runtime/interpreter/mterp/mips64/op_rem_float_2addr.S b/runtime/interpreter/mterp/mips64/op_rem_float_2addr.S
index 3fed41e..d35a0f4 100644
--- a/runtime/interpreter/mterp/mips64/op_rem_float_2addr.S
+++ b/runtime/interpreter/mterp/mips64/op_rem_float_2addr.S
@@ -1,3 +1,4 @@
+%def op_rem_float_2addr():
/* rem-float/2addr vA, vB */
.extern fmodf
ext a2, rINST, 8, 4 # a2 <- A
diff --git a/runtime/interpreter/mterp/mips64/op_rem_int.S b/runtime/interpreter/mterp/mips64/op_rem_int.S
index c05e9c4..542fe28 100644
--- a/runtime/interpreter/mterp/mips64/op_rem_int.S
+++ b/runtime/interpreter/mterp/mips64/op_rem_int.S
@@ -1 +1,2 @@
-%include "mips64/binop.S" {"instr":"mod a0, a0, a1", "chkzero":"1"}
+%def op_rem_int():
+% binop(instr="mod a0, a0, a1", chkzero="1")
diff --git a/runtime/interpreter/mterp/mips64/op_rem_int_2addr.S b/runtime/interpreter/mterp/mips64/op_rem_int_2addr.S
index a4e162d..da40576 100644
--- a/runtime/interpreter/mterp/mips64/op_rem_int_2addr.S
+++ b/runtime/interpreter/mterp/mips64/op_rem_int_2addr.S
@@ -1 +1,2 @@
-%include "mips64/binop2addr.S" {"instr":"mod a0, a0, a1", "chkzero":"1"}
+%def op_rem_int_2addr():
+% binop2addr(instr="mod a0, a0, a1", chkzero="1")
diff --git a/runtime/interpreter/mterp/mips64/op_rem_int_lit16.S b/runtime/interpreter/mterp/mips64/op_rem_int_lit16.S
index 3284f14..2dc5173 100644
--- a/runtime/interpreter/mterp/mips64/op_rem_int_lit16.S
+++ b/runtime/interpreter/mterp/mips64/op_rem_int_lit16.S
@@ -1 +1,2 @@
-%include "mips64/binopLit16.S" {"instr":"mod a0, a0, a1", "chkzero":"1"}
+%def op_rem_int_lit16():
+% binopLit16(instr="mod a0, a0, a1", chkzero="1")
diff --git a/runtime/interpreter/mterp/mips64/op_rem_int_lit8.S b/runtime/interpreter/mterp/mips64/op_rem_int_lit8.S
index 1e6a584..4ea0ace 100644
--- a/runtime/interpreter/mterp/mips64/op_rem_int_lit8.S
+++ b/runtime/interpreter/mterp/mips64/op_rem_int_lit8.S
@@ -1 +1,2 @@
-%include "mips64/binopLit8.S" {"instr":"mod a0, a0, a1", "chkzero":"1"}
+%def op_rem_int_lit8():
+% binopLit8(instr="mod a0, a0, a1", chkzero="1")
diff --git a/runtime/interpreter/mterp/mips64/op_rem_long.S b/runtime/interpreter/mterp/mips64/op_rem_long.S
index 32b2d19..a10984a 100644
--- a/runtime/interpreter/mterp/mips64/op_rem_long.S
+++ b/runtime/interpreter/mterp/mips64/op_rem_long.S
@@ -1 +1,2 @@
-%include "mips64/binopWide.S" {"instr":"dmod a0, a0, a1", "chkzero":"1"}
+%def op_rem_long():
+% binopWide(instr="dmod a0, a0, a1", chkzero="1")
diff --git a/runtime/interpreter/mterp/mips64/op_rem_long_2addr.S b/runtime/interpreter/mterp/mips64/op_rem_long_2addr.S
index ad658e1..3cac4fb 100644
--- a/runtime/interpreter/mterp/mips64/op_rem_long_2addr.S
+++ b/runtime/interpreter/mterp/mips64/op_rem_long_2addr.S
@@ -1 +1,2 @@
-%include "mips64/binopWide2addr.S" {"instr":"dmod a0, a0, a1", "chkzero":"1"}
+%def op_rem_long_2addr():
+% binopWide2addr(instr="dmod a0, a0, a1", chkzero="1")
diff --git a/runtime/interpreter/mterp/mips64/op_return.S b/runtime/interpreter/mterp/mips64/op_return.S
index edd795f..bfdf76a 100644
--- a/runtime/interpreter/mterp/mips64/op_return.S
+++ b/runtime/interpreter/mterp/mips64/op_return.S
@@ -1,4 +1,4 @@
-%default {"instr":"GET_VREG"}
+%def op_return(instr="GET_VREG"):
/*
* Return a 32-bit value.
*
diff --git a/runtime/interpreter/mterp/mips64/op_return_object.S b/runtime/interpreter/mterp/mips64/op_return_object.S
index b69b880..074c321 100644
--- a/runtime/interpreter/mterp/mips64/op_return_object.S
+++ b/runtime/interpreter/mterp/mips64/op_return_object.S
@@ -1 +1,2 @@
-%include "mips64/op_return.S" {"instr":"GET_VREG_U"}
+%def op_return_object():
+% op_return(instr="GET_VREG_U")
diff --git a/runtime/interpreter/mterp/mips64/op_return_void.S b/runtime/interpreter/mterp/mips64/op_return_void.S
index f6eee91..b5aa76c 100644
--- a/runtime/interpreter/mterp/mips64/op_return_void.S
+++ b/runtime/interpreter/mterp/mips64/op_return_void.S
@@ -1,3 +1,4 @@
+%def op_return_void():
.extern MterpThreadFenceForConstructor
.extern MterpSuspendCheck
jal MterpThreadFenceForConstructor
diff --git a/runtime/interpreter/mterp/mips64/op_return_void_no_barrier.S b/runtime/interpreter/mterp/mips64/op_return_void_no_barrier.S
index 4e9b640..0baddbb 100644
--- a/runtime/interpreter/mterp/mips64/op_return_void_no_barrier.S
+++ b/runtime/interpreter/mterp/mips64/op_return_void_no_barrier.S
@@ -1,3 +1,4 @@
+%def op_return_void_no_barrier():
.extern MterpSuspendCheck
lw ra, THREAD_FLAGS_OFFSET(rSELF)
move a0, rSELF
diff --git a/runtime/interpreter/mterp/mips64/op_return_wide.S b/runtime/interpreter/mterp/mips64/op_return_wide.S
index 91ca1fa..dbcb704 100644
--- a/runtime/interpreter/mterp/mips64/op_return_wide.S
+++ b/runtime/interpreter/mterp/mips64/op_return_wide.S
@@ -1,3 +1,4 @@
+%def op_return_wide():
/*
* Return a 64-bit value.
*/
diff --git a/runtime/interpreter/mterp/mips64/op_rsub_int.S b/runtime/interpreter/mterp/mips64/op_rsub_int.S
index fa31a0a..2d61e86 100644
--- a/runtime/interpreter/mterp/mips64/op_rsub_int.S
+++ b/runtime/interpreter/mterp/mips64/op_rsub_int.S
@@ -1 +1,2 @@
-%include "mips64/binopLit16.S" {"instr":"subu a0, a1, a0"}
+%def op_rsub_int():
+% binopLit16(instr="subu a0, a1, a0")
diff --git a/runtime/interpreter/mterp/mips64/op_rsub_int_lit8.S b/runtime/interpreter/mterp/mips64/op_rsub_int_lit8.S
index c31ff32..b9b214d 100644
--- a/runtime/interpreter/mterp/mips64/op_rsub_int_lit8.S
+++ b/runtime/interpreter/mterp/mips64/op_rsub_int_lit8.S
@@ -1 +1,2 @@
-%include "mips64/binopLit8.S" {"instr":"subu a0, a1, a0"}
+%def op_rsub_int_lit8():
+% binopLit8(instr="subu a0, a1, a0")
diff --git a/runtime/interpreter/mterp/mips64/op_sget.S b/runtime/interpreter/mterp/mips64/op_sget.S
index 200da35..8a6a66a 100644
--- a/runtime/interpreter/mterp/mips64/op_sget.S
+++ b/runtime/interpreter/mterp/mips64/op_sget.S
@@ -1,2 +1,2 @@
-%default { "is_object":"0", "helper":"MterpSGetU32" }
-%include "mips64/field.S" { }
+%def op_sget(is_object="0", helper="MterpSGetU32"):
+% field(helper=helper)
diff --git a/runtime/interpreter/mterp/mips64/op_sget_boolean.S b/runtime/interpreter/mterp/mips64/op_sget_boolean.S
index 8abb396..d9c12c9 100644
--- a/runtime/interpreter/mterp/mips64/op_sget_boolean.S
+++ b/runtime/interpreter/mterp/mips64/op_sget_boolean.S
@@ -1 +1,2 @@
-%include "mips64/op_sget.S" {"helper":"MterpSGetU8"}
+%def op_sget_boolean():
+% op_sget(helper="MterpSGetU8")
diff --git a/runtime/interpreter/mterp/mips64/op_sget_byte.S b/runtime/interpreter/mterp/mips64/op_sget_byte.S
index 68623f6..37c6879 100644
--- a/runtime/interpreter/mterp/mips64/op_sget_byte.S
+++ b/runtime/interpreter/mterp/mips64/op_sget_byte.S
@@ -1 +1,2 @@
-%include "mips64/op_sget.S" {"helper":"MterpSGetI8"}
+%def op_sget_byte():
+% op_sget(helper="MterpSGetI8")
diff --git a/runtime/interpreter/mterp/mips64/op_sget_char.S b/runtime/interpreter/mterp/mips64/op_sget_char.S
index 3c7b962..003bcd1 100644
--- a/runtime/interpreter/mterp/mips64/op_sget_char.S
+++ b/runtime/interpreter/mterp/mips64/op_sget_char.S
@@ -1 +1,2 @@
-%include "mips64/op_sget.S" {"helper":"MterpSGetU16"}
+%def op_sget_char():
+% op_sget(helper="MterpSGetU16")
diff --git a/runtime/interpreter/mterp/mips64/op_sget_object.S b/runtime/interpreter/mterp/mips64/op_sget_object.S
index 3b260e6..7cf3597 100644
--- a/runtime/interpreter/mterp/mips64/op_sget_object.S
+++ b/runtime/interpreter/mterp/mips64/op_sget_object.S
@@ -1 +1,2 @@
-%include "mips64/op_sget.S" {"is_object":"1", "helper":"MterpSGetObj"}
+%def op_sget_object():
+% op_sget(is_object="1", helper="MterpSGetObj")
diff --git a/runtime/interpreter/mterp/mips64/op_sget_short.S b/runtime/interpreter/mterp/mips64/op_sget_short.S
index 9a8579b..afacb57 100644
--- a/runtime/interpreter/mterp/mips64/op_sget_short.S
+++ b/runtime/interpreter/mterp/mips64/op_sget_short.S
@@ -1 +1,2 @@
-%include "mips64/op_sget.S" {"helper":"MterpSGetI16"}
+%def op_sget_short():
+% op_sget(helper="MterpSGetI16")
diff --git a/runtime/interpreter/mterp/mips64/op_sget_wide.S b/runtime/interpreter/mterp/mips64/op_sget_wide.S
index 14f232c..fff2be6 100644
--- a/runtime/interpreter/mterp/mips64/op_sget_wide.S
+++ b/runtime/interpreter/mterp/mips64/op_sget_wide.S
@@ -1 +1,2 @@
-%include "mips64/op_sget.S" {"helper":"MterpSGetU64"}
+%def op_sget_wide():
+% op_sget(helper="MterpSGetU64")
diff --git a/runtime/interpreter/mterp/mips64/op_shl_int.S b/runtime/interpreter/mterp/mips64/op_shl_int.S
index 784481f..efd213c 100644
--- a/runtime/interpreter/mterp/mips64/op_shl_int.S
+++ b/runtime/interpreter/mterp/mips64/op_shl_int.S
@@ -1 +1,2 @@
-%include "mips64/binop.S" {"instr":"sll a0, a0, a1"}
+%def op_shl_int():
+% binop(instr="sll a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips64/op_shl_int_2addr.S b/runtime/interpreter/mterp/mips64/op_shl_int_2addr.S
index a6c8a78..0901e6b 100644
--- a/runtime/interpreter/mterp/mips64/op_shl_int_2addr.S
+++ b/runtime/interpreter/mterp/mips64/op_shl_int_2addr.S
@@ -1 +1,2 @@
-%include "mips64/binop2addr.S" {"instr":"sll a0, a0, a1"}
+%def op_shl_int_2addr():
+% binop2addr(instr="sll a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips64/op_shl_int_lit8.S b/runtime/interpreter/mterp/mips64/op_shl_int_lit8.S
index 36ef207..2263ec7 100644
--- a/runtime/interpreter/mterp/mips64/op_shl_int_lit8.S
+++ b/runtime/interpreter/mterp/mips64/op_shl_int_lit8.S
@@ -1 +1,2 @@
-%include "mips64/binopLit8.S" {"instr":"sll a0, a0, a1"}
+%def op_shl_int_lit8():
+% binopLit8(instr="sll a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips64/op_shl_long.S b/runtime/interpreter/mterp/mips64/op_shl_long.S
index 225a2cb..9ef03d8 100644
--- a/runtime/interpreter/mterp/mips64/op_shl_long.S
+++ b/runtime/interpreter/mterp/mips64/op_shl_long.S
@@ -1 +1,2 @@
-%include "mips64/binopWide.S" {"instr":"dsll a0, a0, a1"}
+%def op_shl_long():
+% binopWide(instr="dsll a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips64/op_shl_long_2addr.S b/runtime/interpreter/mterp/mips64/op_shl_long_2addr.S
index c04d882..f748c3b 100644
--- a/runtime/interpreter/mterp/mips64/op_shl_long_2addr.S
+++ b/runtime/interpreter/mterp/mips64/op_shl_long_2addr.S
@@ -1 +1,2 @@
-%include "mips64/binopWide2addr.S" {"instr":"dsll a0, a0, a1"}
+%def op_shl_long_2addr():
+% binopWide2addr(instr="dsll a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips64/op_shr_int.S b/runtime/interpreter/mterp/mips64/op_shr_int.S
index eded037..8d55e7a 100644
--- a/runtime/interpreter/mterp/mips64/op_shr_int.S
+++ b/runtime/interpreter/mterp/mips64/op_shr_int.S
@@ -1 +1,2 @@
-%include "mips64/binop.S" {"instr":"sra a0, a0, a1"}
+%def op_shr_int():
+% binop(instr="sra a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips64/op_shr_int_2addr.S b/runtime/interpreter/mterp/mips64/op_shr_int_2addr.S
index 5b4d96f..e102baa 100644
--- a/runtime/interpreter/mterp/mips64/op_shr_int_2addr.S
+++ b/runtime/interpreter/mterp/mips64/op_shr_int_2addr.S
@@ -1 +1,2 @@
-%include "mips64/binop2addr.S" {"instr":"sra a0, a0, a1"}
+%def op_shr_int_2addr():
+% binop2addr(instr="sra a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips64/op_shr_int_lit8.S b/runtime/interpreter/mterp/mips64/op_shr_int_lit8.S
index 175eb86..437c5c4 100644
--- a/runtime/interpreter/mterp/mips64/op_shr_int_lit8.S
+++ b/runtime/interpreter/mterp/mips64/op_shr_int_lit8.S
@@ -1 +1,2 @@
-%include "mips64/binopLit8.S" {"instr":"sra a0, a0, a1"}
+%def op_shr_int_lit8():
+% binopLit8(instr="sra a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips64/op_shr_long.S b/runtime/interpreter/mterp/mips64/op_shr_long.S
index 0db38c8..1be48f2 100644
--- a/runtime/interpreter/mterp/mips64/op_shr_long.S
+++ b/runtime/interpreter/mterp/mips64/op_shr_long.S
@@ -1 +1,2 @@
-%include "mips64/binopWide.S" {"instr":"dsra a0, a0, a1"}
+%def op_shr_long():
+% binopWide(instr="dsra a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips64/op_shr_long_2addr.S b/runtime/interpreter/mterp/mips64/op_shr_long_2addr.S
index 48131ad..a15861f 100644
--- a/runtime/interpreter/mterp/mips64/op_shr_long_2addr.S
+++ b/runtime/interpreter/mterp/mips64/op_shr_long_2addr.S
@@ -1 +1,2 @@
-%include "mips64/binopWide2addr.S" {"instr":"dsra a0, a0, a1"}
+%def op_shr_long_2addr():
+% binopWide2addr(instr="dsra a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips64/op_sparse_switch.S b/runtime/interpreter/mterp/mips64/op_sparse_switch.S
index b065aaa..b74d7da 100644
--- a/runtime/interpreter/mterp/mips64/op_sparse_switch.S
+++ b/runtime/interpreter/mterp/mips64/op_sparse_switch.S
@@ -1 +1,2 @@
-%include "mips64/op_packed_switch.S" { "func":"MterpDoSparseSwitch" }
+%def op_sparse_switch():
+% op_packed_switch(func="MterpDoSparseSwitch")
diff --git a/runtime/interpreter/mterp/mips64/op_sput.S b/runtime/interpreter/mterp/mips64/op_sput.S
index 0bd6837..cbd6ee9 100644
--- a/runtime/interpreter/mterp/mips64/op_sput.S
+++ b/runtime/interpreter/mterp/mips64/op_sput.S
@@ -1,2 +1,2 @@
-%default { "is_object":"0", "helper":"MterpSPutU32"}
-%include "mips64/field.S" { }
+%def op_sput(is_object="0", helper="MterpSPutU32"):
+% field(helper=helper)
diff --git a/runtime/interpreter/mterp/mips64/op_sput_boolean.S b/runtime/interpreter/mterp/mips64/op_sput_boolean.S
index 2e769d5..36fba84 100644
--- a/runtime/interpreter/mterp/mips64/op_sput_boolean.S
+++ b/runtime/interpreter/mterp/mips64/op_sput_boolean.S
@@ -1 +1,2 @@
-%include "mips64/op_sput.S" {"helper":"MterpSPutU8"}
+%def op_sput_boolean():
+% op_sput(helper="MterpSPutU8")
diff --git a/runtime/interpreter/mterp/mips64/op_sput_byte.S b/runtime/interpreter/mterp/mips64/op_sput_byte.S
index 0b04b59..84ad4a0 100644
--- a/runtime/interpreter/mterp/mips64/op_sput_byte.S
+++ b/runtime/interpreter/mterp/mips64/op_sput_byte.S
@@ -1 +1,2 @@
-%include "mips64/op_sput.S" {"helper":"MterpSPutI8"}
+%def op_sput_byte():
+% op_sput(helper="MterpSPutI8")
diff --git a/runtime/interpreter/mterp/mips64/op_sput_char.S b/runtime/interpreter/mterp/mips64/op_sput_char.S
index 4a80375..9b8eeba 100644
--- a/runtime/interpreter/mterp/mips64/op_sput_char.S
+++ b/runtime/interpreter/mterp/mips64/op_sput_char.S
@@ -1 +1,2 @@
-%include "mips64/op_sput.S" {"helper":"MterpSPutU16"}
+%def op_sput_char():
+% op_sput(helper="MterpSPutU16")
diff --git a/runtime/interpreter/mterp/mips64/op_sput_object.S b/runtime/interpreter/mterp/mips64/op_sput_object.S
index 09bd0fb..081360c 100644
--- a/runtime/interpreter/mterp/mips64/op_sput_object.S
+++ b/runtime/interpreter/mterp/mips64/op_sput_object.S
@@ -1 +1,2 @@
-%include "mips64/op_sput.S" {"is_object":"1", "helper":"MterpSPutObj"}
+%def op_sput_object():
+% op_sput(is_object="1", helper="MterpSPutObj")
diff --git a/runtime/interpreter/mterp/mips64/op_sput_short.S b/runtime/interpreter/mterp/mips64/op_sput_short.S
index c00043b..ee16513 100644
--- a/runtime/interpreter/mterp/mips64/op_sput_short.S
+++ b/runtime/interpreter/mterp/mips64/op_sput_short.S
@@ -1 +1,2 @@
-%include "mips64/op_sput.S" {"helper":"MterpSPutI16"}
+%def op_sput_short():
+% op_sput(helper="MterpSPutI16")
diff --git a/runtime/interpreter/mterp/mips64/op_sput_wide.S b/runtime/interpreter/mterp/mips64/op_sput_wide.S
index 070d17f..44c1a18 100644
--- a/runtime/interpreter/mterp/mips64/op_sput_wide.S
+++ b/runtime/interpreter/mterp/mips64/op_sput_wide.S
@@ -1 +1,2 @@
-%include "mips64/op_sput.S" {"helper":"MterpSPutU64"}
+%def op_sput_wide():
+% op_sput(helper="MterpSPutU64")
diff --git a/runtime/interpreter/mterp/mips64/op_sub_double.S b/runtime/interpreter/mterp/mips64/op_sub_double.S
index 40a6c89..aeb1b0f 100644
--- a/runtime/interpreter/mterp/mips64/op_sub_double.S
+++ b/runtime/interpreter/mterp/mips64/op_sub_double.S
@@ -1 +1,2 @@
-%include "mips64/fbinopWide.S" {"instr":"sub.d f0, f0, f1"}
+%def op_sub_double():
+% fbinopWide(instr="sub.d f0, f0, f1")
diff --git a/runtime/interpreter/mterp/mips64/op_sub_double_2addr.S b/runtime/interpreter/mterp/mips64/op_sub_double_2addr.S
index 984737e..03457ac 100644
--- a/runtime/interpreter/mterp/mips64/op_sub_double_2addr.S
+++ b/runtime/interpreter/mterp/mips64/op_sub_double_2addr.S
@@ -1 +1,2 @@
-%include "mips64/fbinopWide2addr.S" {"instr":"sub.d f0, f0, f1"}
+%def op_sub_double_2addr():
+% fbinopWide2addr(instr="sub.d f0, f0, f1")
diff --git a/runtime/interpreter/mterp/mips64/op_sub_float.S b/runtime/interpreter/mterp/mips64/op_sub_float.S
index 9010592..4afd1ad 100644
--- a/runtime/interpreter/mterp/mips64/op_sub_float.S
+++ b/runtime/interpreter/mterp/mips64/op_sub_float.S
@@ -1 +1,2 @@
-%include "mips64/fbinop.S" {"instr":"sub.s f0, f0, f1"}
+%def op_sub_float():
+% fbinop(instr="sub.s f0, f0, f1")
diff --git a/runtime/interpreter/mterp/mips64/op_sub_float_2addr.S b/runtime/interpreter/mterp/mips64/op_sub_float_2addr.S
index e7d4ffe..b4ade2c 100644
--- a/runtime/interpreter/mterp/mips64/op_sub_float_2addr.S
+++ b/runtime/interpreter/mterp/mips64/op_sub_float_2addr.S
@@ -1 +1,2 @@
-%include "mips64/fbinop2addr.S" {"instr":"sub.s f0, f0, f1"}
+%def op_sub_float_2addr():
+% fbinop2addr(instr="sub.s f0, f0, f1")
diff --git a/runtime/interpreter/mterp/mips64/op_sub_int.S b/runtime/interpreter/mterp/mips64/op_sub_int.S
index 609ea05..57f618d 100644
--- a/runtime/interpreter/mterp/mips64/op_sub_int.S
+++ b/runtime/interpreter/mterp/mips64/op_sub_int.S
@@ -1 +1,2 @@
-%include "mips64/binop.S" {"instr":"subu a0, a0, a1"}
+%def op_sub_int():
+% binop(instr="subu a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips64/op_sub_int_2addr.S b/runtime/interpreter/mterp/mips64/op_sub_int_2addr.S
index ba2f1e8..445ffca 100644
--- a/runtime/interpreter/mterp/mips64/op_sub_int_2addr.S
+++ b/runtime/interpreter/mterp/mips64/op_sub_int_2addr.S
@@ -1 +1,2 @@
-%include "mips64/binop2addr.S" {"instr":"subu a0, a0, a1"}
+%def op_sub_int_2addr():
+% binop2addr(instr="subu a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips64/op_sub_long.S b/runtime/interpreter/mterp/mips64/op_sub_long.S
index 09a6afd..ba5fe49 100644
--- a/runtime/interpreter/mterp/mips64/op_sub_long.S
+++ b/runtime/interpreter/mterp/mips64/op_sub_long.S
@@ -1 +1,2 @@
-%include "mips64/binopWide.S" {"instr":"dsubu a0, a0, a1"}
+%def op_sub_long():
+% binopWide(instr="dsubu a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips64/op_sub_long_2addr.S b/runtime/interpreter/mterp/mips64/op_sub_long_2addr.S
index b9ec82a..e22b4f6 100644
--- a/runtime/interpreter/mterp/mips64/op_sub_long_2addr.S
+++ b/runtime/interpreter/mterp/mips64/op_sub_long_2addr.S
@@ -1 +1,2 @@
-%include "mips64/binopWide2addr.S" {"instr":"dsubu a0, a0, a1"}
+%def op_sub_long_2addr():
+% binopWide2addr(instr="dsubu a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips64/op_throw.S b/runtime/interpreter/mterp/mips64/op_throw.S
index 6418d57..7f26d88 100644
--- a/runtime/interpreter/mterp/mips64/op_throw.S
+++ b/runtime/interpreter/mterp/mips64/op_throw.S
@@ -1,3 +1,4 @@
+%def op_throw():
/*
* Throw an exception object in the current thread.
*/
diff --git a/runtime/interpreter/mterp/mips64/op_unused_3e.S b/runtime/interpreter/mterp/mips64/op_unused_3e.S
index 29463d7..d889f1a 100644
--- a/runtime/interpreter/mterp/mips64/op_unused_3e.S
+++ b/runtime/interpreter/mterp/mips64/op_unused_3e.S
@@ -1 +1,2 @@
-%include "mips64/unused.S"
+%def op_unused_3e():
+% unused()
diff --git a/runtime/interpreter/mterp/mips64/op_unused_3f.S b/runtime/interpreter/mterp/mips64/op_unused_3f.S
index 29463d7..b3ebcfa 100644
--- a/runtime/interpreter/mterp/mips64/op_unused_3f.S
+++ b/runtime/interpreter/mterp/mips64/op_unused_3f.S
@@ -1 +1,2 @@
-%include "mips64/unused.S"
+%def op_unused_3f():
+% unused()
diff --git a/runtime/interpreter/mterp/mips64/op_unused_40.S b/runtime/interpreter/mterp/mips64/op_unused_40.S
index 29463d7..7920fb3 100644
--- a/runtime/interpreter/mterp/mips64/op_unused_40.S
+++ b/runtime/interpreter/mterp/mips64/op_unused_40.S
@@ -1 +1,2 @@
-%include "mips64/unused.S"
+%def op_unused_40():
+% unused()
diff --git a/runtime/interpreter/mterp/mips64/op_unused_41.S b/runtime/interpreter/mterp/mips64/op_unused_41.S
index 29463d7..5ed03b8 100644
--- a/runtime/interpreter/mterp/mips64/op_unused_41.S
+++ b/runtime/interpreter/mterp/mips64/op_unused_41.S
@@ -1 +1,2 @@
-%include "mips64/unused.S"
+%def op_unused_41():
+% unused()
diff --git a/runtime/interpreter/mterp/mips64/op_unused_42.S b/runtime/interpreter/mterp/mips64/op_unused_42.S
index 29463d7..ac32521 100644
--- a/runtime/interpreter/mterp/mips64/op_unused_42.S
+++ b/runtime/interpreter/mterp/mips64/op_unused_42.S
@@ -1 +1,2 @@
-%include "mips64/unused.S"
+%def op_unused_42():
+% unused()
diff --git a/runtime/interpreter/mterp/mips64/op_unused_43.S b/runtime/interpreter/mterp/mips64/op_unused_43.S
index 29463d7..33e2aa1 100644
--- a/runtime/interpreter/mterp/mips64/op_unused_43.S
+++ b/runtime/interpreter/mterp/mips64/op_unused_43.S
@@ -1 +1,2 @@
-%include "mips64/unused.S"
+%def op_unused_43():
+% unused()
diff --git a/runtime/interpreter/mterp/mips64/op_unused_79.S b/runtime/interpreter/mterp/mips64/op_unused_79.S
index 29463d7..3c6dafc 100644
--- a/runtime/interpreter/mterp/mips64/op_unused_79.S
+++ b/runtime/interpreter/mterp/mips64/op_unused_79.S
@@ -1 +1,2 @@
-%include "mips64/unused.S"
+%def op_unused_79():
+% unused()
diff --git a/runtime/interpreter/mterp/mips64/op_unused_7a.S b/runtime/interpreter/mterp/mips64/op_unused_7a.S
index 29463d7..9c03cd5 100644
--- a/runtime/interpreter/mterp/mips64/op_unused_7a.S
+++ b/runtime/interpreter/mterp/mips64/op_unused_7a.S
@@ -1 +1,2 @@
-%include "mips64/unused.S"
+%def op_unused_7a():
+% unused()
diff --git a/runtime/interpreter/mterp/mips64/op_unused_f3.S b/runtime/interpreter/mterp/mips64/op_unused_f3.S
index 29463d7..ab10b78 100644
--- a/runtime/interpreter/mterp/mips64/op_unused_f3.S
+++ b/runtime/interpreter/mterp/mips64/op_unused_f3.S
@@ -1 +1,2 @@
-%include "mips64/unused.S"
+%def op_unused_f3():
+% unused()
diff --git a/runtime/interpreter/mterp/mips64/op_unused_f4.S b/runtime/interpreter/mterp/mips64/op_unused_f4.S
index 29463d7..09229d6 100644
--- a/runtime/interpreter/mterp/mips64/op_unused_f4.S
+++ b/runtime/interpreter/mterp/mips64/op_unused_f4.S
@@ -1 +1,2 @@
-%include "mips64/unused.S"
+%def op_unused_f4():
+% unused()
diff --git a/runtime/interpreter/mterp/mips64/op_unused_f5.S b/runtime/interpreter/mterp/mips64/op_unused_f5.S
index 29463d7..0d6149b 100644
--- a/runtime/interpreter/mterp/mips64/op_unused_f5.S
+++ b/runtime/interpreter/mterp/mips64/op_unused_f5.S
@@ -1 +1,2 @@
-%include "mips64/unused.S"
+%def op_unused_f5():
+% unused()
diff --git a/runtime/interpreter/mterp/mips64/op_unused_f6.S b/runtime/interpreter/mterp/mips64/op_unused_f6.S
index 29463d7..117b03d 100644
--- a/runtime/interpreter/mterp/mips64/op_unused_f6.S
+++ b/runtime/interpreter/mterp/mips64/op_unused_f6.S
@@ -1 +1,2 @@
-%include "mips64/unused.S"
+%def op_unused_f6():
+% unused()
diff --git a/runtime/interpreter/mterp/mips64/op_unused_f7.S b/runtime/interpreter/mterp/mips64/op_unused_f7.S
index 29463d7..4e3a0f3 100644
--- a/runtime/interpreter/mterp/mips64/op_unused_f7.S
+++ b/runtime/interpreter/mterp/mips64/op_unused_f7.S
@@ -1 +1,2 @@
-%include "mips64/unused.S"
+%def op_unused_f7():
+% unused()
diff --git a/runtime/interpreter/mterp/mips64/op_unused_f8.S b/runtime/interpreter/mterp/mips64/op_unused_f8.S
index 29463d7..d122075 100644
--- a/runtime/interpreter/mterp/mips64/op_unused_f8.S
+++ b/runtime/interpreter/mterp/mips64/op_unused_f8.S
@@ -1 +1,2 @@
-%include "mips64/unused.S"
+%def op_unused_f8():
+% unused()
diff --git a/runtime/interpreter/mterp/mips64/op_unused_f9.S b/runtime/interpreter/mterp/mips64/op_unused_f9.S
index 29463d7..7d09a0e 100644
--- a/runtime/interpreter/mterp/mips64/op_unused_f9.S
+++ b/runtime/interpreter/mterp/mips64/op_unused_f9.S
@@ -1 +1,2 @@
-%include "mips64/unused.S"
+%def op_unused_f9():
+% unused()
diff --git a/runtime/interpreter/mterp/mips64/op_unused_fc.S b/runtime/interpreter/mterp/mips64/op_unused_fc.S
index 29463d7..0697819 100644
--- a/runtime/interpreter/mterp/mips64/op_unused_fc.S
+++ b/runtime/interpreter/mterp/mips64/op_unused_fc.S
@@ -1 +1,2 @@
-%include "mips64/unused.S"
+%def op_unused_fc():
+% unused()
diff --git a/runtime/interpreter/mterp/mips64/op_unused_fd.S b/runtime/interpreter/mterp/mips64/op_unused_fd.S
index 29463d7..4bc2b4b 100644
--- a/runtime/interpreter/mterp/mips64/op_unused_fd.S
+++ b/runtime/interpreter/mterp/mips64/op_unused_fd.S
@@ -1 +1,2 @@
-%include "mips64/unused.S"
+%def op_unused_fd():
+% unused()
diff --git a/runtime/interpreter/mterp/mips64/op_ushr_int.S b/runtime/interpreter/mterp/mips64/op_ushr_int.S
index 37c90cb..98d2dfb 100644
--- a/runtime/interpreter/mterp/mips64/op_ushr_int.S
+++ b/runtime/interpreter/mterp/mips64/op_ushr_int.S
@@ -1 +1,2 @@
-%include "mips64/binop.S" {"instr":"srl a0, a0, a1"}
+%def op_ushr_int():
+% binop(instr="srl a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips64/op_ushr_int_2addr.S b/runtime/interpreter/mterp/mips64/op_ushr_int_2addr.S
index d6bf413..9b89e21 100644
--- a/runtime/interpreter/mterp/mips64/op_ushr_int_2addr.S
+++ b/runtime/interpreter/mterp/mips64/op_ushr_int_2addr.S
@@ -1 +1,2 @@
-%include "mips64/binop2addr.S" {"instr":"srl a0, a0, a1"}
+%def op_ushr_int_2addr():
+% binop2addr(instr="srl a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips64/op_ushr_int_lit8.S b/runtime/interpreter/mterp/mips64/op_ushr_int_lit8.S
index 2a2d843..531c30a 100644
--- a/runtime/interpreter/mterp/mips64/op_ushr_int_lit8.S
+++ b/runtime/interpreter/mterp/mips64/op_ushr_int_lit8.S
@@ -1 +1,2 @@
-%include "mips64/binopLit8.S" {"instr":"srl a0, a0, a1"}
+%def op_ushr_int_lit8():
+% binopLit8(instr="srl a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips64/op_ushr_long.S b/runtime/interpreter/mterp/mips64/op_ushr_long.S
index e724405..e900f76 100644
--- a/runtime/interpreter/mterp/mips64/op_ushr_long.S
+++ b/runtime/interpreter/mterp/mips64/op_ushr_long.S
@@ -1 +1,2 @@
-%include "mips64/binopWide.S" {"instr":"dsrl a0, a0, a1"}
+%def op_ushr_long():
+% binopWide(instr="dsrl a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips64/op_ushr_long_2addr.S b/runtime/interpreter/mterp/mips64/op_ushr_long_2addr.S
index d2cf135..e13fc75 100644
--- a/runtime/interpreter/mterp/mips64/op_ushr_long_2addr.S
+++ b/runtime/interpreter/mterp/mips64/op_ushr_long_2addr.S
@@ -1 +1,2 @@
-%include "mips64/binopWide2addr.S" {"instr":"dsrl a0, a0, a1"}
+%def op_ushr_long_2addr():
+% binopWide2addr(instr="dsrl a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips64/op_xor_int.S b/runtime/interpreter/mterp/mips64/op_xor_int.S
index ee25ebc..1379a34 100644
--- a/runtime/interpreter/mterp/mips64/op_xor_int.S
+++ b/runtime/interpreter/mterp/mips64/op_xor_int.S
@@ -1 +1,2 @@
-%include "mips64/binop.S" {"instr":"xor a0, a0, a1"}
+%def op_xor_int():
+% binop(instr="xor a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips64/op_xor_int_2addr.S b/runtime/interpreter/mterp/mips64/op_xor_int_2addr.S
index 0f04967..6dbe11c 100644
--- a/runtime/interpreter/mterp/mips64/op_xor_int_2addr.S
+++ b/runtime/interpreter/mterp/mips64/op_xor_int_2addr.S
@@ -1 +1,2 @@
-%include "mips64/binop2addr.S" {"instr":"xor a0, a0, a1"}
+%def op_xor_int_2addr():
+% binop2addr(instr="xor a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips64/op_xor_int_lit16.S b/runtime/interpreter/mterp/mips64/op_xor_int_lit16.S
index ecb21ae..f8cbce0 100644
--- a/runtime/interpreter/mterp/mips64/op_xor_int_lit16.S
+++ b/runtime/interpreter/mterp/mips64/op_xor_int_lit16.S
@@ -1 +1,2 @@
-%include "mips64/binopLit16.S" {"instr":"xor a0, a0, a1"}
+%def op_xor_int_lit16():
+% binopLit16(instr="xor a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips64/op_xor_int_lit8.S b/runtime/interpreter/mterp/mips64/op_xor_int_lit8.S
index 115ae99..268a43a 100644
--- a/runtime/interpreter/mterp/mips64/op_xor_int_lit8.S
+++ b/runtime/interpreter/mterp/mips64/op_xor_int_lit8.S
@@ -1 +1,2 @@
-%include "mips64/binopLit8.S" {"instr":"xor a0, a0, a1"}
+%def op_xor_int_lit8():
+% binopLit8(instr="xor a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips64/op_xor_long.S b/runtime/interpreter/mterp/mips64/op_xor_long.S
index 7ebabc2..75d4c07 100644
--- a/runtime/interpreter/mterp/mips64/op_xor_long.S
+++ b/runtime/interpreter/mterp/mips64/op_xor_long.S
@@ -1 +1,2 @@
-%include "mips64/binopWide.S" {"instr":"xor a0, a0, a1"}
+%def op_xor_long():
+% binopWide(instr="xor a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips64/op_xor_long_2addr.S b/runtime/interpreter/mterp/mips64/op_xor_long_2addr.S
index 0f1919a..2e76613 100644
--- a/runtime/interpreter/mterp/mips64/op_xor_long_2addr.S
+++ b/runtime/interpreter/mterp/mips64/op_xor_long_2addr.S
@@ -1 +1,2 @@
-%include "mips64/binopWide2addr.S" {"instr":"xor a0, a0, a1"}
+%def op_xor_long_2addr():
+% binopWide2addr(instr="xor a0, a0, a1")
diff --git a/runtime/interpreter/mterp/mips64/unop.S b/runtime/interpreter/mterp/mips64/unop.S
index e3f7ea0..860e6bb 100644
--- a/runtime/interpreter/mterp/mips64/unop.S
+++ b/runtime/interpreter/mterp/mips64/unop.S
@@ -1,4 +1,4 @@
-%default {"preinstr":""}
+%def unop(preinstr="", instr=""):
/*
* Generic 32-bit unary operation. Provide an "instr" line that
* specifies an instruction that performs "a0 = op a0".
diff --git a/runtime/interpreter/mterp/mips64/unopWide.S b/runtime/interpreter/mterp/mips64/unopWide.S
index c0dd1aa..d0a6f5b 100644
--- a/runtime/interpreter/mterp/mips64/unopWide.S
+++ b/runtime/interpreter/mterp/mips64/unopWide.S
@@ -1,4 +1,4 @@
-%default {"preinstr":""}
+%def unopWide(preinstr="", instr=""):
/*
* Generic 64-bit unary operation. Provide an "instr" line that
* specifies an instruction that performs "a0 = op a0".
diff --git a/runtime/interpreter/mterp/mips64/unused.S b/runtime/interpreter/mterp/mips64/unused.S
index 30d38bd6..3d611d1 100644
--- a/runtime/interpreter/mterp/mips64/unused.S
+++ b/runtime/interpreter/mterp/mips64/unused.S
@@ -1,3 +1,4 @@
+%def unused():
/*
* Bail to reference interpreter to throw.
*/
diff --git a/runtime/interpreter/mterp/mips64/zcmp.S b/runtime/interpreter/mterp/mips64/zcmp.S
index 75db49e..a0d2832 100644
--- a/runtime/interpreter/mterp/mips64/zcmp.S
+++ b/runtime/interpreter/mterp/mips64/zcmp.S
@@ -1,3 +1,4 @@
+%def zcmp(condition=""):
/*
* Generic one-operand compare-and-branch operation. Provide a "condition"
* fragment that specifies the comparison to perform, e.g. for
diff --git a/runtime/interpreter/mterp/out/mterp_arm.S b/runtime/interpreter/mterp/out/mterp_arm.S
index 25512ae..dc476b7 100644
--- a/runtime/interpreter/mterp/out/mterp_arm.S
+++ b/runtime/interpreter/mterp/out/mterp_arm.S
@@ -1,10 +1,4 @@
-/*
- * This file was generated automatically by gen-mterp.py for 'arm'.
- *
- * --> DO NOT EDIT <--
- */
-
-/* File: arm/header.S */
+/* DO NOT EDIT: This file was generated by gen-mterp.py. */
/*
* Copyright (C) 2016 The Android Open Source Project
*
@@ -317,8 +311,6 @@
.cfi_endproc
.size \name, .-\name
.endm
-
-/* File: arm/entry.S */
/*
* Copyright (C) 2016 The Android Open Source Project
*
@@ -396,18 +388,14 @@
GOTO_OPCODE ip @ jump to next instruction
/* NOTE: no fallthrough */
-/* File: arm/instruction_start.S */
-
.type artMterpAsmInstructionStart, #object
.hidden artMterpAsmInstructionStart
.global artMterpAsmInstructionStart
artMterpAsmInstructionStart = .L_op_nop
.text
-
/* ------------------------------ */
.balign 128
.L_op_nop: /* 0x00 */
-/* File: arm/op_nop.S */
FETCH_ADVANCE_INST 1 @ advance to next instr, load rINST
GET_INST_OPCODE ip @ ip<- opcode from rINST
GOTO_OPCODE ip @ execute it
@@ -415,7 +403,6 @@
/* ------------------------------ */
.balign 128
.L_op_move: /* 0x01 */
-/* File: arm/op_move.S */
/* for move, move-object, long-to-int */
/* op vA, vB */
mov r1, rINST, lsr #12 @ r1<- B from 15:12
@@ -433,7 +420,6 @@
/* ------------------------------ */
.balign 128
.L_op_move_from16: /* 0x02 */
-/* File: arm/op_move_from16.S */
/* for: move/from16, move-object/from16 */
/* op vAA, vBBBB */
FETCH r1, 1 @ r1<- BBBB
@@ -451,7 +437,6 @@
/* ------------------------------ */
.balign 128
.L_op_move_16: /* 0x03 */
-/* File: arm/op_move_16.S */
/* for: move/16, move-object/16 */
/* op vAAAA, vBBBB */
FETCH r1, 2 @ r1<- BBBB
@@ -469,7 +454,6 @@
/* ------------------------------ */
.balign 128
.L_op_move_wide: /* 0x04 */
-/* File: arm/op_move_wide.S */
/* move-wide vA, vB */
/* NOTE: regs can overlap, e.g. "move v6,v7" or "move v7,v6" */
mov r3, rINST, lsr #12 @ r3<- B
@@ -486,7 +470,6 @@
/* ------------------------------ */
.balign 128
.L_op_move_wide_from16: /* 0x05 */
-/* File: arm/op_move_wide_from16.S */
/* move-wide/from16 vAA, vBBBB */
/* NOTE: regs can overlap, e.g. "move v6,v7" or "move v7,v6" */
FETCH r3, 1 @ r3<- BBBB
@@ -503,7 +486,6 @@
/* ------------------------------ */
.balign 128
.L_op_move_wide_16: /* 0x06 */
-/* File: arm/op_move_wide_16.S */
/* move-wide/16 vAAAA, vBBBB */
/* NOTE: regs can overlap, e.g. "move v6,v7" or "move v7,v6" */
FETCH r3, 2 @ r3<- BBBB
@@ -520,8 +502,6 @@
/* ------------------------------ */
.balign 128
.L_op_move_object: /* 0x07 */
-/* File: arm/op_move_object.S */
-/* File: arm/op_move.S */
/* for move, move-object, long-to-int */
/* op vA, vB */
mov r1, rINST, lsr #12 @ r1<- B from 15:12
@@ -536,12 +516,9 @@
.endif
GOTO_OPCODE ip @ execute next instruction
-
/* ------------------------------ */
.balign 128
.L_op_move_object_from16: /* 0x08 */
-/* File: arm/op_move_object_from16.S */
-/* File: arm/op_move_from16.S */
/* for: move/from16, move-object/from16 */
/* op vAA, vBBBB */
FETCH r1, 1 @ r1<- BBBB
@@ -556,12 +533,9 @@
.endif
GOTO_OPCODE ip @ jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_move_object_16: /* 0x09 */
-/* File: arm/op_move_object_16.S */
-/* File: arm/op_move_16.S */
/* for: move/16, move-object/16 */
/* op vAAAA, vBBBB */
FETCH r1, 2 @ r1<- BBBB
@@ -576,11 +550,9 @@
.endif
GOTO_OPCODE ip @ jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_move_result: /* 0x0a */
-/* File: arm/op_move_result.S */
/* for: move-result, move-result-object */
/* op vAA */
mov r2, rINST, lsr #8 @ r2<- AA
@@ -598,7 +570,6 @@
/* ------------------------------ */
.balign 128
.L_op_move_result_wide: /* 0x0b */
-/* File: arm/op_move_result_wide.S */
/* move-result-wide vAA */
mov rINST, rINST, lsr #8 @ rINST<- AA
ldr r3, [rFP, #OFF_FP_RESULT_REGISTER]
@@ -613,8 +584,6 @@
/* ------------------------------ */
.balign 128
.L_op_move_result_object: /* 0x0c */
-/* File: arm/op_move_result_object.S */
-/* File: arm/op_move_result.S */
/* for: move-result, move-result-object */
/* op vAA */
mov r2, rINST, lsr #8 @ r2<- AA
@@ -629,11 +598,9 @@
.endif
GOTO_OPCODE ip @ jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_move_exception: /* 0x0d */
-/* File: arm/op_move_exception.S */
/* move-exception vAA */
mov r2, rINST, lsr #8 @ r2<- AA
ldr r3, [rSELF, #THREAD_EXCEPTION_OFFSET]
@@ -647,7 +614,6 @@
/* ------------------------------ */
.balign 128
.L_op_return_void: /* 0x0e */
-/* File: arm/op_return_void.S */
.extern MterpThreadFenceForConstructor
bl MterpThreadFenceForConstructor
ldr lr, [rSELF, #THREAD_FLAGS_OFFSET]
@@ -661,7 +627,6 @@
/* ------------------------------ */
.balign 128
.L_op_return: /* 0x0f */
-/* File: arm/op_return.S */
/*
* Return a 32-bit value.
*
@@ -682,7 +647,6 @@
/* ------------------------------ */
.balign 128
.L_op_return_wide: /* 0x10 */
-/* File: arm/op_return_wide.S */
/*
* Return a 64-bit value.
*/
@@ -701,8 +665,6 @@
/* ------------------------------ */
.balign 128
.L_op_return_object: /* 0x11 */
-/* File: arm/op_return_object.S */
-/* File: arm/op_return.S */
/*
* Return a 32-bit value.
*
@@ -720,11 +682,9 @@
mov r1, #0
b MterpReturn
-
/* ------------------------------ */
.balign 128
.L_op_const_4: /* 0x12 */
-/* File: arm/op_const_4.S */
/* const/4 vA, #+B */
sbfx r1, rINST, #12, #4 @ r1<- sssssssB (sign-extended)
ubfx r0, rINST, #8, #4 @ r0<- A
@@ -736,7 +696,6 @@
/* ------------------------------ */
.balign 128
.L_op_const_16: /* 0x13 */
-/* File: arm/op_const_16.S */
/* const/16 vAA, #+BBBB */
FETCH_S r0, 1 @ r0<- ssssBBBB (sign-extended)
mov r3, rINST, lsr #8 @ r3<- AA
@@ -748,7 +707,6 @@
/* ------------------------------ */
.balign 128
.L_op_const: /* 0x14 */
-/* File: arm/op_const.S */
/* const vAA, #+BBBBbbbb */
mov r3, rINST, lsr #8 @ r3<- AA
FETCH r0, 1 @ r0<- bbbb (low)
@@ -762,7 +720,6 @@
/* ------------------------------ */
.balign 128
.L_op_const_high16: /* 0x15 */
-/* File: arm/op_const_high16.S */
/* const/high16 vAA, #+BBBB0000 */
FETCH r0, 1 @ r0<- 0000BBBB (zero-extended)
mov r3, rINST, lsr #8 @ r3<- AA
@@ -775,7 +732,6 @@
/* ------------------------------ */
.balign 128
.L_op_const_wide_16: /* 0x16 */
-/* File: arm/op_const_wide_16.S */
/* const-wide/16 vAA, #+BBBB */
FETCH_S r0, 1 @ r0<- ssssBBBB (sign-extended)
mov r3, rINST, lsr #8 @ r3<- AA
@@ -790,7 +746,6 @@
/* ------------------------------ */
.balign 128
.L_op_const_wide_32: /* 0x17 */
-/* File: arm/op_const_wide_32.S */
/* const-wide/32 vAA, #+BBBBbbbb */
FETCH r0, 1 @ r0<- 0000bbbb (low)
mov r3, rINST, lsr #8 @ r3<- AA
@@ -807,7 +762,6 @@
/* ------------------------------ */
.balign 128
.L_op_const_wide: /* 0x18 */
-/* File: arm/op_const_wide.S */
/* const-wide vAA, #+HHHHhhhhBBBBbbbb */
FETCH r0, 1 @ r0<- bbbb (low)
FETCH r1, 2 @ r1<- BBBB (low middle)
@@ -826,7 +780,6 @@
/* ------------------------------ */
.balign 128
.L_op_const_wide_high16: /* 0x19 */
-/* File: arm/op_const_wide_high16.S */
/* const-wide/high16 vAA, #+BBBB000000000000 */
FETCH r1, 1 @ r1<- 0000BBBB (zero-extended)
mov r3, rINST, lsr #8 @ r3<- AA
@@ -842,8 +795,6 @@
/* ------------------------------ */
.balign 128
.L_op_const_string: /* 0x1a */
-/* File: arm/op_const_string.S */
-/* File: arm/const.S */
/* const/class vAA, type@BBBB */
/* const/method-handle vAA, method_handle@BBBB */
/* const/method-type vAA, proto@BBBB */
@@ -862,11 +813,9 @@
GET_INST_OPCODE ip @ extract opcode from rINST
GOTO_OPCODE ip @ jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_const_string_jumbo: /* 0x1b */
-/* File: arm/op_const_string_jumbo.S */
/* const/string vAA, String@BBBBBBBB */
EXPORT_PC
FETCH r0, 1 @ r0<- bbbb (low)
@@ -886,8 +835,6 @@
/* ------------------------------ */
.balign 128
.L_op_const_class: /* 0x1c */
-/* File: arm/op_const_class.S */
-/* File: arm/const.S */
/* const/class vAA, type@BBBB */
/* const/method-handle vAA, method_handle@BBBB */
/* const/method-type vAA, proto@BBBB */
@@ -906,11 +853,9 @@
GET_INST_OPCODE ip @ extract opcode from rINST
GOTO_OPCODE ip @ jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_monitor_enter: /* 0x1d */
-/* File: arm/op_monitor_enter.S */
/*
* Synchronize on an object.
*/
@@ -929,7 +874,6 @@
/* ------------------------------ */
.balign 128
.L_op_monitor_exit: /* 0x1e */
-/* File: arm/op_monitor_exit.S */
/*
* Unlock an object.
*
@@ -952,7 +896,6 @@
/* ------------------------------ */
.balign 128
.L_op_check_cast: /* 0x1f */
-/* File: arm/op_check_cast.S */
/*
* Check to see if a cast from one class to another is allowed.
*/
@@ -974,7 +917,6 @@
/* ------------------------------ */
.balign 128
.L_op_instance_of: /* 0x20 */
-/* File: arm/op_instance_of.S */
/*
* Check to see if an object reference is an instance of a class.
*
@@ -1002,7 +944,6 @@
/* ------------------------------ */
.balign 128
.L_op_array_length: /* 0x21 */
-/* File: arm/op_array_length.S */
/*
* Return the length of an array.
*/
@@ -1020,7 +961,6 @@
/* ------------------------------ */
.balign 128
.L_op_new_instance: /* 0x22 */
-/* File: arm/op_new_instance.S */
/*
* Create a new instance of a class.
*/
@@ -1039,7 +979,6 @@
/* ------------------------------ */
.balign 128
.L_op_new_array: /* 0x23 */
-/* File: arm/op_new_array.S */
/*
* Allocate an array of objects, specified with the array class
* and a count.
@@ -1063,7 +1002,6 @@
/* ------------------------------ */
.balign 128
.L_op_filled_new_array: /* 0x24 */
-/* File: arm/op_filled_new_array.S */
/*
* Create a new array with elements filled from registers.
*
@@ -1086,8 +1024,6 @@
/* ------------------------------ */
.balign 128
.L_op_filled_new_array_range: /* 0x25 */
-/* File: arm/op_filled_new_array_range.S */
-/* File: arm/op_filled_new_array.S */
/*
* Create a new array with elements filled from registers.
*
@@ -1107,11 +1043,9 @@
GET_INST_OPCODE ip @ extract opcode from rINST
GOTO_OPCODE ip @ jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_fill_array_data: /* 0x26 */
-/* File: arm/op_fill_array_data.S */
/* fill-array-data vAA, +BBBBBBBB */
EXPORT_PC
FETCH r0, 1 @ r0<- bbbb (lo)
@@ -1130,7 +1064,6 @@
/* ------------------------------ */
.balign 128
.L_op_throw: /* 0x27 */
-/* File: arm/op_throw.S */
/*
* Throw an exception object in the current thread.
*/
@@ -1146,7 +1079,6 @@
/* ------------------------------ */
.balign 128
.L_op_goto: /* 0x28 */
-/* File: arm/op_goto.S */
/*
* Unconditional branch, 8-bit offset.
*
@@ -1160,7 +1092,6 @@
/* ------------------------------ */
.balign 128
.L_op_goto_16: /* 0x29 */
-/* File: arm/op_goto_16.S */
/*
* Unconditional branch, 16-bit offset.
*
@@ -1174,7 +1105,6 @@
/* ------------------------------ */
.balign 128
.L_op_goto_32: /* 0x2a */
-/* File: arm/op_goto_32.S */
/*
* Unconditional branch, 32-bit offset.
*
@@ -1195,7 +1125,6 @@
/* ------------------------------ */
.balign 128
.L_op_packed_switch: /* 0x2b */
-/* File: arm/op_packed_switch.S */
/*
* Handle a packed-switch or sparse-switch instruction. In both cases
* we decode it and hand it off to a helper function.
@@ -1219,8 +1148,6 @@
/* ------------------------------ */
.balign 128
.L_op_sparse_switch: /* 0x2c */
-/* File: arm/op_sparse_switch.S */
-/* File: arm/op_packed_switch.S */
/*
* Handle a packed-switch or sparse-switch instruction. In both cases
* we decode it and hand it off to a helper function.
@@ -1241,11 +1168,9 @@
movs rINST, r0
b MterpCommonTakenBranch
-
/* ------------------------------ */
.balign 128
.L_op_cmpl_float: /* 0x2d */
-/* File: arm/op_cmpl_float.S */
/*
* Compare two floating-point values. Puts 0, 1, or -1 into the
* destination register based on the results of the comparison.
@@ -1284,7 +1209,6 @@
/* ------------------------------ */
.balign 128
.L_op_cmpg_float: /* 0x2e */
-/* File: arm/op_cmpg_float.S */
/*
* Compare two floating-point values. Puts 0, 1, or -1 into the
* destination register based on the results of the comparison.
@@ -1323,7 +1247,6 @@
/* ------------------------------ */
.balign 128
.L_op_cmpl_double: /* 0x2f */
-/* File: arm/op_cmpl_double.S */
/*
* Compare two floating-point values. Puts 0, 1, or -1 into the
* destination register based on the results of the comparison.
@@ -1362,7 +1285,6 @@
/* ------------------------------ */
.balign 128
.L_op_cmpg_double: /* 0x30 */
-/* File: arm/op_cmpg_double.S */
/*
* Compare two floating-point values. Puts 0, 1, or -1 into the
* destination register based on the results of the comparison.
@@ -1401,7 +1323,6 @@
/* ------------------------------ */
.balign 128
.L_op_cmp_long: /* 0x31 */
-/* File: arm/op_cmp_long.S */
/*
* Compare two 64-bit values. Puts 0, 1, or -1 into the destination
* register based on the results of the comparison.
@@ -1429,8 +1350,6 @@
/* ------------------------------ */
.balign 128
.L_op_if_eq: /* 0x32 */
-/* File: arm/op_if_eq.S */
-/* File: arm/bincmp.S */
/*
* Generic two-operand compare-and-branch operation. Provide a "condition"
* fragment that specifies the comparison to perform.
@@ -1451,12 +1370,9 @@
GET_INST_OPCODE ip @ extract opcode from rINST
GOTO_OPCODE ip @ jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_if_ne: /* 0x33 */
-/* File: arm/op_if_ne.S */
-/* File: arm/bincmp.S */
/*
* Generic two-operand compare-and-branch operation. Provide a "condition"
* fragment that specifies the comparison to perform.
@@ -1477,12 +1393,9 @@
GET_INST_OPCODE ip @ extract opcode from rINST
GOTO_OPCODE ip @ jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_if_lt: /* 0x34 */
-/* File: arm/op_if_lt.S */
-/* File: arm/bincmp.S */
/*
* Generic two-operand compare-and-branch operation. Provide a "condition"
* fragment that specifies the comparison to perform.
@@ -1503,12 +1416,9 @@
GET_INST_OPCODE ip @ extract opcode from rINST
GOTO_OPCODE ip @ jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_if_ge: /* 0x35 */
-/* File: arm/op_if_ge.S */
-/* File: arm/bincmp.S */
/*
* Generic two-operand compare-and-branch operation. Provide a "condition"
* fragment that specifies the comparison to perform.
@@ -1529,12 +1439,9 @@
GET_INST_OPCODE ip @ extract opcode from rINST
GOTO_OPCODE ip @ jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_if_gt: /* 0x36 */
-/* File: arm/op_if_gt.S */
-/* File: arm/bincmp.S */
/*
* Generic two-operand compare-and-branch operation. Provide a "condition"
* fragment that specifies the comparison to perform.
@@ -1555,12 +1462,9 @@
GET_INST_OPCODE ip @ extract opcode from rINST
GOTO_OPCODE ip @ jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_if_le: /* 0x37 */
-/* File: arm/op_if_le.S */
-/* File: arm/bincmp.S */
/*
* Generic two-operand compare-and-branch operation. Provide a "condition"
* fragment that specifies the comparison to perform.
@@ -1581,12 +1485,9 @@
GET_INST_OPCODE ip @ extract opcode from rINST
GOTO_OPCODE ip @ jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_if_eqz: /* 0x38 */
-/* File: arm/op_if_eqz.S */
-/* File: arm/zcmp.S */
/*
* Generic one-operand compare-and-branch operation. Provide a "condition"
* fragment that specifies the comparison to perform.
@@ -1605,12 +1506,9 @@
GET_INST_OPCODE ip @ extract opcode from rINST
GOTO_OPCODE ip @ jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_if_nez: /* 0x39 */
-/* File: arm/op_if_nez.S */
-/* File: arm/zcmp.S */
/*
* Generic one-operand compare-and-branch operation. Provide a "condition"
* fragment that specifies the comparison to perform.
@@ -1629,12 +1527,9 @@
GET_INST_OPCODE ip @ extract opcode from rINST
GOTO_OPCODE ip @ jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_if_ltz: /* 0x3a */
-/* File: arm/op_if_ltz.S */
-/* File: arm/zcmp.S */
/*
* Generic one-operand compare-and-branch operation. Provide a "condition"
* fragment that specifies the comparison to perform.
@@ -1653,12 +1548,9 @@
GET_INST_OPCODE ip @ extract opcode from rINST
GOTO_OPCODE ip @ jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_if_gez: /* 0x3b */
-/* File: arm/op_if_gez.S */
-/* File: arm/zcmp.S */
/*
* Generic one-operand compare-and-branch operation. Provide a "condition"
* fragment that specifies the comparison to perform.
@@ -1677,12 +1569,9 @@
GET_INST_OPCODE ip @ extract opcode from rINST
GOTO_OPCODE ip @ jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_if_gtz: /* 0x3c */
-/* File: arm/op_if_gtz.S */
-/* File: arm/zcmp.S */
/*
* Generic one-operand compare-and-branch operation. Provide a "condition"
* fragment that specifies the comparison to perform.
@@ -1701,12 +1590,9 @@
GET_INST_OPCODE ip @ extract opcode from rINST
GOTO_OPCODE ip @ jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_if_lez: /* 0x3d */
-/* File: arm/op_if_lez.S */
-/* File: arm/zcmp.S */
/*
* Generic one-operand compare-and-branch operation. Provide a "condition"
* fragment that specifies the comparison to perform.
@@ -1725,77 +1611,57 @@
GET_INST_OPCODE ip @ extract opcode from rINST
GOTO_OPCODE ip @ jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_unused_3e: /* 0x3e */
-/* File: arm/op_unused_3e.S */
-/* File: arm/unused.S */
/*
* Bail to reference interpreter to throw.
*/
b MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_3f: /* 0x3f */
-/* File: arm/op_unused_3f.S */
-/* File: arm/unused.S */
/*
* Bail to reference interpreter to throw.
*/
b MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_40: /* 0x40 */
-/* File: arm/op_unused_40.S */
-/* File: arm/unused.S */
/*
* Bail to reference interpreter to throw.
*/
b MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_41: /* 0x41 */
-/* File: arm/op_unused_41.S */
-/* File: arm/unused.S */
/*
* Bail to reference interpreter to throw.
*/
b MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_42: /* 0x42 */
-/* File: arm/op_unused_42.S */
-/* File: arm/unused.S */
/*
* Bail to reference interpreter to throw.
*/
b MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_43: /* 0x43 */
-/* File: arm/op_unused_43.S */
-/* File: arm/unused.S */
/*
* Bail to reference interpreter to throw.
*/
b MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_aget: /* 0x44 */
-/* File: arm/op_aget.S */
/*
* Array get, 32 bits or less. vAA <- vBB[vCC].
*
@@ -1828,7 +1694,6 @@
/* ------------------------------ */
.balign 128
.L_op_aget_wide: /* 0x45 */
-/* File: arm/op_aget_wide.S */
/*
* Array get, 64 bits. vAA <- vBB[vCC].
*
@@ -1858,7 +1723,6 @@
/* ------------------------------ */
.balign 128
.L_op_aget_object: /* 0x46 */
-/* File: arm/op_aget_object.S */
/*
* Array object get. vAA <- vBB[vCC].
*
@@ -1884,8 +1748,6 @@
/* ------------------------------ */
.balign 128
.L_op_aget_boolean: /* 0x47 */
-/* File: arm/op_aget_boolean.S */
-/* File: arm/op_aget.S */
/*
* Array get, 32 bits or less. vAA <- vBB[vCC].
*
@@ -1915,12 +1777,9 @@
SET_VREG r2, r9 @ vAA<- r2
GOTO_OPCODE ip @ jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_aget_byte: /* 0x48 */
-/* File: arm/op_aget_byte.S */
-/* File: arm/op_aget.S */
/*
* Array get, 32 bits or less. vAA <- vBB[vCC].
*
@@ -1950,12 +1809,9 @@
SET_VREG r2, r9 @ vAA<- r2
GOTO_OPCODE ip @ jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_aget_char: /* 0x49 */
-/* File: arm/op_aget_char.S */
-/* File: arm/op_aget.S */
/*
* Array get, 32 bits or less. vAA <- vBB[vCC].
*
@@ -1985,12 +1841,9 @@
SET_VREG r2, r9 @ vAA<- r2
GOTO_OPCODE ip @ jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_aget_short: /* 0x4a */
-/* File: arm/op_aget_short.S */
-/* File: arm/op_aget.S */
/*
* Array get, 32 bits or less. vAA <- vBB[vCC].
*
@@ -2020,11 +1873,9 @@
SET_VREG r2, r9 @ vAA<- r2
GOTO_OPCODE ip @ jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_aput: /* 0x4b */
-/* File: arm/op_aput.S */
/*
* Array put, 32 bits or less. vBB[vCC] <- vAA.
*
@@ -2057,7 +1908,6 @@
/* ------------------------------ */
.balign 128
.L_op_aput_wide: /* 0x4c */
-/* File: arm/op_aput_wide.S */
/*
* Array put, 64 bits. vBB[vCC] <- vAA.
*
@@ -2086,7 +1936,6 @@
/* ------------------------------ */
.balign 128
.L_op_aput_object: /* 0x4d */
-/* File: arm/op_aput_object.S */
/*
* Store an object into an array. vBB[vCC] <- vAA.
*/
@@ -2105,8 +1954,6 @@
/* ------------------------------ */
.balign 128
.L_op_aput_boolean: /* 0x4e */
-/* File: arm/op_aput_boolean.S */
-/* File: arm/op_aput.S */
/*
* Array put, 32 bits or less. vBB[vCC] <- vAA.
*
@@ -2136,12 +1983,9 @@
strb r2, [r0, #MIRROR_BOOLEAN_ARRAY_DATA_OFFSET] @ vBB[vCC]<- r2
GOTO_OPCODE ip @ jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_aput_byte: /* 0x4f */
-/* File: arm/op_aput_byte.S */
-/* File: arm/op_aput.S */
/*
* Array put, 32 bits or less. vBB[vCC] <- vAA.
*
@@ -2171,12 +2015,9 @@
strb r2, [r0, #MIRROR_BYTE_ARRAY_DATA_OFFSET] @ vBB[vCC]<- r2
GOTO_OPCODE ip @ jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_aput_char: /* 0x50 */
-/* File: arm/op_aput_char.S */
-/* File: arm/op_aput.S */
/*
* Array put, 32 bits or less. vBB[vCC] <- vAA.
*
@@ -2206,12 +2047,9 @@
strh r2, [r0, #MIRROR_CHAR_ARRAY_DATA_OFFSET] @ vBB[vCC]<- r2
GOTO_OPCODE ip @ jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_aput_short: /* 0x51 */
-/* File: arm/op_aput_short.S */
-/* File: arm/op_aput.S */
/*
* Array put, 32 bits or less. vBB[vCC] <- vAA.
*
@@ -2241,12 +2079,9 @@
strh r2, [r0, #MIRROR_SHORT_ARRAY_DATA_OFFSET] @ vBB[vCC]<- r2
GOTO_OPCODE ip @ jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_iget: /* 0x52 */
-/* File: arm/op_iget.S */
-/* File: arm/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2263,13 +2098,9 @@
GET_INST_OPCODE ip @ extract opcode from rINST
GOTO_OPCODE ip @ jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_iget_wide: /* 0x53 */
-/* File: arm/op_iget_wide.S */
-/* File: arm/op_iget.S */
-/* File: arm/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2286,14 +2117,9 @@
GET_INST_OPCODE ip @ extract opcode from rINST
GOTO_OPCODE ip @ jump to next instruction
-
-
/* ------------------------------ */
.balign 128
.L_op_iget_object: /* 0x54 */
-/* File: arm/op_iget_object.S */
-/* File: arm/op_iget.S */
-/* File: arm/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2310,14 +2136,9 @@
GET_INST_OPCODE ip @ extract opcode from rINST
GOTO_OPCODE ip @ jump to next instruction
-
-
/* ------------------------------ */
.balign 128
.L_op_iget_boolean: /* 0x55 */
-/* File: arm/op_iget_boolean.S */
-/* File: arm/op_iget.S */
-/* File: arm/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2334,14 +2155,9 @@
GET_INST_OPCODE ip @ extract opcode from rINST
GOTO_OPCODE ip @ jump to next instruction
-
-
/* ------------------------------ */
.balign 128
.L_op_iget_byte: /* 0x56 */
-/* File: arm/op_iget_byte.S */
-/* File: arm/op_iget.S */
-/* File: arm/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2358,14 +2174,9 @@
GET_INST_OPCODE ip @ extract opcode from rINST
GOTO_OPCODE ip @ jump to next instruction
-
-
/* ------------------------------ */
.balign 128
.L_op_iget_char: /* 0x57 */
-/* File: arm/op_iget_char.S */
-/* File: arm/op_iget.S */
-/* File: arm/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2382,14 +2193,9 @@
GET_INST_OPCODE ip @ extract opcode from rINST
GOTO_OPCODE ip @ jump to next instruction
-
-
/* ------------------------------ */
.balign 128
.L_op_iget_short: /* 0x58 */
-/* File: arm/op_iget_short.S */
-/* File: arm/op_iget.S */
-/* File: arm/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2406,13 +2212,9 @@
GET_INST_OPCODE ip @ extract opcode from rINST
GOTO_OPCODE ip @ jump to next instruction
-
-
/* ------------------------------ */
.balign 128
.L_op_iput: /* 0x59 */
-/* File: arm/op_iput.S */
-/* File: arm/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2429,13 +2231,9 @@
GET_INST_OPCODE ip @ extract opcode from rINST
GOTO_OPCODE ip @ jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_iput_wide: /* 0x5a */
-/* File: arm/op_iput_wide.S */
-/* File: arm/op_iput.S */
-/* File: arm/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2452,14 +2250,9 @@
GET_INST_OPCODE ip @ extract opcode from rINST
GOTO_OPCODE ip @ jump to next instruction
-
-
/* ------------------------------ */
.balign 128
.L_op_iput_object: /* 0x5b */
-/* File: arm/op_iput_object.S */
-/* File: arm/op_iput.S */
-/* File: arm/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2476,14 +2269,9 @@
GET_INST_OPCODE ip @ extract opcode from rINST
GOTO_OPCODE ip @ jump to next instruction
-
-
/* ------------------------------ */
.balign 128
.L_op_iput_boolean: /* 0x5c */
-/* File: arm/op_iput_boolean.S */
-/* File: arm/op_iput.S */
-/* File: arm/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2500,14 +2288,9 @@
GET_INST_OPCODE ip @ extract opcode from rINST
GOTO_OPCODE ip @ jump to next instruction
-
-
/* ------------------------------ */
.balign 128
.L_op_iput_byte: /* 0x5d */
-/* File: arm/op_iput_byte.S */
-/* File: arm/op_iput.S */
-/* File: arm/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2524,14 +2307,9 @@
GET_INST_OPCODE ip @ extract opcode from rINST
GOTO_OPCODE ip @ jump to next instruction
-
-
/* ------------------------------ */
.balign 128
.L_op_iput_char: /* 0x5e */
-/* File: arm/op_iput_char.S */
-/* File: arm/op_iput.S */
-/* File: arm/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2548,14 +2326,9 @@
GET_INST_OPCODE ip @ extract opcode from rINST
GOTO_OPCODE ip @ jump to next instruction
-
-
/* ------------------------------ */
.balign 128
.L_op_iput_short: /* 0x5f */
-/* File: arm/op_iput_short.S */
-/* File: arm/op_iput.S */
-/* File: arm/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2572,13 +2345,9 @@
GET_INST_OPCODE ip @ extract opcode from rINST
GOTO_OPCODE ip @ jump to next instruction
-
-
/* ------------------------------ */
.balign 128
.L_op_sget: /* 0x60 */
-/* File: arm/op_sget.S */
-/* File: arm/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2595,13 +2364,9 @@
GET_INST_OPCODE ip @ extract opcode from rINST
GOTO_OPCODE ip @ jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_sget_wide: /* 0x61 */
-/* File: arm/op_sget_wide.S */
-/* File: arm/op_sget.S */
-/* File: arm/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2618,14 +2383,9 @@
GET_INST_OPCODE ip @ extract opcode from rINST
GOTO_OPCODE ip @ jump to next instruction
-
-
/* ------------------------------ */
.balign 128
.L_op_sget_object: /* 0x62 */
-/* File: arm/op_sget_object.S */
-/* File: arm/op_sget.S */
-/* File: arm/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2642,14 +2402,9 @@
GET_INST_OPCODE ip @ extract opcode from rINST
GOTO_OPCODE ip @ jump to next instruction
-
-
/* ------------------------------ */
.balign 128
.L_op_sget_boolean: /* 0x63 */
-/* File: arm/op_sget_boolean.S */
-/* File: arm/op_sget.S */
-/* File: arm/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2666,14 +2421,9 @@
GET_INST_OPCODE ip @ extract opcode from rINST
GOTO_OPCODE ip @ jump to next instruction
-
-
/* ------------------------------ */
.balign 128
.L_op_sget_byte: /* 0x64 */
-/* File: arm/op_sget_byte.S */
-/* File: arm/op_sget.S */
-/* File: arm/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2690,14 +2440,9 @@
GET_INST_OPCODE ip @ extract opcode from rINST
GOTO_OPCODE ip @ jump to next instruction
-
-
/* ------------------------------ */
.balign 128
.L_op_sget_char: /* 0x65 */
-/* File: arm/op_sget_char.S */
-/* File: arm/op_sget.S */
-/* File: arm/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2714,14 +2459,9 @@
GET_INST_OPCODE ip @ extract opcode from rINST
GOTO_OPCODE ip @ jump to next instruction
-
-
/* ------------------------------ */
.balign 128
.L_op_sget_short: /* 0x66 */
-/* File: arm/op_sget_short.S */
-/* File: arm/op_sget.S */
-/* File: arm/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2738,13 +2478,9 @@
GET_INST_OPCODE ip @ extract opcode from rINST
GOTO_OPCODE ip @ jump to next instruction
-
-
/* ------------------------------ */
.balign 128
.L_op_sput: /* 0x67 */
-/* File: arm/op_sput.S */
-/* File: arm/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2761,13 +2497,9 @@
GET_INST_OPCODE ip @ extract opcode from rINST
GOTO_OPCODE ip @ jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_sput_wide: /* 0x68 */
-/* File: arm/op_sput_wide.S */
-/* File: arm/op_sput.S */
-/* File: arm/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2784,14 +2516,9 @@
GET_INST_OPCODE ip @ extract opcode from rINST
GOTO_OPCODE ip @ jump to next instruction
-
-
/* ------------------------------ */
.balign 128
.L_op_sput_object: /* 0x69 */
-/* File: arm/op_sput_object.S */
-/* File: arm/op_sput.S */
-/* File: arm/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2808,14 +2535,9 @@
GET_INST_OPCODE ip @ extract opcode from rINST
GOTO_OPCODE ip @ jump to next instruction
-
-
/* ------------------------------ */
.balign 128
.L_op_sput_boolean: /* 0x6a */
-/* File: arm/op_sput_boolean.S */
-/* File: arm/op_sput.S */
-/* File: arm/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2832,14 +2554,9 @@
GET_INST_OPCODE ip @ extract opcode from rINST
GOTO_OPCODE ip @ jump to next instruction
-
-
/* ------------------------------ */
.balign 128
.L_op_sput_byte: /* 0x6b */
-/* File: arm/op_sput_byte.S */
-/* File: arm/op_sput.S */
-/* File: arm/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2856,14 +2573,9 @@
GET_INST_OPCODE ip @ extract opcode from rINST
GOTO_OPCODE ip @ jump to next instruction
-
-
/* ------------------------------ */
.balign 128
.L_op_sput_char: /* 0x6c */
-/* File: arm/op_sput_char.S */
-/* File: arm/op_sput.S */
-/* File: arm/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2880,14 +2592,9 @@
GET_INST_OPCODE ip @ extract opcode from rINST
GOTO_OPCODE ip @ jump to next instruction
-
-
/* ------------------------------ */
.balign 128
.L_op_sput_short: /* 0x6d */
-/* File: arm/op_sput_short.S */
-/* File: arm/op_sput.S */
-/* File: arm/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2904,13 +2611,9 @@
GET_INST_OPCODE ip @ extract opcode from rINST
GOTO_OPCODE ip @ jump to next instruction
-
-
/* ------------------------------ */
.balign 128
.L_op_invoke_virtual: /* 0x6e */
-/* File: arm/op_invoke_virtual.S */
-/* File: arm/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -2932,7 +2635,6 @@
GET_INST_OPCODE ip
GOTO_OPCODE ip
-
/*
* Handle a virtual method call.
*
@@ -2944,8 +2646,6 @@
/* ------------------------------ */
.balign 128
.L_op_invoke_super: /* 0x6f */
-/* File: arm/op_invoke_super.S */
-/* File: arm/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -2967,7 +2667,6 @@
GET_INST_OPCODE ip
GOTO_OPCODE ip
-
/*
* Handle a "super" method call.
*
@@ -2979,8 +2678,6 @@
/* ------------------------------ */
.balign 128
.L_op_invoke_direct: /* 0x70 */
-/* File: arm/op_invoke_direct.S */
-/* File: arm/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -3002,13 +2699,9 @@
GET_INST_OPCODE ip
GOTO_OPCODE ip
-
-
/* ------------------------------ */
.balign 128
.L_op_invoke_static: /* 0x71 */
-/* File: arm/op_invoke_static.S */
-/* File: arm/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -3030,14 +2723,9 @@
GET_INST_OPCODE ip
GOTO_OPCODE ip
-
-
-
/* ------------------------------ */
.balign 128
.L_op_invoke_interface: /* 0x72 */
-/* File: arm/op_invoke_interface.S */
-/* File: arm/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -3059,7 +2747,6 @@
GET_INST_OPCODE ip
GOTO_OPCODE ip
-
/*
* Handle an interface method call.
*
@@ -3071,7 +2758,6 @@
/* ------------------------------ */
.balign 128
.L_op_return_void_no_barrier: /* 0x73 */
-/* File: arm/op_return_void_no_barrier.S */
ldr lr, [rSELF, #THREAD_FLAGS_OFFSET]
mov r0, rSELF
ands lr, #THREAD_SUSPEND_OR_CHECKPOINT_REQUEST
@@ -3083,8 +2769,6 @@
/* ------------------------------ */
.balign 128
.L_op_invoke_virtual_range: /* 0x74 */
-/* File: arm/op_invoke_virtual_range.S */
-/* File: arm/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -3106,13 +2790,9 @@
GET_INST_OPCODE ip
GOTO_OPCODE ip
-
-
/* ------------------------------ */
.balign 128
.L_op_invoke_super_range: /* 0x75 */
-/* File: arm/op_invoke_super_range.S */
-/* File: arm/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -3134,13 +2814,9 @@
GET_INST_OPCODE ip
GOTO_OPCODE ip
-
-
/* ------------------------------ */
.balign 128
.L_op_invoke_direct_range: /* 0x76 */
-/* File: arm/op_invoke_direct_range.S */
-/* File: arm/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -3162,13 +2838,9 @@
GET_INST_OPCODE ip
GOTO_OPCODE ip
-
-
/* ------------------------------ */
.balign 128
.L_op_invoke_static_range: /* 0x77 */
-/* File: arm/op_invoke_static_range.S */
-/* File: arm/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -3190,13 +2862,9 @@
GET_INST_OPCODE ip
GOTO_OPCODE ip
-
-
/* ------------------------------ */
.balign 128
.L_op_invoke_interface_range: /* 0x78 */
-/* File: arm/op_invoke_interface_range.S */
-/* File: arm/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -3218,35 +2886,25 @@
GET_INST_OPCODE ip
GOTO_OPCODE ip
-
-
/* ------------------------------ */
.balign 128
.L_op_unused_79: /* 0x79 */
-/* File: arm/op_unused_79.S */
-/* File: arm/unused.S */
/*
* Bail to reference interpreter to throw.
*/
b MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_7a: /* 0x7a */
-/* File: arm/op_unused_7a.S */
-/* File: arm/unused.S */
/*
* Bail to reference interpreter to throw.
*/
b MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_neg_int: /* 0x7b */
-/* File: arm/op_neg_int.S */
-/* File: arm/unop.S */
/*
* Generic 32-bit unary operation. Provide an "instr" line that
* specifies an instruction that performs "result = op r0".
@@ -3267,12 +2925,9 @@
GOTO_OPCODE ip @ jump to next instruction
/* 8-9 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_not_int: /* 0x7c */
-/* File: arm/op_not_int.S */
-/* File: arm/unop.S */
/*
* Generic 32-bit unary operation. Provide an "instr" line that
* specifies an instruction that performs "result = op r0".
@@ -3293,12 +2948,9 @@
GOTO_OPCODE ip @ jump to next instruction
/* 8-9 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_neg_long: /* 0x7d */
-/* File: arm/op_neg_long.S */
-/* File: arm/unopWide.S */
/*
* Generic 64-bit unary operation. Provide an "instr" line that
* specifies an instruction that performs "result = op r0/r1".
@@ -3321,12 +2973,9 @@
GOTO_OPCODE ip @ jump to next instruction
/* 10-11 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_not_long: /* 0x7e */
-/* File: arm/op_not_long.S */
-/* File: arm/unopWide.S */
/*
* Generic 64-bit unary operation. Provide an "instr" line that
* specifies an instruction that performs "result = op r0/r1".
@@ -3349,12 +2998,9 @@
GOTO_OPCODE ip @ jump to next instruction
/* 10-11 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_neg_float: /* 0x7f */
-/* File: arm/op_neg_float.S */
-/* File: arm/unop.S */
/*
* Generic 32-bit unary operation. Provide an "instr" line that
* specifies an instruction that performs "result = op r0".
@@ -3375,12 +3021,9 @@
GOTO_OPCODE ip @ jump to next instruction
/* 8-9 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_neg_double: /* 0x80 */
-/* File: arm/op_neg_double.S */
-/* File: arm/unopWide.S */
/*
* Generic 64-bit unary operation. Provide an "instr" line that
* specifies an instruction that performs "result = op r0/r1".
@@ -3403,12 +3046,9 @@
GOTO_OPCODE ip @ jump to next instruction
/* 10-11 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_int_to_long: /* 0x81 */
-/* File: arm/op_int_to_long.S */
-/* File: arm/unopWider.S */
/*
* Generic 32bit-to-64bit unary operation. Provide an "instr" line
* that specifies an instruction that performs "result = op r0", where
@@ -3430,12 +3070,9 @@
GOTO_OPCODE ip @ jump to next instruction
/* 9-10 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_int_to_float: /* 0x82 */
-/* File: arm/op_int_to_float.S */
-/* File: arm/funop.S */
/*
* Generic 32-bit unary floating-point operation. Provide an "instr"
* line that specifies an instruction that performs "s1 = op s0".
@@ -3454,12 +3091,9 @@
fsts s1, [r9] @ vA<- s1
GOTO_OPCODE ip @ jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_int_to_double: /* 0x83 */
-/* File: arm/op_int_to_double.S */
-/* File: arm/funopWider.S */
/*
* Generic 32bit-to-64bit floating point unary operation. Provide an
* "instr" line that specifies an instruction that performs "d0 = op s0".
@@ -3479,13 +3113,10 @@
fstd d0, [r9] @ vA<- d0
GOTO_OPCODE ip @ jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_long_to_int: /* 0x84 */
-/* File: arm/op_long_to_int.S */
/* we ignore the high word, making this equivalent to a 32-bit reg move */
-/* File: arm/op_move.S */
/* for move, move-object, long-to-int */
/* op vA, vB */
mov r1, rINST, lsr #12 @ r1<- B from 15:12
@@ -3500,12 +3131,9 @@
.endif
GOTO_OPCODE ip @ execute next instruction
-
/* ------------------------------ */
.balign 128
.L_op_long_to_float: /* 0x85 */
-/* File: arm/op_long_to_float.S */
-/* File: arm/unopNarrower.S */
/*
* Generic 64bit-to-32bit unary operation. Provide an "instr" line
* that specifies an instruction that performs "result = op r0/r1", where
@@ -3529,11 +3157,9 @@
GOTO_OPCODE ip @ jump to next instruction
/* 9-10 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_long_to_double: /* 0x86 */
-/* File: arm/op_long_to_double.S */
/*
* Specialised 64-bit floating point operation.
*
@@ -3564,8 +3190,6 @@
/* ------------------------------ */
.balign 128
.L_op_float_to_int: /* 0x87 */
-/* File: arm/op_float_to_int.S */
-/* File: arm/funop.S */
/*
* Generic 32-bit unary floating-point operation. Provide an "instr"
* line that specifies an instruction that performs "s1 = op s0".
@@ -3584,12 +3208,9 @@
fsts s1, [r9] @ vA<- s1
GOTO_OPCODE ip @ jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_float_to_long: /* 0x88 */
-/* File: arm/op_float_to_long.S */
-/* File: arm/unopWider.S */
/*
* Generic 32bit-to-64bit unary operation. Provide an "instr" line
* that specifies an instruction that performs "result = op r0", where
@@ -3611,13 +3232,9 @@
GOTO_OPCODE ip @ jump to next instruction
/* 9-10 instructions */
-
-
/* ------------------------------ */
.balign 128
.L_op_float_to_double: /* 0x89 */
-/* File: arm/op_float_to_double.S */
-/* File: arm/funopWider.S */
/*
* Generic 32bit-to-64bit floating point unary operation. Provide an
* "instr" line that specifies an instruction that performs "d0 = op s0".
@@ -3637,12 +3254,9 @@
fstd d0, [r9] @ vA<- d0
GOTO_OPCODE ip @ jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_double_to_int: /* 0x8a */
-/* File: arm/op_double_to_int.S */
-/* File: arm/funopNarrower.S */
/*
* Generic 64bit-to-32bit unary floating point operation. Provide an
* "instr" line that specifies an instruction that performs "s0 = op d0".
@@ -3661,12 +3275,9 @@
fsts s0, [r9] @ vA<- s0
GOTO_OPCODE ip @ jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_double_to_long: /* 0x8b */
-/* File: arm/op_double_to_long.S */
-/* File: arm/unopWide.S */
/*
* Generic 64-bit unary operation. Provide an "instr" line that
* specifies an instruction that performs "result = op r0/r1".
@@ -3689,13 +3300,9 @@
GOTO_OPCODE ip @ jump to next instruction
/* 10-11 instructions */
-
-
/* ------------------------------ */
.balign 128
.L_op_double_to_float: /* 0x8c */
-/* File: arm/op_double_to_float.S */
-/* File: arm/funopNarrower.S */
/*
* Generic 64bit-to-32bit unary floating point operation. Provide an
* "instr" line that specifies an instruction that performs "s0 = op d0".
@@ -3714,12 +3321,9 @@
fsts s0, [r9] @ vA<- s0
GOTO_OPCODE ip @ jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_int_to_byte: /* 0x8d */
-/* File: arm/op_int_to_byte.S */
-/* File: arm/unop.S */
/*
* Generic 32-bit unary operation. Provide an "instr" line that
* specifies an instruction that performs "result = op r0".
@@ -3740,12 +3344,9 @@
GOTO_OPCODE ip @ jump to next instruction
/* 8-9 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_int_to_char: /* 0x8e */
-/* File: arm/op_int_to_char.S */
-/* File: arm/unop.S */
/*
* Generic 32-bit unary operation. Provide an "instr" line that
* specifies an instruction that performs "result = op r0".
@@ -3766,12 +3367,9 @@
GOTO_OPCODE ip @ jump to next instruction
/* 8-9 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_int_to_short: /* 0x8f */
-/* File: arm/op_int_to_short.S */
-/* File: arm/unop.S */
/*
* Generic 32-bit unary operation. Provide an "instr" line that
* specifies an instruction that performs "result = op r0".
@@ -3792,12 +3390,9 @@
GOTO_OPCODE ip @ jump to next instruction
/* 8-9 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_add_int: /* 0x90 */
-/* File: arm/op_add_int.S */
-/* File: arm/binop.S */
/*
* Generic 32-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = r0 op r1".
@@ -3833,12 +3428,9 @@
GOTO_OPCODE ip @ jump to next instruction
/* 11-14 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_sub_int: /* 0x91 */
-/* File: arm/op_sub_int.S */
-/* File: arm/binop.S */
/*
* Generic 32-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = r0 op r1".
@@ -3874,13 +3466,10 @@
GOTO_OPCODE ip @ jump to next instruction
/* 11-14 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_mul_int: /* 0x92 */
-/* File: arm/op_mul_int.S */
/* must be "mul r0, r1, r0" -- "r0, r0, r1" is illegal */
-/* File: arm/binop.S */
/*
* Generic 32-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = r0 op r1".
@@ -3916,11 +3505,9 @@
GOTO_OPCODE ip @ jump to next instruction
/* 11-14 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_div_int: /* 0x93 */
-/* File: arm/op_div_int.S */
/*
* Specialized 32-bit binary operation
*
@@ -3954,7 +3541,6 @@
/* ------------------------------ */
.balign 128
.L_op_rem_int: /* 0x94 */
-/* File: arm/op_rem_int.S */
/*
* Specialized 32-bit binary operation
*
@@ -3991,8 +3577,6 @@
/* ------------------------------ */
.balign 128
.L_op_and_int: /* 0x95 */
-/* File: arm/op_and_int.S */
-/* File: arm/binop.S */
/*
* Generic 32-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = r0 op r1".
@@ -4028,12 +3612,9 @@
GOTO_OPCODE ip @ jump to next instruction
/* 11-14 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_or_int: /* 0x96 */
-/* File: arm/op_or_int.S */
-/* File: arm/binop.S */
/*
* Generic 32-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = r0 op r1".
@@ -4069,12 +3650,9 @@
GOTO_OPCODE ip @ jump to next instruction
/* 11-14 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_xor_int: /* 0x97 */
-/* File: arm/op_xor_int.S */
-/* File: arm/binop.S */
/*
* Generic 32-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = r0 op r1".
@@ -4110,12 +3688,9 @@
GOTO_OPCODE ip @ jump to next instruction
/* 11-14 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_shl_int: /* 0x98 */
-/* File: arm/op_shl_int.S */
-/* File: arm/binop.S */
/*
* Generic 32-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = r0 op r1".
@@ -4151,12 +3726,9 @@
GOTO_OPCODE ip @ jump to next instruction
/* 11-14 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_shr_int: /* 0x99 */
-/* File: arm/op_shr_int.S */
-/* File: arm/binop.S */
/*
* Generic 32-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = r0 op r1".
@@ -4192,12 +3764,9 @@
GOTO_OPCODE ip @ jump to next instruction
/* 11-14 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_ushr_int: /* 0x9a */
-/* File: arm/op_ushr_int.S */
-/* File: arm/binop.S */
/*
* Generic 32-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = r0 op r1".
@@ -4233,12 +3802,9 @@
GOTO_OPCODE ip @ jump to next instruction
/* 11-14 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_add_long: /* 0x9b */
-/* File: arm/op_add_long.S */
-/* File: arm/binopWide.S */
/*
* Generic 64-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = r0-r1 op r2-r3".
@@ -4277,12 +3843,9 @@
GOTO_OPCODE ip @ jump to next instruction
/* 14-17 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_sub_long: /* 0x9c */
-/* File: arm/op_sub_long.S */
-/* File: arm/binopWide.S */
/*
* Generic 64-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = r0-r1 op r2-r3".
@@ -4321,11 +3884,9 @@
GOTO_OPCODE ip @ jump to next instruction
/* 14-17 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_mul_long: /* 0x9d */
-/* File: arm/op_mul_long.S */
/*
* Signed 64-bit integer multiply.
*
@@ -4367,8 +3928,6 @@
/* ------------------------------ */
.balign 128
.L_op_div_long: /* 0x9e */
-/* File: arm/op_div_long.S */
-/* File: arm/binopWide.S */
/*
* Generic 64-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = r0-r1 op r2-r3".
@@ -4407,13 +3966,10 @@
GOTO_OPCODE ip @ jump to next instruction
/* 14-17 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_rem_long: /* 0x9f */
-/* File: arm/op_rem_long.S */
/* ldivmod returns quotient in r0/r1 and remainder in r2/r3 */
-/* File: arm/binopWide.S */
/*
* Generic 64-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = r0-r1 op r2-r3".
@@ -4452,12 +4008,9 @@
GOTO_OPCODE ip @ jump to next instruction
/* 14-17 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_and_long: /* 0xa0 */
-/* File: arm/op_and_long.S */
-/* File: arm/binopWide.S */
/*
* Generic 64-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = r0-r1 op r2-r3".
@@ -4496,12 +4049,9 @@
GOTO_OPCODE ip @ jump to next instruction
/* 14-17 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_or_long: /* 0xa1 */
-/* File: arm/op_or_long.S */
-/* File: arm/binopWide.S */
/*
* Generic 64-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = r0-r1 op r2-r3".
@@ -4540,12 +4090,9 @@
GOTO_OPCODE ip @ jump to next instruction
/* 14-17 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_xor_long: /* 0xa2 */
-/* File: arm/op_xor_long.S */
-/* File: arm/binopWide.S */
/*
* Generic 64-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = r0-r1 op r2-r3".
@@ -4584,11 +4131,9 @@
GOTO_OPCODE ip @ jump to next instruction
/* 14-17 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_shl_long: /* 0xa3 */
-/* File: arm/op_shl_long.S */
/*
* Long integer shift. This is different from the generic 32/64-bit
* binary operations because vAA/vBB are 64-bit but vCC (the shift
@@ -4620,7 +4165,6 @@
/* ------------------------------ */
.balign 128
.L_op_shr_long: /* 0xa4 */
-/* File: arm/op_shr_long.S */
/*
* Long integer shift. This is different from the generic 32/64-bit
* binary operations because vAA/vBB are 64-bit but vCC (the shift
@@ -4652,7 +4196,6 @@
/* ------------------------------ */
.balign 128
.L_op_ushr_long: /* 0xa5 */
-/* File: arm/op_ushr_long.S */
/*
* Long integer shift. This is different from the generic 32/64-bit
* binary operations because vAA/vBB are 64-bit but vCC (the shift
@@ -4684,8 +4227,6 @@
/* ------------------------------ */
.balign 128
.L_op_add_float: /* 0xa6 */
-/* File: arm/op_add_float.S */
-/* File: arm/fbinop.S */
/*
* Generic 32-bit floating-point operation. Provide an "instr" line that
* specifies an instruction that performs "s2 = s0 op s1". Because we
@@ -4710,12 +4251,9 @@
fsts s2, [r9] @ vAA<- s2
GOTO_OPCODE ip @ jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_sub_float: /* 0xa7 */
-/* File: arm/op_sub_float.S */
-/* File: arm/fbinop.S */
/*
* Generic 32-bit floating-point operation. Provide an "instr" line that
* specifies an instruction that performs "s2 = s0 op s1". Because we
@@ -4740,12 +4278,9 @@
fsts s2, [r9] @ vAA<- s2
GOTO_OPCODE ip @ jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_mul_float: /* 0xa8 */
-/* File: arm/op_mul_float.S */
-/* File: arm/fbinop.S */
/*
* Generic 32-bit floating-point operation. Provide an "instr" line that
* specifies an instruction that performs "s2 = s0 op s1". Because we
@@ -4770,12 +4305,9 @@
fsts s2, [r9] @ vAA<- s2
GOTO_OPCODE ip @ jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_div_float: /* 0xa9 */
-/* File: arm/op_div_float.S */
-/* File: arm/fbinop.S */
/*
* Generic 32-bit floating-point operation. Provide an "instr" line that
* specifies an instruction that performs "s2 = s0 op s1". Because we
@@ -4800,13 +4332,10 @@
fsts s2, [r9] @ vAA<- s2
GOTO_OPCODE ip @ jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_rem_float: /* 0xaa */
-/* File: arm/op_rem_float.S */
/* EABI doesn't define a float remainder function, but libm does */
-/* File: arm/binop.S */
/*
* Generic 32-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = r0 op r1".
@@ -4842,12 +4371,9 @@
GOTO_OPCODE ip @ jump to next instruction
/* 11-14 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_add_double: /* 0xab */
-/* File: arm/op_add_double.S */
-/* File: arm/fbinopWide.S */
/*
* Generic 64-bit double-precision floating point binary operation.
* Provide an "instr" line that specifies an instruction that performs
@@ -4872,12 +4398,9 @@
fstd d2, [r9] @ vAA<- d2
GOTO_OPCODE ip @ jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_sub_double: /* 0xac */
-/* File: arm/op_sub_double.S */
-/* File: arm/fbinopWide.S */
/*
* Generic 64-bit double-precision floating point binary operation.
* Provide an "instr" line that specifies an instruction that performs
@@ -4902,12 +4425,9 @@
fstd d2, [r9] @ vAA<- d2
GOTO_OPCODE ip @ jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_mul_double: /* 0xad */
-/* File: arm/op_mul_double.S */
-/* File: arm/fbinopWide.S */
/*
* Generic 64-bit double-precision floating point binary operation.
* Provide an "instr" line that specifies an instruction that performs
@@ -4932,12 +4452,9 @@
fstd d2, [r9] @ vAA<- d2
GOTO_OPCODE ip @ jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_div_double: /* 0xae */
-/* File: arm/op_div_double.S */
-/* File: arm/fbinopWide.S */
/*
* Generic 64-bit double-precision floating point binary operation.
* Provide an "instr" line that specifies an instruction that performs
@@ -4962,13 +4479,10 @@
fstd d2, [r9] @ vAA<- d2
GOTO_OPCODE ip @ jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_rem_double: /* 0xaf */
-/* File: arm/op_rem_double.S */
/* EABI doesn't define a double remainder function, but libm does */
-/* File: arm/binopWide.S */
/*
* Generic 64-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = r0-r1 op r2-r3".
@@ -5007,12 +4521,9 @@
GOTO_OPCODE ip @ jump to next instruction
/* 14-17 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_add_int_2addr: /* 0xb0 */
-/* File: arm/op_add_int_2addr.S */
-/* File: arm/binop2addr.S */
/*
* Generic 32-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = r0 op r1".
@@ -5045,12 +4556,9 @@
GOTO_OPCODE ip @ jump to next instruction
/* 10-13 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_sub_int_2addr: /* 0xb1 */
-/* File: arm/op_sub_int_2addr.S */
-/* File: arm/binop2addr.S */
/*
* Generic 32-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = r0 op r1".
@@ -5083,13 +4591,10 @@
GOTO_OPCODE ip @ jump to next instruction
/* 10-13 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_mul_int_2addr: /* 0xb2 */
-/* File: arm/op_mul_int_2addr.S */
/* must be "mul r0, r1, r0" -- "r0, r0, r1" is illegal */
-/* File: arm/binop2addr.S */
/*
* Generic 32-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = r0 op r1".
@@ -5122,11 +4627,9 @@
GOTO_OPCODE ip @ jump to next instruction
/* 10-13 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_div_int_2addr: /* 0xb3 */
-/* File: arm/op_div_int_2addr.S */
/*
* Specialized 32-bit binary operation
*
@@ -5155,11 +4658,9 @@
GOTO_OPCODE ip @ jump to next instruction
/* 10-13 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_rem_int_2addr: /* 0xb4 */
-/* File: arm/op_rem_int_2addr.S */
/*
* Specialized 32-bit binary operation
*
@@ -5191,12 +4692,9 @@
GOTO_OPCODE ip @ jump to next instruction
/* 10-13 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_and_int_2addr: /* 0xb5 */
-/* File: arm/op_and_int_2addr.S */
-/* File: arm/binop2addr.S */
/*
* Generic 32-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = r0 op r1".
@@ -5229,12 +4727,9 @@
GOTO_OPCODE ip @ jump to next instruction
/* 10-13 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_or_int_2addr: /* 0xb6 */
-/* File: arm/op_or_int_2addr.S */
-/* File: arm/binop2addr.S */
/*
* Generic 32-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = r0 op r1".
@@ -5267,12 +4762,9 @@
GOTO_OPCODE ip @ jump to next instruction
/* 10-13 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_xor_int_2addr: /* 0xb7 */
-/* File: arm/op_xor_int_2addr.S */
-/* File: arm/binop2addr.S */
/*
* Generic 32-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = r0 op r1".
@@ -5305,12 +4797,9 @@
GOTO_OPCODE ip @ jump to next instruction
/* 10-13 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_shl_int_2addr: /* 0xb8 */
-/* File: arm/op_shl_int_2addr.S */
-/* File: arm/binop2addr.S */
/*
* Generic 32-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = r0 op r1".
@@ -5343,12 +4832,9 @@
GOTO_OPCODE ip @ jump to next instruction
/* 10-13 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_shr_int_2addr: /* 0xb9 */
-/* File: arm/op_shr_int_2addr.S */
-/* File: arm/binop2addr.S */
/*
* Generic 32-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = r0 op r1".
@@ -5381,12 +4867,9 @@
GOTO_OPCODE ip @ jump to next instruction
/* 10-13 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_ushr_int_2addr: /* 0xba */
-/* File: arm/op_ushr_int_2addr.S */
-/* File: arm/binop2addr.S */
/*
* Generic 32-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = r0 op r1".
@@ -5419,12 +4902,9 @@
GOTO_OPCODE ip @ jump to next instruction
/* 10-13 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_add_long_2addr: /* 0xbb */
-/* File: arm/op_add_long_2addr.S */
-/* File: arm/binopWide2addr.S */
/*
* Generic 64-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = r0-r1 op r2-r3".
@@ -5459,12 +4939,9 @@
GOTO_OPCODE ip @ jump to next instruction
/* 12-15 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_sub_long_2addr: /* 0xbc */
-/* File: arm/op_sub_long_2addr.S */
-/* File: arm/binopWide2addr.S */
/*
* Generic 64-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = r0-r1 op r2-r3".
@@ -5499,11 +4976,9 @@
GOTO_OPCODE ip @ jump to next instruction
/* 12-15 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_mul_long_2addr: /* 0xbd */
-/* File: arm/op_mul_long_2addr.S */
/*
* Signed 64-bit integer multiply, "/2addr" version.
*
@@ -5532,8 +5007,6 @@
/* ------------------------------ */
.balign 128
.L_op_div_long_2addr: /* 0xbe */
-/* File: arm/op_div_long_2addr.S */
-/* File: arm/binopWide2addr.S */
/*
* Generic 64-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = r0-r1 op r2-r3".
@@ -5568,13 +5041,10 @@
GOTO_OPCODE ip @ jump to next instruction
/* 12-15 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_rem_long_2addr: /* 0xbf */
-/* File: arm/op_rem_long_2addr.S */
/* ldivmod returns quotient in r0/r1 and remainder in r2/r3 */
-/* File: arm/binopWide2addr.S */
/*
* Generic 64-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = r0-r1 op r2-r3".
@@ -5609,12 +5079,9 @@
GOTO_OPCODE ip @ jump to next instruction
/* 12-15 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_and_long_2addr: /* 0xc0 */
-/* File: arm/op_and_long_2addr.S */
-/* File: arm/binopWide2addr.S */
/*
* Generic 64-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = r0-r1 op r2-r3".
@@ -5649,12 +5116,9 @@
GOTO_OPCODE ip @ jump to next instruction
/* 12-15 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_or_long_2addr: /* 0xc1 */
-/* File: arm/op_or_long_2addr.S */
-/* File: arm/binopWide2addr.S */
/*
* Generic 64-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = r0-r1 op r2-r3".
@@ -5689,12 +5153,9 @@
GOTO_OPCODE ip @ jump to next instruction
/* 12-15 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_xor_long_2addr: /* 0xc2 */
-/* File: arm/op_xor_long_2addr.S */
-/* File: arm/binopWide2addr.S */
/*
* Generic 64-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = r0-r1 op r2-r3".
@@ -5729,11 +5190,9 @@
GOTO_OPCODE ip @ jump to next instruction
/* 12-15 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_shl_long_2addr: /* 0xc3 */
-/* File: arm/op_shl_long_2addr.S */
/*
* Long integer shift, 2addr version. vA is 64-bit value/result, vB is
* 32-bit shift distance.
@@ -5760,7 +5219,6 @@
/* ------------------------------ */
.balign 128
.L_op_shr_long_2addr: /* 0xc4 */
-/* File: arm/op_shr_long_2addr.S */
/*
* Long integer shift, 2addr version. vA is 64-bit value/result, vB is
* 32-bit shift distance.
@@ -5787,7 +5245,6 @@
/* ------------------------------ */
.balign 128
.L_op_ushr_long_2addr: /* 0xc5 */
-/* File: arm/op_ushr_long_2addr.S */
/*
* Long integer shift, 2addr version. vA is 64-bit value/result, vB is
* 32-bit shift distance.
@@ -5814,8 +5271,6 @@
/* ------------------------------ */
.balign 128
.L_op_add_float_2addr: /* 0xc6 */
-/* File: arm/op_add_float_2addr.S */
-/* File: arm/fbinop2addr.S */
/*
* Generic 32-bit floating point "/2addr" binary operation. Provide
* an "instr" line that specifies an instruction that performs
@@ -5836,12 +5291,9 @@
fsts s2, [r9] @ vAA<- s2
GOTO_OPCODE ip @ jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_sub_float_2addr: /* 0xc7 */
-/* File: arm/op_sub_float_2addr.S */
-/* File: arm/fbinop2addr.S */
/*
* Generic 32-bit floating point "/2addr" binary operation. Provide
* an "instr" line that specifies an instruction that performs
@@ -5862,12 +5314,9 @@
fsts s2, [r9] @ vAA<- s2
GOTO_OPCODE ip @ jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_mul_float_2addr: /* 0xc8 */
-/* File: arm/op_mul_float_2addr.S */
-/* File: arm/fbinop2addr.S */
/*
* Generic 32-bit floating point "/2addr" binary operation. Provide
* an "instr" line that specifies an instruction that performs
@@ -5888,12 +5337,9 @@
fsts s2, [r9] @ vAA<- s2
GOTO_OPCODE ip @ jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_div_float_2addr: /* 0xc9 */
-/* File: arm/op_div_float_2addr.S */
-/* File: arm/fbinop2addr.S */
/*
* Generic 32-bit floating point "/2addr" binary operation. Provide
* an "instr" line that specifies an instruction that performs
@@ -5914,13 +5360,10 @@
fsts s2, [r9] @ vAA<- s2
GOTO_OPCODE ip @ jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_rem_float_2addr: /* 0xca */
-/* File: arm/op_rem_float_2addr.S */
/* EABI doesn't define a float remainder function, but libm does */
-/* File: arm/binop2addr.S */
/*
* Generic 32-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = r0 op r1".
@@ -5953,12 +5396,9 @@
GOTO_OPCODE ip @ jump to next instruction
/* 10-13 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_add_double_2addr: /* 0xcb */
-/* File: arm/op_add_double_2addr.S */
-/* File: arm/fbinopWide2addr.S */
/*
* Generic 64-bit floating point "/2addr" binary operation. Provide
* an "instr" line that specifies an instruction that performs
@@ -5981,12 +5421,9 @@
fstd d2, [r9] @ vAA<- d2
GOTO_OPCODE ip @ jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_sub_double_2addr: /* 0xcc */
-/* File: arm/op_sub_double_2addr.S */
-/* File: arm/fbinopWide2addr.S */
/*
* Generic 64-bit floating point "/2addr" binary operation. Provide
* an "instr" line that specifies an instruction that performs
@@ -6009,12 +5446,9 @@
fstd d2, [r9] @ vAA<- d2
GOTO_OPCODE ip @ jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_mul_double_2addr: /* 0xcd */
-/* File: arm/op_mul_double_2addr.S */
-/* File: arm/fbinopWide2addr.S */
/*
* Generic 64-bit floating point "/2addr" binary operation. Provide
* an "instr" line that specifies an instruction that performs
@@ -6037,12 +5471,9 @@
fstd d2, [r9] @ vAA<- d2
GOTO_OPCODE ip @ jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_div_double_2addr: /* 0xce */
-/* File: arm/op_div_double_2addr.S */
-/* File: arm/fbinopWide2addr.S */
/*
* Generic 64-bit floating point "/2addr" binary operation. Provide
* an "instr" line that specifies an instruction that performs
@@ -6065,13 +5496,10 @@
fstd d2, [r9] @ vAA<- d2
GOTO_OPCODE ip @ jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_rem_double_2addr: /* 0xcf */
-/* File: arm/op_rem_double_2addr.S */
/* EABI doesn't define a double remainder function, but libm does */
-/* File: arm/binopWide2addr.S */
/*
* Generic 64-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = r0-r1 op r2-r3".
@@ -6106,12 +5534,9 @@
GOTO_OPCODE ip @ jump to next instruction
/* 12-15 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_add_int_lit16: /* 0xd0 */
-/* File: arm/op_add_int_lit16.S */
-/* File: arm/binopLit16.S */
/*
* Generic 32-bit "lit16" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = r0 op r1".
@@ -6141,13 +5566,10 @@
GOTO_OPCODE ip @ jump to next instruction
/* 10-13 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_rsub_int: /* 0xd1 */
-/* File: arm/op_rsub_int.S */
/* this op is "rsub-int", but can be thought of as "rsub-int/lit16" */
-/* File: arm/binopLit16.S */
/*
* Generic 32-bit "lit16" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = r0 op r1".
@@ -6177,13 +5599,10 @@
GOTO_OPCODE ip @ jump to next instruction
/* 10-13 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_mul_int_lit16: /* 0xd2 */
-/* File: arm/op_mul_int_lit16.S */
/* must be "mul r0, r1, r0" -- "r0, r0, r1" is illegal */
-/* File: arm/binopLit16.S */
/*
* Generic 32-bit "lit16" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = r0 op r1".
@@ -6213,11 +5632,9 @@
GOTO_OPCODE ip @ jump to next instruction
/* 10-13 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_div_int_lit16: /* 0xd3 */
-/* File: arm/op_div_int_lit16.S */
/*
* Specialized 32-bit binary operation
*
@@ -6249,7 +5666,6 @@
/* ------------------------------ */
.balign 128
.L_op_rem_int_lit16: /* 0xd4 */
-/* File: arm/op_rem_int_lit16.S */
/*
* Specialized 32-bit binary operation
*
@@ -6284,8 +5700,6 @@
/* ------------------------------ */
.balign 128
.L_op_and_int_lit16: /* 0xd5 */
-/* File: arm/op_and_int_lit16.S */
-/* File: arm/binopLit16.S */
/*
* Generic 32-bit "lit16" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = r0 op r1".
@@ -6315,12 +5729,9 @@
GOTO_OPCODE ip @ jump to next instruction
/* 10-13 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_or_int_lit16: /* 0xd6 */
-/* File: arm/op_or_int_lit16.S */
-/* File: arm/binopLit16.S */
/*
* Generic 32-bit "lit16" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = r0 op r1".
@@ -6350,12 +5761,9 @@
GOTO_OPCODE ip @ jump to next instruction
/* 10-13 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_xor_int_lit16: /* 0xd7 */
-/* File: arm/op_xor_int_lit16.S */
-/* File: arm/binopLit16.S */
/*
* Generic 32-bit "lit16" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = r0 op r1".
@@ -6385,12 +5793,9 @@
GOTO_OPCODE ip @ jump to next instruction
/* 10-13 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_add_int_lit8: /* 0xd8 */
-/* File: arm/op_add_int_lit8.S */
-/* File: arm/binopLit8.S */
/*
* Generic 32-bit "lit8" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = r0 op r1".
@@ -6426,12 +5831,9 @@
GOTO_OPCODE ip @ jump to next instruction
/* 10-12 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_rsub_int_lit8: /* 0xd9 */
-/* File: arm/op_rsub_int_lit8.S */
-/* File: arm/binopLit8.S */
/*
* Generic 32-bit "lit8" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = r0 op r1".
@@ -6467,13 +5869,10 @@
GOTO_OPCODE ip @ jump to next instruction
/* 10-12 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_mul_int_lit8: /* 0xda */
-/* File: arm/op_mul_int_lit8.S */
/* must be "mul r0, r1, r0" -- "r0, r0, r1" is illegal */
-/* File: arm/binopLit8.S */
/*
* Generic 32-bit "lit8" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = r0 op r1".
@@ -6509,11 +5908,9 @@
GOTO_OPCODE ip @ jump to next instruction
/* 10-12 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_div_int_lit8: /* 0xdb */
-/* File: arm/op_div_int_lit8.S */
/*
* Specialized 32-bit binary operation
*
@@ -6546,7 +5943,6 @@
/* ------------------------------ */
.balign 128
.L_op_rem_int_lit8: /* 0xdc */
-/* File: arm/op_rem_int_lit8.S */
/*
* Specialized 32-bit binary operation
*
@@ -6582,8 +5978,6 @@
/* ------------------------------ */
.balign 128
.L_op_and_int_lit8: /* 0xdd */
-/* File: arm/op_and_int_lit8.S */
-/* File: arm/binopLit8.S */
/*
* Generic 32-bit "lit8" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = r0 op r1".
@@ -6619,12 +6013,9 @@
GOTO_OPCODE ip @ jump to next instruction
/* 10-12 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_or_int_lit8: /* 0xde */
-/* File: arm/op_or_int_lit8.S */
-/* File: arm/binopLit8.S */
/*
* Generic 32-bit "lit8" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = r0 op r1".
@@ -6660,12 +6051,9 @@
GOTO_OPCODE ip @ jump to next instruction
/* 10-12 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_xor_int_lit8: /* 0xdf */
-/* File: arm/op_xor_int_lit8.S */
-/* File: arm/binopLit8.S */
/*
* Generic 32-bit "lit8" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = r0 op r1".
@@ -6701,12 +6089,9 @@
GOTO_OPCODE ip @ jump to next instruction
/* 10-12 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_shl_int_lit8: /* 0xe0 */
-/* File: arm/op_shl_int_lit8.S */
-/* File: arm/binopLit8.S */
/*
* Generic 32-bit "lit8" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = r0 op r1".
@@ -6742,12 +6127,9 @@
GOTO_OPCODE ip @ jump to next instruction
/* 10-12 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_shr_int_lit8: /* 0xe1 */
-/* File: arm/op_shr_int_lit8.S */
-/* File: arm/binopLit8.S */
/*
* Generic 32-bit "lit8" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = r0 op r1".
@@ -6783,12 +6165,9 @@
GOTO_OPCODE ip @ jump to next instruction
/* 10-12 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_ushr_int_lit8: /* 0xe2 */
-/* File: arm/op_ushr_int_lit8.S */
-/* File: arm/binopLit8.S */
/*
* Generic 32-bit "lit8" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = r0 op r1".
@@ -6824,11 +6203,9 @@
GOTO_OPCODE ip @ jump to next instruction
/* 10-12 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_iget_quick: /* 0xe3 */
-/* File: arm/op_iget_quick.S */
/* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick */
/* op vA, vB, offset@CCCC */
mov r2, rINST, lsr #12 @ r2<- B
@@ -6846,7 +6223,6 @@
/* ------------------------------ */
.balign 128
.L_op_iget_wide_quick: /* 0xe4 */
-/* File: arm/op_iget_wide_quick.S */
/* iget-wide-quick vA, vB, offset@CCCC */
mov r2, rINST, lsr #12 @ r2<- B
FETCH ip, 1 @ ip<- field byte offset
@@ -6865,7 +6241,6 @@
/* ------------------------------ */
.balign 128
.L_op_iget_object_quick: /* 0xe5 */
-/* File: arm/op_iget_object_quick.S */
/* For: iget-object-quick */
/* op vA, vB, offset@CCCC */
mov r2, rINST, lsr #12 @ r2<- B
@@ -6886,7 +6261,6 @@
/* ------------------------------ */
.balign 128
.L_op_iput_quick: /* 0xe6 */
-/* File: arm/op_iput_quick.S */
/* For: iput-quick, iput-object-quick */
/* op vA, vB, offset@CCCC */
mov r2, rINST, lsr #12 @ r2<- B
@@ -6904,7 +6278,6 @@
/* ------------------------------ */
.balign 128
.L_op_iput_wide_quick: /* 0xe7 */
-/* File: arm/op_iput_wide_quick.S */
/* iput-wide-quick vA, vB, offset@CCCC */
mov r2, rINST, lsr #12 @ r2<- B
FETCH r3, 1 @ r3<- field byte offset
@@ -6922,7 +6295,6 @@
/* ------------------------------ */
.balign 128
.L_op_iput_object_quick: /* 0xe8 */
-/* File: arm/op_iput_object_quick.S */
EXPORT_PC
add r0, rFP, #OFF_FP_SHADOWFRAME
mov r1, rPC
@@ -6937,8 +6309,6 @@
/* ------------------------------ */
.balign 128
.L_op_invoke_virtual_quick: /* 0xe9 */
-/* File: arm/op_invoke_virtual_quick.S */
-/* File: arm/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -6960,13 +6330,9 @@
GET_INST_OPCODE ip
GOTO_OPCODE ip
-
-
/* ------------------------------ */
.balign 128
.L_op_invoke_virtual_range_quick: /* 0xea */
-/* File: arm/op_invoke_virtual_range_quick.S */
-/* File: arm/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -6988,13 +6354,9 @@
GET_INST_OPCODE ip
GOTO_OPCODE ip
-
-
/* ------------------------------ */
.balign 128
.L_op_iput_boolean_quick: /* 0xeb */
-/* File: arm/op_iput_boolean_quick.S */
-/* File: arm/op_iput_quick.S */
/* For: iput-quick, iput-object-quick */
/* op vA, vB, offset@CCCC */
mov r2, rINST, lsr #12 @ r2<- B
@@ -7009,12 +6371,9 @@
GET_INST_OPCODE ip @ extract opcode from rINST
GOTO_OPCODE ip @ jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_iput_byte_quick: /* 0xec */
-/* File: arm/op_iput_byte_quick.S */
-/* File: arm/op_iput_quick.S */
/* For: iput-quick, iput-object-quick */
/* op vA, vB, offset@CCCC */
mov r2, rINST, lsr #12 @ r2<- B
@@ -7029,12 +6388,9 @@
GET_INST_OPCODE ip @ extract opcode from rINST
GOTO_OPCODE ip @ jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_iput_char_quick: /* 0xed */
-/* File: arm/op_iput_char_quick.S */
-/* File: arm/op_iput_quick.S */
/* For: iput-quick, iput-object-quick */
/* op vA, vB, offset@CCCC */
mov r2, rINST, lsr #12 @ r2<- B
@@ -7049,12 +6405,9 @@
GET_INST_OPCODE ip @ extract opcode from rINST
GOTO_OPCODE ip @ jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_iput_short_quick: /* 0xee */
-/* File: arm/op_iput_short_quick.S */
-/* File: arm/op_iput_quick.S */
/* For: iput-quick, iput-object-quick */
/* op vA, vB, offset@CCCC */
mov r2, rINST, lsr #12 @ r2<- B
@@ -7069,12 +6422,9 @@
GET_INST_OPCODE ip @ extract opcode from rINST
GOTO_OPCODE ip @ jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_iget_boolean_quick: /* 0xef */
-/* File: arm/op_iget_boolean_quick.S */
-/* File: arm/op_iget_quick.S */
/* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick */
/* op vA, vB, offset@CCCC */
mov r2, rINST, lsr #12 @ r2<- B
@@ -7089,12 +6439,9 @@
GET_INST_OPCODE ip @ extract opcode from rINST
GOTO_OPCODE ip @ jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_iget_byte_quick: /* 0xf0 */
-/* File: arm/op_iget_byte_quick.S */
-/* File: arm/op_iget_quick.S */
/* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick */
/* op vA, vB, offset@CCCC */
mov r2, rINST, lsr #12 @ r2<- B
@@ -7109,12 +6456,9 @@
GET_INST_OPCODE ip @ extract opcode from rINST
GOTO_OPCODE ip @ jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_iget_char_quick: /* 0xf1 */
-/* File: arm/op_iget_char_quick.S */
-/* File: arm/op_iget_quick.S */
/* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick */
/* op vA, vB, offset@CCCC */
mov r2, rINST, lsr #12 @ r2<- B
@@ -7129,12 +6473,9 @@
GET_INST_OPCODE ip @ extract opcode from rINST
GOTO_OPCODE ip @ jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_iget_short_quick: /* 0xf2 */
-/* File: arm/op_iget_short_quick.S */
-/* File: arm/op_iget_quick.S */
/* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick */
/* op vA, vB, offset@CCCC */
mov r2, rINST, lsr #12 @ r2<- B
@@ -7149,89 +6490,65 @@
GET_INST_OPCODE ip @ extract opcode from rINST
GOTO_OPCODE ip @ jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_unused_f3: /* 0xf3 */
-/* File: arm/op_unused_f3.S */
-/* File: arm/unused.S */
/*
* Bail to reference interpreter to throw.
*/
b MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_f4: /* 0xf4 */
-/* File: arm/op_unused_f4.S */
-/* File: arm/unused.S */
/*
* Bail to reference interpreter to throw.
*/
b MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_f5: /* 0xf5 */
-/* File: arm/op_unused_f5.S */
-/* File: arm/unused.S */
/*
* Bail to reference interpreter to throw.
*/
b MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_f6: /* 0xf6 */
-/* File: arm/op_unused_f6.S */
-/* File: arm/unused.S */
/*
* Bail to reference interpreter to throw.
*/
b MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_f7: /* 0xf7 */
-/* File: arm/op_unused_f7.S */
-/* File: arm/unused.S */
/*
* Bail to reference interpreter to throw.
*/
b MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_f8: /* 0xf8 */
-/* File: arm/op_unused_f8.S */
-/* File: arm/unused.S */
/*
* Bail to reference interpreter to throw.
*/
b MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_f9: /* 0xf9 */
-/* File: arm/op_unused_f9.S */
-/* File: arm/unused.S */
/*
* Bail to reference interpreter to throw.
*/
b MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_invoke_polymorphic: /* 0xfa */
-/* File: arm/op_invoke_polymorphic.S */
-/* File: arm/invoke_polymorphic.S */
/*
* invoke-polymorphic handler wrapper.
*/
@@ -7253,12 +6570,9 @@
GET_INST_OPCODE ip
GOTO_OPCODE ip
-
/* ------------------------------ */
.balign 128
.L_op_invoke_polymorphic_range: /* 0xfb */
-/* File: arm/op_invoke_polymorphic_range.S */
-/* File: arm/invoke_polymorphic.S */
/*
* invoke-polymorphic handler wrapper.
*/
@@ -7280,12 +6594,9 @@
GET_INST_OPCODE ip
GOTO_OPCODE ip
-
/* ------------------------------ */
.balign 128
.L_op_invoke_custom: /* 0xfc */
-/* File: arm/op_invoke_custom.S */
-/* File: arm/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -7307,7 +6618,6 @@
GET_INST_OPCODE ip
GOTO_OPCODE ip
-
/*
* Handle an invoke-custom invocation.
*
@@ -7319,8 +6629,6 @@
/* ------------------------------ */
.balign 128
.L_op_invoke_custom_range: /* 0xfd */
-/* File: arm/op_invoke_custom_range.S */
-/* File: arm/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -7342,13 +6650,9 @@
GET_INST_OPCODE ip
GOTO_OPCODE ip
-
-
/* ------------------------------ */
.balign 128
.L_op_const_method_handle: /* 0xfe */
-/* File: arm/op_const_method_handle.S */
-/* File: arm/const.S */
/* const/class vAA, type@BBBB */
/* const/method-handle vAA, method_handle@BBBB */
/* const/method-type vAA, proto@BBBB */
@@ -7367,12 +6671,9 @@
GET_INST_OPCODE ip @ extract opcode from rINST
GOTO_OPCODE ip @ jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_const_method_type: /* 0xff */
-/* File: arm/op_const_method_type.S */
-/* File: arm/const.S */
/* const/class vAA, type@BBBB */
/* const/method-handle vAA, method_handle@BBBB */
/* const/method-type vAA, proto@BBBB */
@@ -7391,32 +6692,19 @@
GET_INST_OPCODE ip @ extract opcode from rINST
GOTO_OPCODE ip @ jump to next instruction
-
.balign 128
-/* File: arm/instruction_end.S */
.type artMterpAsmInstructionEnd, #object
.hidden artMterpAsmInstructionEnd
.global artMterpAsmInstructionEnd
artMterpAsmInstructionEnd:
-
-/*
- * ===========================================================================
- * Sister implementations
- * ===========================================================================
- */
-/* File: arm/instruction_start_sister.S */
-
.type artMterpAsmSisterStart, #object
.hidden artMterpAsmSisterStart
.global artMterpAsmSisterStart
.text
.balign 4
artMterpAsmSisterStart:
-
-
-/* continuation for op_float_to_long */
/*
* Convert the float in r0 to a long in r0/r1.
*
@@ -7445,8 +6733,6 @@
mov r0, #0
mov r1, #0
bx lr @ return 0 for NaN
-
-/* continuation for op_double_to_long */
/*
* Convert the double in r0/r1 to a long in r0/r1.
*
@@ -7477,25 +6763,20 @@
mov r0, #0
mov r1, #0
bx lr @ return 0 for NaN
-/* File: arm/instruction_end_sister.S */
.type artMterpAsmSisterEnd, #object
.hidden artMterpAsmSisterEnd
.global artMterpAsmSisterEnd
artMterpAsmSisterEnd:
-/* File: arm/instruction_start_alt.S */
-
.type artMterpAsmAltInstructionStart, #object
.hidden artMterpAsmAltInstructionStart
.global artMterpAsmAltInstructionStart
artMterpAsmAltInstructionStart = .L_ALT_op_nop
.text
-
/* ------------------------------ */
.balign 128
.L_ALT_op_nop: /* 0x00 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7513,7 +6794,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move: /* 0x01 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7531,7 +6811,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_from16: /* 0x02 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7549,7 +6828,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_16: /* 0x03 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7567,7 +6845,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_wide: /* 0x04 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7585,7 +6862,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_wide_from16: /* 0x05 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7603,7 +6879,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_wide_16: /* 0x06 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7621,7 +6896,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_object: /* 0x07 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7639,7 +6913,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_object_from16: /* 0x08 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7657,7 +6930,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_object_16: /* 0x09 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7675,7 +6947,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_result: /* 0x0a */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7693,7 +6964,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_result_wide: /* 0x0b */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7711,7 +6981,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_result_object: /* 0x0c */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7729,7 +6998,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_exception: /* 0x0d */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7747,7 +7015,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_return_void: /* 0x0e */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7765,7 +7032,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_return: /* 0x0f */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7783,7 +7049,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_return_wide: /* 0x10 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7801,7 +7066,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_return_object: /* 0x11 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7819,7 +7083,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_4: /* 0x12 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7837,7 +7100,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_16: /* 0x13 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7855,7 +7117,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const: /* 0x14 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7873,7 +7134,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_high16: /* 0x15 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7891,7 +7151,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_wide_16: /* 0x16 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7909,7 +7168,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_wide_32: /* 0x17 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7927,7 +7185,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_wide: /* 0x18 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7945,7 +7202,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_wide_high16: /* 0x19 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7963,7 +7219,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_string: /* 0x1a */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7981,7 +7236,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_string_jumbo: /* 0x1b */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7999,7 +7253,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_class: /* 0x1c */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8017,7 +7270,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_monitor_enter: /* 0x1d */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8035,7 +7287,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_monitor_exit: /* 0x1e */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8053,7 +7304,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_check_cast: /* 0x1f */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8071,7 +7321,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_instance_of: /* 0x20 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8089,7 +7338,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_array_length: /* 0x21 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8107,7 +7355,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_new_instance: /* 0x22 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8125,7 +7372,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_new_array: /* 0x23 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8143,7 +7389,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_filled_new_array: /* 0x24 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8161,7 +7406,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_filled_new_array_range: /* 0x25 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8179,7 +7423,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_fill_array_data: /* 0x26 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8197,7 +7440,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_throw: /* 0x27 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8215,7 +7457,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_goto: /* 0x28 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8233,7 +7474,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_goto_16: /* 0x29 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8251,7 +7491,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_goto_32: /* 0x2a */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8269,7 +7508,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_packed_switch: /* 0x2b */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8287,7 +7525,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sparse_switch: /* 0x2c */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8305,7 +7542,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_cmpl_float: /* 0x2d */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8323,7 +7559,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_cmpg_float: /* 0x2e */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8341,7 +7576,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_cmpl_double: /* 0x2f */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8359,7 +7593,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_cmpg_double: /* 0x30 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8377,7 +7610,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_cmp_long: /* 0x31 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8395,7 +7627,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_eq: /* 0x32 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8413,7 +7644,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_ne: /* 0x33 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8431,7 +7661,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_lt: /* 0x34 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8449,7 +7678,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_ge: /* 0x35 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8467,7 +7695,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_gt: /* 0x36 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8485,7 +7712,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_le: /* 0x37 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8503,7 +7729,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_eqz: /* 0x38 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8521,7 +7746,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_nez: /* 0x39 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8539,7 +7763,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_ltz: /* 0x3a */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8557,7 +7780,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_gez: /* 0x3b */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8575,7 +7797,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_gtz: /* 0x3c */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8593,7 +7814,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_lez: /* 0x3d */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8611,7 +7831,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_3e: /* 0x3e */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8629,7 +7848,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_3f: /* 0x3f */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8647,7 +7865,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_40: /* 0x40 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8665,7 +7882,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_41: /* 0x41 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8683,7 +7899,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_42: /* 0x42 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8701,7 +7916,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_43: /* 0x43 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8719,7 +7933,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aget: /* 0x44 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8737,7 +7950,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aget_wide: /* 0x45 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8755,7 +7967,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aget_object: /* 0x46 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8773,7 +7984,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aget_boolean: /* 0x47 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8791,7 +8001,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aget_byte: /* 0x48 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8809,7 +8018,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aget_char: /* 0x49 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8827,7 +8035,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aget_short: /* 0x4a */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8845,7 +8052,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aput: /* 0x4b */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8863,7 +8069,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aput_wide: /* 0x4c */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8881,7 +8086,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aput_object: /* 0x4d */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8899,7 +8103,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aput_boolean: /* 0x4e */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8917,7 +8120,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aput_byte: /* 0x4f */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8935,7 +8137,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aput_char: /* 0x50 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8953,7 +8154,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aput_short: /* 0x51 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8971,7 +8171,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget: /* 0x52 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8989,7 +8188,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_wide: /* 0x53 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9007,7 +8205,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_object: /* 0x54 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9025,7 +8222,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_boolean: /* 0x55 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9043,7 +8239,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_byte: /* 0x56 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9061,7 +8256,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_char: /* 0x57 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9079,7 +8273,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_short: /* 0x58 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9097,7 +8290,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput: /* 0x59 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9115,7 +8307,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_wide: /* 0x5a */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9133,7 +8324,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_object: /* 0x5b */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9151,7 +8341,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_boolean: /* 0x5c */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9169,7 +8358,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_byte: /* 0x5d */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9187,7 +8375,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_char: /* 0x5e */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9205,7 +8392,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_short: /* 0x5f */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9223,7 +8409,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sget: /* 0x60 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9241,7 +8426,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sget_wide: /* 0x61 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9259,7 +8443,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sget_object: /* 0x62 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9277,7 +8460,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sget_boolean: /* 0x63 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9295,7 +8477,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sget_byte: /* 0x64 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9313,7 +8494,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sget_char: /* 0x65 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9331,7 +8511,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sget_short: /* 0x66 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9349,7 +8528,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sput: /* 0x67 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9367,7 +8545,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sput_wide: /* 0x68 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9385,7 +8562,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sput_object: /* 0x69 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9403,7 +8579,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sput_boolean: /* 0x6a */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9421,7 +8596,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sput_byte: /* 0x6b */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9439,7 +8613,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sput_char: /* 0x6c */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9457,7 +8630,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sput_short: /* 0x6d */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9475,7 +8647,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_virtual: /* 0x6e */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9493,7 +8664,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_super: /* 0x6f */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9511,7 +8681,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_direct: /* 0x70 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9529,7 +8698,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_static: /* 0x71 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9547,7 +8715,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_interface: /* 0x72 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9565,7 +8732,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_return_void_no_barrier: /* 0x73 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9583,7 +8749,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_virtual_range: /* 0x74 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9601,7 +8766,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_super_range: /* 0x75 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9619,7 +8783,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_direct_range: /* 0x76 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9637,7 +8800,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_static_range: /* 0x77 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9655,7 +8817,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_interface_range: /* 0x78 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9673,7 +8834,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_79: /* 0x79 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9691,7 +8851,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_7a: /* 0x7a */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9709,7 +8868,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_neg_int: /* 0x7b */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9727,7 +8885,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_not_int: /* 0x7c */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9745,7 +8902,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_neg_long: /* 0x7d */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9763,7 +8919,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_not_long: /* 0x7e */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9781,7 +8936,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_neg_float: /* 0x7f */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9799,7 +8953,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_neg_double: /* 0x80 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9817,7 +8970,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_int_to_long: /* 0x81 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9835,7 +8987,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_int_to_float: /* 0x82 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9853,7 +9004,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_int_to_double: /* 0x83 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9871,7 +9021,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_long_to_int: /* 0x84 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9889,7 +9038,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_long_to_float: /* 0x85 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9907,7 +9055,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_long_to_double: /* 0x86 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9925,7 +9072,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_float_to_int: /* 0x87 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9943,7 +9089,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_float_to_long: /* 0x88 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9961,7 +9106,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_float_to_double: /* 0x89 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9979,7 +9123,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_double_to_int: /* 0x8a */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9997,7 +9140,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_double_to_long: /* 0x8b */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10015,7 +9157,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_double_to_float: /* 0x8c */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10033,7 +9174,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_int_to_byte: /* 0x8d */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10051,7 +9191,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_int_to_char: /* 0x8e */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10069,7 +9208,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_int_to_short: /* 0x8f */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10087,7 +9225,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_add_int: /* 0x90 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10105,7 +9242,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sub_int: /* 0x91 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10123,7 +9259,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_mul_int: /* 0x92 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10141,7 +9276,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_div_int: /* 0x93 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10159,7 +9293,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rem_int: /* 0x94 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10177,7 +9310,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_and_int: /* 0x95 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10195,7 +9327,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_or_int: /* 0x96 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10213,7 +9344,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_xor_int: /* 0x97 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10231,7 +9361,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_shl_int: /* 0x98 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10249,7 +9378,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_shr_int: /* 0x99 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10267,7 +9395,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_ushr_int: /* 0x9a */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10285,7 +9412,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_add_long: /* 0x9b */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10303,7 +9429,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sub_long: /* 0x9c */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10321,7 +9446,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_mul_long: /* 0x9d */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10339,7 +9463,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_div_long: /* 0x9e */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10357,7 +9480,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rem_long: /* 0x9f */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10375,7 +9497,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_and_long: /* 0xa0 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10393,7 +9514,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_or_long: /* 0xa1 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10411,7 +9531,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_xor_long: /* 0xa2 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10429,7 +9548,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_shl_long: /* 0xa3 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10447,7 +9565,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_shr_long: /* 0xa4 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10465,7 +9582,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_ushr_long: /* 0xa5 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10483,7 +9599,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_add_float: /* 0xa6 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10501,7 +9616,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sub_float: /* 0xa7 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10519,7 +9633,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_mul_float: /* 0xa8 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10537,7 +9650,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_div_float: /* 0xa9 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10555,7 +9667,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rem_float: /* 0xaa */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10573,7 +9684,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_add_double: /* 0xab */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10591,7 +9701,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sub_double: /* 0xac */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10609,7 +9718,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_mul_double: /* 0xad */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10627,7 +9735,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_div_double: /* 0xae */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10645,7 +9752,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rem_double: /* 0xaf */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10663,7 +9769,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_add_int_2addr: /* 0xb0 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10681,7 +9786,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sub_int_2addr: /* 0xb1 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10699,7 +9803,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_mul_int_2addr: /* 0xb2 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10717,7 +9820,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_div_int_2addr: /* 0xb3 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10735,7 +9837,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rem_int_2addr: /* 0xb4 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10753,7 +9854,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_and_int_2addr: /* 0xb5 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10771,7 +9871,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_or_int_2addr: /* 0xb6 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10789,7 +9888,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_xor_int_2addr: /* 0xb7 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10807,7 +9905,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_shl_int_2addr: /* 0xb8 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10825,7 +9922,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_shr_int_2addr: /* 0xb9 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10843,7 +9939,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_ushr_int_2addr: /* 0xba */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10861,7 +9956,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_add_long_2addr: /* 0xbb */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10879,7 +9973,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sub_long_2addr: /* 0xbc */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10897,7 +9990,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_mul_long_2addr: /* 0xbd */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10915,7 +10007,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_div_long_2addr: /* 0xbe */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10933,7 +10024,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rem_long_2addr: /* 0xbf */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10951,7 +10041,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_and_long_2addr: /* 0xc0 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10969,7 +10058,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_or_long_2addr: /* 0xc1 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10987,7 +10075,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_xor_long_2addr: /* 0xc2 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11005,7 +10092,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_shl_long_2addr: /* 0xc3 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11023,7 +10109,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_shr_long_2addr: /* 0xc4 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11041,7 +10126,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_ushr_long_2addr: /* 0xc5 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11059,7 +10143,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_add_float_2addr: /* 0xc6 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11077,7 +10160,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sub_float_2addr: /* 0xc7 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11095,7 +10177,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_mul_float_2addr: /* 0xc8 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11113,7 +10194,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_div_float_2addr: /* 0xc9 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11131,7 +10211,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rem_float_2addr: /* 0xca */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11149,7 +10228,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_add_double_2addr: /* 0xcb */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11167,7 +10245,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sub_double_2addr: /* 0xcc */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11185,7 +10262,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_mul_double_2addr: /* 0xcd */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11203,7 +10279,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_div_double_2addr: /* 0xce */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11221,7 +10296,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rem_double_2addr: /* 0xcf */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11239,7 +10313,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_add_int_lit16: /* 0xd0 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11257,7 +10330,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rsub_int: /* 0xd1 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11275,7 +10347,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_mul_int_lit16: /* 0xd2 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11293,7 +10364,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_div_int_lit16: /* 0xd3 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11311,7 +10381,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rem_int_lit16: /* 0xd4 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11329,7 +10398,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_and_int_lit16: /* 0xd5 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11347,7 +10415,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_or_int_lit16: /* 0xd6 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11365,7 +10432,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_xor_int_lit16: /* 0xd7 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11383,7 +10449,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_add_int_lit8: /* 0xd8 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11401,7 +10466,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rsub_int_lit8: /* 0xd9 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11419,7 +10483,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_mul_int_lit8: /* 0xda */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11437,7 +10500,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_div_int_lit8: /* 0xdb */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11455,7 +10517,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rem_int_lit8: /* 0xdc */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11473,7 +10534,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_and_int_lit8: /* 0xdd */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11491,7 +10551,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_or_int_lit8: /* 0xde */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11509,7 +10568,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_xor_int_lit8: /* 0xdf */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11527,7 +10585,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_shl_int_lit8: /* 0xe0 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11545,7 +10602,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_shr_int_lit8: /* 0xe1 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11563,7 +10619,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_ushr_int_lit8: /* 0xe2 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11581,7 +10636,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_quick: /* 0xe3 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11599,7 +10653,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_wide_quick: /* 0xe4 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11617,7 +10670,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_object_quick: /* 0xe5 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11635,7 +10687,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_quick: /* 0xe6 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11653,7 +10704,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_wide_quick: /* 0xe7 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11671,7 +10721,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_object_quick: /* 0xe8 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11689,7 +10738,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_virtual_quick: /* 0xe9 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11707,7 +10755,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_virtual_range_quick: /* 0xea */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11725,7 +10772,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_boolean_quick: /* 0xeb */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11743,7 +10789,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_byte_quick: /* 0xec */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11761,7 +10806,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_char_quick: /* 0xed */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11779,7 +10823,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_short_quick: /* 0xee */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11797,7 +10840,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_boolean_quick: /* 0xef */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11815,7 +10857,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_byte_quick: /* 0xf0 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11833,7 +10874,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_char_quick: /* 0xf1 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11851,7 +10891,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_short_quick: /* 0xf2 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11869,7 +10908,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_f3: /* 0xf3 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11887,7 +10925,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_f4: /* 0xf4 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11905,7 +10942,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_f5: /* 0xf5 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11923,7 +10959,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_f6: /* 0xf6 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11941,7 +10976,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_f7: /* 0xf7 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11959,7 +10993,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_f8: /* 0xf8 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11977,7 +11010,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_f9: /* 0xf9 */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11995,7 +11027,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_polymorphic: /* 0xfa */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -12013,7 +11044,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_polymorphic_range: /* 0xfb */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -12031,7 +11061,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_custom: /* 0xfc */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -12049,7 +11078,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_custom_range: /* 0xfd */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -12067,7 +11095,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_method_handle: /* 0xfe */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -12085,7 +11112,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_method_type: /* 0xff */
-/* File: arm/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -12101,14 +11127,11 @@
b MterpCheckBefore @ (self, shadow_frame, dex_pc_ptr) @ Tail call.
.balign 128
-/* File: arm/instruction_end_alt.S */
.type artMterpAsmAltInstructionEnd, #object
.hidden artMterpAsmAltInstructionEnd
.global artMterpAsmAltInstructionEnd
artMterpAsmAltInstructionEnd:
-
-/* File: arm/footer.S */
/*
* ===========================================================================
* Common subroutines and data
@@ -12406,4 +11429,3 @@
END ExecuteMterpImpl
-
diff --git a/runtime/interpreter/mterp/out/mterp_arm64.S b/runtime/interpreter/mterp/out/mterp_arm64.S
index fd60c95..c8c9cdb 100644
--- a/runtime/interpreter/mterp/out/mterp_arm64.S
+++ b/runtime/interpreter/mterp/out/mterp_arm64.S
@@ -1,10 +1,4 @@
-/*
- * This file was generated automatically by gen-mterp.py for 'arm64'.
- *
- * --> DO NOT EDIT <--
- */
-
-/* File: arm64/header.S */
+/* DO NOT EDIT: This file was generated by gen-mterp.py. */
/*
* Copyright (C) 2016 The Android Open Source Project
*
@@ -358,8 +352,6 @@
.cfi_endproc
.size \name, .-\name
.endm
-
-/* File: arm64/entry.S */
/*
* Copyright (C) 2016 The Android Open Source Project
*
@@ -427,18 +419,14 @@
GOTO_OPCODE ip // jump to next instruction
/* NOTE: no fallthrough */
-/* File: arm64/instruction_start.S */
-
.type artMterpAsmInstructionStart, #object
.hidden artMterpAsmInstructionStart
.global artMterpAsmInstructionStart
artMterpAsmInstructionStart = .L_op_nop
.text
-
/* ------------------------------ */
.balign 128
.L_op_nop: /* 0x00 */
-/* File: arm64/op_nop.S */
FETCH_ADVANCE_INST 1 // advance to next instr, load rINST
GET_INST_OPCODE ip // ip<- opcode from rINST
GOTO_OPCODE ip // execute it
@@ -446,7 +434,6 @@
/* ------------------------------ */
.balign 128
.L_op_move: /* 0x01 */
-/* File: arm64/op_move.S */
/* for move, move-object, long-to-int */
/* op vA, vB */
lsr w1, wINST, #12 // x1<- B from 15:12
@@ -464,7 +451,6 @@
/* ------------------------------ */
.balign 128
.L_op_move_from16: /* 0x02 */
-/* File: arm64/op_move_from16.S */
/* for: move/from16, move-object/from16 */
/* op vAA, vBBBB */
FETCH w1, 1 // r1<- BBBB
@@ -482,7 +468,6 @@
/* ------------------------------ */
.balign 128
.L_op_move_16: /* 0x03 */
-/* File: arm64/op_move_16.S */
/* for: move/16, move-object/16 */
/* op vAAAA, vBBBB */
FETCH w1, 2 // w1<- BBBB
@@ -500,7 +485,6 @@
/* ------------------------------ */
.balign 128
.L_op_move_wide: /* 0x04 */
-/* File: arm64/op_move_wide.S */
/* move-wide vA, vB */
/* NOTE: regs can overlap, e.g. "move v6,v7" or "move v7,v6" */
lsr w3, wINST, #12 // w3<- B
@@ -514,7 +498,6 @@
/* ------------------------------ */
.balign 128
.L_op_move_wide_from16: /* 0x05 */
-/* File: arm64/op_move_wide_from16.S */
/* move-wide/from16 vAA, vBBBB */
/* NOTE: regs can overlap, e.g. "move v6,v7" or "move v7,v6" */
FETCH w3, 1 // w3<- BBBB
@@ -528,7 +511,6 @@
/* ------------------------------ */
.balign 128
.L_op_move_wide_16: /* 0x06 */
-/* File: arm64/op_move_wide_16.S */
/* move-wide/16 vAAAA, vBBBB */
/* NOTE: regs can overlap, e.g. "move v6,v7" or "move v7,v6" */
FETCH w3, 2 // w3<- BBBB
@@ -542,8 +524,6 @@
/* ------------------------------ */
.balign 128
.L_op_move_object: /* 0x07 */
-/* File: arm64/op_move_object.S */
-/* File: arm64/op_move.S */
/* for move, move-object, long-to-int */
/* op vA, vB */
lsr w1, wINST, #12 // x1<- B from 15:12
@@ -558,12 +538,9 @@
.endif
GOTO_OPCODE ip // execute next instruction
-
/* ------------------------------ */
.balign 128
.L_op_move_object_from16: /* 0x08 */
-/* File: arm64/op_move_object_from16.S */
-/* File: arm64/op_move_from16.S */
/* for: move/from16, move-object/from16 */
/* op vAA, vBBBB */
FETCH w1, 1 // r1<- BBBB
@@ -578,12 +555,9 @@
.endif
GOTO_OPCODE ip // jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_move_object_16: /* 0x09 */
-/* File: arm64/op_move_object_16.S */
-/* File: arm64/op_move_16.S */
/* for: move/16, move-object/16 */
/* op vAAAA, vBBBB */
FETCH w1, 2 // w1<- BBBB
@@ -598,11 +572,9 @@
.endif
GOTO_OPCODE ip // jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_move_result: /* 0x0a */
-/* File: arm64/op_move_result.S */
/* for: move-result, move-result-object */
/* op vAA */
lsr w2, wINST, #8 // r2<- AA
@@ -620,7 +592,6 @@
/* ------------------------------ */
.balign 128
.L_op_move_result_wide: /* 0x0b */
-/* File: arm64/op_move_result_wide.S */
/* for: move-result-wide */
/* op vAA */
lsr w2, wINST, #8 // r2<- AA
@@ -634,8 +605,6 @@
/* ------------------------------ */
.balign 128
.L_op_move_result_object: /* 0x0c */
-/* File: arm64/op_move_result_object.S */
-/* File: arm64/op_move_result.S */
/* for: move-result, move-result-object */
/* op vAA */
lsr w2, wINST, #8 // r2<- AA
@@ -650,11 +619,9 @@
.endif
GOTO_OPCODE ip // jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_move_exception: /* 0x0d */
-/* File: arm64/op_move_exception.S */
/* move-exception vAA */
lsr w2, wINST, #8 // w2<- AA
ldr x3, [xSELF, #THREAD_EXCEPTION_OFFSET]
@@ -668,7 +635,6 @@
/* ------------------------------ */
.balign 128
.L_op_return_void: /* 0x0e */
-/* File: arm64/op_return_void.S */
.extern MterpThreadFenceForConstructor
bl MterpThreadFenceForConstructor
ldr w7, [xSELF, #THREAD_FLAGS_OFFSET]
@@ -685,7 +651,6 @@
/* ------------------------------ */
.balign 128
.L_op_return: /* 0x0f */
-/* File: arm64/op_return.S */
/*
* Return a 32-bit value.
*
@@ -709,7 +674,6 @@
/* ------------------------------ */
.balign 128
.L_op_return_wide: /* 0x10 */
-/* File: arm64/op_return_wide.S */
/*
* Return a 64-bit value.
*/
@@ -732,8 +696,6 @@
/* ------------------------------ */
.balign 128
.L_op_return_object: /* 0x11 */
-/* File: arm64/op_return_object.S */
-/* File: arm64/op_return.S */
/*
* Return a 32-bit value.
*
@@ -754,11 +716,9 @@
bl MterpSuspendCheck // (self)
b .Lop_return_object_return
-
/* ------------------------------ */
.balign 128
.L_op_const_4: /* 0x12 */
-/* File: arm64/op_const_4.S */
/* const/4 vA, #+B */
sbfx w1, wINST, #12, #4 // w1<- sssssssB
ubfx w0, wINST, #8, #4 // w0<- A
@@ -770,7 +730,6 @@
/* ------------------------------ */
.balign 128
.L_op_const_16: /* 0x13 */
-/* File: arm64/op_const_16.S */
/* const/16 vAA, #+BBBB */
FETCH_S w0, 1 // w0<- ssssBBBB (sign-extended)
lsr w3, wINST, #8 // w3<- AA
@@ -782,7 +741,6 @@
/* ------------------------------ */
.balign 128
.L_op_const: /* 0x14 */
-/* File: arm64/op_const.S */
/* const vAA, #+BBBBbbbb */
lsr w3, wINST, #8 // w3<- AA
FETCH w0, 1 // w0<- bbbb (low
@@ -796,7 +754,6 @@
/* ------------------------------ */
.balign 128
.L_op_const_high16: /* 0x15 */
-/* File: arm64/op_const_high16.S */
/* const/high16 vAA, #+BBBB0000 */
FETCH w0, 1 // r0<- 0000BBBB (zero-extended)
lsr w3, wINST, #8 // r3<- AA
@@ -809,7 +766,6 @@
/* ------------------------------ */
.balign 128
.L_op_const_wide_16: /* 0x16 */
-/* File: arm64/op_const_wide_16.S */
/* const-wide/16 vAA, #+BBBB */
FETCH_S x0, 1 // x0<- ssssssssssssBBBB (sign-extended)
lsr w3, wINST, #8 // w3<- AA
@@ -821,7 +777,6 @@
/* ------------------------------ */
.balign 128
.L_op_const_wide_32: /* 0x17 */
-/* File: arm64/op_const_wide_32.S */
/* const-wide/32 vAA, #+BBBBbbbb */
FETCH w0, 1 // x0<- 000000000000bbbb (low)
lsr w3, wINST, #8 // w3<- AA
@@ -835,7 +790,6 @@
/* ------------------------------ */
.balign 128
.L_op_const_wide: /* 0x18 */
-/* File: arm64/op_const_wide.S */
/* const-wide vAA, #+HHHHhhhhBBBBbbbb */
FETCH w0, 1 // w0<- bbbb (low)
FETCH w1, 2 // w1<- BBBB (low middle)
@@ -853,7 +807,6 @@
/* ------------------------------ */
.balign 128
.L_op_const_wide_high16: /* 0x19 */
-/* File: arm64/op_const_wide_high16.S */
/* const-wide/high16 vAA, #+BBBB000000000000 */
FETCH w0, 1 // w0<- 0000BBBB (zero-extended)
lsr w1, wINST, #8 // w1<- AA
@@ -866,8 +819,6 @@
/* ------------------------------ */
.balign 128
.L_op_const_string: /* 0x1a */
-/* File: arm64/op_const_string.S */
-/* File: arm64/const.S */
/* const/class vAA, type@BBBB */
/* const/method-handle vAA, method_handle@BBBB */
/* const/method-type vAA, proto@BBBB */
@@ -885,11 +836,9 @@
GET_INST_OPCODE ip // extract opcode from rINST
GOTO_OPCODE ip // jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_const_string_jumbo: /* 0x1b */
-/* File: arm64/op_const_string_jumbo.S */
/* const/string vAA, String//BBBBBBBB */
EXPORT_PC
FETCH w0, 1 // w0<- bbbb (low
@@ -908,8 +857,6 @@
/* ------------------------------ */
.balign 128
.L_op_const_class: /* 0x1c */
-/* File: arm64/op_const_class.S */
-/* File: arm64/const.S */
/* const/class vAA, type@BBBB */
/* const/method-handle vAA, method_handle@BBBB */
/* const/method-type vAA, proto@BBBB */
@@ -927,11 +874,9 @@
GET_INST_OPCODE ip // extract opcode from rINST
GOTO_OPCODE ip // jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_monitor_enter: /* 0x1d */
-/* File: arm64/op_monitor_enter.S */
/*
* Synchronize on an object.
*/
@@ -949,7 +894,6 @@
/* ------------------------------ */
.balign 128
.L_op_monitor_exit: /* 0x1e */
-/* File: arm64/op_monitor_exit.S */
/*
* Unlock an object.
*
@@ -971,7 +915,6 @@
/* ------------------------------ */
.balign 128
.L_op_check_cast: /* 0x1f */
-/* File: arm64/op_check_cast.S */
/*
* Check to see if a cast from one class to another is allowed.
*/
@@ -992,7 +935,6 @@
/* ------------------------------ */
.balign 128
.L_op_instance_of: /* 0x20 */
-/* File: arm64/op_instance_of.S */
/*
* Check to see if an object reference is an instance of a class.
*
@@ -1019,7 +961,6 @@
/* ------------------------------ */
.balign 128
.L_op_array_length: /* 0x21 */
-/* File: arm64/op_array_length.S */
/*
* Return the length of an array.
*/
@@ -1036,7 +977,6 @@
/* ------------------------------ */
.balign 128
.L_op_new_instance: /* 0x22 */
-/* File: arm64/op_new_instance.S */
/*
* Create a new instance of a class.
*/
@@ -1054,7 +994,6 @@
/* ------------------------------ */
.balign 128
.L_op_new_array: /* 0x23 */
-/* File: arm64/op_new_array.S */
/*
* Allocate an array of objects, specified with the array class
* and a count.
@@ -1077,7 +1016,6 @@
/* ------------------------------ */
.balign 128
.L_op_filled_new_array: /* 0x24 */
-/* File: arm64/op_filled_new_array.S */
/*
* Create a new array with elements filled from registers.
*
@@ -1099,8 +1037,6 @@
/* ------------------------------ */
.balign 128
.L_op_filled_new_array_range: /* 0x25 */
-/* File: arm64/op_filled_new_array_range.S */
-/* File: arm64/op_filled_new_array.S */
/*
* Create a new array with elements filled from registers.
*
@@ -1119,11 +1055,9 @@
GET_INST_OPCODE ip // extract opcode from rINST
GOTO_OPCODE ip // jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_fill_array_data: /* 0x26 */
-/* File: arm64/op_fill_array_data.S */
/* fill-array-data vAA, +BBBBBBBB */
EXPORT_PC
FETCH w0, 1 // x0<- 000000000000bbbb (lo)
@@ -1141,7 +1075,6 @@
/* ------------------------------ */
.balign 128
.L_op_throw: /* 0x27 */
-/* File: arm64/op_throw.S */
/*
* Throw an exception object in the current thread.
*/
@@ -1156,7 +1089,6 @@
/* ------------------------------ */
.balign 128
.L_op_goto: /* 0x28 */
-/* File: arm64/op_goto.S */
/*
* Unconditional branch, 8-bit offset.
*
@@ -1170,7 +1102,6 @@
/* ------------------------------ */
.balign 128
.L_op_goto_16: /* 0x29 */
-/* File: arm64/op_goto_16.S */
/*
* Unconditional branch, 16-bit offset.
*
@@ -1184,7 +1115,6 @@
/* ------------------------------ */
.balign 128
.L_op_goto_32: /* 0x2a */
-/* File: arm64/op_goto_32.S */
/*
* Unconditional branch, 32-bit offset.
*
@@ -1205,7 +1135,6 @@
/* ------------------------------ */
.balign 128
.L_op_packed_switch: /* 0x2b */
-/* File: arm64/op_packed_switch.S */
/*
* Handle a packed-switch or sparse-switch instruction. In both cases
* we decode it and hand it off to a helper function.
@@ -1229,8 +1158,6 @@
/* ------------------------------ */
.balign 128
.L_op_sparse_switch: /* 0x2c */
-/* File: arm64/op_sparse_switch.S */
-/* File: arm64/op_packed_switch.S */
/*
* Handle a packed-switch or sparse-switch instruction. In both cases
* we decode it and hand it off to a helper function.
@@ -1251,12 +1178,9 @@
sxtw xINST, w0
b MterpCommonTakenBranchNoFlags
-
/* ------------------------------ */
.balign 128
.L_op_cmpl_float: /* 0x2d */
-/* File: arm64/op_cmpl_float.S */
-/* File: arm64/fcmp.S */
/*
* Compare two floating-point values. Puts 0, 1, or -1 into the
* destination register based on the results of the comparison.
@@ -1276,12 +1200,9 @@
SET_VREG w0, w4 // vAA<- w0
GOTO_OPCODE ip // jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_cmpg_float: /* 0x2e */
-/* File: arm64/op_cmpg_float.S */
-/* File: arm64/fcmp.S */
/*
* Compare two floating-point values. Puts 0, 1, or -1 into the
* destination register based on the results of the comparison.
@@ -1301,12 +1222,9 @@
SET_VREG w0, w4 // vAA<- w0
GOTO_OPCODE ip // jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_cmpl_double: /* 0x2f */
-/* File: arm64/op_cmpl_double.S */
-/* File: arm64/fcmp.S */
/*
* Compare two floating-point values. Puts 0, 1, or -1 into the
* destination register based on the results of the comparison.
@@ -1326,12 +1244,9 @@
SET_VREG w0, w4 // vAA<- w0
GOTO_OPCODE ip // jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_cmpg_double: /* 0x30 */
-/* File: arm64/op_cmpg_double.S */
-/* File: arm64/fcmp.S */
/*
* Compare two floating-point values. Puts 0, 1, or -1 into the
* destination register based on the results of the comparison.
@@ -1351,11 +1266,9 @@
SET_VREG w0, w4 // vAA<- w0
GOTO_OPCODE ip // jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_cmp_long: /* 0x31 */
-/* File: arm64/op_cmp_long.S */
FETCH w0, 1 // w0<- CCBB
lsr w4, wINST, #8 // w4<- AA
and w2, w0, #255 // w2<- BB
@@ -1373,8 +1286,6 @@
/* ------------------------------ */
.balign 128
.L_op_if_eq: /* 0x32 */
-/* File: arm64/op_if_eq.S */
-/* File: arm64/bincmp.S */
/*
* Generic two-operand compare-and-branch operation. Provide a "condition"
* fragment that specifies the comparison to perform.
@@ -1395,12 +1306,9 @@
GET_INST_OPCODE ip // extract opcode from wINST
GOTO_OPCODE ip // jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_if_ne: /* 0x33 */
-/* File: arm64/op_if_ne.S */
-/* File: arm64/bincmp.S */
/*
* Generic two-operand compare-and-branch operation. Provide a "condition"
* fragment that specifies the comparison to perform.
@@ -1421,12 +1329,9 @@
GET_INST_OPCODE ip // extract opcode from wINST
GOTO_OPCODE ip // jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_if_lt: /* 0x34 */
-/* File: arm64/op_if_lt.S */
-/* File: arm64/bincmp.S */
/*
* Generic two-operand compare-and-branch operation. Provide a "condition"
* fragment that specifies the comparison to perform.
@@ -1447,12 +1352,9 @@
GET_INST_OPCODE ip // extract opcode from wINST
GOTO_OPCODE ip // jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_if_ge: /* 0x35 */
-/* File: arm64/op_if_ge.S */
-/* File: arm64/bincmp.S */
/*
* Generic two-operand compare-and-branch operation. Provide a "condition"
* fragment that specifies the comparison to perform.
@@ -1473,12 +1375,9 @@
GET_INST_OPCODE ip // extract opcode from wINST
GOTO_OPCODE ip // jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_if_gt: /* 0x36 */
-/* File: arm64/op_if_gt.S */
-/* File: arm64/bincmp.S */
/*
* Generic two-operand compare-and-branch operation. Provide a "condition"
* fragment that specifies the comparison to perform.
@@ -1499,12 +1398,9 @@
GET_INST_OPCODE ip // extract opcode from wINST
GOTO_OPCODE ip // jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_if_le: /* 0x37 */
-/* File: arm64/op_if_le.S */
-/* File: arm64/bincmp.S */
/*
* Generic two-operand compare-and-branch operation. Provide a "condition"
* fragment that specifies the comparison to perform.
@@ -1525,12 +1421,9 @@
GET_INST_OPCODE ip // extract opcode from wINST
GOTO_OPCODE ip // jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_if_eqz: /* 0x38 */
-/* File: arm64/op_if_eqz.S */
-/* File: arm64/zcmp.S */
/*
* Generic one-operand compare-and-branch operation. Provide a "condition"
* fragment that specifies the comparison to perform.
@@ -1551,12 +1444,9 @@
GET_INST_OPCODE ip // extract opcode from wINST
GOTO_OPCODE ip // jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_if_nez: /* 0x39 */
-/* File: arm64/op_if_nez.S */
-/* File: arm64/zcmp.S */
/*
* Generic one-operand compare-and-branch operation. Provide a "condition"
* fragment that specifies the comparison to perform.
@@ -1577,12 +1467,9 @@
GET_INST_OPCODE ip // extract opcode from wINST
GOTO_OPCODE ip // jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_if_ltz: /* 0x3a */
-/* File: arm64/op_if_ltz.S */
-/* File: arm64/zcmp.S */
/*
* Generic one-operand compare-and-branch operation. Provide a "condition"
* fragment that specifies the comparison to perform.
@@ -1603,12 +1490,9 @@
GET_INST_OPCODE ip // extract opcode from wINST
GOTO_OPCODE ip // jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_if_gez: /* 0x3b */
-/* File: arm64/op_if_gez.S */
-/* File: arm64/zcmp.S */
/*
* Generic one-operand compare-and-branch operation. Provide a "condition"
* fragment that specifies the comparison to perform.
@@ -1629,12 +1513,9 @@
GET_INST_OPCODE ip // extract opcode from wINST
GOTO_OPCODE ip // jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_if_gtz: /* 0x3c */
-/* File: arm64/op_if_gtz.S */
-/* File: arm64/zcmp.S */
/*
* Generic one-operand compare-and-branch operation. Provide a "condition"
* fragment that specifies the comparison to perform.
@@ -1655,12 +1536,9 @@
GET_INST_OPCODE ip // extract opcode from wINST
GOTO_OPCODE ip // jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_if_lez: /* 0x3d */
-/* File: arm64/op_if_lez.S */
-/* File: arm64/zcmp.S */
/*
* Generic one-operand compare-and-branch operation. Provide a "condition"
* fragment that specifies the comparison to perform.
@@ -1681,77 +1559,57 @@
GET_INST_OPCODE ip // extract opcode from wINST
GOTO_OPCODE ip // jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_unused_3e: /* 0x3e */
-/* File: arm64/op_unused_3e.S */
-/* File: arm64/unused.S */
/*
* Bail to reference interpreter to throw.
*/
b MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_3f: /* 0x3f */
-/* File: arm64/op_unused_3f.S */
-/* File: arm64/unused.S */
/*
* Bail to reference interpreter to throw.
*/
b MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_40: /* 0x40 */
-/* File: arm64/op_unused_40.S */
-/* File: arm64/unused.S */
/*
* Bail to reference interpreter to throw.
*/
b MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_41: /* 0x41 */
-/* File: arm64/op_unused_41.S */
-/* File: arm64/unused.S */
/*
* Bail to reference interpreter to throw.
*/
b MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_42: /* 0x42 */
-/* File: arm64/op_unused_42.S */
-/* File: arm64/unused.S */
/*
* Bail to reference interpreter to throw.
*/
b MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_43: /* 0x43 */
-/* File: arm64/op_unused_43.S */
-/* File: arm64/unused.S */
/*
* Bail to reference interpreter to throw.
*/
b MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_aget: /* 0x44 */
-/* File: arm64/op_aget.S */
/*
* Array get, 32 bits or less. vAA <- vBB[vCC].
*
@@ -1783,7 +1641,6 @@
/* ------------------------------ */
.balign 128
.L_op_aget_wide: /* 0x45 */
-/* File: arm64/op_aget_wide.S */
/*
* Array get, 64 bits. vAA <- vBB[vCC].
*
@@ -1809,7 +1666,6 @@
/* ------------------------------ */
.balign 128
.L_op_aget_object: /* 0x46 */
-/* File: arm64/op_aget_object.S */
/*
* Array object get. vAA <- vBB[vCC].
*
@@ -1834,8 +1690,6 @@
/* ------------------------------ */
.balign 128
.L_op_aget_boolean: /* 0x47 */
-/* File: arm64/op_aget_boolean.S */
-/* File: arm64/op_aget.S */
/*
* Array get, 32 bits or less. vAA <- vBB[vCC].
*
@@ -1864,12 +1718,9 @@
SET_VREG w2, w9 // vAA<- w2
GOTO_OPCODE ip // jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_aget_byte: /* 0x48 */
-/* File: arm64/op_aget_byte.S */
-/* File: arm64/op_aget.S */
/*
* Array get, 32 bits or less. vAA <- vBB[vCC].
*
@@ -1898,12 +1749,9 @@
SET_VREG w2, w9 // vAA<- w2
GOTO_OPCODE ip // jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_aget_char: /* 0x49 */
-/* File: arm64/op_aget_char.S */
-/* File: arm64/op_aget.S */
/*
* Array get, 32 bits or less. vAA <- vBB[vCC].
*
@@ -1932,12 +1780,9 @@
SET_VREG w2, w9 // vAA<- w2
GOTO_OPCODE ip // jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_aget_short: /* 0x4a */
-/* File: arm64/op_aget_short.S */
-/* File: arm64/op_aget.S */
/*
* Array get, 32 bits or less. vAA <- vBB[vCC].
*
@@ -1966,11 +1811,9 @@
SET_VREG w2, w9 // vAA<- w2
GOTO_OPCODE ip // jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_aput: /* 0x4b */
-/* File: arm64/op_aput.S */
/*
* Array put, 32 bits or less. vBB[vCC] <- vAA.
*
@@ -2002,7 +1845,6 @@
/* ------------------------------ */
.balign 128
.L_op_aput_wide: /* 0x4c */
-/* File: arm64/op_aput_wide.S */
/*
* Array put, 64 bits. vBB[vCC] <- vAA.
*
@@ -2028,7 +1870,6 @@
/* ------------------------------ */
.balign 128
.L_op_aput_object: /* 0x4d */
-/* File: arm64/op_aput_object.S */
/*
* Store an object into an array. vBB[vCC] <- vAA.
*/
@@ -2046,8 +1887,6 @@
/* ------------------------------ */
.balign 128
.L_op_aput_boolean: /* 0x4e */
-/* File: arm64/op_aput_boolean.S */
-/* File: arm64/op_aput.S */
/*
* Array put, 32 bits or less. vBB[vCC] <- vAA.
*
@@ -2076,12 +1915,9 @@
strb w2, [x0, #MIRROR_BOOLEAN_ARRAY_DATA_OFFSET] // vBB[vCC]<- w2
GOTO_OPCODE ip // jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_aput_byte: /* 0x4f */
-/* File: arm64/op_aput_byte.S */
-/* File: arm64/op_aput.S */
/*
* Array put, 32 bits or less. vBB[vCC] <- vAA.
*
@@ -2110,12 +1946,9 @@
strb w2, [x0, #MIRROR_BYTE_ARRAY_DATA_OFFSET] // vBB[vCC]<- w2
GOTO_OPCODE ip // jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_aput_char: /* 0x50 */
-/* File: arm64/op_aput_char.S */
-/* File: arm64/op_aput.S */
/*
* Array put, 32 bits or less. vBB[vCC] <- vAA.
*
@@ -2144,12 +1977,9 @@
strh w2, [x0, #MIRROR_CHAR_ARRAY_DATA_OFFSET] // vBB[vCC]<- w2
GOTO_OPCODE ip // jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_aput_short: /* 0x51 */
-/* File: arm64/op_aput_short.S */
-/* File: arm64/op_aput.S */
/*
* Array put, 32 bits or less. vBB[vCC] <- vAA.
*
@@ -2178,12 +2008,9 @@
strh w2, [x0, #MIRROR_SHORT_ARRAY_DATA_OFFSET] // vBB[vCC]<- w2
GOTO_OPCODE ip // jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_iget: /* 0x52 */
-/* File: arm64/op_iget.S */
-/* File: arm64/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2199,13 +2026,9 @@
GET_INST_OPCODE ip // extract opcode from rINST
GOTO_OPCODE ip // jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_iget_wide: /* 0x53 */
-/* File: arm64/op_iget_wide.S */
-/* File: arm64/op_iget.S */
-/* File: arm64/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2221,14 +2044,9 @@
GET_INST_OPCODE ip // extract opcode from rINST
GOTO_OPCODE ip // jump to next instruction
-
-
/* ------------------------------ */
.balign 128
.L_op_iget_object: /* 0x54 */
-/* File: arm64/op_iget_object.S */
-/* File: arm64/op_iget.S */
-/* File: arm64/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2244,14 +2062,9 @@
GET_INST_OPCODE ip // extract opcode from rINST
GOTO_OPCODE ip // jump to next instruction
-
-
/* ------------------------------ */
.balign 128
.L_op_iget_boolean: /* 0x55 */
-/* File: arm64/op_iget_boolean.S */
-/* File: arm64/op_iget.S */
-/* File: arm64/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2267,14 +2080,9 @@
GET_INST_OPCODE ip // extract opcode from rINST
GOTO_OPCODE ip // jump to next instruction
-
-
/* ------------------------------ */
.balign 128
.L_op_iget_byte: /* 0x56 */
-/* File: arm64/op_iget_byte.S */
-/* File: arm64/op_iget.S */
-/* File: arm64/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2290,14 +2098,9 @@
GET_INST_OPCODE ip // extract opcode from rINST
GOTO_OPCODE ip // jump to next instruction
-
-
/* ------------------------------ */
.balign 128
.L_op_iget_char: /* 0x57 */
-/* File: arm64/op_iget_char.S */
-/* File: arm64/op_iget.S */
-/* File: arm64/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2313,14 +2116,9 @@
GET_INST_OPCODE ip // extract opcode from rINST
GOTO_OPCODE ip // jump to next instruction
-
-
/* ------------------------------ */
.balign 128
.L_op_iget_short: /* 0x58 */
-/* File: arm64/op_iget_short.S */
-/* File: arm64/op_iget.S */
-/* File: arm64/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2336,13 +2134,9 @@
GET_INST_OPCODE ip // extract opcode from rINST
GOTO_OPCODE ip // jump to next instruction
-
-
/* ------------------------------ */
.balign 128
.L_op_iput: /* 0x59 */
-/* File: arm64/op_iput.S */
-/* File: arm64/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2358,13 +2152,9 @@
GET_INST_OPCODE ip // extract opcode from rINST
GOTO_OPCODE ip // jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_iput_wide: /* 0x5a */
-/* File: arm64/op_iput_wide.S */
-/* File: arm64/op_iput.S */
-/* File: arm64/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2380,14 +2170,9 @@
GET_INST_OPCODE ip // extract opcode from rINST
GOTO_OPCODE ip // jump to next instruction
-
-
/* ------------------------------ */
.balign 128
.L_op_iput_object: /* 0x5b */
-/* File: arm64/op_iput_object.S */
-/* File: arm64/op_iput.S */
-/* File: arm64/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2403,14 +2188,9 @@
GET_INST_OPCODE ip // extract opcode from rINST
GOTO_OPCODE ip // jump to next instruction
-
-
/* ------------------------------ */
.balign 128
.L_op_iput_boolean: /* 0x5c */
-/* File: arm64/op_iput_boolean.S */
-/* File: arm64/op_iput.S */
-/* File: arm64/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2426,14 +2206,9 @@
GET_INST_OPCODE ip // extract opcode from rINST
GOTO_OPCODE ip // jump to next instruction
-
-
/* ------------------------------ */
.balign 128
.L_op_iput_byte: /* 0x5d */
-/* File: arm64/op_iput_byte.S */
-/* File: arm64/op_iput.S */
-/* File: arm64/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2449,14 +2224,9 @@
GET_INST_OPCODE ip // extract opcode from rINST
GOTO_OPCODE ip // jump to next instruction
-
-
/* ------------------------------ */
.balign 128
.L_op_iput_char: /* 0x5e */
-/* File: arm64/op_iput_char.S */
-/* File: arm64/op_iput.S */
-/* File: arm64/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2472,14 +2242,9 @@
GET_INST_OPCODE ip // extract opcode from rINST
GOTO_OPCODE ip // jump to next instruction
-
-
/* ------------------------------ */
.balign 128
.L_op_iput_short: /* 0x5f */
-/* File: arm64/op_iput_short.S */
-/* File: arm64/op_iput.S */
-/* File: arm64/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2495,13 +2260,9 @@
GET_INST_OPCODE ip // extract opcode from rINST
GOTO_OPCODE ip // jump to next instruction
-
-
/* ------------------------------ */
.balign 128
.L_op_sget: /* 0x60 */
-/* File: arm64/op_sget.S */
-/* File: arm64/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2517,13 +2278,9 @@
GET_INST_OPCODE ip // extract opcode from rINST
GOTO_OPCODE ip // jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_sget_wide: /* 0x61 */
-/* File: arm64/op_sget_wide.S */
-/* File: arm64/op_sget.S */
-/* File: arm64/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2539,14 +2296,9 @@
GET_INST_OPCODE ip // extract opcode from rINST
GOTO_OPCODE ip // jump to next instruction
-
-
/* ------------------------------ */
.balign 128
.L_op_sget_object: /* 0x62 */
-/* File: arm64/op_sget_object.S */
-/* File: arm64/op_sget.S */
-/* File: arm64/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2562,14 +2314,9 @@
GET_INST_OPCODE ip // extract opcode from rINST
GOTO_OPCODE ip // jump to next instruction
-
-
/* ------------------------------ */
.balign 128
.L_op_sget_boolean: /* 0x63 */
-/* File: arm64/op_sget_boolean.S */
-/* File: arm64/op_sget.S */
-/* File: arm64/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2585,14 +2332,9 @@
GET_INST_OPCODE ip // extract opcode from rINST
GOTO_OPCODE ip // jump to next instruction
-
-
/* ------------------------------ */
.balign 128
.L_op_sget_byte: /* 0x64 */
-/* File: arm64/op_sget_byte.S */
-/* File: arm64/op_sget.S */
-/* File: arm64/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2608,14 +2350,9 @@
GET_INST_OPCODE ip // extract opcode from rINST
GOTO_OPCODE ip // jump to next instruction
-
-
/* ------------------------------ */
.balign 128
.L_op_sget_char: /* 0x65 */
-/* File: arm64/op_sget_char.S */
-/* File: arm64/op_sget.S */
-/* File: arm64/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2631,14 +2368,9 @@
GET_INST_OPCODE ip // extract opcode from rINST
GOTO_OPCODE ip // jump to next instruction
-
-
/* ------------------------------ */
.balign 128
.L_op_sget_short: /* 0x66 */
-/* File: arm64/op_sget_short.S */
-/* File: arm64/op_sget.S */
-/* File: arm64/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2654,13 +2386,9 @@
GET_INST_OPCODE ip // extract opcode from rINST
GOTO_OPCODE ip // jump to next instruction
-
-
/* ------------------------------ */
.balign 128
.L_op_sput: /* 0x67 */
-/* File: arm64/op_sput.S */
-/* File: arm64/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2676,13 +2404,9 @@
GET_INST_OPCODE ip // extract opcode from rINST
GOTO_OPCODE ip // jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_sput_wide: /* 0x68 */
-/* File: arm64/op_sput_wide.S */
-/* File: arm64/op_sput.S */
-/* File: arm64/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2698,14 +2422,9 @@
GET_INST_OPCODE ip // extract opcode from rINST
GOTO_OPCODE ip // jump to next instruction
-
-
/* ------------------------------ */
.balign 128
.L_op_sput_object: /* 0x69 */
-/* File: arm64/op_sput_object.S */
-/* File: arm64/op_sput.S */
-/* File: arm64/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2721,14 +2440,9 @@
GET_INST_OPCODE ip // extract opcode from rINST
GOTO_OPCODE ip // jump to next instruction
-
-
/* ------------------------------ */
.balign 128
.L_op_sput_boolean: /* 0x6a */
-/* File: arm64/op_sput_boolean.S */
-/* File: arm64/op_sput.S */
-/* File: arm64/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2744,14 +2458,9 @@
GET_INST_OPCODE ip // extract opcode from rINST
GOTO_OPCODE ip // jump to next instruction
-
-
/* ------------------------------ */
.balign 128
.L_op_sput_byte: /* 0x6b */
-/* File: arm64/op_sput_byte.S */
-/* File: arm64/op_sput.S */
-/* File: arm64/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2767,14 +2476,9 @@
GET_INST_OPCODE ip // extract opcode from rINST
GOTO_OPCODE ip // jump to next instruction
-
-
/* ------------------------------ */
.balign 128
.L_op_sput_char: /* 0x6c */
-/* File: arm64/op_sput_char.S */
-/* File: arm64/op_sput.S */
-/* File: arm64/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2790,14 +2494,9 @@
GET_INST_OPCODE ip // extract opcode from rINST
GOTO_OPCODE ip // jump to next instruction
-
-
/* ------------------------------ */
.balign 128
.L_op_sput_short: /* 0x6d */
-/* File: arm64/op_sput_short.S */
-/* File: arm64/op_sput.S */
-/* File: arm64/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2813,13 +2512,9 @@
GET_INST_OPCODE ip // extract opcode from rINST
GOTO_OPCODE ip // jump to next instruction
-
-
/* ------------------------------ */
.balign 128
.L_op_invoke_virtual: /* 0x6e */
-/* File: arm64/op_invoke_virtual.S */
-/* File: arm64/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -2839,7 +2534,6 @@
GET_INST_OPCODE ip
GOTO_OPCODE ip
-
/*
* Handle a virtual method call.
*
@@ -2851,8 +2545,6 @@
/* ------------------------------ */
.balign 128
.L_op_invoke_super: /* 0x6f */
-/* File: arm64/op_invoke_super.S */
-/* File: arm64/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -2872,7 +2564,6 @@
GET_INST_OPCODE ip
GOTO_OPCODE ip
-
/*
* Handle a "super" method call.
*
@@ -2884,8 +2575,6 @@
/* ------------------------------ */
.balign 128
.L_op_invoke_direct: /* 0x70 */
-/* File: arm64/op_invoke_direct.S */
-/* File: arm64/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -2905,13 +2594,9 @@
GET_INST_OPCODE ip
GOTO_OPCODE ip
-
-
/* ------------------------------ */
.balign 128
.L_op_invoke_static: /* 0x71 */
-/* File: arm64/op_invoke_static.S */
-/* File: arm64/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -2931,14 +2616,9 @@
GET_INST_OPCODE ip
GOTO_OPCODE ip
-
-
-
/* ------------------------------ */
.balign 128
.L_op_invoke_interface: /* 0x72 */
-/* File: arm64/op_invoke_interface.S */
-/* File: arm64/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -2958,7 +2638,6 @@
GET_INST_OPCODE ip
GOTO_OPCODE ip
-
/*
* Handle an interface method call.
*
@@ -2970,7 +2649,6 @@
/* ------------------------------ */
.balign 128
.L_op_return_void_no_barrier: /* 0x73 */
-/* File: arm64/op_return_void_no_barrier.S */
ldr w7, [xSELF, #THREAD_FLAGS_OFFSET]
mov x0, xSELF
ands w7, w7, #THREAD_SUSPEND_OR_CHECKPOINT_REQUEST
@@ -2985,8 +2663,6 @@
/* ------------------------------ */
.balign 128
.L_op_invoke_virtual_range: /* 0x74 */
-/* File: arm64/op_invoke_virtual_range.S */
-/* File: arm64/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -3006,13 +2682,9 @@
GET_INST_OPCODE ip
GOTO_OPCODE ip
-
-
/* ------------------------------ */
.balign 128
.L_op_invoke_super_range: /* 0x75 */
-/* File: arm64/op_invoke_super_range.S */
-/* File: arm64/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -3032,13 +2704,9 @@
GET_INST_OPCODE ip
GOTO_OPCODE ip
-
-
/* ------------------------------ */
.balign 128
.L_op_invoke_direct_range: /* 0x76 */
-/* File: arm64/op_invoke_direct_range.S */
-/* File: arm64/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -3058,13 +2726,9 @@
GET_INST_OPCODE ip
GOTO_OPCODE ip
-
-
/* ------------------------------ */
.balign 128
.L_op_invoke_static_range: /* 0x77 */
-/* File: arm64/op_invoke_static_range.S */
-/* File: arm64/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -3084,13 +2748,9 @@
GET_INST_OPCODE ip
GOTO_OPCODE ip
-
-
/* ------------------------------ */
.balign 128
.L_op_invoke_interface_range: /* 0x78 */
-/* File: arm64/op_invoke_interface_range.S */
-/* File: arm64/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -3110,35 +2770,25 @@
GET_INST_OPCODE ip
GOTO_OPCODE ip
-
-
/* ------------------------------ */
.balign 128
.L_op_unused_79: /* 0x79 */
-/* File: arm64/op_unused_79.S */
-/* File: arm64/unused.S */
/*
* Bail to reference interpreter to throw.
*/
b MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_7a: /* 0x7a */
-/* File: arm64/op_unused_7a.S */
-/* File: arm64/unused.S */
/*
* Bail to reference interpreter to throw.
*/
b MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_neg_int: /* 0x7b */
-/* File: arm64/op_neg_int.S */
-/* File: arm64/unop.S */
/*
* Generic 32-bit unary operation. Provide an "instr" line that
* specifies an instruction that performs "result = op w0".
@@ -3158,12 +2808,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 8-9 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_not_int: /* 0x7c */
-/* File: arm64/op_not_int.S */
-/* File: arm64/unop.S */
/*
* Generic 32-bit unary operation. Provide an "instr" line that
* specifies an instruction that performs "result = op w0".
@@ -3183,12 +2830,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 8-9 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_neg_long: /* 0x7d */
-/* File: arm64/op_neg_long.S */
-/* File: arm64/unopWide.S */
/*
* Generic 64-bit unary operation. Provide an "instr" line that
* specifies an instruction that performs "result = op x0".
@@ -3206,12 +2850,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 10-11 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_not_long: /* 0x7e */
-/* File: arm64/op_not_long.S */
-/* File: arm64/unopWide.S */
/*
* Generic 64-bit unary operation. Provide an "instr" line that
* specifies an instruction that performs "result = op x0".
@@ -3229,12 +2870,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 10-11 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_neg_float: /* 0x7f */
-/* File: arm64/op_neg_float.S */
-/* File: arm64/unop.S */
/*
* Generic 32-bit unary operation. Provide an "instr" line that
* specifies an instruction that performs "result = op w0".
@@ -3254,12 +2892,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 8-9 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_neg_double: /* 0x80 */
-/* File: arm64/op_neg_double.S */
-/* File: arm64/unopWide.S */
/*
* Generic 64-bit unary operation. Provide an "instr" line that
* specifies an instruction that performs "result = op x0".
@@ -3277,11 +2912,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 10-11 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_int_to_long: /* 0x81 */
-/* File: arm64/op_int_to_long.S */
/* int-to-long vA, vB */
lsr w3, wINST, #12 // w3<- B
ubfx w4, wINST, #8, #4 // w4<- A
@@ -3294,8 +2927,6 @@
/* ------------------------------ */
.balign 128
.L_op_int_to_float: /* 0x82 */
-/* File: arm64/op_int_to_float.S */
-/* File: arm64/funopNarrow.S */
/*
* Generic 32bit-to-32bit floating point unary operation. Provide an
* "instr" line that specifies an instruction that performs "s0 = op w0".
@@ -3313,12 +2944,9 @@
SET_VREG s0, w4 // vA<- d0
GOTO_OPCODE ip // jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_int_to_double: /* 0x83 */
-/* File: arm64/op_int_to_double.S */
-/* File: arm64/funopWider.S */
/*
* Generic 32bit-to-64bit floating point unary operation. Provide an
* "instr" line that specifies an instruction that performs "d0 = op w0".
@@ -3335,13 +2963,10 @@
SET_VREG_WIDE d0, w4 // vA<- d0
GOTO_OPCODE ip // jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_long_to_int: /* 0x84 */
-/* File: arm64/op_long_to_int.S */
/* we ignore the high word, making this equivalent to a 32-bit reg move */
-/* File: arm64/op_move.S */
/* for move, move-object, long-to-int */
/* op vA, vB */
lsr w1, wINST, #12 // x1<- B from 15:12
@@ -3356,12 +2981,9 @@
.endif
GOTO_OPCODE ip // execute next instruction
-
/* ------------------------------ */
.balign 128
.L_op_long_to_float: /* 0x85 */
-/* File: arm64/op_long_to_float.S */
-/* File: arm64/funopNarrower.S */
/*
* Generic 64bit-to-32bit floating point unary operation. Provide an
* "instr" line that specifies an instruction that performs "s0 = op x0".
@@ -3378,12 +3000,9 @@
SET_VREG s0, w4 // vA<- d0
GOTO_OPCODE ip // jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_long_to_double: /* 0x86 */
-/* File: arm64/op_long_to_double.S */
-/* File: arm64/funopWide.S */
/*
* Generic 64bit-to-64bit floating point unary operation. Provide an
* "instr" line that specifies an instruction that performs "d0 = op x0".
@@ -3400,12 +3019,9 @@
SET_VREG_WIDE d0, w4 // vA<- d0
GOTO_OPCODE ip // jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_float_to_int: /* 0x87 */
-/* File: arm64/op_float_to_int.S */
-/* File: arm64/funopNarrow.S */
/*
* Generic 32bit-to-32bit floating point unary operation. Provide an
* "instr" line that specifies an instruction that performs "w0 = op s0".
@@ -3423,12 +3039,9 @@
SET_VREG w0, w4 // vA<- d0
GOTO_OPCODE ip // jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_float_to_long: /* 0x88 */
-/* File: arm64/op_float_to_long.S */
-/* File: arm64/funopWider.S */
/*
* Generic 32bit-to-64bit floating point unary operation. Provide an
* "instr" line that specifies an instruction that performs "x0 = op s0".
@@ -3445,12 +3058,9 @@
SET_VREG_WIDE x0, w4 // vA<- d0
GOTO_OPCODE ip // jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_float_to_double: /* 0x89 */
-/* File: arm64/op_float_to_double.S */
-/* File: arm64/funopWider.S */
/*
* Generic 32bit-to-64bit floating point unary operation. Provide an
* "instr" line that specifies an instruction that performs "d0 = op s0".
@@ -3467,12 +3077,9 @@
SET_VREG_WIDE d0, w4 // vA<- d0
GOTO_OPCODE ip // jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_double_to_int: /* 0x8a */
-/* File: arm64/op_double_to_int.S */
-/* File: arm64/funopNarrower.S */
/*
* Generic 64bit-to-32bit floating point unary operation. Provide an
* "instr" line that specifies an instruction that performs "w0 = op d0".
@@ -3489,12 +3096,9 @@
SET_VREG w0, w4 // vA<- d0
GOTO_OPCODE ip // jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_double_to_long: /* 0x8b */
-/* File: arm64/op_double_to_long.S */
-/* File: arm64/funopWide.S */
/*
* Generic 64bit-to-64bit floating point unary operation. Provide an
* "instr" line that specifies an instruction that performs "x0 = op d0".
@@ -3511,12 +3115,9 @@
SET_VREG_WIDE x0, w4 // vA<- d0
GOTO_OPCODE ip // jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_double_to_float: /* 0x8c */
-/* File: arm64/op_double_to_float.S */
-/* File: arm64/funopNarrower.S */
/*
* Generic 64bit-to-32bit floating point unary operation. Provide an
* "instr" line that specifies an instruction that performs "s0 = op d0".
@@ -3533,12 +3134,9 @@
SET_VREG s0, w4 // vA<- d0
GOTO_OPCODE ip // jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_int_to_byte: /* 0x8d */
-/* File: arm64/op_int_to_byte.S */
-/* File: arm64/unop.S */
/*
* Generic 32-bit unary operation. Provide an "instr" line that
* specifies an instruction that performs "result = op w0".
@@ -3558,12 +3156,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 8-9 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_int_to_char: /* 0x8e */
-/* File: arm64/op_int_to_char.S */
-/* File: arm64/unop.S */
/*
* Generic 32-bit unary operation. Provide an "instr" line that
* specifies an instruction that performs "result = op w0".
@@ -3583,12 +3178,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 8-9 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_int_to_short: /* 0x8f */
-/* File: arm64/op_int_to_short.S */
-/* File: arm64/unop.S */
/*
* Generic 32-bit unary operation. Provide an "instr" line that
* specifies an instruction that performs "result = op w0".
@@ -3608,12 +3200,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 8-9 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_add_int: /* 0x90 */
-/* File: arm64/op_add_int.S */
-/* File: arm64/binop.S */
/*
* Generic 32-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = w0 op w1".
@@ -3647,12 +3236,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 11-14 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_sub_int: /* 0x91 */
-/* File: arm64/op_sub_int.S */
-/* File: arm64/binop.S */
/*
* Generic 32-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = w0 op w1".
@@ -3686,13 +3272,10 @@
GOTO_OPCODE ip // jump to next instruction
/* 11-14 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_mul_int: /* 0x92 */
-/* File: arm64/op_mul_int.S */
/* must be "mul w0, w1, w0" -- "w0, w0, w1" is illegal */
-/* File: arm64/binop.S */
/*
* Generic 32-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = w0 op w1".
@@ -3726,12 +3309,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 11-14 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_div_int: /* 0x93 */
-/* File: arm64/op_div_int.S */
-/* File: arm64/binop.S */
/*
* Generic 32-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = w0 op w1".
@@ -3765,12 +3345,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 11-14 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_rem_int: /* 0x94 */
-/* File: arm64/op_rem_int.S */
-/* File: arm64/binop.S */
/*
* Generic 32-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = w0 op w1".
@@ -3804,12 +3381,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 11-14 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_and_int: /* 0x95 */
-/* File: arm64/op_and_int.S */
-/* File: arm64/binop.S */
/*
* Generic 32-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = w0 op w1".
@@ -3843,12 +3417,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 11-14 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_or_int: /* 0x96 */
-/* File: arm64/op_or_int.S */
-/* File: arm64/binop.S */
/*
* Generic 32-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = w0 op w1".
@@ -3882,12 +3453,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 11-14 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_xor_int: /* 0x97 */
-/* File: arm64/op_xor_int.S */
-/* File: arm64/binop.S */
/*
* Generic 32-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = w0 op w1".
@@ -3921,12 +3489,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 11-14 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_shl_int: /* 0x98 */
-/* File: arm64/op_shl_int.S */
-/* File: arm64/binop.S */
/*
* Generic 32-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = w0 op w1".
@@ -3960,12 +3525,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 11-14 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_shr_int: /* 0x99 */
-/* File: arm64/op_shr_int.S */
-/* File: arm64/binop.S */
/*
* Generic 32-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = w0 op w1".
@@ -3999,12 +3561,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 11-14 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_ushr_int: /* 0x9a */
-/* File: arm64/op_ushr_int.S */
-/* File: arm64/binop.S */
/*
* Generic 32-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = w0 op w1".
@@ -4038,12 +3597,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 11-14 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_add_long: /* 0x9b */
-/* File: arm64/op_add_long.S */
-/* File: arm64/binopWide.S */
/*
* Generic 64-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = x1 op x2".
@@ -4074,12 +3630,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 11-14 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_sub_long: /* 0x9c */
-/* File: arm64/op_sub_long.S */
-/* File: arm64/binopWide.S */
/*
* Generic 64-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = x1 op x2".
@@ -4110,12 +3663,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 11-14 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_mul_long: /* 0x9d */
-/* File: arm64/op_mul_long.S */
-/* File: arm64/binopWide.S */
/*
* Generic 64-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = x1 op x2".
@@ -4146,12 +3696,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 11-14 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_div_long: /* 0x9e */
-/* File: arm64/op_div_long.S */
-/* File: arm64/binopWide.S */
/*
* Generic 64-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = x1 op x2".
@@ -4182,12 +3729,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 11-14 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_rem_long: /* 0x9f */
-/* File: arm64/op_rem_long.S */
-/* File: arm64/binopWide.S */
/*
* Generic 64-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = x1 op x2".
@@ -4218,12 +3762,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 11-14 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_and_long: /* 0xa0 */
-/* File: arm64/op_and_long.S */
-/* File: arm64/binopWide.S */
/*
* Generic 64-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = x1 op x2".
@@ -4254,12 +3795,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 11-14 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_or_long: /* 0xa1 */
-/* File: arm64/op_or_long.S */
-/* File: arm64/binopWide.S */
/*
* Generic 64-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = x1 op x2".
@@ -4290,12 +3828,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 11-14 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_xor_long: /* 0xa2 */
-/* File: arm64/op_xor_long.S */
-/* File: arm64/binopWide.S */
/*
* Generic 64-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = x1 op x2".
@@ -4326,12 +3861,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 11-14 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_shl_long: /* 0xa3 */
-/* File: arm64/op_shl_long.S */
-/* File: arm64/shiftWide.S */
/*
* 64-bit shift operation.
*
@@ -4351,12 +3883,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 11-14 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_shr_long: /* 0xa4 */
-/* File: arm64/op_shr_long.S */
-/* File: arm64/shiftWide.S */
/*
* 64-bit shift operation.
*
@@ -4376,12 +3905,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 11-14 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_ushr_long: /* 0xa5 */
-/* File: arm64/op_ushr_long.S */
-/* File: arm64/shiftWide.S */
/*
* 64-bit shift operation.
*
@@ -4401,12 +3927,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 11-14 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_add_float: /* 0xa6 */
-/* File: arm64/op_add_float.S */
-/* File: arm64/fbinop.S */
/*:
* Generic 32-bit floating-point operation.
*
@@ -4426,12 +3949,9 @@
SET_VREG s0, w1
GOTO_OPCODE ip // jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_sub_float: /* 0xa7 */
-/* File: arm64/op_sub_float.S */
-/* File: arm64/fbinop.S */
/*:
* Generic 32-bit floating-point operation.
*
@@ -4451,12 +3971,9 @@
SET_VREG s0, w1
GOTO_OPCODE ip // jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_mul_float: /* 0xa8 */
-/* File: arm64/op_mul_float.S */
-/* File: arm64/fbinop.S */
/*:
* Generic 32-bit floating-point operation.
*
@@ -4476,12 +3993,9 @@
SET_VREG s0, w1
GOTO_OPCODE ip // jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_div_float: /* 0xa9 */
-/* File: arm64/op_div_float.S */
-/* File: arm64/fbinop.S */
/*:
* Generic 32-bit floating-point operation.
*
@@ -4501,13 +4015,10 @@
SET_VREG s0, w1
GOTO_OPCODE ip // jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_rem_float: /* 0xaa */
-/* File: arm64/op_rem_float.S */
/* EABI doesn't define a float remainder function, but libm does */
-/* File: arm64/fbinop.S */
/*:
* Generic 32-bit floating-point operation.
*
@@ -4527,12 +4038,9 @@
SET_VREG s0, w1
GOTO_OPCODE ip // jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_add_double: /* 0xab */
-/* File: arm64/op_add_double.S */
-/* File: arm64/binopWide.S */
/*
* Generic 64-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = x1 op x2".
@@ -4563,12 +4071,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 11-14 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_sub_double: /* 0xac */
-/* File: arm64/op_sub_double.S */
-/* File: arm64/binopWide.S */
/*
* Generic 64-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = x1 op x2".
@@ -4599,12 +4104,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 11-14 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_mul_double: /* 0xad */
-/* File: arm64/op_mul_double.S */
-/* File: arm64/binopWide.S */
/*
* Generic 64-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = x1 op x2".
@@ -4635,12 +4137,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 11-14 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_div_double: /* 0xae */
-/* File: arm64/op_div_double.S */
-/* File: arm64/binopWide.S */
/*
* Generic 64-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = x1 op x2".
@@ -4671,11 +4170,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 11-14 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_rem_double: /* 0xaf */
-/* File: arm64/op_rem_double.S */
/* rem vAA, vBB, vCC */
FETCH w0, 1 // w0<- CCBB
lsr w2, w0, #8 // w2<- CC
@@ -4693,8 +4190,6 @@
/* ------------------------------ */
.balign 128
.L_op_add_int_2addr: /* 0xb0 */
-/* File: arm64/op_add_int_2addr.S */
-/* File: arm64/binop2addr.S */
/*
* Generic 32-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = w0 op w1".
@@ -4725,12 +4220,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 10-13 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_sub_int_2addr: /* 0xb1 */
-/* File: arm64/op_sub_int_2addr.S */
-/* File: arm64/binop2addr.S */
/*
* Generic 32-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = w0 op w1".
@@ -4761,13 +4253,10 @@
GOTO_OPCODE ip // jump to next instruction
/* 10-13 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_mul_int_2addr: /* 0xb2 */
-/* File: arm64/op_mul_int_2addr.S */
/* must be "mul w0, w1, w0" -- "w0, w0, w1" is illegal */
-/* File: arm64/binop2addr.S */
/*
* Generic 32-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = w0 op w1".
@@ -4798,12 +4287,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 10-13 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_div_int_2addr: /* 0xb3 */
-/* File: arm64/op_div_int_2addr.S */
-/* File: arm64/binop2addr.S */
/*
* Generic 32-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = w0 op w1".
@@ -4834,12 +4320,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 10-13 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_rem_int_2addr: /* 0xb4 */
-/* File: arm64/op_rem_int_2addr.S */
-/* File: arm64/binop2addr.S */
/*
* Generic 32-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = w0 op w1".
@@ -4870,12 +4353,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 10-13 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_and_int_2addr: /* 0xb5 */
-/* File: arm64/op_and_int_2addr.S */
-/* File: arm64/binop2addr.S */
/*
* Generic 32-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = w0 op w1".
@@ -4906,12 +4386,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 10-13 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_or_int_2addr: /* 0xb6 */
-/* File: arm64/op_or_int_2addr.S */
-/* File: arm64/binop2addr.S */
/*
* Generic 32-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = w0 op w1".
@@ -4942,12 +4419,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 10-13 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_xor_int_2addr: /* 0xb7 */
-/* File: arm64/op_xor_int_2addr.S */
-/* File: arm64/binop2addr.S */
/*
* Generic 32-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = w0 op w1".
@@ -4978,12 +4452,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 10-13 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_shl_int_2addr: /* 0xb8 */
-/* File: arm64/op_shl_int_2addr.S */
-/* File: arm64/binop2addr.S */
/*
* Generic 32-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = w0 op w1".
@@ -5014,12 +4485,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 10-13 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_shr_int_2addr: /* 0xb9 */
-/* File: arm64/op_shr_int_2addr.S */
-/* File: arm64/binop2addr.S */
/*
* Generic 32-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = w0 op w1".
@@ -5050,12 +4518,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 10-13 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_ushr_int_2addr: /* 0xba */
-/* File: arm64/op_ushr_int_2addr.S */
-/* File: arm64/binop2addr.S */
/*
* Generic 32-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = w0 op w1".
@@ -5086,12 +4551,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 10-13 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_add_long_2addr: /* 0xbb */
-/* File: arm64/op_add_long_2addr.S */
-/* File: arm64/binopWide2addr.S */
/*
* Generic 64-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "x0 = x0 op x1".
@@ -5121,12 +4583,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 10-13 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_sub_long_2addr: /* 0xbc */
-/* File: arm64/op_sub_long_2addr.S */
-/* File: arm64/binopWide2addr.S */
/*
* Generic 64-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "x0 = x0 op x1".
@@ -5156,12 +4615,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 10-13 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_mul_long_2addr: /* 0xbd */
-/* File: arm64/op_mul_long_2addr.S */
-/* File: arm64/binopWide2addr.S */
/*
* Generic 64-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "x0 = x0 op x1".
@@ -5191,12 +4647,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 10-13 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_div_long_2addr: /* 0xbe */
-/* File: arm64/op_div_long_2addr.S */
-/* File: arm64/binopWide2addr.S */
/*
* Generic 64-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "x0 = x0 op x1".
@@ -5226,12 +4679,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 10-13 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_rem_long_2addr: /* 0xbf */
-/* File: arm64/op_rem_long_2addr.S */
-/* File: arm64/binopWide2addr.S */
/*
* Generic 64-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "x0 = x0 op x1".
@@ -5261,12 +4711,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 10-13 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_and_long_2addr: /* 0xc0 */
-/* File: arm64/op_and_long_2addr.S */
-/* File: arm64/binopWide2addr.S */
/*
* Generic 64-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "x0 = x0 op x1".
@@ -5296,12 +4743,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 10-13 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_or_long_2addr: /* 0xc1 */
-/* File: arm64/op_or_long_2addr.S */
-/* File: arm64/binopWide2addr.S */
/*
* Generic 64-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "x0 = x0 op x1".
@@ -5331,12 +4775,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 10-13 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_xor_long_2addr: /* 0xc2 */
-/* File: arm64/op_xor_long_2addr.S */
-/* File: arm64/binopWide2addr.S */
/*
* Generic 64-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "x0 = x0 op x1".
@@ -5366,12 +4807,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 10-13 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_shl_long_2addr: /* 0xc3 */
-/* File: arm64/op_shl_long_2addr.S */
-/* File: arm64/shiftWide2addr.S */
/*
* Generic 64-bit shift operation.
*/
@@ -5387,12 +4825,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 10-13 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_shr_long_2addr: /* 0xc4 */
-/* File: arm64/op_shr_long_2addr.S */
-/* File: arm64/shiftWide2addr.S */
/*
* Generic 64-bit shift operation.
*/
@@ -5408,12 +4843,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 10-13 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_ushr_long_2addr: /* 0xc5 */
-/* File: arm64/op_ushr_long_2addr.S */
-/* File: arm64/shiftWide2addr.S */
/*
* Generic 64-bit shift operation.
*/
@@ -5429,12 +4861,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 10-13 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_add_float_2addr: /* 0xc6 */
-/* File: arm64/op_add_float_2addr.S */
-/* File: arm64/fbinop2addr.S */
/*
* Generic 32-bit floating point "/2addr" binary operation. Provide
* an "instr" line that specifies an instruction that performs
@@ -5453,12 +4882,9 @@
SET_VREG s2, w9
GOTO_OPCODE ip // jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_sub_float_2addr: /* 0xc7 */
-/* File: arm64/op_sub_float_2addr.S */
-/* File: arm64/fbinop2addr.S */
/*
* Generic 32-bit floating point "/2addr" binary operation. Provide
* an "instr" line that specifies an instruction that performs
@@ -5477,12 +4903,9 @@
SET_VREG s2, w9
GOTO_OPCODE ip // jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_mul_float_2addr: /* 0xc8 */
-/* File: arm64/op_mul_float_2addr.S */
-/* File: arm64/fbinop2addr.S */
/*
* Generic 32-bit floating point "/2addr" binary operation. Provide
* an "instr" line that specifies an instruction that performs
@@ -5501,12 +4924,9 @@
SET_VREG s2, w9
GOTO_OPCODE ip // jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_div_float_2addr: /* 0xc9 */
-/* File: arm64/op_div_float_2addr.S */
-/* File: arm64/fbinop2addr.S */
/*
* Generic 32-bit floating point "/2addr" binary operation. Provide
* an "instr" line that specifies an instruction that performs
@@ -5525,11 +4945,9 @@
SET_VREG s2, w9
GOTO_OPCODE ip // jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_rem_float_2addr: /* 0xca */
-/* File: arm64/op_rem_float_2addr.S */
/* rem vA, vB */
lsr w3, wINST, #12 // w3<- B
ubfx w9, wINST, #8, #4 // w9<- A
@@ -5545,8 +4963,6 @@
/* ------------------------------ */
.balign 128
.L_op_add_double_2addr: /* 0xcb */
-/* File: arm64/op_add_double_2addr.S */
-/* File: arm64/binopWide2addr.S */
/*
* Generic 64-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "x0 = x0 op x1".
@@ -5576,12 +4992,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 10-13 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_sub_double_2addr: /* 0xcc */
-/* File: arm64/op_sub_double_2addr.S */
-/* File: arm64/binopWide2addr.S */
/*
* Generic 64-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "x0 = x0 op x1".
@@ -5611,12 +5024,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 10-13 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_mul_double_2addr: /* 0xcd */
-/* File: arm64/op_mul_double_2addr.S */
-/* File: arm64/binopWide2addr.S */
/*
* Generic 64-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "x0 = x0 op x1".
@@ -5646,12 +5056,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 10-13 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_div_double_2addr: /* 0xce */
-/* File: arm64/op_div_double_2addr.S */
-/* File: arm64/binopWide2addr.S */
/*
* Generic 64-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "x0 = x0 op x1".
@@ -5681,11 +5088,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 10-13 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_rem_double_2addr: /* 0xcf */
-/* File: arm64/op_rem_double_2addr.S */
/* rem vA, vB */
lsr w1, wINST, #12 // w1<- B
ubfx w2, wINST, #8, #4 // w2<- A
@@ -5702,8 +5107,6 @@
/* ------------------------------ */
.balign 128
.L_op_add_int_lit16: /* 0xd0 */
-/* File: arm64/op_add_int_lit16.S */
-/* File: arm64/binopLit16.S */
/*
* Generic 32-bit "lit16" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = w0 op w1".
@@ -5732,13 +5135,10 @@
GOTO_OPCODE ip // jump to next instruction
/* 10-13 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_rsub_int: /* 0xd1 */
-/* File: arm64/op_rsub_int.S */
/* this op is "rsub-int", but can be thought of as "rsub-int/lit16" */
-/* File: arm64/binopLit16.S */
/*
* Generic 32-bit "lit16" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = w0 op w1".
@@ -5767,13 +5167,10 @@
GOTO_OPCODE ip // jump to next instruction
/* 10-13 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_mul_int_lit16: /* 0xd2 */
-/* File: arm64/op_mul_int_lit16.S */
/* must be "mul w0, w1, w0" -- "w0, w0, w1" is illegal */
-/* File: arm64/binopLit16.S */
/*
* Generic 32-bit "lit16" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = w0 op w1".
@@ -5802,12 +5199,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 10-13 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_div_int_lit16: /* 0xd3 */
-/* File: arm64/op_div_int_lit16.S */
-/* File: arm64/binopLit16.S */
/*
* Generic 32-bit "lit16" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = w0 op w1".
@@ -5836,12 +5230,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 10-13 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_rem_int_lit16: /* 0xd4 */
-/* File: arm64/op_rem_int_lit16.S */
-/* File: arm64/binopLit16.S */
/*
* Generic 32-bit "lit16" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = w0 op w1".
@@ -5870,12 +5261,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 10-13 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_and_int_lit16: /* 0xd5 */
-/* File: arm64/op_and_int_lit16.S */
-/* File: arm64/binopLit16.S */
/*
* Generic 32-bit "lit16" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = w0 op w1".
@@ -5904,12 +5292,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 10-13 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_or_int_lit16: /* 0xd6 */
-/* File: arm64/op_or_int_lit16.S */
-/* File: arm64/binopLit16.S */
/*
* Generic 32-bit "lit16" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = w0 op w1".
@@ -5938,12 +5323,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 10-13 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_xor_int_lit16: /* 0xd7 */
-/* File: arm64/op_xor_int_lit16.S */
-/* File: arm64/binopLit16.S */
/*
* Generic 32-bit "lit16" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = w0 op w1".
@@ -5972,12 +5354,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 10-13 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_add_int_lit8: /* 0xd8 */
-/* File: arm64/op_add_int_lit8.S */
-/* File: arm64/binopLit8.S */
/*
* Generic 32-bit "lit8" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = w0 op w1".
@@ -6012,12 +5391,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 10-12 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_rsub_int_lit8: /* 0xd9 */
-/* File: arm64/op_rsub_int_lit8.S */
-/* File: arm64/binopLit8.S */
/*
* Generic 32-bit "lit8" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = w0 op w1".
@@ -6052,13 +5428,10 @@
GOTO_OPCODE ip // jump to next instruction
/* 10-12 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_mul_int_lit8: /* 0xda */
-/* File: arm64/op_mul_int_lit8.S */
/* must be "mul w0, w1, w0" -- "w0, w0, w1" is illegal */
-/* File: arm64/binopLit8.S */
/*
* Generic 32-bit "lit8" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = w0 op w1".
@@ -6093,12 +5466,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 10-12 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_div_int_lit8: /* 0xdb */
-/* File: arm64/op_div_int_lit8.S */
-/* File: arm64/binopLit8.S */
/*
* Generic 32-bit "lit8" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = w0 op w1".
@@ -6133,12 +5503,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 10-12 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_rem_int_lit8: /* 0xdc */
-/* File: arm64/op_rem_int_lit8.S */
-/* File: arm64/binopLit8.S */
/*
* Generic 32-bit "lit8" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = w0 op w1".
@@ -6173,12 +5540,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 10-12 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_and_int_lit8: /* 0xdd */
-/* File: arm64/op_and_int_lit8.S */
-/* File: arm64/binopLit8.S */
/*
* Generic 32-bit "lit8" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = w0 op w1".
@@ -6213,12 +5577,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 10-12 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_or_int_lit8: /* 0xde */
-/* File: arm64/op_or_int_lit8.S */
-/* File: arm64/binopLit8.S */
/*
* Generic 32-bit "lit8" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = w0 op w1".
@@ -6253,12 +5614,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 10-12 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_xor_int_lit8: /* 0xdf */
-/* File: arm64/op_xor_int_lit8.S */
-/* File: arm64/binopLit8.S */
/*
* Generic 32-bit "lit8" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = w0 op w1".
@@ -6293,12 +5651,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 10-12 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_shl_int_lit8: /* 0xe0 */
-/* File: arm64/op_shl_int_lit8.S */
-/* File: arm64/binopLit8.S */
/*
* Generic 32-bit "lit8" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = w0 op w1".
@@ -6333,12 +5688,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 10-12 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_shr_int_lit8: /* 0xe1 */
-/* File: arm64/op_shr_int_lit8.S */
-/* File: arm64/binopLit8.S */
/*
* Generic 32-bit "lit8" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = w0 op w1".
@@ -6373,12 +5725,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 10-12 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_ushr_int_lit8: /* 0xe2 */
-/* File: arm64/op_ushr_int_lit8.S */
-/* File: arm64/binopLit8.S */
/*
* Generic 32-bit "lit8" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = w0 op w1".
@@ -6413,11 +5762,9 @@
GOTO_OPCODE ip // jump to next instruction
/* 10-12 instructions */
-
/* ------------------------------ */
.balign 128
.L_op_iget_quick: /* 0xe3 */
-/* File: arm64/op_iget_quick.S */
/* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick */
/* op vA, vB, offset//CCCC */
lsr w2, wINST, #12 // w2<- B
@@ -6435,7 +5782,6 @@
/* ------------------------------ */
.balign 128
.L_op_iget_wide_quick: /* 0xe4 */
-/* File: arm64/op_iget_wide_quick.S */
/* iget-wide-quick vA, vB, offset//CCCC */
lsr w2, wINST, #12 // w2<- B
FETCH w4, 1 // w4<- field byte offset
@@ -6451,7 +5797,6 @@
/* ------------------------------ */
.balign 128
.L_op_iget_object_quick: /* 0xe5 */
-/* File: arm64/op_iget_object_quick.S */
/* For: iget-object-quick */
/* op vA, vB, offset//CCCC */
lsr w2, wINST, #12 // w2<- B
@@ -6471,7 +5816,6 @@
/* ------------------------------ */
.balign 128
.L_op_iput_quick: /* 0xe6 */
-/* File: arm64/op_iput_quick.S */
/* For: iput-quick, iput-object-quick */
/* op vA, vB, offset//CCCC */
lsr w2, wINST, #12 // w2<- B
@@ -6488,7 +5832,6 @@
/* ------------------------------ */
.balign 128
.L_op_iput_wide_quick: /* 0xe7 */
-/* File: arm64/op_iput_wide_quick.S */
/* iput-wide-quick vA, vB, offset//CCCC */
lsr w2, wINST, #12 // w2<- B
FETCH w3, 1 // w3<- field byte offset
@@ -6504,7 +5847,6 @@
/* ------------------------------ */
.balign 128
.L_op_iput_object_quick: /* 0xe8 */
-/* File: arm64/op_iput_object_quick.S */
EXPORT_PC
add x0, xFP, #OFF_FP_SHADOWFRAME
mov x1, xPC
@@ -6518,8 +5860,6 @@
/* ------------------------------ */
.balign 128
.L_op_invoke_virtual_quick: /* 0xe9 */
-/* File: arm64/op_invoke_virtual_quick.S */
-/* File: arm64/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -6539,13 +5879,9 @@
GET_INST_OPCODE ip
GOTO_OPCODE ip
-
-
/* ------------------------------ */
.balign 128
.L_op_invoke_virtual_range_quick: /* 0xea */
-/* File: arm64/op_invoke_virtual_range_quick.S */
-/* File: arm64/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -6565,13 +5901,9 @@
GET_INST_OPCODE ip
GOTO_OPCODE ip
-
-
/* ------------------------------ */
.balign 128
.L_op_iput_boolean_quick: /* 0xeb */
-/* File: arm64/op_iput_boolean_quick.S */
-/* File: arm64/op_iput_quick.S */
/* For: iput-quick, iput-object-quick */
/* op vA, vB, offset//CCCC */
lsr w2, wINST, #12 // w2<- B
@@ -6585,12 +5917,9 @@
GET_INST_OPCODE ip // extract opcode from rINST
GOTO_OPCODE ip // jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_iput_byte_quick: /* 0xec */
-/* File: arm64/op_iput_byte_quick.S */
-/* File: arm64/op_iput_quick.S */
/* For: iput-quick, iput-object-quick */
/* op vA, vB, offset//CCCC */
lsr w2, wINST, #12 // w2<- B
@@ -6604,12 +5933,9 @@
GET_INST_OPCODE ip // extract opcode from rINST
GOTO_OPCODE ip // jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_iput_char_quick: /* 0xed */
-/* File: arm64/op_iput_char_quick.S */
-/* File: arm64/op_iput_quick.S */
/* For: iput-quick, iput-object-quick */
/* op vA, vB, offset//CCCC */
lsr w2, wINST, #12 // w2<- B
@@ -6623,12 +5949,9 @@
GET_INST_OPCODE ip // extract opcode from rINST
GOTO_OPCODE ip // jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_iput_short_quick: /* 0xee */
-/* File: arm64/op_iput_short_quick.S */
-/* File: arm64/op_iput_quick.S */
/* For: iput-quick, iput-object-quick */
/* op vA, vB, offset//CCCC */
lsr w2, wINST, #12 // w2<- B
@@ -6642,12 +5965,9 @@
GET_INST_OPCODE ip // extract opcode from rINST
GOTO_OPCODE ip // jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_iget_boolean_quick: /* 0xef */
-/* File: arm64/op_iget_boolean_quick.S */
-/* File: arm64/op_iget_quick.S */
/* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick */
/* op vA, vB, offset//CCCC */
lsr w2, wINST, #12 // w2<- B
@@ -6662,12 +5982,9 @@
GET_INST_OPCODE ip // extract opcode from rINST
GOTO_OPCODE ip // jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_iget_byte_quick: /* 0xf0 */
-/* File: arm64/op_iget_byte_quick.S */
-/* File: arm64/op_iget_quick.S */
/* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick */
/* op vA, vB, offset//CCCC */
lsr w2, wINST, #12 // w2<- B
@@ -6682,12 +5999,9 @@
GET_INST_OPCODE ip // extract opcode from rINST
GOTO_OPCODE ip // jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_iget_char_quick: /* 0xf1 */
-/* File: arm64/op_iget_char_quick.S */
-/* File: arm64/op_iget_quick.S */
/* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick */
/* op vA, vB, offset//CCCC */
lsr w2, wINST, #12 // w2<- B
@@ -6702,12 +6016,9 @@
GET_INST_OPCODE ip // extract opcode from rINST
GOTO_OPCODE ip // jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_iget_short_quick: /* 0xf2 */
-/* File: arm64/op_iget_short_quick.S */
-/* File: arm64/op_iget_quick.S */
/* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick */
/* op vA, vB, offset//CCCC */
lsr w2, wINST, #12 // w2<- B
@@ -6722,89 +6033,65 @@
GET_INST_OPCODE ip // extract opcode from rINST
GOTO_OPCODE ip // jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_unused_f3: /* 0xf3 */
-/* File: arm64/op_unused_f3.S */
-/* File: arm64/unused.S */
/*
* Bail to reference interpreter to throw.
*/
b MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_f4: /* 0xf4 */
-/* File: arm64/op_unused_f4.S */
-/* File: arm64/unused.S */
/*
* Bail to reference interpreter to throw.
*/
b MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_f5: /* 0xf5 */
-/* File: arm64/op_unused_f5.S */
-/* File: arm64/unused.S */
/*
* Bail to reference interpreter to throw.
*/
b MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_f6: /* 0xf6 */
-/* File: arm64/op_unused_f6.S */
-/* File: arm64/unused.S */
/*
* Bail to reference interpreter to throw.
*/
b MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_f7: /* 0xf7 */
-/* File: arm64/op_unused_f7.S */
-/* File: arm64/unused.S */
/*
* Bail to reference interpreter to throw.
*/
b MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_f8: /* 0xf8 */
-/* File: arm64/op_unused_f8.S */
-/* File: arm64/unused.S */
/*
* Bail to reference interpreter to throw.
*/
b MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_f9: /* 0xf9 */
-/* File: arm64/op_unused_f9.S */
-/* File: arm64/unused.S */
/*
* Bail to reference interpreter to throw.
*/
b MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_invoke_polymorphic: /* 0xfa */
-/* File: arm64/op_invoke_polymorphic.S */
-/* File: arm64/invoke_polymorphic.S */
/*
* invoke-polymorphic handler wrapper.
*/
@@ -6824,12 +6111,9 @@
GET_INST_OPCODE ip
GOTO_OPCODE ip
-
/* ------------------------------ */
.balign 128
.L_op_invoke_polymorphic_range: /* 0xfb */
-/* File: arm64/op_invoke_polymorphic_range.S */
-/* File: arm64/invoke_polymorphic.S */
/*
* invoke-polymorphic handler wrapper.
*/
@@ -6849,12 +6133,9 @@
GET_INST_OPCODE ip
GOTO_OPCODE ip
-
/* ------------------------------ */
.balign 128
.L_op_invoke_custom: /* 0xfc */
-/* File: arm64/op_invoke_custom.S */
-/* File: arm64/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -6874,13 +6155,9 @@
GET_INST_OPCODE ip
GOTO_OPCODE ip
-
-
/* ------------------------------ */
.balign 128
.L_op_invoke_custom_range: /* 0xfd */
-/* File: arm64/op_invoke_custom_range.S */
-/* File: arm64/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -6900,13 +6177,9 @@
GET_INST_OPCODE ip
GOTO_OPCODE ip
-
-
/* ------------------------------ */
.balign 128
.L_op_const_method_handle: /* 0xfe */
-/* File: arm64/op_const_method_handle.S */
-/* File: arm64/const.S */
/* const/class vAA, type@BBBB */
/* const/method-handle vAA, method_handle@BBBB */
/* const/method-type vAA, proto@BBBB */
@@ -6924,12 +6197,9 @@
GET_INST_OPCODE ip // extract opcode from rINST
GOTO_OPCODE ip // jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_const_method_type: /* 0xff */
-/* File: arm64/op_const_method_type.S */
-/* File: arm64/const.S */
/* const/class vAA, type@BBBB */
/* const/method-handle vAA, method_handle@BBBB */
/* const/method-type vAA, proto@BBBB */
@@ -6947,23 +6217,13 @@
GET_INST_OPCODE ip // extract opcode from rINST
GOTO_OPCODE ip // jump to next instruction
-
.balign 128
-/* File: arm64/instruction_end.S */
.type artMterpAsmInstructionEnd, #object
.hidden artMterpAsmInstructionEnd
.global artMterpAsmInstructionEnd
artMterpAsmInstructionEnd:
-
-/*
- * ===========================================================================
- * Sister implementations
- * ===========================================================================
- */
-/* File: arm64/instruction_start_sister.S */
-
.type artMterpAsmSisterStart, #object
.hidden artMterpAsmSisterStart
.global artMterpAsmSisterStart
@@ -6971,21 +6231,16 @@
.balign 4
artMterpAsmSisterStart:
-/* File: arm64/instruction_end_sister.S */
-
.type artMterpAsmSisterEnd, #object
.hidden artMterpAsmSisterEnd
.global artMterpAsmSisterEnd
artMterpAsmSisterEnd:
-
-/* File: arm64/footer.S */
/*
* ===========================================================================
* Common subroutines and data
* ===========================================================================
*/
-
/*
* We've detected a condition that will result in an exception, but the exception
* has not yet been thrown. Just bail out to the reference interpreter to deal with it.
@@ -7188,7 +6443,6 @@
GET_INST_OPCODE ip // extract opcode from wINST
GOTO_OPCODE ip // jump to next instruction
-
/*
* Check for suspend check request. Assumes wINST already loaded, xPC advanced and
* still needs to get the opcode and branch to it, and flags are in lr.
@@ -7285,19 +6539,14 @@
RESTORE_TWO_REGS_DECREASE_FRAME xPROFILE, x27, 80
ret
-
-/* File: arm64/instruction_start_alt.S */
-
.type artMterpAsmAltInstructionStart, #object
.hidden artMterpAsmAltInstructionStart
.global artMterpAsmAltInstructionStart
artMterpAsmAltInstructionStart = .L_ALT_op_nop
.text
-
/* ------------------------------ */
.balign 128
.L_ALT_op_nop: /* 0x00 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7314,7 +6563,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move: /* 0x01 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7331,7 +6579,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_from16: /* 0x02 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7348,7 +6595,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_16: /* 0x03 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7365,7 +6611,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_wide: /* 0x04 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7382,7 +6627,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_wide_from16: /* 0x05 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7399,7 +6643,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_wide_16: /* 0x06 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7416,7 +6659,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_object: /* 0x07 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7433,7 +6675,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_object_from16: /* 0x08 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7450,7 +6691,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_object_16: /* 0x09 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7467,7 +6707,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_result: /* 0x0a */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7484,7 +6723,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_result_wide: /* 0x0b */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7501,7 +6739,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_result_object: /* 0x0c */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7518,7 +6755,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_exception: /* 0x0d */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7535,7 +6771,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_return_void: /* 0x0e */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7552,7 +6787,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_return: /* 0x0f */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7569,7 +6803,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_return_wide: /* 0x10 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7586,7 +6819,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_return_object: /* 0x11 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7603,7 +6835,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_4: /* 0x12 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7620,7 +6851,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_16: /* 0x13 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7637,7 +6867,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const: /* 0x14 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7654,7 +6883,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_high16: /* 0x15 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7671,7 +6899,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_wide_16: /* 0x16 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7688,7 +6915,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_wide_32: /* 0x17 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7705,7 +6931,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_wide: /* 0x18 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7722,7 +6947,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_wide_high16: /* 0x19 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7739,7 +6963,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_string: /* 0x1a */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7756,7 +6979,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_string_jumbo: /* 0x1b */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7773,7 +6995,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_class: /* 0x1c */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7790,7 +7011,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_monitor_enter: /* 0x1d */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7807,7 +7027,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_monitor_exit: /* 0x1e */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7824,7 +7043,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_check_cast: /* 0x1f */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7841,7 +7059,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_instance_of: /* 0x20 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7858,7 +7075,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_array_length: /* 0x21 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7875,7 +7091,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_new_instance: /* 0x22 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7892,7 +7107,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_new_array: /* 0x23 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7909,7 +7123,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_filled_new_array: /* 0x24 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7926,7 +7139,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_filled_new_array_range: /* 0x25 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7943,7 +7155,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_fill_array_data: /* 0x26 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7960,7 +7171,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_throw: /* 0x27 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7977,7 +7187,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_goto: /* 0x28 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7994,7 +7203,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_goto_16: /* 0x29 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8011,7 +7219,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_goto_32: /* 0x2a */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8028,7 +7235,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_packed_switch: /* 0x2b */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8045,7 +7251,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sparse_switch: /* 0x2c */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8062,7 +7267,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_cmpl_float: /* 0x2d */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8079,7 +7283,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_cmpg_float: /* 0x2e */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8096,7 +7299,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_cmpl_double: /* 0x2f */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8113,7 +7315,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_cmpg_double: /* 0x30 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8130,7 +7331,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_cmp_long: /* 0x31 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8147,7 +7347,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_eq: /* 0x32 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8164,7 +7363,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_ne: /* 0x33 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8181,7 +7379,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_lt: /* 0x34 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8198,7 +7395,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_ge: /* 0x35 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8215,7 +7411,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_gt: /* 0x36 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8232,7 +7427,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_le: /* 0x37 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8249,7 +7443,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_eqz: /* 0x38 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8266,7 +7459,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_nez: /* 0x39 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8283,7 +7475,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_ltz: /* 0x3a */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8300,7 +7491,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_gez: /* 0x3b */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8317,7 +7507,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_gtz: /* 0x3c */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8334,7 +7523,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_lez: /* 0x3d */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8351,7 +7539,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_3e: /* 0x3e */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8368,7 +7555,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_3f: /* 0x3f */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8385,7 +7571,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_40: /* 0x40 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8402,7 +7587,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_41: /* 0x41 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8419,7 +7603,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_42: /* 0x42 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8436,7 +7619,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_43: /* 0x43 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8453,7 +7635,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aget: /* 0x44 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8470,7 +7651,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aget_wide: /* 0x45 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8487,7 +7667,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aget_object: /* 0x46 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8504,7 +7683,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aget_boolean: /* 0x47 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8521,7 +7699,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aget_byte: /* 0x48 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8538,7 +7715,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aget_char: /* 0x49 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8555,7 +7731,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aget_short: /* 0x4a */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8572,7 +7747,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aput: /* 0x4b */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8589,7 +7763,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aput_wide: /* 0x4c */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8606,7 +7779,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aput_object: /* 0x4d */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8623,7 +7795,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aput_boolean: /* 0x4e */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8640,7 +7811,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aput_byte: /* 0x4f */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8657,7 +7827,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aput_char: /* 0x50 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8674,7 +7843,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aput_short: /* 0x51 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8691,7 +7859,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget: /* 0x52 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8708,7 +7875,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_wide: /* 0x53 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8725,7 +7891,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_object: /* 0x54 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8742,7 +7907,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_boolean: /* 0x55 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8759,7 +7923,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_byte: /* 0x56 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8776,7 +7939,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_char: /* 0x57 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8793,7 +7955,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_short: /* 0x58 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8810,7 +7971,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput: /* 0x59 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8827,7 +7987,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_wide: /* 0x5a */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8844,7 +8003,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_object: /* 0x5b */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8861,7 +8019,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_boolean: /* 0x5c */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8878,7 +8035,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_byte: /* 0x5d */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8895,7 +8051,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_char: /* 0x5e */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8912,7 +8067,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_short: /* 0x5f */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8929,7 +8083,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sget: /* 0x60 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8946,7 +8099,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sget_wide: /* 0x61 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8963,7 +8115,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sget_object: /* 0x62 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8980,7 +8131,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sget_boolean: /* 0x63 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8997,7 +8147,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sget_byte: /* 0x64 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9014,7 +8163,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sget_char: /* 0x65 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9031,7 +8179,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sget_short: /* 0x66 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9048,7 +8195,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sput: /* 0x67 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9065,7 +8211,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sput_wide: /* 0x68 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9082,7 +8227,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sput_object: /* 0x69 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9099,7 +8243,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sput_boolean: /* 0x6a */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9116,7 +8259,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sput_byte: /* 0x6b */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9133,7 +8275,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sput_char: /* 0x6c */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9150,7 +8291,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sput_short: /* 0x6d */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9167,7 +8307,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_virtual: /* 0x6e */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9184,7 +8323,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_super: /* 0x6f */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9201,7 +8339,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_direct: /* 0x70 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9218,7 +8355,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_static: /* 0x71 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9235,7 +8371,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_interface: /* 0x72 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9252,7 +8387,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_return_void_no_barrier: /* 0x73 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9269,7 +8403,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_virtual_range: /* 0x74 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9286,7 +8419,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_super_range: /* 0x75 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9303,7 +8435,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_direct_range: /* 0x76 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9320,7 +8451,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_static_range: /* 0x77 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9337,7 +8467,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_interface_range: /* 0x78 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9354,7 +8483,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_79: /* 0x79 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9371,7 +8499,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_7a: /* 0x7a */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9388,7 +8515,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_neg_int: /* 0x7b */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9405,7 +8531,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_not_int: /* 0x7c */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9422,7 +8547,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_neg_long: /* 0x7d */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9439,7 +8563,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_not_long: /* 0x7e */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9456,7 +8579,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_neg_float: /* 0x7f */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9473,7 +8595,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_neg_double: /* 0x80 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9490,7 +8611,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_int_to_long: /* 0x81 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9507,7 +8627,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_int_to_float: /* 0x82 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9524,7 +8643,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_int_to_double: /* 0x83 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9541,7 +8659,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_long_to_int: /* 0x84 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9558,7 +8675,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_long_to_float: /* 0x85 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9575,7 +8691,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_long_to_double: /* 0x86 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9592,7 +8707,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_float_to_int: /* 0x87 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9609,7 +8723,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_float_to_long: /* 0x88 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9626,7 +8739,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_float_to_double: /* 0x89 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9643,7 +8755,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_double_to_int: /* 0x8a */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9660,7 +8771,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_double_to_long: /* 0x8b */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9677,7 +8787,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_double_to_float: /* 0x8c */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9694,7 +8803,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_int_to_byte: /* 0x8d */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9711,7 +8819,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_int_to_char: /* 0x8e */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9728,7 +8835,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_int_to_short: /* 0x8f */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9745,7 +8851,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_add_int: /* 0x90 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9762,7 +8867,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sub_int: /* 0x91 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9779,7 +8883,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_mul_int: /* 0x92 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9796,7 +8899,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_div_int: /* 0x93 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9813,7 +8915,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rem_int: /* 0x94 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9830,7 +8931,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_and_int: /* 0x95 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9847,7 +8947,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_or_int: /* 0x96 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9864,7 +8963,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_xor_int: /* 0x97 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9881,7 +8979,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_shl_int: /* 0x98 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9898,7 +8995,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_shr_int: /* 0x99 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9915,7 +9011,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_ushr_int: /* 0x9a */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9932,7 +9027,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_add_long: /* 0x9b */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9949,7 +9043,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sub_long: /* 0x9c */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9966,7 +9059,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_mul_long: /* 0x9d */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9983,7 +9075,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_div_long: /* 0x9e */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10000,7 +9091,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rem_long: /* 0x9f */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10017,7 +9107,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_and_long: /* 0xa0 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10034,7 +9123,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_or_long: /* 0xa1 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10051,7 +9139,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_xor_long: /* 0xa2 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10068,7 +9155,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_shl_long: /* 0xa3 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10085,7 +9171,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_shr_long: /* 0xa4 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10102,7 +9187,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_ushr_long: /* 0xa5 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10119,7 +9203,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_add_float: /* 0xa6 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10136,7 +9219,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sub_float: /* 0xa7 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10153,7 +9235,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_mul_float: /* 0xa8 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10170,7 +9251,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_div_float: /* 0xa9 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10187,7 +9267,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rem_float: /* 0xaa */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10204,7 +9283,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_add_double: /* 0xab */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10221,7 +9299,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sub_double: /* 0xac */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10238,7 +9315,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_mul_double: /* 0xad */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10255,7 +9331,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_div_double: /* 0xae */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10272,7 +9347,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rem_double: /* 0xaf */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10289,7 +9363,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_add_int_2addr: /* 0xb0 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10306,7 +9379,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sub_int_2addr: /* 0xb1 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10323,7 +9395,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_mul_int_2addr: /* 0xb2 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10340,7 +9411,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_div_int_2addr: /* 0xb3 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10357,7 +9427,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rem_int_2addr: /* 0xb4 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10374,7 +9443,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_and_int_2addr: /* 0xb5 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10391,7 +9459,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_or_int_2addr: /* 0xb6 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10408,7 +9475,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_xor_int_2addr: /* 0xb7 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10425,7 +9491,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_shl_int_2addr: /* 0xb8 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10442,7 +9507,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_shr_int_2addr: /* 0xb9 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10459,7 +9523,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_ushr_int_2addr: /* 0xba */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10476,7 +9539,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_add_long_2addr: /* 0xbb */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10493,7 +9555,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sub_long_2addr: /* 0xbc */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10510,7 +9571,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_mul_long_2addr: /* 0xbd */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10527,7 +9587,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_div_long_2addr: /* 0xbe */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10544,7 +9603,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rem_long_2addr: /* 0xbf */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10561,7 +9619,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_and_long_2addr: /* 0xc0 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10578,7 +9635,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_or_long_2addr: /* 0xc1 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10595,7 +9651,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_xor_long_2addr: /* 0xc2 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10612,7 +9667,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_shl_long_2addr: /* 0xc3 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10629,7 +9683,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_shr_long_2addr: /* 0xc4 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10646,7 +9699,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_ushr_long_2addr: /* 0xc5 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10663,7 +9715,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_add_float_2addr: /* 0xc6 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10680,7 +9731,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sub_float_2addr: /* 0xc7 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10697,7 +9747,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_mul_float_2addr: /* 0xc8 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10714,7 +9763,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_div_float_2addr: /* 0xc9 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10731,7 +9779,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rem_float_2addr: /* 0xca */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10748,7 +9795,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_add_double_2addr: /* 0xcb */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10765,7 +9811,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sub_double_2addr: /* 0xcc */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10782,7 +9827,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_mul_double_2addr: /* 0xcd */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10799,7 +9843,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_div_double_2addr: /* 0xce */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10816,7 +9859,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rem_double_2addr: /* 0xcf */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10833,7 +9875,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_add_int_lit16: /* 0xd0 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10850,7 +9891,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rsub_int: /* 0xd1 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10867,7 +9907,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_mul_int_lit16: /* 0xd2 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10884,7 +9923,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_div_int_lit16: /* 0xd3 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10901,7 +9939,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rem_int_lit16: /* 0xd4 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10918,7 +9955,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_and_int_lit16: /* 0xd5 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10935,7 +9971,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_or_int_lit16: /* 0xd6 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10952,7 +9987,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_xor_int_lit16: /* 0xd7 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10969,7 +10003,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_add_int_lit8: /* 0xd8 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10986,7 +10019,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rsub_int_lit8: /* 0xd9 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11003,7 +10035,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_mul_int_lit8: /* 0xda */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11020,7 +10051,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_div_int_lit8: /* 0xdb */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11037,7 +10067,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rem_int_lit8: /* 0xdc */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11054,7 +10083,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_and_int_lit8: /* 0xdd */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11071,7 +10099,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_or_int_lit8: /* 0xde */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11088,7 +10115,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_xor_int_lit8: /* 0xdf */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11105,7 +10131,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_shl_int_lit8: /* 0xe0 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11122,7 +10147,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_shr_int_lit8: /* 0xe1 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11139,7 +10163,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_ushr_int_lit8: /* 0xe2 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11156,7 +10179,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_quick: /* 0xe3 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11173,7 +10195,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_wide_quick: /* 0xe4 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11190,7 +10211,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_object_quick: /* 0xe5 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11207,7 +10227,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_quick: /* 0xe6 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11224,7 +10243,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_wide_quick: /* 0xe7 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11241,7 +10259,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_object_quick: /* 0xe8 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11258,7 +10275,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_virtual_quick: /* 0xe9 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11275,7 +10291,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_virtual_range_quick: /* 0xea */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11292,7 +10307,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_boolean_quick: /* 0xeb */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11309,7 +10323,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_byte_quick: /* 0xec */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11326,7 +10339,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_char_quick: /* 0xed */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11343,7 +10355,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_short_quick: /* 0xee */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11360,7 +10371,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_boolean_quick: /* 0xef */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11377,7 +10387,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_byte_quick: /* 0xf0 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11394,7 +10403,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_char_quick: /* 0xf1 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11411,7 +10419,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_short_quick: /* 0xf2 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11428,7 +10435,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_f3: /* 0xf3 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11445,7 +10451,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_f4: /* 0xf4 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11462,7 +10467,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_f5: /* 0xf5 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11479,7 +10483,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_f6: /* 0xf6 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11496,7 +10499,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_f7: /* 0xf7 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11513,7 +10515,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_f8: /* 0xf8 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11530,7 +10531,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_f9: /* 0xf9 */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11547,7 +10547,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_polymorphic: /* 0xfa */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11564,7 +10563,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_polymorphic_range: /* 0xfb */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11581,7 +10579,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_custom: /* 0xfc */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11598,7 +10595,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_custom_range: /* 0xfd */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11615,7 +10611,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_method_handle: /* 0xfe */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11632,7 +10627,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_method_type: /* 0xff */
-/* File: arm64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11647,16 +10641,12 @@
b MterpCheckBefore // (self, shadow_frame, dex_pc_ptr) Note: tail call.
.balign 128
-/* File: arm64/instruction_end_alt.S */
.type artMterpAsmAltInstructionEnd, #object
.hidden artMterpAsmAltInstructionEnd
.global artMterpAsmAltInstructionEnd
artMterpAsmAltInstructionEnd:
-
-/* File: arm64/close_cfi.S */
// Close out the cfi info. We're treating mterp as a single function.
END ExecuteMterpImpl
-
diff --git a/runtime/interpreter/mterp/out/mterp_mips.S b/runtime/interpreter/mterp/out/mterp_mips.S
index 1f5bea0..f2f3453 100644
--- a/runtime/interpreter/mterp/out/mterp_mips.S
+++ b/runtime/interpreter/mterp/out/mterp_mips.S
@@ -1,10 +1,4 @@
-/*
- * This file was generated automatically by gen-mterp.py for 'mips'.
- *
- * --> DO NOT EDIT <--
- */
-
-/* File: mips/header.S */
+/* DO NOT EDIT: This file was generated by gen-mterp.py. */
/*
* Copyright (C) 2016 The Android Open Source Project
*
@@ -670,7 +664,6 @@
#define STORE64_F(rlo, rhi, rbase) STORE64_off_F(rlo, rhi, rbase, 0)
#define LOAD64_F(rlo, rhi, rbase) LOAD64_off_F(rlo, rhi, rbase, 0)
-
#define LOAD_base_offMirrorArray_length(rd, rbase) LOAD_RB_OFF(rd, rbase, MIRROR_ARRAY_LENGTH_OFFSET)
#define STACK_STORE(rd, off) sw rd, off(sp)
@@ -732,8 +725,6 @@
#define LONG_MIN_HIGH 0x80000000
#define LONG_MIN_AS_FLOAT 0xDF000000
#define LONG_MIN_AS_DOUBLE_HIGH 0xC3E00000
-
-/* File: mips/entry.S */
/*
* Copyright (C) 2016 The Android Open Source Project
*
@@ -810,16 +801,12 @@
GOTO_OPCODE(t0) # jump to next instruction
/* NOTE: no fallthrough */
-/* File: mips/instruction_start.S */
-
.global artMterpAsmInstructionStart
artMterpAsmInstructionStart = .L_op_nop
.text
-
/* ------------------------------ */
.balign 128
.L_op_nop: /* 0x00 */
-/* File: mips/op_nop.S */
FETCH_ADVANCE_INST(1) # advance rPC, load rINST
GET_INST_OPCODE(t0) # extract opcode from rINST
GOTO_OPCODE(t0) # jump to next instruction
@@ -827,7 +814,6 @@
/* ------------------------------ */
.balign 128
.L_op_move: /* 0x01 */
-/* File: mips/op_move.S */
/* for move, move-object, long-to-int */
/* op vA, vB */
GET_OPB(a1) # a1 <- B from 15:12
@@ -844,7 +830,6 @@
/* ------------------------------ */
.balign 128
.L_op_move_from16: /* 0x02 */
-/* File: mips/op_move_from16.S */
/* for: move/from16, move-object/from16 */
/* op vAA, vBBBB */
FETCH(a1, 1) # a1 <- BBBB
@@ -861,7 +846,6 @@
/* ------------------------------ */
.balign 128
.L_op_move_16: /* 0x03 */
-/* File: mips/op_move_16.S */
/* for: move/16, move-object/16 */
/* op vAAAA, vBBBB */
FETCH(a1, 2) # a1 <- BBBB
@@ -878,7 +862,6 @@
/* ------------------------------ */
.balign 128
.L_op_move_wide: /* 0x04 */
-/* File: mips/op_move_wide.S */
/* move-wide vA, vB */
/* NOTE: regs can overlap, e.g. "move v6, v7" or "move v7, v6" */
GET_OPA4(a2) # a2 <- A(+)
@@ -892,7 +875,6 @@
/* ------------------------------ */
.balign 128
.L_op_move_wide_from16: /* 0x05 */
-/* File: mips/op_move_wide_from16.S */
/* move-wide/from16 vAA, vBBBB */
/* NOTE: regs can overlap, e.g. "move v6, v7" or "move v7, v6" */
FETCH(a3, 1) # a3 <- BBBB
@@ -906,7 +888,6 @@
/* ------------------------------ */
.balign 128
.L_op_move_wide_16: /* 0x06 */
-/* File: mips/op_move_wide_16.S */
/* move-wide/16 vAAAA, vBBBB */
/* NOTE: regs can overlap, e.g. "move v6, v7" or "move v7, v6" */
FETCH(a3, 2) # a3 <- BBBB
@@ -920,8 +901,6 @@
/* ------------------------------ */
.balign 128
.L_op_move_object: /* 0x07 */
-/* File: mips/op_move_object.S */
-/* File: mips/op_move.S */
/* for move, move-object, long-to-int */
/* op vA, vB */
GET_OPB(a1) # a1 <- B from 15:12
@@ -935,12 +914,9 @@
SET_VREG_GOTO(a2, a0, t0) # fp[A] <- a2
.endif
-
/* ------------------------------ */
.balign 128
.L_op_move_object_from16: /* 0x08 */
-/* File: mips/op_move_object_from16.S */
-/* File: mips/op_move_from16.S */
/* for: move/from16, move-object/from16 */
/* op vAA, vBBBB */
FETCH(a1, 1) # a1 <- BBBB
@@ -954,12 +930,9 @@
SET_VREG_GOTO(a2, a0, t0) # fp[AA] <- a2
.endif
-
/* ------------------------------ */
.balign 128
.L_op_move_object_16: /* 0x09 */
-/* File: mips/op_move_object_16.S */
-/* File: mips/op_move_16.S */
/* for: move/16, move-object/16 */
/* op vAAAA, vBBBB */
FETCH(a1, 2) # a1 <- BBBB
@@ -973,11 +946,9 @@
SET_VREG_GOTO(a2, a0, t0) # fp[AAAA] <- a2
.endif
-
/* ------------------------------ */
.balign 128
.L_op_move_result: /* 0x0a */
-/* File: mips/op_move_result.S */
/* for: move-result, move-result-object */
/* op vAA */
GET_OPA(a2) # a2 <- AA
@@ -994,7 +965,6 @@
/* ------------------------------ */
.balign 128
.L_op_move_result_wide: /* 0x0b */
-/* File: mips/op_move_result_wide.S */
/* move-result-wide vAA */
GET_OPA(a2) # a2 <- AA
lw a3, OFF_FP_RESULT_REGISTER(rFP) # get pointer to result JType
@@ -1006,8 +976,6 @@
/* ------------------------------ */
.balign 128
.L_op_move_result_object: /* 0x0c */
-/* File: mips/op_move_result_object.S */
-/* File: mips/op_move_result.S */
/* for: move-result, move-result-object */
/* op vAA */
GET_OPA(a2) # a2 <- AA
@@ -1021,11 +989,9 @@
SET_VREG_GOTO(a0, a2, t0) # fp[AA] <- a0
.endif
-
/* ------------------------------ */
.balign 128
.L_op_move_exception: /* 0x0d */
-/* File: mips/op_move_exception.S */
/* move-exception vAA */
GET_OPA(a2) # a2 <- AA
lw a3, THREAD_EXCEPTION_OFFSET(rSELF) # get exception obj
@@ -1039,7 +1005,6 @@
/* ------------------------------ */
.balign 128
.L_op_return_void: /* 0x0e */
-/* File: mips/op_return_void.S */
.extern MterpThreadFenceForConstructor
JAL(MterpThreadFenceForConstructor)
lw ra, THREAD_FLAGS_OFFSET(rSELF)
@@ -1055,7 +1020,6 @@
/* ------------------------------ */
.balign 128
.L_op_return: /* 0x0f */
-/* File: mips/op_return.S */
/*
* Return a 32-bit value.
*
@@ -1078,7 +1042,6 @@
/* ------------------------------ */
.balign 128
.L_op_return_wide: /* 0x10 */
-/* File: mips/op_return_wide.S */
/*
* Return a 64-bit value.
*/
@@ -1099,8 +1062,6 @@
/* ------------------------------ */
.balign 128
.L_op_return_object: /* 0x11 */
-/* File: mips/op_return_object.S */
-/* File: mips/op_return.S */
/*
* Return a 32-bit value.
*
@@ -1120,11 +1081,9 @@
move v1, zero
b MterpReturn
-
/* ------------------------------ */
.balign 128
.L_op_const_4: /* 0x12 */
-/* File: mips/op_const_4.S */
/* const/4 vA, +B */
sll a1, rINST, 16 # a1 <- Bxxx0000
GET_OPA(a0) # a0 <- A+
@@ -1137,7 +1096,6 @@
/* ------------------------------ */
.balign 128
.L_op_const_16: /* 0x13 */
-/* File: mips/op_const_16.S */
/* const/16 vAA, +BBBB */
FETCH_S(a0, 1) # a0 <- ssssBBBB (sign-extended)
GET_OPA(a3) # a3 <- AA
@@ -1148,7 +1106,6 @@
/* ------------------------------ */
.balign 128
.L_op_const: /* 0x14 */
-/* File: mips/op_const.S */
/* const vAA, +BBBBbbbb */
GET_OPA(a3) # a3 <- AA
FETCH(a0, 1) # a0 <- bbbb (low)
@@ -1161,7 +1118,6 @@
/* ------------------------------ */
.balign 128
.L_op_const_high16: /* 0x15 */
-/* File: mips/op_const_high16.S */
/* const/high16 vAA, +BBBB0000 */
FETCH(a0, 1) # a0 <- 0000BBBB (zero-extended)
GET_OPA(a3) # a3 <- AA
@@ -1173,7 +1129,6 @@
/* ------------------------------ */
.balign 128
.L_op_const_wide_16: /* 0x16 */
-/* File: mips/op_const_wide_16.S */
/* const-wide/16 vAA, +BBBB */
FETCH_S(a0, 1) # a0 <- ssssBBBB (sign-extended)
GET_OPA(a3) # a3 <- AA
@@ -1185,7 +1140,6 @@
/* ------------------------------ */
.balign 128
.L_op_const_wide_32: /* 0x17 */
-/* File: mips/op_const_wide_32.S */
/* const-wide/32 vAA, +BBBBbbbb */
FETCH(a0, 1) # a0 <- 0000bbbb (low)
GET_OPA(a3) # a3 <- AA
@@ -1199,7 +1153,6 @@
/* ------------------------------ */
.balign 128
.L_op_const_wide: /* 0x18 */
-/* File: mips/op_const_wide.S */
/* const-wide vAA, +HHHHhhhhBBBBbbbb */
FETCH(a0, 1) # a0 <- bbbb (low)
FETCH(a1, 2) # a1 <- BBBB (low middle)
@@ -1215,7 +1168,6 @@
/* ------------------------------ */
.balign 128
.L_op_const_wide_high16: /* 0x19 */
-/* File: mips/op_const_wide_high16.S */
/* const-wide/high16 vAA, +BBBB000000000000 */
FETCH(a1, 1) # a1 <- 0000BBBB (zero-extended)
GET_OPA(a3) # a3 <- AA
@@ -1228,8 +1180,6 @@
/* ------------------------------ */
.balign 128
.L_op_const_string: /* 0x1a */
-/* File: mips/op_const_string.S */
-/* File: mips/const.S */
/* const/class vAA, type@BBBB */
/* const/method-handle vAA, method_handle@BBBB */
/* const/method-type vAA, proto@BBBB */
@@ -1247,11 +1197,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
GOTO_OPCODE(t0) # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_const_string_jumbo: /* 0x1b */
-/* File: mips/op_const_string_jumbo.S */
/* const/string vAA, string@BBBBBBBB */
EXPORT_PC()
FETCH(a0, 1) # a0 <- bbbb (low)
@@ -1270,8 +1218,6 @@
/* ------------------------------ */
.balign 128
.L_op_const_class: /* 0x1c */
-/* File: mips/op_const_class.S */
-/* File: mips/const.S */
/* const/class vAA, type@BBBB */
/* const/method-handle vAA, method_handle@BBBB */
/* const/method-type vAA, proto@BBBB */
@@ -1289,11 +1235,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
GOTO_OPCODE(t0) # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_monitor_enter: /* 0x1d */
-/* File: mips/op_monitor_enter.S */
/*
* Synchronize on an object.
*/
@@ -1311,7 +1255,6 @@
/* ------------------------------ */
.balign 128
.L_op_monitor_exit: /* 0x1e */
-/* File: mips/op_monitor_exit.S */
/*
* Unlock an object.
*
@@ -1333,7 +1276,6 @@
/* ------------------------------ */
.balign 128
.L_op_check_cast: /* 0x1f */
-/* File: mips/op_check_cast.S */
/*
* Check to see if a cast from one class to another is allowed.
*/
@@ -1354,7 +1296,6 @@
/* ------------------------------ */
.balign 128
.L_op_instance_of: /* 0x20 */
-/* File: mips/op_instance_of.S */
/*
* Check to see if an object reference is an instance of a class.
*
@@ -1380,7 +1321,6 @@
/* ------------------------------ */
.balign 128
.L_op_array_length: /* 0x21 */
-/* File: mips/op_array_length.S */
/*
* Return the length of an array.
*/
@@ -1398,7 +1338,6 @@
/* ------------------------------ */
.balign 128
.L_op_new_instance: /* 0x22 */
-/* File: mips/op_new_instance.S */
/*
* Create a new instance of a class.
*/
@@ -1416,7 +1355,6 @@
/* ------------------------------ */
.balign 128
.L_op_new_array: /* 0x23 */
-/* File: mips/op_new_array.S */
/*
* Allocate an array of objects, specified with the array class
* and a count.
@@ -1439,7 +1377,6 @@
/* ------------------------------ */
.balign 128
.L_op_filled_new_array: /* 0x24 */
-/* File: mips/op_filled_new_array.S */
/*
* Create a new array with elements filled from registers.
*
@@ -1461,8 +1398,6 @@
/* ------------------------------ */
.balign 128
.L_op_filled_new_array_range: /* 0x25 */
-/* File: mips/op_filled_new_array_range.S */
-/* File: mips/op_filled_new_array.S */
/*
* Create a new array with elements filled from registers.
*
@@ -1481,11 +1416,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
GOTO_OPCODE(t0) # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_fill_array_data: /* 0x26 */
-/* File: mips/op_fill_array_data.S */
/* fill-array-data vAA, +BBBBBBBB */
EXPORT_PC()
FETCH(a1, 1) # a1 <- bbbb (lo)
@@ -1503,7 +1436,6 @@
/* ------------------------------ */
.balign 128
.L_op_throw: /* 0x27 */
-/* File: mips/op_throw.S */
/*
* Throw an exception object in the current thread.
*/
@@ -1519,7 +1451,6 @@
/* ------------------------------ */
.balign 128
.L_op_goto: /* 0x28 */
-/* File: mips/op_goto.S */
/*
* Unconditional branch, 8-bit offset.
*
@@ -1534,7 +1465,6 @@
/* ------------------------------ */
.balign 128
.L_op_goto_16: /* 0x29 */
-/* File: mips/op_goto_16.S */
/*
* Unconditional branch, 16-bit offset.
*
@@ -1548,7 +1478,6 @@
/* ------------------------------ */
.balign 128
.L_op_goto_32: /* 0x2a */
-/* File: mips/op_goto_32.S */
/*
* Unconditional branch, 32-bit offset.
*
@@ -1567,7 +1496,6 @@
/* ------------------------------ */
.balign 128
.L_op_packed_switch: /* 0x2b */
-/* File: mips/op_packed_switch.S */
/*
* Handle a packed-switch or sparse-switch instruction. In both cases
* we decode it and hand it off to a helper function.
@@ -1591,8 +1519,6 @@
/* ------------------------------ */
.balign 128
.L_op_sparse_switch: /* 0x2c */
-/* File: mips/op_sparse_switch.S */
-/* File: mips/op_packed_switch.S */
/*
* Handle a packed-switch or sparse-switch instruction. In both cases
* we decode it and hand it off to a helper function.
@@ -1613,11 +1539,9 @@
move rINST, v0
b MterpCommonTakenBranchNoFlags
-
/* ------------------------------ */
.balign 128
.L_op_cmpl_float: /* 0x2d */
-/* File: mips/op_cmpl_float.S */
/*
* Compare two floating-point values. Puts 0(==), 1(>), or -1(<)
* into the destination register based on the comparison results.
@@ -1671,8 +1595,6 @@
/* ------------------------------ */
.balign 128
.L_op_cmpg_float: /* 0x2e */
-/* File: mips/op_cmpg_float.S */
-/* File: mips/op_cmpl_float.S */
/*
* Compare two floating-point values. Puts 0(==), 1(>), or -1(<)
* into the destination register based on the comparison results.
@@ -1723,11 +1645,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_GOTO(rTEMP, rOBJ, t0) # vAA <- rTEMP
-
/* ------------------------------ */
.balign 128
.L_op_cmpl_double: /* 0x2f */
-/* File: mips/op_cmpl_double.S */
/*
* Compare two floating-point values. Puts 0(==), 1(>), or -1(<)
* into the destination register based on the comparison results.
@@ -1783,8 +1703,6 @@
/* ------------------------------ */
.balign 128
.L_op_cmpg_double: /* 0x30 */
-/* File: mips/op_cmpg_double.S */
-/* File: mips/op_cmpl_double.S */
/*
* Compare two floating-point values. Puts 0(==), 1(>), or -1(<)
* into the destination register based on the comparison results.
@@ -1837,11 +1755,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_GOTO(rTEMP, rOBJ, t0) # vAA <- rTEMP
-
/* ------------------------------ */
.balign 128
.L_op_cmp_long: /* 0x31 */
-/* File: mips/op_cmp_long.S */
/*
* Compare two 64-bit values
* x = y return 0
@@ -1880,8 +1796,6 @@
/* ------------------------------ */
.balign 128
.L_op_if_eq: /* 0x32 */
-/* File: mips/op_if_eq.S */
-/* File: mips/bincmp.S */
/*
* Generic two-operand compare-and-branch operation. Provide a "condition"
* fragment that specifies the comparison to perform.
@@ -1901,12 +1815,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
GOTO_OPCODE(t0) # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_if_ne: /* 0x33 */
-/* File: mips/op_if_ne.S */
-/* File: mips/bincmp.S */
/*
* Generic two-operand compare-and-branch operation. Provide a "condition"
* fragment that specifies the comparison to perform.
@@ -1926,12 +1837,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
GOTO_OPCODE(t0) # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_if_lt: /* 0x34 */
-/* File: mips/op_if_lt.S */
-/* File: mips/bincmp.S */
/*
* Generic two-operand compare-and-branch operation. Provide a "condition"
* fragment that specifies the comparison to perform.
@@ -1951,12 +1859,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
GOTO_OPCODE(t0) # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_if_ge: /* 0x35 */
-/* File: mips/op_if_ge.S */
-/* File: mips/bincmp.S */
/*
* Generic two-operand compare-and-branch operation. Provide a "condition"
* fragment that specifies the comparison to perform.
@@ -1976,12 +1881,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
GOTO_OPCODE(t0) # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_if_gt: /* 0x36 */
-/* File: mips/op_if_gt.S */
-/* File: mips/bincmp.S */
/*
* Generic two-operand compare-and-branch operation. Provide a "condition"
* fragment that specifies the comparison to perform.
@@ -2001,12 +1903,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
GOTO_OPCODE(t0) # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_if_le: /* 0x37 */
-/* File: mips/op_if_le.S */
-/* File: mips/bincmp.S */
/*
* Generic two-operand compare-and-branch operation. Provide a "condition"
* fragment that specifies the comparison to perform.
@@ -2026,12 +1925,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
GOTO_OPCODE(t0) # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_if_eqz: /* 0x38 */
-/* File: mips/op_if_eqz.S */
-/* File: mips/zcmp.S */
/*
* Generic one-operand compare-and-branch operation. Provide a "condition"
* fragment that specifies the comparison to perform.
@@ -2049,12 +1945,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
GOTO_OPCODE(t0) # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_if_nez: /* 0x39 */
-/* File: mips/op_if_nez.S */
-/* File: mips/zcmp.S */
/*
* Generic one-operand compare-and-branch operation. Provide a "condition"
* fragment that specifies the comparison to perform.
@@ -2072,12 +1965,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
GOTO_OPCODE(t0) # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_if_ltz: /* 0x3a */
-/* File: mips/op_if_ltz.S */
-/* File: mips/zcmp.S */
/*
* Generic one-operand compare-and-branch operation. Provide a "condition"
* fragment that specifies the comparison to perform.
@@ -2095,12 +1985,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
GOTO_OPCODE(t0) # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_if_gez: /* 0x3b */
-/* File: mips/op_if_gez.S */
-/* File: mips/zcmp.S */
/*
* Generic one-operand compare-and-branch operation. Provide a "condition"
* fragment that specifies the comparison to perform.
@@ -2118,12 +2005,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
GOTO_OPCODE(t0) # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_if_gtz: /* 0x3c */
-/* File: mips/op_if_gtz.S */
-/* File: mips/zcmp.S */
/*
* Generic one-operand compare-and-branch operation. Provide a "condition"
* fragment that specifies the comparison to perform.
@@ -2141,12 +2025,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
GOTO_OPCODE(t0) # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_if_lez: /* 0x3d */
-/* File: mips/op_if_lez.S */
-/* File: mips/zcmp.S */
/*
* Generic one-operand compare-and-branch operation. Provide a "condition"
* fragment that specifies the comparison to perform.
@@ -2164,77 +2045,57 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
GOTO_OPCODE(t0) # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_unused_3e: /* 0x3e */
-/* File: mips/op_unused_3e.S */
-/* File: mips/unused.S */
/*
* Bail to reference interpreter to throw.
*/
b MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_3f: /* 0x3f */
-/* File: mips/op_unused_3f.S */
-/* File: mips/unused.S */
/*
* Bail to reference interpreter to throw.
*/
b MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_40: /* 0x40 */
-/* File: mips/op_unused_40.S */
-/* File: mips/unused.S */
/*
* Bail to reference interpreter to throw.
*/
b MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_41: /* 0x41 */
-/* File: mips/op_unused_41.S */
-/* File: mips/unused.S */
/*
* Bail to reference interpreter to throw.
*/
b MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_42: /* 0x42 */
-/* File: mips/op_unused_42.S */
-/* File: mips/unused.S */
/*
* Bail to reference interpreter to throw.
*/
b MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_43: /* 0x43 */
-/* File: mips/op_unused_43.S */
-/* File: mips/unused.S */
/*
* Bail to reference interpreter to throw.
*/
b MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_aget: /* 0x44 */
-/* File: mips/op_aget.S */
/*
* Array get, 32 bits or less. vAA <- vBB[vCC].
*
@@ -2266,7 +2127,6 @@
/* ------------------------------ */
.balign 128
.L_op_aget_wide: /* 0x45 */
-/* File: mips/op_aget_wide.S */
/*
* Array get, 64 bits. vAA <- vBB[vCC].
*
@@ -2293,7 +2153,6 @@
/* ------------------------------ */
.balign 128
.L_op_aget_object: /* 0x46 */
-/* File: mips/op_aget_object.S */
/*
* Array object get. vAA <- vBB[vCC].
*
@@ -2317,8 +2176,6 @@
/* ------------------------------ */
.balign 128
.L_op_aget_boolean: /* 0x47 */
-/* File: mips/op_aget_boolean.S */
-/* File: mips/op_aget.S */
/*
* Array get, 32 bits or less. vAA <- vBB[vCC].
*
@@ -2347,12 +2204,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_GOTO(a2, rOBJ, t0) # vAA <- a2
-
/* ------------------------------ */
.balign 128
.L_op_aget_byte: /* 0x48 */
-/* File: mips/op_aget_byte.S */
-/* File: mips/op_aget.S */
/*
* Array get, 32 bits or less. vAA <- vBB[vCC].
*
@@ -2381,12 +2235,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_GOTO(a2, rOBJ, t0) # vAA <- a2
-
/* ------------------------------ */
.balign 128
.L_op_aget_char: /* 0x49 */
-/* File: mips/op_aget_char.S */
-/* File: mips/op_aget.S */
/*
* Array get, 32 bits or less. vAA <- vBB[vCC].
*
@@ -2415,12 +2266,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_GOTO(a2, rOBJ, t0) # vAA <- a2
-
/* ------------------------------ */
.balign 128
.L_op_aget_short: /* 0x4a */
-/* File: mips/op_aget_short.S */
-/* File: mips/op_aget.S */
/*
* Array get, 32 bits or less. vAA <- vBB[vCC].
*
@@ -2449,11 +2297,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_GOTO(a2, rOBJ, t0) # vAA <- a2
-
/* ------------------------------ */
.balign 128
.L_op_aput: /* 0x4b */
-/* File: mips/op_aput.S */
/*
* Array put, 32 bits or less. vBB[vCC] <- vAA.
@@ -2484,7 +2330,6 @@
/* ------------------------------ */
.balign 128
.L_op_aput_wide: /* 0x4c */
-/* File: mips/op_aput_wide.S */
/*
* Array put, 64 bits. vBB[vCC] <- vAA.
*/
@@ -2513,7 +2358,6 @@
/* ------------------------------ */
.balign 128
.L_op_aput_object: /* 0x4d */
-/* File: mips/op_aput_object.S */
/*
* Store an object into an array. vBB[vCC] <- vAA.
*
@@ -2532,8 +2376,6 @@
/* ------------------------------ */
.balign 128
.L_op_aput_boolean: /* 0x4e */
-/* File: mips/op_aput_boolean.S */
-/* File: mips/op_aput.S */
/*
* Array put, 32 bits or less. vBB[vCC] <- vAA.
@@ -2561,12 +2403,9 @@
sb a2, MIRROR_BOOLEAN_ARRAY_DATA_OFFSET(a0) # vBB[vCC] <- a2
JR(t0) # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_aput_byte: /* 0x4f */
-/* File: mips/op_aput_byte.S */
-/* File: mips/op_aput.S */
/*
* Array put, 32 bits or less. vBB[vCC] <- vAA.
@@ -2594,12 +2433,9 @@
sb a2, MIRROR_BYTE_ARRAY_DATA_OFFSET(a0) # vBB[vCC] <- a2
JR(t0) # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_aput_char: /* 0x50 */
-/* File: mips/op_aput_char.S */
-/* File: mips/op_aput.S */
/*
* Array put, 32 bits or less. vBB[vCC] <- vAA.
@@ -2627,12 +2463,9 @@
sh a2, MIRROR_CHAR_ARRAY_DATA_OFFSET(a0) # vBB[vCC] <- a2
JR(t0) # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_aput_short: /* 0x51 */
-/* File: mips/op_aput_short.S */
-/* File: mips/op_aput.S */
/*
* Array put, 32 bits or less. vBB[vCC] <- vAA.
@@ -2660,284 +2493,149 @@
sh a2, MIRROR_SHORT_ARRAY_DATA_OFFSET(a0) # vBB[vCC] <- a2
JR(t0) # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_iget: /* 0x52 */
-/* File: mips/op_iget.S */
-/* File: mips/field.S */
TODO
-
/* ------------------------------ */
.balign 128
.L_op_iget_wide: /* 0x53 */
-/* File: mips/op_iget_wide.S */
-/* File: mips/op_iget.S */
-/* File: mips/field.S */
TODO
-
-
/* ------------------------------ */
.balign 128
.L_op_iget_object: /* 0x54 */
-/* File: mips/op_iget_object.S */
-/* File: mips/op_iget.S */
-/* File: mips/field.S */
TODO
-
-
/* ------------------------------ */
.balign 128
.L_op_iget_boolean: /* 0x55 */
-/* File: mips/op_iget_boolean.S */
-/* File: mips/op_iget.S */
-/* File: mips/field.S */
TODO
-
-
/* ------------------------------ */
.balign 128
.L_op_iget_byte: /* 0x56 */
-/* File: mips/op_iget_byte.S */
-/* File: mips/op_iget.S */
-/* File: mips/field.S */
TODO
-
-
/* ------------------------------ */
.balign 128
.L_op_iget_char: /* 0x57 */
-/* File: mips/op_iget_char.S */
-/* File: mips/op_iget.S */
-/* File: mips/field.S */
TODO
-
-
/* ------------------------------ */
.balign 128
.L_op_iget_short: /* 0x58 */
-/* File: mips/op_iget_short.S */
-/* File: mips/op_iget.S */
-/* File: mips/field.S */
TODO
-
-
/* ------------------------------ */
.balign 128
.L_op_iput: /* 0x59 */
-/* File: mips/op_iput.S */
-/* File: mips/field.S */
TODO
-
/* ------------------------------ */
.balign 128
.L_op_iput_wide: /* 0x5a */
-/* File: mips/op_iput_wide.S */
-/* File: mips/op_iput.S */
-/* File: mips/field.S */
TODO
-
-
/* ------------------------------ */
.balign 128
.L_op_iput_object: /* 0x5b */
-/* File: mips/op_iput_object.S */
-/* File: mips/op_iput.S */
-/* File: mips/field.S */
TODO
-
-
/* ------------------------------ */
.balign 128
.L_op_iput_boolean: /* 0x5c */
-/* File: mips/op_iput_boolean.S */
-/* File: mips/op_iput.S */
-/* File: mips/field.S */
TODO
-
-
/* ------------------------------ */
.balign 128
.L_op_iput_byte: /* 0x5d */
-/* File: mips/op_iput_byte.S */
-/* File: mips/op_iput.S */
-/* File: mips/field.S */
TODO
-
-
/* ------------------------------ */
.balign 128
.L_op_iput_char: /* 0x5e */
-/* File: mips/op_iput_char.S */
-/* File: mips/op_iput.S */
-/* File: mips/field.S */
TODO
-
-
/* ------------------------------ */
.balign 128
.L_op_iput_short: /* 0x5f */
-/* File: mips/op_iput_short.S */
-/* File: mips/op_iput.S */
-/* File: mips/field.S */
TODO
-
-
/* ------------------------------ */
.balign 128
.L_op_sget: /* 0x60 */
-/* File: mips/op_sget.S */
-/* File: mips/field.S */
TODO
-
/* ------------------------------ */
.balign 128
.L_op_sget_wide: /* 0x61 */
-/* File: mips/op_sget_wide.S */
-/* File: mips/op_sget.S */
-/* File: mips/field.S */
TODO
-
-
/* ------------------------------ */
.balign 128
.L_op_sget_object: /* 0x62 */
-/* File: mips/op_sget_object.S */
-/* File: mips/op_sget.S */
-/* File: mips/field.S */
TODO
-
-
/* ------------------------------ */
.balign 128
.L_op_sget_boolean: /* 0x63 */
-/* File: mips/op_sget_boolean.S */
-/* File: mips/op_sget.S */
-/* File: mips/field.S */
TODO
-
-
/* ------------------------------ */
.balign 128
.L_op_sget_byte: /* 0x64 */
-/* File: mips/op_sget_byte.S */
-/* File: mips/op_sget.S */
-/* File: mips/field.S */
TODO
-
-
/* ------------------------------ */
.balign 128
.L_op_sget_char: /* 0x65 */
-/* File: mips/op_sget_char.S */
-/* File: mips/op_sget.S */
-/* File: mips/field.S */
TODO
-
-
/* ------------------------------ */
.balign 128
.L_op_sget_short: /* 0x66 */
-/* File: mips/op_sget_short.S */
-/* File: mips/op_sget.S */
-/* File: mips/field.S */
TODO
-
-
/* ------------------------------ */
.balign 128
.L_op_sput: /* 0x67 */
-/* File: mips/op_sput.S */
-/* File: mips/field.S */
TODO
-
/* ------------------------------ */
.balign 128
.L_op_sput_wide: /* 0x68 */
-/* File: mips/op_sput_wide.S */
-/* File: mips/op_sput.S */
-/* File: mips/field.S */
TODO
-
-
/* ------------------------------ */
.balign 128
.L_op_sput_object: /* 0x69 */
-/* File: mips/op_sput_object.S */
-/* File: mips/op_sput.S */
-/* File: mips/field.S */
TODO
-
-
/* ------------------------------ */
.balign 128
.L_op_sput_boolean: /* 0x6a */
-/* File: mips/op_sput_boolean.S */
-/* File: mips/op_sput.S */
-/* File: mips/field.S */
TODO
-
-
/* ------------------------------ */
.balign 128
.L_op_sput_byte: /* 0x6b */
-/* File: mips/op_sput_byte.S */
-/* File: mips/op_sput.S */
-/* File: mips/field.S */
TODO
-
-
/* ------------------------------ */
.balign 128
.L_op_sput_char: /* 0x6c */
-/* File: mips/op_sput_char.S */
-/* File: mips/op_sput.S */
-/* File: mips/field.S */
TODO
-
-
/* ------------------------------ */
.balign 128
.L_op_sput_short: /* 0x6d */
-/* File: mips/op_sput_short.S */
-/* File: mips/op_sput.S */
-/* File: mips/field.S */
TODO
-
-
/* ------------------------------ */
.balign 128
.L_op_invoke_virtual: /* 0x6e */
-/* File: mips/op_invoke_virtual.S */
-/* File: mips/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -2957,12 +2655,9 @@
GET_INST_OPCODE(t0)
GOTO_OPCODE(t0)
-
/* ------------------------------ */
.balign 128
.L_op_invoke_super: /* 0x6f */
-/* File: mips/op_invoke_super.S */
-/* File: mips/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -2982,12 +2677,9 @@
GET_INST_OPCODE(t0)
GOTO_OPCODE(t0)
-
/* ------------------------------ */
.balign 128
.L_op_invoke_direct: /* 0x70 */
-/* File: mips/op_invoke_direct.S */
-/* File: mips/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -3007,12 +2699,9 @@
GET_INST_OPCODE(t0)
GOTO_OPCODE(t0)
-
/* ------------------------------ */
.balign 128
.L_op_invoke_static: /* 0x71 */
-/* File: mips/op_invoke_static.S */
-/* File: mips/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -3032,12 +2721,9 @@
GET_INST_OPCODE(t0)
GOTO_OPCODE(t0)
-
/* ------------------------------ */
.balign 128
.L_op_invoke_interface: /* 0x72 */
-/* File: mips/op_invoke_interface.S */
-/* File: mips/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -3057,11 +2743,9 @@
GET_INST_OPCODE(t0)
GOTO_OPCODE(t0)
-
/* ------------------------------ */
.balign 128
.L_op_return_void_no_barrier: /* 0x73 */
-/* File: mips/op_return_void_no_barrier.S */
lw ra, THREAD_FLAGS_OFFSET(rSELF)
move a0, rSELF
and ra, THREAD_SUSPEND_OR_CHECKPOINT_REQUEST
@@ -3075,8 +2759,6 @@
/* ------------------------------ */
.balign 128
.L_op_invoke_virtual_range: /* 0x74 */
-/* File: mips/op_invoke_virtual_range.S */
-/* File: mips/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -3096,12 +2778,9 @@
GET_INST_OPCODE(t0)
GOTO_OPCODE(t0)
-
/* ------------------------------ */
.balign 128
.L_op_invoke_super_range: /* 0x75 */
-/* File: mips/op_invoke_super_range.S */
-/* File: mips/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -3121,12 +2800,9 @@
GET_INST_OPCODE(t0)
GOTO_OPCODE(t0)
-
/* ------------------------------ */
.balign 128
.L_op_invoke_direct_range: /* 0x76 */
-/* File: mips/op_invoke_direct_range.S */
-/* File: mips/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -3146,12 +2822,9 @@
GET_INST_OPCODE(t0)
GOTO_OPCODE(t0)
-
/* ------------------------------ */
.balign 128
.L_op_invoke_static_range: /* 0x77 */
-/* File: mips/op_invoke_static_range.S */
-/* File: mips/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -3171,12 +2844,9 @@
GET_INST_OPCODE(t0)
GOTO_OPCODE(t0)
-
/* ------------------------------ */
.balign 128
.L_op_invoke_interface_range: /* 0x78 */
-/* File: mips/op_invoke_interface_range.S */
-/* File: mips/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -3196,34 +2866,25 @@
GET_INST_OPCODE(t0)
GOTO_OPCODE(t0)
-
/* ------------------------------ */
.balign 128
.L_op_unused_79: /* 0x79 */
-/* File: mips/op_unused_79.S */
-/* File: mips/unused.S */
/*
* Bail to reference interpreter to throw.
*/
b MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_7a: /* 0x7a */
-/* File: mips/op_unused_7a.S */
-/* File: mips/unused.S */
/*
* Bail to reference interpreter to throw.
*/
b MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_neg_int: /* 0x7b */
-/* File: mips/op_neg_int.S */
-/* File: mips/unop.S */
/*
* Generic 32-bit unary operation. Provide an "instr" line that
* specifies an instruction that performs "result0 = op a0".
@@ -3242,12 +2903,9 @@
GET_INST_OPCODE(t1) # extract opcode from rINST
SET_VREG_GOTO(a0, t0, t1) # vA <- result0
-
/* ------------------------------ */
.balign 128
.L_op_not_int: /* 0x7c */
-/* File: mips/op_not_int.S */
-/* File: mips/unop.S */
/*
* Generic 32-bit unary operation. Provide an "instr" line that
* specifies an instruction that performs "result0 = op a0".
@@ -3266,12 +2924,9 @@
GET_INST_OPCODE(t1) # extract opcode from rINST
SET_VREG_GOTO(a0, t0, t1) # vA <- result0
-
/* ------------------------------ */
.balign 128
.L_op_neg_long: /* 0x7d */
-/* File: mips/op_neg_long.S */
-/* File: mips/unopWide.S */
/*
* Generic 64-bit unary operation. Provide an "instr" line that
* specifies an instruction that performs "result0/result1 = op a0/a1".
@@ -3290,12 +2945,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG64_GOTO(v0, v1, rOBJ, t0) # vA/vA+1 <- a0/a1
-
/* ------------------------------ */
.balign 128
.L_op_not_long: /* 0x7e */
-/* File: mips/op_not_long.S */
-/* File: mips/unopWide.S */
/*
* Generic 64-bit unary operation. Provide an "instr" line that
* specifies an instruction that performs "result0/result1 = op a0/a1".
@@ -3314,12 +2966,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG64_GOTO(a0, a1, rOBJ, t0) # vA/vA+1 <- a0/a1
-
/* ------------------------------ */
.balign 128
.L_op_neg_float: /* 0x7f */
-/* File: mips/op_neg_float.S */
-/* File: mips/unop.S */
/*
* Generic 32-bit unary operation. Provide an "instr" line that
* specifies an instruction that performs "result0 = op a0".
@@ -3338,12 +2987,9 @@
GET_INST_OPCODE(t1) # extract opcode from rINST
SET_VREG_GOTO(a0, t0, t1) # vA <- result0
-
/* ------------------------------ */
.balign 128
.L_op_neg_double: /* 0x80 */
-/* File: mips/op_neg_double.S */
-/* File: mips/unopWide.S */
/*
* Generic 64-bit unary operation. Provide an "instr" line that
* specifies an instruction that performs "result0/result1 = op a0/a1".
@@ -3362,12 +3008,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG64_GOTO(a0, a1, rOBJ, t0) # vA/vA+1 <- a0/a1
-
/* ------------------------------ */
.balign 128
.L_op_int_to_long: /* 0x81 */
-/* File: mips/op_int_to_long.S */
-/* File: mips/unopWider.S */
/*
* Generic 32bit-to-64bit unary operation. Provide an "instr" line
* that specifies an instruction that performs "result0/result1 = op a0".
@@ -3384,12 +3027,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG64_GOTO(a0, a1, rOBJ, t0) # vA/vA+1 <- a0/a1
-
/* ------------------------------ */
.balign 128
.L_op_int_to_float: /* 0x82 */
-/* File: mips/op_int_to_float.S */
-/* File: mips/funop.S */
/*
* Generic 32-bit floating-point unary operation. Provide an "instr"
* line that specifies an instruction that performs "fv0 = op fa0".
@@ -3406,12 +3046,9 @@
GET_INST_OPCODE(t1) # extract opcode from rINST
SET_VREG_F_GOTO(fv0, rOBJ, t1) # vA <- fv0
-
/* ------------------------------ */
.balign 128
.L_op_int_to_double: /* 0x83 */
-/* File: mips/op_int_to_double.S */
-/* File: mips/funopWider.S */
/*
* Generic 32bit-to-64bit floating-point unary operation. Provide an "instr"
* line that specifies an instruction that performs "fv0 = op fa0".
@@ -3427,13 +3064,10 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG64_F_GOTO(fv0, fv0f, rOBJ, t0) # vA/vA+1 <- fv0
-
/* ------------------------------ */
.balign 128
.L_op_long_to_int: /* 0x84 */
-/* File: mips/op_long_to_int.S */
/* we ignore the high word, making this equivalent to a 32-bit reg move */
-/* File: mips/op_move.S */
/* for move, move-object, long-to-int */
/* op vA, vB */
GET_OPB(a1) # a1 <- B from 15:12
@@ -3447,11 +3081,9 @@
SET_VREG_GOTO(a2, a0, t0) # fp[A] <- a2
.endif
-
/* ------------------------------ */
.balign 128
.L_op_long_to_float: /* 0x85 */
-/* File: mips/op_long_to_float.S */
/*
* long-to-float
*/
@@ -3476,7 +3108,6 @@
/* ------------------------------ */
.balign 128
.L_op_long_to_double: /* 0x86 */
-/* File: mips/op_long_to_double.S */
/*
* long-to-double
*/
@@ -3501,7 +3132,6 @@
/* ------------------------------ */
.balign 128
.L_op_float_to_int: /* 0x87 */
-/* File: mips/op_float_to_int.S */
/*
* float-to-int
*
@@ -3535,7 +3165,6 @@
/* ------------------------------ */
.balign 128
.L_op_float_to_long: /* 0x88 */
-/* File: mips/op_float_to_long.S */
/*
* float-to-long
*
@@ -3580,8 +3209,6 @@
/* ------------------------------ */
.balign 128
.L_op_float_to_double: /* 0x89 */
-/* File: mips/op_float_to_double.S */
-/* File: mips/funopWider.S */
/*
* Generic 32bit-to-64bit floating-point unary operation. Provide an "instr"
* line that specifies an instruction that performs "fv0 = op fa0".
@@ -3597,11 +3224,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG64_F_GOTO(fv0, fv0f, rOBJ, t0) # vA/vA+1 <- fv0
-
/* ------------------------------ */
.balign 128
.L_op_double_to_int: /* 0x8a */
-/* File: mips/op_double_to_int.S */
/*
* double-to-int
*
@@ -3637,7 +3262,6 @@
/* ------------------------------ */
.balign 128
.L_op_double_to_long: /* 0x8b */
-/* File: mips/op_double_to_long.S */
/*
* double-to-long
*
@@ -3684,8 +3308,6 @@
/* ------------------------------ */
.balign 128
.L_op_double_to_float: /* 0x8c */
-/* File: mips/op_double_to_float.S */
-/* File: mips/unopNarrower.S */
/*
* Generic 64bit-to-32bit floating-point unary operation. Provide an "instr"
* line that specifies an instruction that performs "fv0 = op fa0".
@@ -3702,12 +3324,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_F_GOTO(fv0, rOBJ, t0) # vA <- fv0
-
/* ------------------------------ */
.balign 128
.L_op_int_to_byte: /* 0x8d */
-/* File: mips/op_int_to_byte.S */
-/* File: mips/unop.S */
/*
* Generic 32-bit unary operation. Provide an "instr" line that
* specifies an instruction that performs "result0 = op a0".
@@ -3726,12 +3345,9 @@
GET_INST_OPCODE(t1) # extract opcode from rINST
SET_VREG_GOTO(a0, t0, t1) # vA <- result0
-
/* ------------------------------ */
.balign 128
.L_op_int_to_char: /* 0x8e */
-/* File: mips/op_int_to_char.S */
-/* File: mips/unop.S */
/*
* Generic 32-bit unary operation. Provide an "instr" line that
* specifies an instruction that performs "result0 = op a0".
@@ -3750,12 +3366,9 @@
GET_INST_OPCODE(t1) # extract opcode from rINST
SET_VREG_GOTO(a0, t0, t1) # vA <- result0
-
/* ------------------------------ */
.balign 128
.L_op_int_to_short: /* 0x8f */
-/* File: mips/op_int_to_short.S */
-/* File: mips/unop.S */
/*
* Generic 32-bit unary operation. Provide an "instr" line that
* specifies an instruction that performs "result0 = op a0".
@@ -3774,12 +3387,9 @@
GET_INST_OPCODE(t1) # extract opcode from rINST
SET_VREG_GOTO(a0, t0, t1) # vA <- result0
-
/* ------------------------------ */
.balign 128
.L_op_add_int: /* 0x90 */
-/* File: mips/op_add_int.S */
-/* File: mips/binop.S */
/*
* Generic 32-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = a0 op a1".
@@ -3812,12 +3422,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_GOTO(a0, rOBJ, t0) # vAA <- a0
-
/* ------------------------------ */
.balign 128
.L_op_sub_int: /* 0x91 */
-/* File: mips/op_sub_int.S */
-/* File: mips/binop.S */
/*
* Generic 32-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = a0 op a1".
@@ -3850,12 +3457,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_GOTO(a0, rOBJ, t0) # vAA <- a0
-
/* ------------------------------ */
.balign 128
.L_op_mul_int: /* 0x92 */
-/* File: mips/op_mul_int.S */
-/* File: mips/binop.S */
/*
* Generic 32-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = a0 op a1".
@@ -3888,13 +3492,10 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_GOTO(a0, rOBJ, t0) # vAA <- a0
-
/* ------------------------------ */
.balign 128
.L_op_div_int: /* 0x93 */
-/* File: mips/op_div_int.S */
#ifdef MIPS32REVGE6
-/* File: mips/binop.S */
/*
* Generic 32-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = a0 op a1".
@@ -3926,9 +3527,7 @@
div a0, a0, a1 # a0 <- op, a0-a3 changed
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_GOTO(a0, rOBJ, t0) # vAA <- a0
-
#else
-/* File: mips/binop.S */
/*
* Generic 32-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = a0 op a1".
@@ -3960,15 +3559,12 @@
mflo a0 # a0 <- op, a0-a3 changed
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_GOTO(a0, rOBJ, t0) # vAA <- a0
-
#endif
/* ------------------------------ */
.balign 128
.L_op_rem_int: /* 0x94 */
-/* File: mips/op_rem_int.S */
#ifdef MIPS32REVGE6
-/* File: mips/binop.S */
/*
* Generic 32-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = a0 op a1".
@@ -4000,9 +3596,7 @@
mod a0, a0, a1 # a0 <- op, a0-a3 changed
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_GOTO(a0, rOBJ, t0) # vAA <- a0
-
#else
-/* File: mips/binop.S */
/*
* Generic 32-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = a0 op a1".
@@ -4034,14 +3628,11 @@
mfhi a0 # a0 <- op, a0-a3 changed
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_GOTO(a0, rOBJ, t0) # vAA <- a0
-
#endif
/* ------------------------------ */
.balign 128
.L_op_and_int: /* 0x95 */
-/* File: mips/op_and_int.S */
-/* File: mips/binop.S */
/*
* Generic 32-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = a0 op a1".
@@ -4074,12 +3665,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_GOTO(a0, rOBJ, t0) # vAA <- a0
-
/* ------------------------------ */
.balign 128
.L_op_or_int: /* 0x96 */
-/* File: mips/op_or_int.S */
-/* File: mips/binop.S */
/*
* Generic 32-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = a0 op a1".
@@ -4112,12 +3700,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_GOTO(a0, rOBJ, t0) # vAA <- a0
-
/* ------------------------------ */
.balign 128
.L_op_xor_int: /* 0x97 */
-/* File: mips/op_xor_int.S */
-/* File: mips/binop.S */
/*
* Generic 32-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = a0 op a1".
@@ -4150,12 +3735,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_GOTO(a0, rOBJ, t0) # vAA <- a0
-
/* ------------------------------ */
.balign 128
.L_op_shl_int: /* 0x98 */
-/* File: mips/op_shl_int.S */
-/* File: mips/binop.S */
/*
* Generic 32-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = a0 op a1".
@@ -4188,12 +3770,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_GOTO(a0, rOBJ, t0) # vAA <- a0
-
/* ------------------------------ */
.balign 128
.L_op_shr_int: /* 0x99 */
-/* File: mips/op_shr_int.S */
-/* File: mips/binop.S */
/*
* Generic 32-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = a0 op a1".
@@ -4226,12 +3805,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_GOTO(a0, rOBJ, t0) # vAA <- a0
-
/* ------------------------------ */
.balign 128
.L_op_ushr_int: /* 0x9a */
-/* File: mips/op_ushr_int.S */
-/* File: mips/binop.S */
/*
* Generic 32-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = a0 op a1".
@@ -4264,11 +3840,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_GOTO(a0, rOBJ, t0) # vAA <- a0
-
/* ------------------------------ */
.balign 128
.L_op_add_long: /* 0x9b */
-/* File: mips/op_add_long.S */
/*
* The compiler generates the following sequence for
* [v1 v0] = [a1 a0] + [a3 a2];
@@ -4277,7 +3851,6 @@
* sltu v1,v0,a2
* addu v1,v1,a1
*/
-/* File: mips/binopWide.S */
/*
* Generic 64-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = a0-a1 op a2-a3".
@@ -4312,11 +3885,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG64_GOTO(v0, v1, rOBJ, t0) # vAA/vAA+1 <- v0/v1
-
/* ------------------------------ */
.balign 128
.L_op_sub_long: /* 0x9c */
-/* File: mips/op_sub_long.S */
/*
* For little endian the code sequence looks as follows:
* subu v0,a0,a2
@@ -4324,7 +3895,6 @@
* sltu a0,a0,v0
* subu v1,v1,a0
*/
-/* File: mips/binopWide.S */
/*
* Generic 64-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = a0-a1 op a2-a3".
@@ -4359,11 +3929,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG64_GOTO(v0, v1, rOBJ, t0) # vAA/vAA+1 <- v0/v1
-
/* ------------------------------ */
.balign 128
.L_op_mul_long: /* 0x9d */
-/* File: mips/op_mul_long.S */
/*
* Signed 64-bit integer multiply.
* a1 a0
@@ -4405,8 +3973,6 @@
/* ------------------------------ */
.balign 128
.L_op_div_long: /* 0x9e */
-/* File: mips/op_div_long.S */
-/* File: mips/binopWide.S */
/*
* Generic 64-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = a0-a1 op a2-a3".
@@ -4441,12 +4007,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG64_GOTO(v0, v1, rOBJ, t0) # vAA/vAA+1 <- v0/v1
-
/* ------------------------------ */
.balign 128
.L_op_rem_long: /* 0x9f */
-/* File: mips/op_rem_long.S */
-/* File: mips/binopWide.S */
/*
* Generic 64-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = a0-a1 op a2-a3".
@@ -4481,12 +4044,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG64_GOTO(v0, v1, rOBJ, t0) # vAA/vAA+1 <- v0/v1
-
/* ------------------------------ */
.balign 128
.L_op_and_long: /* 0xa0 */
-/* File: mips/op_and_long.S */
-/* File: mips/binopWide.S */
/*
* Generic 64-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = a0-a1 op a2-a3".
@@ -4521,12 +4081,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG64_GOTO(a0, a1, rOBJ, t0) # vAA/vAA+1 <- a0/a1
-
/* ------------------------------ */
.balign 128
.L_op_or_long: /* 0xa1 */
-/* File: mips/op_or_long.S */
-/* File: mips/binopWide.S */
/*
* Generic 64-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = a0-a1 op a2-a3".
@@ -4561,12 +4118,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG64_GOTO(a0, a1, rOBJ, t0) # vAA/vAA+1 <- a0/a1
-
/* ------------------------------ */
.balign 128
.L_op_xor_long: /* 0xa2 */
-/* File: mips/op_xor_long.S */
-/* File: mips/binopWide.S */
/*
* Generic 64-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = a0-a1 op a2-a3".
@@ -4601,11 +4155,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG64_GOTO(a0, a1, rOBJ, t0) # vAA/vAA+1 <- a0/a1
-
/* ------------------------------ */
.balign 128
.L_op_shl_long: /* 0xa3 */
-/* File: mips/op_shl_long.S */
/*
* Long integer shift. This is different from the generic 32/64-bit
* binary operations because vAA/vBB are 64-bit but vCC (the shift
@@ -4637,7 +4189,6 @@
/* ------------------------------ */
.balign 128
.L_op_shr_long: /* 0xa4 */
-/* File: mips/op_shr_long.S */
/*
* Long integer shift. This is different from the generic 32/64-bit
* binary operations because vAA/vBB are 64-bit but vCC (the shift
@@ -4668,7 +4219,6 @@
/* ------------------------------ */
.balign 128
.L_op_ushr_long: /* 0xa5 */
-/* File: mips/op_ushr_long.S */
/*
* Long integer shift. This is different from the generic 32/64-bit
* binary operations because vAA/vBB are 64-bit but vCC (the shift
@@ -4700,8 +4250,6 @@
/* ------------------------------ */
.balign 128
.L_op_add_float: /* 0xa6 */
-/* File: mips/op_add_float.S */
-/* File: mips/fbinop.S */
/*
* Generic 32-bit binary float operation.
*
@@ -4721,12 +4269,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_F_GOTO(fv0, rOBJ, t0) # vAA <- fv0
-
/* ------------------------------ */
.balign 128
.L_op_sub_float: /* 0xa7 */
-/* File: mips/op_sub_float.S */
-/* File: mips/fbinop.S */
/*
* Generic 32-bit binary float operation.
*
@@ -4746,12 +4291,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_F_GOTO(fv0, rOBJ, t0) # vAA <- fv0
-
/* ------------------------------ */
.balign 128
.L_op_mul_float: /* 0xa8 */
-/* File: mips/op_mul_float.S */
-/* File: mips/fbinop.S */
/*
* Generic 32-bit binary float operation.
*
@@ -4771,12 +4313,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_F_GOTO(fv0, rOBJ, t0) # vAA <- fv0
-
/* ------------------------------ */
.balign 128
.L_op_div_float: /* 0xa9 */
-/* File: mips/op_div_float.S */
-/* File: mips/fbinop.S */
/*
* Generic 32-bit binary float operation.
*
@@ -4796,12 +4335,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_F_GOTO(fv0, rOBJ, t0) # vAA <- fv0
-
/* ------------------------------ */
.balign 128
.L_op_rem_float: /* 0xaa */
-/* File: mips/op_rem_float.S */
-/* File: mips/fbinop.S */
/*
* Generic 32-bit binary float operation.
*
@@ -4821,12 +4357,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_F_GOTO(fv0, rOBJ, t0) # vAA <- fv0
-
/* ------------------------------ */
.balign 128
.L_op_add_double: /* 0xab */
-/* File: mips/op_add_double.S */
-/* File: mips/fbinopWide.S */
/*
* Generic 64-bit floating-point binary operation. Provide an "instr"
* line that specifies an instruction that performs "fv0 = fa0 op fa1".
@@ -4851,12 +4384,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG64_F_GOTO(fv0, fv0f, rOBJ, t0) # vAA/vAA+1 <- fv0
-
/* ------------------------------ */
.balign 128
.L_op_sub_double: /* 0xac */
-/* File: mips/op_sub_double.S */
-/* File: mips/fbinopWide.S */
/*
* Generic 64-bit floating-point binary operation. Provide an "instr"
* line that specifies an instruction that performs "fv0 = fa0 op fa1".
@@ -4881,12 +4411,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG64_F_GOTO(fv0, fv0f, rOBJ, t0) # vAA/vAA+1 <- fv0
-
/* ------------------------------ */
.balign 128
.L_op_mul_double: /* 0xad */
-/* File: mips/op_mul_double.S */
-/* File: mips/fbinopWide.S */
/*
* Generic 64-bit floating-point binary operation. Provide an "instr"
* line that specifies an instruction that performs "fv0 = fa0 op fa1".
@@ -4911,12 +4438,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG64_F_GOTO(fv0, fv0f, rOBJ, t0) # vAA/vAA+1 <- fv0
-
/* ------------------------------ */
.balign 128
.L_op_div_double: /* 0xae */
-/* File: mips/op_div_double.S */
-/* File: mips/fbinopWide.S */
/*
* Generic 64-bit floating-point binary operation. Provide an "instr"
* line that specifies an instruction that performs "fv0 = fa0 op fa1".
@@ -4941,12 +4465,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG64_F_GOTO(fv0, fv0f, rOBJ, t0) # vAA/vAA+1 <- fv0
-
/* ------------------------------ */
.balign 128
.L_op_rem_double: /* 0xaf */
-/* File: mips/op_rem_double.S */
-/* File: mips/fbinopWide.S */
/*
* Generic 64-bit floating-point binary operation. Provide an "instr"
* line that specifies an instruction that performs "fv0 = fa0 op fa1".
@@ -4971,12 +4492,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG64_F_GOTO(fv0, fv0f, rOBJ, t0) # vAA/vAA+1 <- fv0
-
/* ------------------------------ */
.balign 128
.L_op_add_int_2addr: /* 0xb0 */
-/* File: mips/op_add_int_2addr.S */
-/* File: mips/binop2addr.S */
/*
* Generic 32-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -5005,12 +4523,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_GOTO(a0, rOBJ, t0) # vA <- a0
-
/* ------------------------------ */
.balign 128
.L_op_sub_int_2addr: /* 0xb1 */
-/* File: mips/op_sub_int_2addr.S */
-/* File: mips/binop2addr.S */
/*
* Generic 32-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -5039,12 +4554,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_GOTO(a0, rOBJ, t0) # vA <- a0
-
/* ------------------------------ */
.balign 128
.L_op_mul_int_2addr: /* 0xb2 */
-/* File: mips/op_mul_int_2addr.S */
-/* File: mips/binop2addr.S */
/*
* Generic 32-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -5073,13 +4585,10 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_GOTO(a0, rOBJ, t0) # vA <- a0
-
/* ------------------------------ */
.balign 128
.L_op_div_int_2addr: /* 0xb3 */
-/* File: mips/op_div_int_2addr.S */
#ifdef MIPS32REVGE6
-/* File: mips/binop2addr.S */
/*
* Generic 32-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -5107,9 +4616,7 @@
div a0, a0, a1 # a0 <- op, a0-a3 changed
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_GOTO(a0, rOBJ, t0) # vA <- a0
-
#else
-/* File: mips/binop2addr.S */
/*
* Generic 32-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -5137,15 +4644,12 @@
mflo a0 # a0 <- op, a0-a3 changed
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_GOTO(a0, rOBJ, t0) # vA <- a0
-
#endif
/* ------------------------------ */
.balign 128
.L_op_rem_int_2addr: /* 0xb4 */
-/* File: mips/op_rem_int_2addr.S */
#ifdef MIPS32REVGE6
-/* File: mips/binop2addr.S */
/*
* Generic 32-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -5173,9 +4677,7 @@
mod a0, a0, a1 # a0 <- op, a0-a3 changed
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_GOTO(a0, rOBJ, t0) # vA <- a0
-
#else
-/* File: mips/binop2addr.S */
/*
* Generic 32-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -5203,14 +4705,11 @@
mfhi a0 # a0 <- op, a0-a3 changed
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_GOTO(a0, rOBJ, t0) # vA <- a0
-
#endif
/* ------------------------------ */
.balign 128
.L_op_and_int_2addr: /* 0xb5 */
-/* File: mips/op_and_int_2addr.S */
-/* File: mips/binop2addr.S */
/*
* Generic 32-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -5239,12 +4738,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_GOTO(a0, rOBJ, t0) # vA <- a0
-
/* ------------------------------ */
.balign 128
.L_op_or_int_2addr: /* 0xb6 */
-/* File: mips/op_or_int_2addr.S */
-/* File: mips/binop2addr.S */
/*
* Generic 32-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -5273,12 +4769,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_GOTO(a0, rOBJ, t0) # vA <- a0
-
/* ------------------------------ */
.balign 128
.L_op_xor_int_2addr: /* 0xb7 */
-/* File: mips/op_xor_int_2addr.S */
-/* File: mips/binop2addr.S */
/*
* Generic 32-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -5307,12 +4800,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_GOTO(a0, rOBJ, t0) # vA <- a0
-
/* ------------------------------ */
.balign 128
.L_op_shl_int_2addr: /* 0xb8 */
-/* File: mips/op_shl_int_2addr.S */
-/* File: mips/binop2addr.S */
/*
* Generic 32-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -5341,12 +4831,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_GOTO(a0, rOBJ, t0) # vA <- a0
-
/* ------------------------------ */
.balign 128
.L_op_shr_int_2addr: /* 0xb9 */
-/* File: mips/op_shr_int_2addr.S */
-/* File: mips/binop2addr.S */
/*
* Generic 32-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -5375,12 +4862,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_GOTO(a0, rOBJ, t0) # vA <- a0
-
/* ------------------------------ */
.balign 128
.L_op_ushr_int_2addr: /* 0xba */
-/* File: mips/op_ushr_int_2addr.S */
-/* File: mips/binop2addr.S */
/*
* Generic 32-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -5409,15 +4893,12 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_GOTO(a0, rOBJ, t0) # vA <- a0
-
/* ------------------------------ */
.balign 128
.L_op_add_long_2addr: /* 0xbb */
-/* File: mips/op_add_long_2addr.S */
/*
* See op_add_long.S for details
*/
-/* File: mips/binopWide2addr.S */
/*
* Generic 64-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0-a1 op a2-a3".
@@ -5448,15 +4929,12 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG64_GOTO(v0, v1, rOBJ, t0) # vA/vA+1 <- v0/v1
-
/* ------------------------------ */
.balign 128
.L_op_sub_long_2addr: /* 0xbc */
-/* File: mips/op_sub_long_2addr.S */
/*
* See op_sub_long.S for more details
*/
-/* File: mips/binopWide2addr.S */
/*
* Generic 64-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0-a1 op a2-a3".
@@ -5487,11 +4965,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG64_GOTO(v0, v1, rOBJ, t0) # vA/vA+1 <- v0/v1
-
/* ------------------------------ */
.balign 128
.L_op_mul_long_2addr: /* 0xbd */
-/* File: mips/op_mul_long_2addr.S */
/*
* See op_mul_long.S for more details
*/
@@ -5525,8 +5001,6 @@
/* ------------------------------ */
.balign 128
.L_op_div_long_2addr: /* 0xbe */
-/* File: mips/op_div_long_2addr.S */
-/* File: mips/binopWide2addr.S */
/*
* Generic 64-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0-a1 op a2-a3".
@@ -5557,12 +5031,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG64_GOTO(v0, v1, rOBJ, t0) # vA/vA+1 <- v0/v1
-
/* ------------------------------ */
.balign 128
.L_op_rem_long_2addr: /* 0xbf */
-/* File: mips/op_rem_long_2addr.S */
-/* File: mips/binopWide2addr.S */
/*
* Generic 64-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0-a1 op a2-a3".
@@ -5593,12 +5064,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG64_GOTO(v0, v1, rOBJ, t0) # vA/vA+1 <- v0/v1
-
/* ------------------------------ */
.balign 128
.L_op_and_long_2addr: /* 0xc0 */
-/* File: mips/op_and_long_2addr.S */
-/* File: mips/binopWide2addr.S */
/*
* Generic 64-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0-a1 op a2-a3".
@@ -5629,12 +5097,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG64_GOTO(a0, a1, rOBJ, t0) # vA/vA+1 <- a0/a1
-
/* ------------------------------ */
.balign 128
.L_op_or_long_2addr: /* 0xc1 */
-/* File: mips/op_or_long_2addr.S */
-/* File: mips/binopWide2addr.S */
/*
* Generic 64-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0-a1 op a2-a3".
@@ -5665,12 +5130,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG64_GOTO(a0, a1, rOBJ, t0) # vA/vA+1 <- a0/a1
-
/* ------------------------------ */
.balign 128
.L_op_xor_long_2addr: /* 0xc2 */
-/* File: mips/op_xor_long_2addr.S */
-/* File: mips/binopWide2addr.S */
/*
* Generic 64-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0-a1 op a2-a3".
@@ -5701,11 +5163,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG64_GOTO(a0, a1, rOBJ, t0) # vA/vA+1 <- a0/a1
-
/* ------------------------------ */
.balign 128
.L_op_shl_long_2addr: /* 0xc3 */
-/* File: mips/op_shl_long_2addr.S */
/*
* Long integer shift, 2addr version. vA is 64-bit value/result, vB is
* 32-bit shift distance.
@@ -5733,7 +5193,6 @@
/* ------------------------------ */
.balign 128
.L_op_shr_long_2addr: /* 0xc4 */
-/* File: mips/op_shr_long_2addr.S */
/*
* Long integer shift, 2addr version. vA is 64-bit value/result, vB is
* 32-bit shift distance.
@@ -5760,7 +5219,6 @@
/* ------------------------------ */
.balign 128
.L_op_ushr_long_2addr: /* 0xc5 */
-/* File: mips/op_ushr_long_2addr.S */
/*
* Long integer shift, 2addr version. vA is 64-bit value/result, vB is
* 32-bit shift distance.
@@ -5788,8 +5246,6 @@
/* ------------------------------ */
.balign 128
.L_op_add_float_2addr: /* 0xc6 */
-/* File: mips/op_add_float_2addr.S */
-/* File: mips/fbinop2addr.S */
/*
* Generic 32-bit "/2addr" binary operation. Provide an "instr"
* that specifies an instruction that performs "fv0 = fa0 op fa1".
@@ -5809,12 +5265,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_F_GOTO(fv0, rOBJ, t0) # vA <- result
-
/* ------------------------------ */
.balign 128
.L_op_sub_float_2addr: /* 0xc7 */
-/* File: mips/op_sub_float_2addr.S */
-/* File: mips/fbinop2addr.S */
/*
* Generic 32-bit "/2addr" binary operation. Provide an "instr"
* that specifies an instruction that performs "fv0 = fa0 op fa1".
@@ -5834,12 +5287,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_F_GOTO(fv0, rOBJ, t0) # vA <- result
-
/* ------------------------------ */
.balign 128
.L_op_mul_float_2addr: /* 0xc8 */
-/* File: mips/op_mul_float_2addr.S */
-/* File: mips/fbinop2addr.S */
/*
* Generic 32-bit "/2addr" binary operation. Provide an "instr"
* that specifies an instruction that performs "fv0 = fa0 op fa1".
@@ -5859,12 +5309,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_F_GOTO(fv0, rOBJ, t0) # vA <- result
-
/* ------------------------------ */
.balign 128
.L_op_div_float_2addr: /* 0xc9 */
-/* File: mips/op_div_float_2addr.S */
-/* File: mips/fbinop2addr.S */
/*
* Generic 32-bit "/2addr" binary operation. Provide an "instr"
* that specifies an instruction that performs "fv0 = fa0 op fa1".
@@ -5884,12 +5331,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_F_GOTO(fv0, rOBJ, t0) # vA <- result
-
/* ------------------------------ */
.balign 128
.L_op_rem_float_2addr: /* 0xca */
-/* File: mips/op_rem_float_2addr.S */
-/* File: mips/fbinop2addr.S */
/*
* Generic 32-bit "/2addr" binary operation. Provide an "instr"
* that specifies an instruction that performs "fv0 = fa0 op fa1".
@@ -5909,12 +5353,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_F_GOTO(fv0, rOBJ, t0) # vA <- result
-
/* ------------------------------ */
.balign 128
.L_op_add_double_2addr: /* 0xcb */
-/* File: mips/op_add_double_2addr.S */
-/* File: mips/fbinopWide2addr.S */
/*
* Generic 64-bit floating-point "/2addr" binary operation.
* Provide an "instr" line that specifies an instruction that
@@ -5937,12 +5378,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG64_F_GOTO(fv0, fv0f, rOBJ, t0) # vA/vA+1 <- fv0
-
/* ------------------------------ */
.balign 128
.L_op_sub_double_2addr: /* 0xcc */
-/* File: mips/op_sub_double_2addr.S */
-/* File: mips/fbinopWide2addr.S */
/*
* Generic 64-bit floating-point "/2addr" binary operation.
* Provide an "instr" line that specifies an instruction that
@@ -5965,12 +5403,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG64_F_GOTO(fv0, fv0f, rOBJ, t0) # vA/vA+1 <- fv0
-
/* ------------------------------ */
.balign 128
.L_op_mul_double_2addr: /* 0xcd */
-/* File: mips/op_mul_double_2addr.S */
-/* File: mips/fbinopWide2addr.S */
/*
* Generic 64-bit floating-point "/2addr" binary operation.
* Provide an "instr" line that specifies an instruction that
@@ -5993,12 +5428,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG64_F_GOTO(fv0, fv0f, rOBJ, t0) # vA/vA+1 <- fv0
-
/* ------------------------------ */
.balign 128
.L_op_div_double_2addr: /* 0xce */
-/* File: mips/op_div_double_2addr.S */
-/* File: mips/fbinopWide2addr.S */
/*
* Generic 64-bit floating-point "/2addr" binary operation.
* Provide an "instr" line that specifies an instruction that
@@ -6021,12 +5453,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG64_F_GOTO(fv0, fv0f, rOBJ, t0) # vA/vA+1 <- fv0
-
/* ------------------------------ */
.balign 128
.L_op_rem_double_2addr: /* 0xcf */
-/* File: mips/op_rem_double_2addr.S */
-/* File: mips/fbinopWide2addr.S */
/*
* Generic 64-bit floating-point "/2addr" binary operation.
* Provide an "instr" line that specifies an instruction that
@@ -6049,12 +5478,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG64_F_GOTO(fv0, fv0f, rOBJ, t0) # vA/vA+1 <- fv0
-
/* ------------------------------ */
.balign 128
.L_op_add_int_lit16: /* 0xd0 */
-/* File: mips/op_add_int_lit16.S */
-/* File: mips/binopLit16.S */
/*
* Generic 32-bit "lit16" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -6083,13 +5509,10 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_GOTO(a0, rOBJ, t0) # vA <- a0
-
/* ------------------------------ */
.balign 128
.L_op_rsub_int: /* 0xd1 */
-/* File: mips/op_rsub_int.S */
/* this op is "rsub-int", but can be thought of as "rsub-int/lit16" */
-/* File: mips/binopLit16.S */
/*
* Generic 32-bit "lit16" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -6118,12 +5541,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_GOTO(a0, rOBJ, t0) # vA <- a0
-
/* ------------------------------ */
.balign 128
.L_op_mul_int_lit16: /* 0xd2 */
-/* File: mips/op_mul_int_lit16.S */
-/* File: mips/binopLit16.S */
/*
* Generic 32-bit "lit16" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -6152,13 +5572,10 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_GOTO(a0, rOBJ, t0) # vA <- a0
-
/* ------------------------------ */
.balign 128
.L_op_div_int_lit16: /* 0xd3 */
-/* File: mips/op_div_int_lit16.S */
#ifdef MIPS32REVGE6
-/* File: mips/binopLit16.S */
/*
* Generic 32-bit "lit16" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -6186,9 +5603,7 @@
div a0, a0, a1 # a0 <- op, a0-a3 changed
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_GOTO(a0, rOBJ, t0) # vA <- a0
-
#else
-/* File: mips/binopLit16.S */
/*
* Generic 32-bit "lit16" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -6216,15 +5631,12 @@
mflo a0 # a0 <- op, a0-a3 changed
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_GOTO(a0, rOBJ, t0) # vA <- a0
-
#endif
/* ------------------------------ */
.balign 128
.L_op_rem_int_lit16: /* 0xd4 */
-/* File: mips/op_rem_int_lit16.S */
#ifdef MIPS32REVGE6
-/* File: mips/binopLit16.S */
/*
* Generic 32-bit "lit16" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -6252,9 +5664,7 @@
mod a0, a0, a1 # a0 <- op, a0-a3 changed
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_GOTO(a0, rOBJ, t0) # vA <- a0
-
#else
-/* File: mips/binopLit16.S */
/*
* Generic 32-bit "lit16" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -6282,14 +5692,11 @@
mfhi a0 # a0 <- op, a0-a3 changed
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_GOTO(a0, rOBJ, t0) # vA <- a0
-
#endif
/* ------------------------------ */
.balign 128
.L_op_and_int_lit16: /* 0xd5 */
-/* File: mips/op_and_int_lit16.S */
-/* File: mips/binopLit16.S */
/*
* Generic 32-bit "lit16" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -6318,12 +5725,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_GOTO(a0, rOBJ, t0) # vA <- a0
-
/* ------------------------------ */
.balign 128
.L_op_or_int_lit16: /* 0xd6 */
-/* File: mips/op_or_int_lit16.S */
-/* File: mips/binopLit16.S */
/*
* Generic 32-bit "lit16" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -6352,12 +5756,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_GOTO(a0, rOBJ, t0) # vA <- a0
-
/* ------------------------------ */
.balign 128
.L_op_xor_int_lit16: /* 0xd7 */
-/* File: mips/op_xor_int_lit16.S */
-/* File: mips/binopLit16.S */
/*
* Generic 32-bit "lit16" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -6386,12 +5787,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_GOTO(a0, rOBJ, t0) # vA <- a0
-
/* ------------------------------ */
.balign 128
.L_op_add_int_lit8: /* 0xd8 */
-/* File: mips/op_add_int_lit8.S */
-/* File: mips/binopLit8.S */
/*
* Generic 32-bit "lit8" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -6422,12 +5820,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_GOTO(a0, rOBJ, t0) # vAA <- a0
-
/* ------------------------------ */
.balign 128
.L_op_rsub_int_lit8: /* 0xd9 */
-/* File: mips/op_rsub_int_lit8.S */
-/* File: mips/binopLit8.S */
/*
* Generic 32-bit "lit8" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -6458,12 +5853,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_GOTO(a0, rOBJ, t0) # vAA <- a0
-
/* ------------------------------ */
.balign 128
.L_op_mul_int_lit8: /* 0xda */
-/* File: mips/op_mul_int_lit8.S */
-/* File: mips/binopLit8.S */
/*
* Generic 32-bit "lit8" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -6494,13 +5886,10 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_GOTO(a0, rOBJ, t0) # vAA <- a0
-
/* ------------------------------ */
.balign 128
.L_op_div_int_lit8: /* 0xdb */
-/* File: mips/op_div_int_lit8.S */
#ifdef MIPS32REVGE6
-/* File: mips/binopLit8.S */
/*
* Generic 32-bit "lit8" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -6530,9 +5919,7 @@
div a0, a0, a1 # a0 <- op, a0-a3 changed
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_GOTO(a0, rOBJ, t0) # vAA <- a0
-
#else
-/* File: mips/binopLit8.S */
/*
* Generic 32-bit "lit8" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -6562,15 +5949,12 @@
mflo a0 # a0 <- op, a0-a3 changed
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_GOTO(a0, rOBJ, t0) # vAA <- a0
-
#endif
/* ------------------------------ */
.balign 128
.L_op_rem_int_lit8: /* 0xdc */
-/* File: mips/op_rem_int_lit8.S */
#ifdef MIPS32REVGE6
-/* File: mips/binopLit8.S */
/*
* Generic 32-bit "lit8" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -6600,9 +5984,7 @@
mod a0, a0, a1 # a0 <- op, a0-a3 changed
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_GOTO(a0, rOBJ, t0) # vAA <- a0
-
#else
-/* File: mips/binopLit8.S */
/*
* Generic 32-bit "lit8" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -6632,14 +6014,11 @@
mfhi a0 # a0 <- op, a0-a3 changed
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_GOTO(a0, rOBJ, t0) # vAA <- a0
-
#endif
/* ------------------------------ */
.balign 128
.L_op_and_int_lit8: /* 0xdd */
-/* File: mips/op_and_int_lit8.S */
-/* File: mips/binopLit8.S */
/*
* Generic 32-bit "lit8" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -6670,12 +6049,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_GOTO(a0, rOBJ, t0) # vAA <- a0
-
/* ------------------------------ */
.balign 128
.L_op_or_int_lit8: /* 0xde */
-/* File: mips/op_or_int_lit8.S */
-/* File: mips/binopLit8.S */
/*
* Generic 32-bit "lit8" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -6706,12 +6082,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_GOTO(a0, rOBJ, t0) # vAA <- a0
-
/* ------------------------------ */
.balign 128
.L_op_xor_int_lit8: /* 0xdf */
-/* File: mips/op_xor_int_lit8.S */
-/* File: mips/binopLit8.S */
/*
* Generic 32-bit "lit8" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -6742,12 +6115,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_GOTO(a0, rOBJ, t0) # vAA <- a0
-
/* ------------------------------ */
.balign 128
.L_op_shl_int_lit8: /* 0xe0 */
-/* File: mips/op_shl_int_lit8.S */
-/* File: mips/binopLit8.S */
/*
* Generic 32-bit "lit8" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -6778,12 +6148,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_GOTO(a0, rOBJ, t0) # vAA <- a0
-
/* ------------------------------ */
.balign 128
.L_op_shr_int_lit8: /* 0xe1 */
-/* File: mips/op_shr_int_lit8.S */
-/* File: mips/binopLit8.S */
/*
* Generic 32-bit "lit8" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -6814,12 +6181,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_GOTO(a0, rOBJ, t0) # vAA <- a0
-
/* ------------------------------ */
.balign 128
.L_op_ushr_int_lit8: /* 0xe2 */
-/* File: mips/op_ushr_int_lit8.S */
-/* File: mips/binopLit8.S */
/*
* Generic 32-bit "lit8" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -6850,11 +6214,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_GOTO(a0, rOBJ, t0) # vAA <- a0
-
/* ------------------------------ */
.balign 128
.L_op_iget_quick: /* 0xe3 */
-/* File: mips/op_iget_quick.S */
/* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick */
/* op vA, vB, offset@CCCC */
GET_OPB(a2) # a2 <- B
@@ -6872,7 +6234,6 @@
/* ------------------------------ */
.balign 128
.L_op_iget_wide_quick: /* 0xe4 */
-/* File: mips/op_iget_wide_quick.S */
/* iget-wide-quick vA, vB, offset@CCCC */
GET_OPB(a2) # a2 <- B
GET_VREG(a3, a2) # a3 <- object we're operating on
@@ -6889,7 +6250,6 @@
/* ------------------------------ */
.balign 128
.L_op_iget_object_quick: /* 0xe5 */
-/* File: mips/op_iget_object_quick.S */
/* For: iget-object-quick */
/* op vA, vB, offset@CCCC */
GET_OPB(a2) # a2 <- B
@@ -6908,7 +6268,6 @@
/* ------------------------------ */
.balign 128
.L_op_iput_quick: /* 0xe6 */
-/* File: mips/op_iput_quick.S */
/* For: iput-quick, iput-object-quick */
/* op vA, vB, offset@CCCC */
GET_OPB(a2) # a2 <- B
@@ -6927,7 +6286,6 @@
/* ------------------------------ */
.balign 128
.L_op_iput_wide_quick: /* 0xe7 */
-/* File: mips/op_iput_wide_quick.S */
/* iput-wide-quick vA, vB, offset@CCCC */
GET_OPA4(a0) # a0 <- A(+)
GET_OPB(a1) # a1 <- B
@@ -6947,7 +6305,6 @@
/* ------------------------------ */
.balign 128
.L_op_iput_object_quick: /* 0xe8 */
-/* File: mips/op_iput_object_quick.S */
/* For: iput-object-quick */
/* op vA, vB, offset@CCCC */
EXPORT_PC()
@@ -6963,8 +6320,6 @@
/* ------------------------------ */
.balign 128
.L_op_invoke_virtual_quick: /* 0xe9 */
-/* File: mips/op_invoke_virtual_quick.S */
-/* File: mips/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -6984,12 +6339,9 @@
GET_INST_OPCODE(t0)
GOTO_OPCODE(t0)
-
/* ------------------------------ */
.balign 128
.L_op_invoke_virtual_range_quick: /* 0xea */
-/* File: mips/op_invoke_virtual_range_quick.S */
-/* File: mips/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -7009,12 +6361,9 @@
GET_INST_OPCODE(t0)
GOTO_OPCODE(t0)
-
/* ------------------------------ */
.balign 128
.L_op_iput_boolean_quick: /* 0xeb */
-/* File: mips/op_iput_boolean_quick.S */
-/* File: mips/op_iput_quick.S */
/* For: iput-quick, iput-object-quick */
/* op vA, vB, offset@CCCC */
GET_OPB(a2) # a2 <- B
@@ -7030,12 +6379,9 @@
sb a0, 0(t0) # obj.field (8/16/32 bits) <- a0
JR(t1) # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_iput_byte_quick: /* 0xec */
-/* File: mips/op_iput_byte_quick.S */
-/* File: mips/op_iput_quick.S */
/* For: iput-quick, iput-object-quick */
/* op vA, vB, offset@CCCC */
GET_OPB(a2) # a2 <- B
@@ -7051,12 +6397,9 @@
sb a0, 0(t0) # obj.field (8/16/32 bits) <- a0
JR(t1) # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_iput_char_quick: /* 0xed */
-/* File: mips/op_iput_char_quick.S */
-/* File: mips/op_iput_quick.S */
/* For: iput-quick, iput-object-quick */
/* op vA, vB, offset@CCCC */
GET_OPB(a2) # a2 <- B
@@ -7072,12 +6415,9 @@
sh a0, 0(t0) # obj.field (8/16/32 bits) <- a0
JR(t1) # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_iput_short_quick: /* 0xee */
-/* File: mips/op_iput_short_quick.S */
-/* File: mips/op_iput_quick.S */
/* For: iput-quick, iput-object-quick */
/* op vA, vB, offset@CCCC */
GET_OPB(a2) # a2 <- B
@@ -7093,12 +6433,9 @@
sh a0, 0(t0) # obj.field (8/16/32 bits) <- a0
JR(t1) # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_iget_boolean_quick: /* 0xef */
-/* File: mips/op_iget_boolean_quick.S */
-/* File: mips/op_iget_quick.S */
/* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick */
/* op vA, vB, offset@CCCC */
GET_OPB(a2) # a2 <- B
@@ -7113,12 +6450,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_GOTO(a0, a2, t0) # fp[A] <- a0
-
/* ------------------------------ */
.balign 128
.L_op_iget_byte_quick: /* 0xf0 */
-/* File: mips/op_iget_byte_quick.S */
-/* File: mips/op_iget_quick.S */
/* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick */
/* op vA, vB, offset@CCCC */
GET_OPB(a2) # a2 <- B
@@ -7133,12 +6467,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_GOTO(a0, a2, t0) # fp[A] <- a0
-
/* ------------------------------ */
.balign 128
.L_op_iget_char_quick: /* 0xf1 */
-/* File: mips/op_iget_char_quick.S */
-/* File: mips/op_iget_quick.S */
/* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick */
/* op vA, vB, offset@CCCC */
GET_OPB(a2) # a2 <- B
@@ -7153,12 +6484,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_GOTO(a0, a2, t0) # fp[A] <- a0
-
/* ------------------------------ */
.balign 128
.L_op_iget_short_quick: /* 0xf2 */
-/* File: mips/op_iget_short_quick.S */
-/* File: mips/op_iget_quick.S */
/* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick */
/* op vA, vB, offset@CCCC */
GET_OPB(a2) # a2 <- B
@@ -7173,89 +6501,65 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG_GOTO(a0, a2, t0) # fp[A] <- a0
-
/* ------------------------------ */
.balign 128
.L_op_unused_f3: /* 0xf3 */
-/* File: mips/op_unused_f3.S */
-/* File: mips/unused.S */
/*
* Bail to reference interpreter to throw.
*/
b MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_f4: /* 0xf4 */
-/* File: mips/op_unused_f4.S */
-/* File: mips/unused.S */
/*
* Bail to reference interpreter to throw.
*/
b MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_f5: /* 0xf5 */
-/* File: mips/op_unused_f5.S */
-/* File: mips/unused.S */
/*
* Bail to reference interpreter to throw.
*/
b MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_f6: /* 0xf6 */
-/* File: mips/op_unused_f6.S */
-/* File: mips/unused.S */
/*
* Bail to reference interpreter to throw.
*/
b MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_f7: /* 0xf7 */
-/* File: mips/op_unused_f7.S */
-/* File: mips/unused.S */
/*
* Bail to reference interpreter to throw.
*/
b MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_f8: /* 0xf8 */
-/* File: mips/op_unused_f8.S */
-/* File: mips/unused.S */
/*
* Bail to reference interpreter to throw.
*/
b MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_f9: /* 0xf9 */
-/* File: mips/op_unused_f9.S */
-/* File: mips/unused.S */
/*
* Bail to reference interpreter to throw.
*/
b MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_invoke_polymorphic: /* 0xfa */
-/* File: mips/op_invoke_polymorphic.S */
-/* File: mips/invoke_polymorphic.S */
/*
* invoke-polymorphic handler wrapper.
*/
@@ -7275,12 +6579,9 @@
GET_INST_OPCODE(t0)
GOTO_OPCODE(t0)
-
/* ------------------------------ */
.balign 128
.L_op_invoke_polymorphic_range: /* 0xfb */
-/* File: mips/op_invoke_polymorphic_range.S */
-/* File: mips/invoke_polymorphic.S */
/*
* invoke-polymorphic handler wrapper.
*/
@@ -7300,12 +6601,9 @@
GET_INST_OPCODE(t0)
GOTO_OPCODE(t0)
-
/* ------------------------------ */
.balign 128
.L_op_invoke_custom: /* 0xfc */
-/* File: mips/op_invoke_custom.S */
-/* File: mips/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -7325,12 +6623,9 @@
GET_INST_OPCODE(t0)
GOTO_OPCODE(t0)
-
/* ------------------------------ */
.balign 128
.L_op_invoke_custom_range: /* 0xfd */
-/* File: mips/op_invoke_custom_range.S */
-/* File: mips/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -7350,12 +6645,9 @@
GET_INST_OPCODE(t0)
GOTO_OPCODE(t0)
-
/* ------------------------------ */
.balign 128
.L_op_const_method_handle: /* 0xfe */
-/* File: mips/op_const_method_handle.S */
-/* File: mips/const.S */
/* const/class vAA, type@BBBB */
/* const/method-handle vAA, method_handle@BBBB */
/* const/method-type vAA, proto@BBBB */
@@ -7373,12 +6665,9 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
GOTO_OPCODE(t0) # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_const_method_type: /* 0xff */
-/* File: mips/op_const_method_type.S */
-/* File: mips/const.S */
/* const/class vAA, type@BBBB */
/* const/method-handle vAA, method_handle@BBBB */
/* const/method-type vAA, proto@BBBB */
@@ -7396,29 +6685,16 @@
GET_INST_OPCODE(t0) # extract opcode from rINST
GOTO_OPCODE(t0) # jump to next instruction
-
.balign 128
-/* File: mips/instruction_end.S */
.global artMterpAsmInstructionEnd
artMterpAsmInstructionEnd:
-
-/*
- * ===========================================================================
- * Sister implementations
- * ===========================================================================
- */
-/* File: mips/instruction_start_sister.S */
-
.global artMterpAsmSisterStart
.text
.balign 4
artMterpAsmSisterStart:
-
-/* continuation for op_float_to_long */
-
#ifndef MIPS32REVGE6
.Lop_float_to_long_get_opcode:
GET_INST_OPCODE(t1) # extract opcode from rINST
@@ -7426,8 +6702,6 @@
SET_VREG64_GOTO(rRESULT0, rRESULT1, rOBJ, t1) # vA/vA+1 <- v0/v1
#endif
-/* continuation for op_double_to_long */
-
#ifndef MIPS32REVGE6
.Lop_double_to_long_get_opcode:
GET_INST_OPCODE(t1) # extract opcode from rINST
@@ -7435,58 +6709,39 @@
SET_VREG64_GOTO(rRESULT0, rRESULT1, rOBJ, t1) # vA/vA+1 <- v0/v1
#endif
-/* continuation for op_mul_long */
-
.Lop_mul_long_finish:
GET_INST_OPCODE(t0) # extract opcode from rINST
SET_VREG64_GOTO(v0, v1, a0, t0) # vAA/vAA+1 <- v0(low)/v1(high)
-/* continuation for op_shl_long */
-
.Lop_shl_long_finish:
SET_VREG64_GOTO(zero, v0, t2, t0) # vAA/vAA+1 <- rlo/rhi
-/* continuation for op_shr_long */
-
.Lop_shr_long_finish:
sra a3, a1, 31 # a3<- sign(ah)
SET_VREG64_GOTO(v1, a3, t3, t0) # vAA/VAA+1 <- rlo/rhi
-/* continuation for op_ushr_long */
-
.Lop_ushr_long_finish:
SET_VREG64_GOTO(v1, zero, rOBJ, t0) # vAA/vAA+1 <- rlo/rhi
-/* continuation for op_shl_long_2addr */
-
.Lop_shl_long_2addr_finish:
SET_VREG64_GOTO(zero, v0, rOBJ, t0) # vA/vA+1 <- rlo/rhi
-/* continuation for op_shr_long_2addr */
-
.Lop_shr_long_2addr_finish:
sra a3, a1, 31 # a3<- sign(ah)
SET_VREG64_GOTO(v1, a3, t2, t0) # vA/vA+1 <- rlo/rhi
-/* continuation for op_ushr_long_2addr */
-
.Lop_ushr_long_2addr_finish:
SET_VREG64_GOTO(v1, zero, t3, t0) # vA/vA+1 <- rlo/rhi
-/* File: mips/instruction_end_sister.S */
.global artMterpAsmSisterEnd
artMterpAsmSisterEnd:
-/* File: mips/instruction_start_alt.S */
-
.global artMterpAsmAltInstructionStart
artMterpAsmAltInstructionStart = .L_ALT_op_nop
.text
-
/* ------------------------------ */
.balign 128
.L_ALT_op_nop: /* 0x00 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7504,7 +6759,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move: /* 0x01 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7522,7 +6776,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_from16: /* 0x02 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7540,7 +6793,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_16: /* 0x03 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7558,7 +6810,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_wide: /* 0x04 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7576,7 +6827,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_wide_from16: /* 0x05 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7594,7 +6844,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_wide_16: /* 0x06 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7612,7 +6861,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_object: /* 0x07 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7630,7 +6878,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_object_from16: /* 0x08 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7648,7 +6895,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_object_16: /* 0x09 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7666,7 +6912,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_result: /* 0x0a */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7684,7 +6929,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_result_wide: /* 0x0b */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7702,7 +6946,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_result_object: /* 0x0c */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7720,7 +6963,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_exception: /* 0x0d */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7738,7 +6980,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_return_void: /* 0x0e */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7756,7 +6997,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_return: /* 0x0f */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7774,7 +7014,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_return_wide: /* 0x10 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7792,7 +7031,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_return_object: /* 0x11 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7810,7 +7048,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_4: /* 0x12 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7828,7 +7065,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_16: /* 0x13 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7846,7 +7082,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const: /* 0x14 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7864,7 +7099,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_high16: /* 0x15 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7882,7 +7116,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_wide_16: /* 0x16 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7900,7 +7133,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_wide_32: /* 0x17 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7918,7 +7150,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_wide: /* 0x18 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7936,7 +7167,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_wide_high16: /* 0x19 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7954,7 +7184,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_string: /* 0x1a */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7972,7 +7201,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_string_jumbo: /* 0x1b */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7990,7 +7218,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_class: /* 0x1c */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8008,7 +7235,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_monitor_enter: /* 0x1d */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8026,7 +7252,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_monitor_exit: /* 0x1e */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8044,7 +7269,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_check_cast: /* 0x1f */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8062,7 +7286,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_instance_of: /* 0x20 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8080,7 +7303,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_array_length: /* 0x21 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8098,7 +7320,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_new_instance: /* 0x22 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8116,7 +7337,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_new_array: /* 0x23 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8134,7 +7354,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_filled_new_array: /* 0x24 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8152,7 +7371,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_filled_new_array_range: /* 0x25 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8170,7 +7388,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_fill_array_data: /* 0x26 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8188,7 +7405,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_throw: /* 0x27 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8206,7 +7422,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_goto: /* 0x28 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8224,7 +7439,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_goto_16: /* 0x29 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8242,7 +7456,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_goto_32: /* 0x2a */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8260,7 +7473,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_packed_switch: /* 0x2b */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8278,7 +7490,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sparse_switch: /* 0x2c */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8296,7 +7507,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_cmpl_float: /* 0x2d */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8314,7 +7524,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_cmpg_float: /* 0x2e */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8332,7 +7541,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_cmpl_double: /* 0x2f */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8350,7 +7558,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_cmpg_double: /* 0x30 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8368,7 +7575,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_cmp_long: /* 0x31 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8386,7 +7592,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_eq: /* 0x32 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8404,7 +7609,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_ne: /* 0x33 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8422,7 +7626,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_lt: /* 0x34 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8440,7 +7643,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_ge: /* 0x35 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8458,7 +7660,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_gt: /* 0x36 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8476,7 +7677,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_le: /* 0x37 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8494,7 +7694,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_eqz: /* 0x38 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8512,7 +7711,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_nez: /* 0x39 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8530,7 +7728,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_ltz: /* 0x3a */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8548,7 +7745,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_gez: /* 0x3b */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8566,7 +7762,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_gtz: /* 0x3c */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8584,7 +7779,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_lez: /* 0x3d */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8602,7 +7796,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_3e: /* 0x3e */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8620,7 +7813,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_3f: /* 0x3f */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8638,7 +7830,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_40: /* 0x40 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8656,7 +7847,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_41: /* 0x41 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8674,7 +7864,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_42: /* 0x42 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8692,7 +7881,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_43: /* 0x43 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8710,7 +7898,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aget: /* 0x44 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8728,7 +7915,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aget_wide: /* 0x45 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8746,7 +7932,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aget_object: /* 0x46 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8764,7 +7949,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aget_boolean: /* 0x47 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8782,7 +7966,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aget_byte: /* 0x48 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8800,7 +7983,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aget_char: /* 0x49 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8818,7 +8000,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aget_short: /* 0x4a */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8836,7 +8017,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aput: /* 0x4b */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8854,7 +8034,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aput_wide: /* 0x4c */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8872,7 +8051,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aput_object: /* 0x4d */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8890,7 +8068,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aput_boolean: /* 0x4e */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8908,7 +8085,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aput_byte: /* 0x4f */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8926,7 +8102,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aput_char: /* 0x50 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8944,7 +8119,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aput_short: /* 0x51 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8962,7 +8136,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget: /* 0x52 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8980,7 +8153,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_wide: /* 0x53 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8998,7 +8170,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_object: /* 0x54 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9016,7 +8187,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_boolean: /* 0x55 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9034,7 +8204,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_byte: /* 0x56 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9052,7 +8221,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_char: /* 0x57 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9070,7 +8238,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_short: /* 0x58 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9088,7 +8255,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput: /* 0x59 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9106,7 +8272,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_wide: /* 0x5a */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9124,7 +8289,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_object: /* 0x5b */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9142,7 +8306,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_boolean: /* 0x5c */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9160,7 +8323,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_byte: /* 0x5d */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9178,7 +8340,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_char: /* 0x5e */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9196,7 +8357,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_short: /* 0x5f */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9214,7 +8374,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sget: /* 0x60 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9232,7 +8391,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sget_wide: /* 0x61 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9250,7 +8408,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sget_object: /* 0x62 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9268,7 +8425,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sget_boolean: /* 0x63 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9286,7 +8442,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sget_byte: /* 0x64 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9304,7 +8459,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sget_char: /* 0x65 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9322,7 +8476,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sget_short: /* 0x66 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9340,7 +8493,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sput: /* 0x67 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9358,7 +8510,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sput_wide: /* 0x68 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9376,7 +8527,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sput_object: /* 0x69 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9394,7 +8544,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sput_boolean: /* 0x6a */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9412,7 +8561,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sput_byte: /* 0x6b */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9430,7 +8578,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sput_char: /* 0x6c */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9448,7 +8595,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sput_short: /* 0x6d */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9466,7 +8612,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_virtual: /* 0x6e */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9484,7 +8629,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_super: /* 0x6f */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9502,7 +8646,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_direct: /* 0x70 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9520,7 +8663,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_static: /* 0x71 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9538,7 +8680,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_interface: /* 0x72 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9556,7 +8697,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_return_void_no_barrier: /* 0x73 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9574,7 +8714,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_virtual_range: /* 0x74 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9592,7 +8731,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_super_range: /* 0x75 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9610,7 +8748,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_direct_range: /* 0x76 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9628,7 +8765,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_static_range: /* 0x77 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9646,7 +8782,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_interface_range: /* 0x78 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9664,7 +8799,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_79: /* 0x79 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9682,7 +8816,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_7a: /* 0x7a */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9700,7 +8833,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_neg_int: /* 0x7b */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9718,7 +8850,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_not_int: /* 0x7c */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9736,7 +8867,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_neg_long: /* 0x7d */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9754,7 +8884,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_not_long: /* 0x7e */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9772,7 +8901,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_neg_float: /* 0x7f */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9790,7 +8918,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_neg_double: /* 0x80 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9808,7 +8935,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_int_to_long: /* 0x81 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9826,7 +8952,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_int_to_float: /* 0x82 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9844,7 +8969,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_int_to_double: /* 0x83 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9862,7 +8986,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_long_to_int: /* 0x84 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9880,7 +9003,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_long_to_float: /* 0x85 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9898,7 +9020,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_long_to_double: /* 0x86 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9916,7 +9037,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_float_to_int: /* 0x87 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9934,7 +9054,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_float_to_long: /* 0x88 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9952,7 +9071,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_float_to_double: /* 0x89 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9970,7 +9088,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_double_to_int: /* 0x8a */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9988,7 +9105,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_double_to_long: /* 0x8b */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10006,7 +9122,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_double_to_float: /* 0x8c */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10024,7 +9139,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_int_to_byte: /* 0x8d */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10042,7 +9156,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_int_to_char: /* 0x8e */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10060,7 +9173,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_int_to_short: /* 0x8f */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10078,7 +9190,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_add_int: /* 0x90 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10096,7 +9207,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sub_int: /* 0x91 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10114,7 +9224,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_mul_int: /* 0x92 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10132,7 +9241,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_div_int: /* 0x93 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10150,7 +9258,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rem_int: /* 0x94 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10168,7 +9275,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_and_int: /* 0x95 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10186,7 +9292,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_or_int: /* 0x96 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10204,7 +9309,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_xor_int: /* 0x97 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10222,7 +9326,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_shl_int: /* 0x98 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10240,7 +9343,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_shr_int: /* 0x99 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10258,7 +9360,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_ushr_int: /* 0x9a */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10276,7 +9377,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_add_long: /* 0x9b */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10294,7 +9394,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sub_long: /* 0x9c */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10312,7 +9411,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_mul_long: /* 0x9d */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10330,7 +9428,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_div_long: /* 0x9e */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10348,7 +9445,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rem_long: /* 0x9f */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10366,7 +9462,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_and_long: /* 0xa0 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10384,7 +9479,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_or_long: /* 0xa1 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10402,7 +9496,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_xor_long: /* 0xa2 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10420,7 +9513,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_shl_long: /* 0xa3 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10438,7 +9530,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_shr_long: /* 0xa4 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10456,7 +9547,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_ushr_long: /* 0xa5 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10474,7 +9564,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_add_float: /* 0xa6 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10492,7 +9581,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sub_float: /* 0xa7 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10510,7 +9598,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_mul_float: /* 0xa8 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10528,7 +9615,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_div_float: /* 0xa9 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10546,7 +9632,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rem_float: /* 0xaa */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10564,7 +9649,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_add_double: /* 0xab */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10582,7 +9666,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sub_double: /* 0xac */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10600,7 +9683,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_mul_double: /* 0xad */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10618,7 +9700,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_div_double: /* 0xae */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10636,7 +9717,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rem_double: /* 0xaf */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10654,7 +9734,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_add_int_2addr: /* 0xb0 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10672,7 +9751,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sub_int_2addr: /* 0xb1 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10690,7 +9768,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_mul_int_2addr: /* 0xb2 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10708,7 +9785,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_div_int_2addr: /* 0xb3 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10726,7 +9802,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rem_int_2addr: /* 0xb4 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10744,7 +9819,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_and_int_2addr: /* 0xb5 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10762,7 +9836,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_or_int_2addr: /* 0xb6 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10780,7 +9853,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_xor_int_2addr: /* 0xb7 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10798,7 +9870,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_shl_int_2addr: /* 0xb8 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10816,7 +9887,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_shr_int_2addr: /* 0xb9 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10834,7 +9904,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_ushr_int_2addr: /* 0xba */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10852,7 +9921,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_add_long_2addr: /* 0xbb */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10870,7 +9938,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sub_long_2addr: /* 0xbc */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10888,7 +9955,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_mul_long_2addr: /* 0xbd */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10906,7 +9972,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_div_long_2addr: /* 0xbe */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10924,7 +9989,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rem_long_2addr: /* 0xbf */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10942,7 +10006,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_and_long_2addr: /* 0xc0 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10960,7 +10023,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_or_long_2addr: /* 0xc1 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10978,7 +10040,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_xor_long_2addr: /* 0xc2 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10996,7 +10057,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_shl_long_2addr: /* 0xc3 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11014,7 +10074,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_shr_long_2addr: /* 0xc4 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11032,7 +10091,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_ushr_long_2addr: /* 0xc5 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11050,7 +10108,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_add_float_2addr: /* 0xc6 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11068,7 +10125,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sub_float_2addr: /* 0xc7 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11086,7 +10142,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_mul_float_2addr: /* 0xc8 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11104,7 +10159,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_div_float_2addr: /* 0xc9 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11122,7 +10176,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rem_float_2addr: /* 0xca */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11140,7 +10193,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_add_double_2addr: /* 0xcb */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11158,7 +10210,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sub_double_2addr: /* 0xcc */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11176,7 +10227,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_mul_double_2addr: /* 0xcd */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11194,7 +10244,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_div_double_2addr: /* 0xce */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11212,7 +10261,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rem_double_2addr: /* 0xcf */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11230,7 +10278,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_add_int_lit16: /* 0xd0 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11248,7 +10295,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rsub_int: /* 0xd1 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11266,7 +10312,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_mul_int_lit16: /* 0xd2 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11284,7 +10329,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_div_int_lit16: /* 0xd3 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11302,7 +10346,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rem_int_lit16: /* 0xd4 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11320,7 +10363,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_and_int_lit16: /* 0xd5 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11338,7 +10380,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_or_int_lit16: /* 0xd6 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11356,7 +10397,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_xor_int_lit16: /* 0xd7 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11374,7 +10414,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_add_int_lit8: /* 0xd8 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11392,7 +10431,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rsub_int_lit8: /* 0xd9 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11410,7 +10448,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_mul_int_lit8: /* 0xda */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11428,7 +10465,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_div_int_lit8: /* 0xdb */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11446,7 +10482,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rem_int_lit8: /* 0xdc */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11464,7 +10499,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_and_int_lit8: /* 0xdd */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11482,7 +10516,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_or_int_lit8: /* 0xde */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11500,7 +10533,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_xor_int_lit8: /* 0xdf */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11518,7 +10550,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_shl_int_lit8: /* 0xe0 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11536,7 +10567,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_shr_int_lit8: /* 0xe1 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11554,7 +10584,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_ushr_int_lit8: /* 0xe2 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11572,7 +10601,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_quick: /* 0xe3 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11590,7 +10618,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_wide_quick: /* 0xe4 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11608,7 +10635,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_object_quick: /* 0xe5 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11626,7 +10652,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_quick: /* 0xe6 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11644,7 +10669,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_wide_quick: /* 0xe7 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11662,7 +10686,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_object_quick: /* 0xe8 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11680,7 +10703,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_virtual_quick: /* 0xe9 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11698,7 +10720,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_virtual_range_quick: /* 0xea */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11716,7 +10737,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_boolean_quick: /* 0xeb */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11734,7 +10754,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_byte_quick: /* 0xec */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11752,7 +10771,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_char_quick: /* 0xed */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11770,7 +10788,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_short_quick: /* 0xee */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11788,7 +10805,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_boolean_quick: /* 0xef */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11806,7 +10822,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_byte_quick: /* 0xf0 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11824,7 +10839,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_char_quick: /* 0xf1 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11842,7 +10856,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_short_quick: /* 0xf2 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11860,7 +10873,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_f3: /* 0xf3 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11878,7 +10890,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_f4: /* 0xf4 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11896,7 +10907,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_f5: /* 0xf5 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11914,7 +10924,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_f6: /* 0xf6 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11932,7 +10941,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_f7: /* 0xf7 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11950,7 +10958,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_f8: /* 0xf8 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11968,7 +10975,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_f9: /* 0xf9 */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11986,7 +10992,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_polymorphic: /* 0xfa */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -12004,7 +11009,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_polymorphic_range: /* 0xfb */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -12022,7 +11026,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_custom: /* 0xfc */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -12040,7 +11043,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_custom_range: /* 0xfd */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -12058,7 +11060,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_method_handle: /* 0xfe */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -12076,7 +11077,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_method_type: /* 0xff */
-/* File: mips/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -12092,12 +11092,9 @@
jalr zero, t9 # Tail call to Mterp(self, shadow_frame, dex_pc_ptr)
.balign 128
-/* File: mips/instruction_end_alt.S */
.global artMterpAsmAltInstructionEnd
artMterpAsmAltInstructionEnd:
-
-/* File: mips/footer.S */
/*
* ===========================================================================
* Common subroutines and data
@@ -12386,4 +11383,3 @@
.cfi_endproc
.end ExecuteMterpImpl
-
diff --git a/runtime/interpreter/mterp/out/mterp_mips64.S b/runtime/interpreter/mterp/out/mterp_mips64.S
index 40a8396..cf95a57 100644
--- a/runtime/interpreter/mterp/out/mterp_mips64.S
+++ b/runtime/interpreter/mterp/out/mterp_mips64.S
@@ -1,10 +1,4 @@
-/*
- * This file was generated automatically by gen-mterp.py for 'mips64'.
- *
- * --> DO NOT EDIT <--
- */
-
-/* File: mips64/header.S */
+/* DO NOT EDIT: This file was generated by gen-mterp.py. */
/*
* Copyright (C) 2016 The Android Open Source Project
*
@@ -333,8 +327,6 @@
#define LONG_MIN 0x8000000000000000
#define LONG_MIN_AS_FLOAT 0xDF000000
#define LONG_MIN_AS_DOUBLE 0xC3E0000000000000
-
-/* File: mips64/entry.S */
/*
* Copyright (C) 2016 The Android Open Source Project
*
@@ -430,16 +422,12 @@
/* NOTE: no fallthrough */
-/* File: mips64/instruction_start.S */
-
.global artMterpAsmInstructionStart
artMterpAsmInstructionStart = .L_op_nop
.text
-
/* ------------------------------ */
.balign 128
.L_op_nop: /* 0x00 */
-/* File: mips64/op_nop.S */
FETCH_ADVANCE_INST 1 # advance rPC, load rINST
GET_INST_OPCODE v0 # extract opcode from rINST
GOTO_OPCODE v0 # jump to next instruction
@@ -447,7 +435,6 @@
/* ------------------------------ */
.balign 128
.L_op_move: /* 0x01 */
-/* File: mips64/op_move.S */
/* for move, move-object, long-to-int */
/* op vA, vB */
ext a2, rINST, 8, 4 # a2 <- A
@@ -465,7 +452,6 @@
/* ------------------------------ */
.balign 128
.L_op_move_from16: /* 0x02 */
-/* File: mips64/op_move_from16.S */
/* for: move/from16, move-object/from16 */
/* op vAA, vBBBB */
lhu a3, 2(rPC) # a3 <- BBBB
@@ -483,7 +469,6 @@
/* ------------------------------ */
.balign 128
.L_op_move_16: /* 0x03 */
-/* File: mips64/op_move_16.S */
/* for: move/16, move-object/16 */
/* op vAAAA, vBBBB */
lhu a3, 4(rPC) # a3 <- BBBB
@@ -501,7 +486,6 @@
/* ------------------------------ */
.balign 128
.L_op_move_wide: /* 0x04 */
-/* File: mips64/op_move_wide.S */
/* move-wide vA, vB */
/* NOTE: regs can overlap, e.g. "move v6,v7" or "move v7,v6" */
ext a3, rINST, 12, 4 # a3 <- B
@@ -515,7 +499,6 @@
/* ------------------------------ */
.balign 128
.L_op_move_wide_from16: /* 0x05 */
-/* File: mips64/op_move_wide_from16.S */
/* move-wide/from16 vAA, vBBBB */
/* NOTE: regs can overlap, e.g. "move v6,v7" or "move v7,v6" */
lhu a3, 2(rPC) # a3 <- BBBB
@@ -529,7 +512,6 @@
/* ------------------------------ */
.balign 128
.L_op_move_wide_16: /* 0x06 */
-/* File: mips64/op_move_wide_16.S */
/* move-wide/16 vAAAA, vBBBB */
/* NOTE: regs can overlap, e.g. "move v6,v7" or "move v7,v6" */
lhu a3, 4(rPC) # a3 <- BBBB
@@ -543,8 +525,6 @@
/* ------------------------------ */
.balign 128
.L_op_move_object: /* 0x07 */
-/* File: mips64/op_move_object.S */
-/* File: mips64/op_move.S */
/* for move, move-object, long-to-int */
/* op vA, vB */
ext a2, rINST, 8, 4 # a2 <- A
@@ -559,12 +539,9 @@
.endif
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_move_object_from16: /* 0x08 */
-/* File: mips64/op_move_object_from16.S */
-/* File: mips64/op_move_from16.S */
/* for: move/from16, move-object/from16 */
/* op vAA, vBBBB */
lhu a3, 2(rPC) # a3 <- BBBB
@@ -579,12 +556,9 @@
.endif
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_move_object_16: /* 0x09 */
-/* File: mips64/op_move_object_16.S */
-/* File: mips64/op_move_16.S */
/* for: move/16, move-object/16 */
/* op vAAAA, vBBBB */
lhu a3, 4(rPC) # a3 <- BBBB
@@ -599,11 +573,9 @@
.endif
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_move_result: /* 0x0a */
-/* File: mips64/op_move_result.S */
/* for: move-result, move-result-object */
/* op vAA */
srl a2, rINST, 8 # a2 <- AA
@@ -621,7 +593,6 @@
/* ------------------------------ */
.balign 128
.L_op_move_result_wide: /* 0x0b */
-/* File: mips64/op_move_result_wide.S */
/* for: move-result-wide */
/* op vAA */
srl a2, rINST, 8 # a2 <- AA
@@ -635,8 +606,6 @@
/* ------------------------------ */
.balign 128
.L_op_move_result_object: /* 0x0c */
-/* File: mips64/op_move_result_object.S */
-/* File: mips64/op_move_result.S */
/* for: move-result, move-result-object */
/* op vAA */
srl a2, rINST, 8 # a2 <- AA
@@ -651,11 +620,9 @@
.endif
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_move_exception: /* 0x0d */
-/* File: mips64/op_move_exception.S */
/* move-exception vAA */
srl a2, rINST, 8 # a2 <- AA
ld a0, THREAD_EXCEPTION_OFFSET(rSELF) # load exception obj
@@ -668,7 +635,6 @@
/* ------------------------------ */
.balign 128
.L_op_return_void: /* 0x0e */
-/* File: mips64/op_return_void.S */
.extern MterpThreadFenceForConstructor
.extern MterpSuspendCheck
jal MterpThreadFenceForConstructor
@@ -684,7 +650,6 @@
/* ------------------------------ */
.balign 128
.L_op_return: /* 0x0f */
-/* File: mips64/op_return.S */
/*
* Return a 32-bit value.
*
@@ -707,7 +672,6 @@
/* ------------------------------ */
.balign 128
.L_op_return_wide: /* 0x10 */
-/* File: mips64/op_return_wide.S */
/*
* Return a 64-bit value.
*/
@@ -729,8 +693,6 @@
/* ------------------------------ */
.balign 128
.L_op_return_object: /* 0x11 */
-/* File: mips64/op_return_object.S */
-/* File: mips64/op_return.S */
/*
* Return a 32-bit value.
*
@@ -750,11 +712,9 @@
GET_VREG_U a0, a2 # a0 <- vAA
b MterpReturn
-
/* ------------------------------ */
.balign 128
.L_op_const_4: /* 0x12 */
-/* File: mips64/op_const_4.S */
/* const/4 vA, #+B */
ext a2, rINST, 8, 4 # a2 <- A
seh a0, rINST # sign extend B in rINST
@@ -767,7 +727,6 @@
/* ------------------------------ */
.balign 128
.L_op_const_16: /* 0x13 */
-/* File: mips64/op_const_16.S */
/* const/16 vAA, #+BBBB */
srl a2, rINST, 8 # a2 <- AA
lh a0, 2(rPC) # a0 <- sign-extended BBBB
@@ -779,7 +738,6 @@
/* ------------------------------ */
.balign 128
.L_op_const: /* 0x14 */
-/* File: mips64/op_const.S */
/* const vAA, #+BBBBbbbb */
srl a2, rINST, 8 # a2 <- AA
lh a0, 2(rPC) # a0 <- bbbb (low)
@@ -793,7 +751,6 @@
/* ------------------------------ */
.balign 128
.L_op_const_high16: /* 0x15 */
-/* File: mips64/op_const_high16.S */
/* const/high16 vAA, #+BBBB0000 */
srl a2, rINST, 8 # a2 <- AA
lh a0, 2(rPC) # a0 <- BBBB
@@ -806,7 +763,6 @@
/* ------------------------------ */
.balign 128
.L_op_const_wide_16: /* 0x16 */
-/* File: mips64/op_const_wide_16.S */
/* const-wide/16 vAA, #+BBBB */
srl a2, rINST, 8 # a2 <- AA
lh a0, 2(rPC) # a0 <- sign-extended BBBB
@@ -818,7 +774,6 @@
/* ------------------------------ */
.balign 128
.L_op_const_wide_32: /* 0x17 */
-/* File: mips64/op_const_wide_32.S */
/* const-wide/32 vAA, #+BBBBbbbb */
srl a2, rINST, 8 # a2 <- AA
lh a0, 2(rPC) # a0 <- bbbb (low)
@@ -832,7 +787,6 @@
/* ------------------------------ */
.balign 128
.L_op_const_wide: /* 0x18 */
-/* File: mips64/op_const_wide.S */
/* const-wide vAA, #+HHHHhhhhBBBBbbbb */
srl a4, rINST, 8 # a4 <- AA
lh a0, 2(rPC) # a0 <- bbbb (low)
@@ -850,7 +804,6 @@
/* ------------------------------ */
.balign 128
.L_op_const_wide_high16: /* 0x19 */
-/* File: mips64/op_const_wide_high16.S */
/* const-wide/high16 vAA, #+BBBB000000000000 */
srl a2, rINST, 8 # a2 <- AA
lh a0, 2(rPC) # a0 <- BBBB
@@ -863,8 +816,6 @@
/* ------------------------------ */
.balign 128
.L_op_const_string: /* 0x1a */
-/* File: mips64/op_const_string.S */
-/* File: mips64/const.S */
/* const/class vAA, type@BBBB */
/* const/method-handle vAA, method_handle@BBBB */
/* const/method-type vAA, proto@BBBB */
@@ -882,11 +833,9 @@
GET_INST_OPCODE v0 # extract opcode from rINST
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_const_string_jumbo: /* 0x1b */
-/* File: mips64/op_const_string_jumbo.S */
/* const/string vAA, String//BBBBBBBB */
.extern MterpConstString
EXPORT_PC
@@ -906,8 +855,6 @@
/* ------------------------------ */
.balign 128
.L_op_const_class: /* 0x1c */
-/* File: mips64/op_const_class.S */
-/* File: mips64/const.S */
/* const/class vAA, type@BBBB */
/* const/method-handle vAA, method_handle@BBBB */
/* const/method-type vAA, proto@BBBB */
@@ -925,11 +872,9 @@
GET_INST_OPCODE v0 # extract opcode from rINST
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_monitor_enter: /* 0x1d */
-/* File: mips64/op_monitor_enter.S */
/*
* Synchronize on an object.
*/
@@ -948,7 +893,6 @@
/* ------------------------------ */
.balign 128
.L_op_monitor_exit: /* 0x1e */
-/* File: mips64/op_monitor_exit.S */
/*
* Unlock an object.
*
@@ -971,7 +915,6 @@
/* ------------------------------ */
.balign 128
.L_op_check_cast: /* 0x1f */
-/* File: mips64/op_check_cast.S */
/*
* Check to see if a cast from one class to another is allowed.
*/
@@ -993,7 +936,6 @@
/* ------------------------------ */
.balign 128
.L_op_instance_of: /* 0x20 */
-/* File: mips64/op_instance_of.S */
/*
* Check to see if an object reference is an instance of a class.
*
@@ -1021,7 +963,6 @@
/* ------------------------------ */
.balign 128
.L_op_array_length: /* 0x21 */
-/* File: mips64/op_array_length.S */
/*
* Return the length of an array.
*/
@@ -1038,7 +979,6 @@
/* ------------------------------ */
.balign 128
.L_op_new_instance: /* 0x22 */
-/* File: mips64/op_new_instance.S */
/*
* Create a new instance of a class.
*/
@@ -1057,7 +997,6 @@
/* ------------------------------ */
.balign 128
.L_op_new_array: /* 0x23 */
-/* File: mips64/op_new_array.S */
/*
* Allocate an array of objects, specified with the array class
* and a count.
@@ -1081,7 +1020,6 @@
/* ------------------------------ */
.balign 128
.L_op_filled_new_array: /* 0x24 */
-/* File: mips64/op_filled_new_array.S */
/*
* Create a new array with elements filled from registers.
*
@@ -1103,8 +1041,6 @@
/* ------------------------------ */
.balign 128
.L_op_filled_new_array_range: /* 0x25 */
-/* File: mips64/op_filled_new_array_range.S */
-/* File: mips64/op_filled_new_array.S */
/*
* Create a new array with elements filled from registers.
*
@@ -1123,11 +1059,9 @@
GET_INST_OPCODE v0 # extract opcode from rINST
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_fill_array_data: /* 0x26 */
-/* File: mips64/op_fill_array_data.S */
/* fill-array-data vAA, +BBBBBBBB */
.extern MterpFillArrayData
EXPORT_PC
@@ -1146,7 +1080,6 @@
/* ------------------------------ */
.balign 128
.L_op_throw: /* 0x27 */
-/* File: mips64/op_throw.S */
/*
* Throw an exception object in the current thread.
*/
@@ -1161,7 +1094,6 @@
/* ------------------------------ */
.balign 128
.L_op_goto: /* 0x28 */
-/* File: mips64/op_goto.S */
/*
* Unconditional branch, 8-bit offset.
*
@@ -1176,7 +1108,6 @@
/* ------------------------------ */
.balign 128
.L_op_goto_16: /* 0x29 */
-/* File: mips64/op_goto_16.S */
/*
* Unconditional branch, 16-bit offset.
*
@@ -1190,7 +1121,6 @@
/* ------------------------------ */
.balign 128
.L_op_goto_32: /* 0x2a */
-/* File: mips64/op_goto_32.S */
/*
* Unconditional branch, 32-bit offset.
*
@@ -1209,7 +1139,6 @@
/* ------------------------------ */
.balign 128
.L_op_packed_switch: /* 0x2b */
-/* File: mips64/op_packed_switch.S */
/*
* Handle a packed-switch or sparse-switch instruction. In both cases
* we decode it and hand it off to a helper function.
@@ -1234,8 +1163,6 @@
/* ------------------------------ */
.balign 128
.L_op_sparse_switch: /* 0x2c */
-/* File: mips64/op_sparse_switch.S */
-/* File: mips64/op_packed_switch.S */
/*
* Handle a packed-switch or sparse-switch instruction. In both cases
* we decode it and hand it off to a helper function.
@@ -1257,12 +1184,9 @@
move rINST, v0
b MterpCommonTakenBranchNoFlags
-
/* ------------------------------ */
.balign 128
.L_op_cmpl_float: /* 0x2d */
-/* File: mips64/op_cmpl_float.S */
-/* File: mips64/fcmp.S */
/*
* Compare two floating-point values. Puts 0, 1, or -1 into the
* destination register based on the results of the comparison.
@@ -1295,12 +1219,9 @@
SET_VREG a0, a4 # vAA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_cmpg_float: /* 0x2e */
-/* File: mips64/op_cmpg_float.S */
-/* File: mips64/fcmp.S */
/*
* Compare two floating-point values. Puts 0, 1, or -1 into the
* destination register based on the results of the comparison.
@@ -1333,12 +1254,9 @@
SET_VREG a0, a4 # vAA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_cmpl_double: /* 0x2f */
-/* File: mips64/op_cmpl_double.S */
-/* File: mips64/fcmpWide.S */
/*
* Compare two floating-point values. Puts 0, 1, or -1 into the
* destination register based on the results of the comparison.
@@ -1371,12 +1289,9 @@
SET_VREG a0, a4 # vAA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_cmpg_double: /* 0x30 */
-/* File: mips64/op_cmpg_double.S */
-/* File: mips64/fcmpWide.S */
/*
* Compare two floating-point values. Puts 0, 1, or -1 into the
* destination register based on the results of the comparison.
@@ -1409,11 +1324,9 @@
SET_VREG a0, a4 # vAA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_cmp_long: /* 0x31 */
-/* File: mips64/op_cmp_long.S */
/* cmp-long vAA, vBB, vCC */
lbu a2, 2(rPC) # a2 <- BB
lbu a3, 3(rPC) # a3 <- CC
@@ -1431,8 +1344,6 @@
/* ------------------------------ */
.balign 128
.L_op_if_eq: /* 0x32 */
-/* File: mips64/op_if_eq.S */
-/* File: mips64/bincmp.S */
/*
* Generic two-operand compare-and-branch operation. Provide a "condition"
* fragment that specifies the comparison to perform, e.g. for
@@ -1453,12 +1364,9 @@
GET_INST_OPCODE v0 # extract opcode from rINST
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_if_ne: /* 0x33 */
-/* File: mips64/op_if_ne.S */
-/* File: mips64/bincmp.S */
/*
* Generic two-operand compare-and-branch operation. Provide a "condition"
* fragment that specifies the comparison to perform, e.g. for
@@ -1479,12 +1387,9 @@
GET_INST_OPCODE v0 # extract opcode from rINST
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_if_lt: /* 0x34 */
-/* File: mips64/op_if_lt.S */
-/* File: mips64/bincmp.S */
/*
* Generic two-operand compare-and-branch operation. Provide a "condition"
* fragment that specifies the comparison to perform, e.g. for
@@ -1505,12 +1410,9 @@
GET_INST_OPCODE v0 # extract opcode from rINST
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_if_ge: /* 0x35 */
-/* File: mips64/op_if_ge.S */
-/* File: mips64/bincmp.S */
/*
* Generic two-operand compare-and-branch operation. Provide a "condition"
* fragment that specifies the comparison to perform, e.g. for
@@ -1531,12 +1433,9 @@
GET_INST_OPCODE v0 # extract opcode from rINST
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_if_gt: /* 0x36 */
-/* File: mips64/op_if_gt.S */
-/* File: mips64/bincmp.S */
/*
* Generic two-operand compare-and-branch operation. Provide a "condition"
* fragment that specifies the comparison to perform, e.g. for
@@ -1557,12 +1456,9 @@
GET_INST_OPCODE v0 # extract opcode from rINST
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_if_le: /* 0x37 */
-/* File: mips64/op_if_le.S */
-/* File: mips64/bincmp.S */
/*
* Generic two-operand compare-and-branch operation. Provide a "condition"
* fragment that specifies the comparison to perform, e.g. for
@@ -1583,12 +1479,9 @@
GET_INST_OPCODE v0 # extract opcode from rINST
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_if_eqz: /* 0x38 */
-/* File: mips64/op_if_eqz.S */
-/* File: mips64/zcmp.S */
/*
* Generic one-operand compare-and-branch operation. Provide a "condition"
* fragment that specifies the comparison to perform, e.g. for
@@ -1607,12 +1500,9 @@
GET_INST_OPCODE v0 # extract opcode from rINST
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_if_nez: /* 0x39 */
-/* File: mips64/op_if_nez.S */
-/* File: mips64/zcmp.S */
/*
* Generic one-operand compare-and-branch operation. Provide a "condition"
* fragment that specifies the comparison to perform, e.g. for
@@ -1631,12 +1521,9 @@
GET_INST_OPCODE v0 # extract opcode from rINST
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_if_ltz: /* 0x3a */
-/* File: mips64/op_if_ltz.S */
-/* File: mips64/zcmp.S */
/*
* Generic one-operand compare-and-branch operation. Provide a "condition"
* fragment that specifies the comparison to perform, e.g. for
@@ -1655,12 +1542,9 @@
GET_INST_OPCODE v0 # extract opcode from rINST
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_if_gez: /* 0x3b */
-/* File: mips64/op_if_gez.S */
-/* File: mips64/zcmp.S */
/*
* Generic one-operand compare-and-branch operation. Provide a "condition"
* fragment that specifies the comparison to perform, e.g. for
@@ -1679,12 +1563,9 @@
GET_INST_OPCODE v0 # extract opcode from rINST
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_if_gtz: /* 0x3c */
-/* File: mips64/op_if_gtz.S */
-/* File: mips64/zcmp.S */
/*
* Generic one-operand compare-and-branch operation. Provide a "condition"
* fragment that specifies the comparison to perform, e.g. for
@@ -1703,12 +1584,9 @@
GET_INST_OPCODE v0 # extract opcode from rINST
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_if_lez: /* 0x3d */
-/* File: mips64/op_if_lez.S */
-/* File: mips64/zcmp.S */
/*
* Generic one-operand compare-and-branch operation. Provide a "condition"
* fragment that specifies the comparison to perform, e.g. for
@@ -1727,77 +1605,57 @@
GET_INST_OPCODE v0 # extract opcode from rINST
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_unused_3e: /* 0x3e */
-/* File: mips64/op_unused_3e.S */
-/* File: mips64/unused.S */
/*
* Bail to reference interpreter to throw.
*/
b MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_3f: /* 0x3f */
-/* File: mips64/op_unused_3f.S */
-/* File: mips64/unused.S */
/*
* Bail to reference interpreter to throw.
*/
b MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_40: /* 0x40 */
-/* File: mips64/op_unused_40.S */
-/* File: mips64/unused.S */
/*
* Bail to reference interpreter to throw.
*/
b MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_41: /* 0x41 */
-/* File: mips64/op_unused_41.S */
-/* File: mips64/unused.S */
/*
* Bail to reference interpreter to throw.
*/
b MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_42: /* 0x42 */
-/* File: mips64/op_unused_42.S */
-/* File: mips64/unused.S */
/*
* Bail to reference interpreter to throw.
*/
b MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_43: /* 0x43 */
-/* File: mips64/op_unused_43.S */
-/* File: mips64/unused.S */
/*
* Bail to reference interpreter to throw.
*/
b MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_aget: /* 0x44 */
-/* File: mips64/op_aget.S */
/*
* Array get, 32 bits or less. vAA <- vBB[vCC].
*
@@ -1830,7 +1688,6 @@
/* ------------------------------ */
.balign 128
.L_op_aget_wide: /* 0x45 */
-/* File: mips64/op_aget_wide.S */
/*
* Array get, 64 bits. vAA <- vBB[vCC].
*
@@ -1856,7 +1713,6 @@
/* ------------------------------ */
.balign 128
.L_op_aget_object: /* 0x46 */
-/* File: mips64/op_aget_object.S */
/*
* Array object get. vAA <- vBB[vCC].
*
@@ -1882,8 +1738,6 @@
/* ------------------------------ */
.balign 128
.L_op_aget_boolean: /* 0x47 */
-/* File: mips64/op_aget_boolean.S */
-/* File: mips64/op_aget.S */
/*
* Array get, 32 bits or less. vAA <- vBB[vCC].
*
@@ -1913,12 +1767,9 @@
SET_VREG a2, a4 # vAA <- a2
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_aget_byte: /* 0x48 */
-/* File: mips64/op_aget_byte.S */
-/* File: mips64/op_aget.S */
/*
* Array get, 32 bits or less. vAA <- vBB[vCC].
*
@@ -1948,12 +1799,9 @@
SET_VREG a2, a4 # vAA <- a2
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_aget_char: /* 0x49 */
-/* File: mips64/op_aget_char.S */
-/* File: mips64/op_aget.S */
/*
* Array get, 32 bits or less. vAA <- vBB[vCC].
*
@@ -1983,12 +1831,9 @@
SET_VREG a2, a4 # vAA <- a2
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_aget_short: /* 0x4a */
-/* File: mips64/op_aget_short.S */
-/* File: mips64/op_aget.S */
/*
* Array get, 32 bits or less. vAA <- vBB[vCC].
*
@@ -2018,11 +1863,9 @@
SET_VREG a2, a4 # vAA <- a2
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_aput: /* 0x4b */
-/* File: mips64/op_aput.S */
/*
* Array put, 32 bits or less. vBB[vCC] <- vAA.
*
@@ -2055,7 +1898,6 @@
/* ------------------------------ */
.balign 128
.L_op_aput_wide: /* 0x4c */
-/* File: mips64/op_aput_wide.S */
/*
* Array put, 64 bits. vBB[vCC] <- vAA.
*
@@ -2081,7 +1923,6 @@
/* ------------------------------ */
.balign 128
.L_op_aput_object: /* 0x4d */
-/* File: mips64/op_aput_object.S */
/*
* Store an object into an array. vBB[vCC] <- vAA.
*/
@@ -2100,8 +1941,6 @@
/* ------------------------------ */
.balign 128
.L_op_aput_boolean: /* 0x4e */
-/* File: mips64/op_aput_boolean.S */
-/* File: mips64/op_aput.S */
/*
* Array put, 32 bits or less. vBB[vCC] <- vAA.
*
@@ -2131,12 +1970,9 @@
sb a2, MIRROR_BOOLEAN_ARRAY_DATA_OFFSET(a0) # vBB[vCC] <- a2
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_aput_byte: /* 0x4f */
-/* File: mips64/op_aput_byte.S */
-/* File: mips64/op_aput.S */
/*
* Array put, 32 bits or less. vBB[vCC] <- vAA.
*
@@ -2166,12 +2002,9 @@
sb a2, MIRROR_BYTE_ARRAY_DATA_OFFSET(a0) # vBB[vCC] <- a2
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_aput_char: /* 0x50 */
-/* File: mips64/op_aput_char.S */
-/* File: mips64/op_aput.S */
/*
* Array put, 32 bits or less. vBB[vCC] <- vAA.
*
@@ -2201,12 +2034,9 @@
sh a2, MIRROR_CHAR_ARRAY_DATA_OFFSET(a0) # vBB[vCC] <- a2
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_aput_short: /* 0x51 */
-/* File: mips64/op_aput_short.S */
-/* File: mips64/op_aput.S */
/*
* Array put, 32 bits or less. vBB[vCC] <- vAA.
*
@@ -2236,284 +2066,149 @@
sh a2, MIRROR_SHORT_ARRAY_DATA_OFFSET(a0) # vBB[vCC] <- a2
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_iget: /* 0x52 */
-/* File: mips64/op_iget.S */
-/* File: mips64/field.S */
TODO
-
/* ------------------------------ */
.balign 128
.L_op_iget_wide: /* 0x53 */
-/* File: mips64/op_iget_wide.S */
-/* File: mips64/op_iget.S */
-/* File: mips64/field.S */
TODO
-
-
/* ------------------------------ */
.balign 128
.L_op_iget_object: /* 0x54 */
-/* File: mips64/op_iget_object.S */
-/* File: mips64/op_iget.S */
-/* File: mips64/field.S */
TODO
-
-
/* ------------------------------ */
.balign 128
.L_op_iget_boolean: /* 0x55 */
-/* File: mips64/op_iget_boolean.S */
-/* File: mips64/op_iget.S */
-/* File: mips64/field.S */
TODO
-
-
/* ------------------------------ */
.balign 128
.L_op_iget_byte: /* 0x56 */
-/* File: mips64/op_iget_byte.S */
-/* File: mips64/op_iget.S */
-/* File: mips64/field.S */
TODO
-
-
/* ------------------------------ */
.balign 128
.L_op_iget_char: /* 0x57 */
-/* File: mips64/op_iget_char.S */
-/* File: mips64/op_iget.S */
-/* File: mips64/field.S */
TODO
-
-
/* ------------------------------ */
.balign 128
.L_op_iget_short: /* 0x58 */
-/* File: mips64/op_iget_short.S */
-/* File: mips64/op_iget.S */
-/* File: mips64/field.S */
TODO
-
-
/* ------------------------------ */
.balign 128
.L_op_iput: /* 0x59 */
-/* File: mips64/op_iput.S */
-/* File: mips64/field.S */
TODO
-
/* ------------------------------ */
.balign 128
.L_op_iput_wide: /* 0x5a */
-/* File: mips64/op_iput_wide.S */
-/* File: mips64/op_iput.S */
-/* File: mips64/field.S */
TODO
-
-
/* ------------------------------ */
.balign 128
.L_op_iput_object: /* 0x5b */
-/* File: mips64/op_iput_object.S */
-/* File: mips64/op_iput.S */
-/* File: mips64/field.S */
TODO
-
-
/* ------------------------------ */
.balign 128
.L_op_iput_boolean: /* 0x5c */
-/* File: mips64/op_iput_boolean.S */
-/* File: mips64/op_iput.S */
-/* File: mips64/field.S */
TODO
-
-
/* ------------------------------ */
.balign 128
.L_op_iput_byte: /* 0x5d */
-/* File: mips64/op_iput_byte.S */
-/* File: mips64/op_iput.S */
-/* File: mips64/field.S */
TODO
-
-
/* ------------------------------ */
.balign 128
.L_op_iput_char: /* 0x5e */
-/* File: mips64/op_iput_char.S */
-/* File: mips64/op_iput.S */
-/* File: mips64/field.S */
TODO
-
-
/* ------------------------------ */
.balign 128
.L_op_iput_short: /* 0x5f */
-/* File: mips64/op_iput_short.S */
-/* File: mips64/op_iput.S */
-/* File: mips64/field.S */
TODO
-
-
/* ------------------------------ */
.balign 128
.L_op_sget: /* 0x60 */
-/* File: mips64/op_sget.S */
-/* File: mips64/field.S */
TODO
-
/* ------------------------------ */
.balign 128
.L_op_sget_wide: /* 0x61 */
-/* File: mips64/op_sget_wide.S */
-/* File: mips64/op_sget.S */
-/* File: mips64/field.S */
TODO
-
-
/* ------------------------------ */
.balign 128
.L_op_sget_object: /* 0x62 */
-/* File: mips64/op_sget_object.S */
-/* File: mips64/op_sget.S */
-/* File: mips64/field.S */
TODO
-
-
/* ------------------------------ */
.balign 128
.L_op_sget_boolean: /* 0x63 */
-/* File: mips64/op_sget_boolean.S */
-/* File: mips64/op_sget.S */
-/* File: mips64/field.S */
TODO
-
-
/* ------------------------------ */
.balign 128
.L_op_sget_byte: /* 0x64 */
-/* File: mips64/op_sget_byte.S */
-/* File: mips64/op_sget.S */
-/* File: mips64/field.S */
TODO
-
-
/* ------------------------------ */
.balign 128
.L_op_sget_char: /* 0x65 */
-/* File: mips64/op_sget_char.S */
-/* File: mips64/op_sget.S */
-/* File: mips64/field.S */
TODO
-
-
/* ------------------------------ */
.balign 128
.L_op_sget_short: /* 0x66 */
-/* File: mips64/op_sget_short.S */
-/* File: mips64/op_sget.S */
-/* File: mips64/field.S */
TODO
-
-
/* ------------------------------ */
.balign 128
.L_op_sput: /* 0x67 */
-/* File: mips64/op_sput.S */
-/* File: mips64/field.S */
TODO
-
/* ------------------------------ */
.balign 128
.L_op_sput_wide: /* 0x68 */
-/* File: mips64/op_sput_wide.S */
-/* File: mips64/op_sput.S */
-/* File: mips64/field.S */
TODO
-
-
/* ------------------------------ */
.balign 128
.L_op_sput_object: /* 0x69 */
-/* File: mips64/op_sput_object.S */
-/* File: mips64/op_sput.S */
-/* File: mips64/field.S */
TODO
-
-
/* ------------------------------ */
.balign 128
.L_op_sput_boolean: /* 0x6a */
-/* File: mips64/op_sput_boolean.S */
-/* File: mips64/op_sput.S */
-/* File: mips64/field.S */
TODO
-
-
/* ------------------------------ */
.balign 128
.L_op_sput_byte: /* 0x6b */
-/* File: mips64/op_sput_byte.S */
-/* File: mips64/op_sput.S */
-/* File: mips64/field.S */
TODO
-
-
/* ------------------------------ */
.balign 128
.L_op_sput_char: /* 0x6c */
-/* File: mips64/op_sput_char.S */
-/* File: mips64/op_sput.S */
-/* File: mips64/field.S */
TODO
-
-
/* ------------------------------ */
.balign 128
.L_op_sput_short: /* 0x6d */
-/* File: mips64/op_sput_short.S */
-/* File: mips64/op_sput.S */
-/* File: mips64/field.S */
TODO
-
-
/* ------------------------------ */
.balign 128
.L_op_invoke_virtual: /* 0x6e */
-/* File: mips64/op_invoke_virtual.S */
-/* File: mips64/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -2533,7 +2228,6 @@
bnezc v0, MterpFallback
GET_INST_OPCODE v0
GOTO_OPCODE v0
-
/*
* Handle a virtual method call.
*
@@ -2545,8 +2239,6 @@
/* ------------------------------ */
.balign 128
.L_op_invoke_super: /* 0x6f */
-/* File: mips64/op_invoke_super.S */
-/* File: mips64/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -2566,7 +2258,6 @@
bnezc v0, MterpFallback
GET_INST_OPCODE v0
GOTO_OPCODE v0
-
/*
* Handle a "super" method call.
*
@@ -2578,8 +2269,6 @@
/* ------------------------------ */
.balign 128
.L_op_invoke_direct: /* 0x70 */
-/* File: mips64/op_invoke_direct.S */
-/* File: mips64/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -2600,12 +2289,9 @@
GET_INST_OPCODE v0
GOTO_OPCODE v0
-
/* ------------------------------ */
.balign 128
.L_op_invoke_static: /* 0x71 */
-/* File: mips64/op_invoke_static.S */
-/* File: mips64/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -2626,12 +2312,9 @@
GET_INST_OPCODE v0
GOTO_OPCODE v0
-
/* ------------------------------ */
.balign 128
.L_op_invoke_interface: /* 0x72 */
-/* File: mips64/op_invoke_interface.S */
-/* File: mips64/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -2651,7 +2334,6 @@
bnezc v0, MterpFallback
GET_INST_OPCODE v0
GOTO_OPCODE v0
-
/*
* Handle an interface method call.
*
@@ -2663,7 +2345,6 @@
/* ------------------------------ */
.balign 128
.L_op_return_void_no_barrier: /* 0x73 */
-/* File: mips64/op_return_void_no_barrier.S */
.extern MterpSuspendCheck
lw ra, THREAD_FLAGS_OFFSET(rSELF)
move a0, rSELF
@@ -2677,8 +2358,6 @@
/* ------------------------------ */
.balign 128
.L_op_invoke_virtual_range: /* 0x74 */
-/* File: mips64/op_invoke_virtual_range.S */
-/* File: mips64/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -2699,12 +2378,9 @@
GET_INST_OPCODE v0
GOTO_OPCODE v0
-
/* ------------------------------ */
.balign 128
.L_op_invoke_super_range: /* 0x75 */
-/* File: mips64/op_invoke_super_range.S */
-/* File: mips64/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -2725,12 +2401,9 @@
GET_INST_OPCODE v0
GOTO_OPCODE v0
-
/* ------------------------------ */
.balign 128
.L_op_invoke_direct_range: /* 0x76 */
-/* File: mips64/op_invoke_direct_range.S */
-/* File: mips64/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -2751,12 +2424,9 @@
GET_INST_OPCODE v0
GOTO_OPCODE v0
-
/* ------------------------------ */
.balign 128
.L_op_invoke_static_range: /* 0x77 */
-/* File: mips64/op_invoke_static_range.S */
-/* File: mips64/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -2777,12 +2447,9 @@
GET_INST_OPCODE v0
GOTO_OPCODE v0
-
/* ------------------------------ */
.balign 128
.L_op_invoke_interface_range: /* 0x78 */
-/* File: mips64/op_invoke_interface_range.S */
-/* File: mips64/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -2803,34 +2470,25 @@
GET_INST_OPCODE v0
GOTO_OPCODE v0
-
/* ------------------------------ */
.balign 128
.L_op_unused_79: /* 0x79 */
-/* File: mips64/op_unused_79.S */
-/* File: mips64/unused.S */
/*
* Bail to reference interpreter to throw.
*/
b MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_7a: /* 0x7a */
-/* File: mips64/op_unused_7a.S */
-/* File: mips64/unused.S */
/*
* Bail to reference interpreter to throw.
*/
b MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_neg_int: /* 0x7b */
-/* File: mips64/op_neg_int.S */
-/* File: mips64/unop.S */
/*
* Generic 32-bit unary operation. Provide an "instr" line that
* specifies an instruction that performs "a0 = op a0".
@@ -2849,12 +2507,9 @@
SET_VREG a0, a2 # vA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_not_int: /* 0x7c */
-/* File: mips64/op_not_int.S */
-/* File: mips64/unop.S */
/*
* Generic 32-bit unary operation. Provide an "instr" line that
* specifies an instruction that performs "a0 = op a0".
@@ -2873,12 +2528,9 @@
SET_VREG a0, a2 # vA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_neg_long: /* 0x7d */
-/* File: mips64/op_neg_long.S */
-/* File: mips64/unopWide.S */
/*
* Generic 64-bit unary operation. Provide an "instr" line that
* specifies an instruction that performs "a0 = op a0".
@@ -2896,12 +2548,9 @@
SET_VREG_WIDE a0, a2 # vA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_not_long: /* 0x7e */
-/* File: mips64/op_not_long.S */
-/* File: mips64/unopWide.S */
/*
* Generic 64-bit unary operation. Provide an "instr" line that
* specifies an instruction that performs "a0 = op a0".
@@ -2919,12 +2568,9 @@
SET_VREG_WIDE a0, a2 # vA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_neg_float: /* 0x7f */
-/* File: mips64/op_neg_float.S */
-/* File: mips64/fcvtHeader.S */
/*
* Loads a specified register from vB. Used primarily for conversions
* from or to a floating-point type.
@@ -2940,9 +2586,7 @@
srl a2, rINST, 12 # a2 <- B
GET_VREG_FLOAT f0, a2
FETCH_ADVANCE_INST 1 # advance rPC, load rINST
-
neg.s f0, f0
-/* File: mips64/fcvtFooter.S */
/*
* Stores a specified register containing the result of conversion
* from or to a floating-point type and jumps to the next instruction.
@@ -2962,12 +2606,9 @@
SET_VREG_FLOAT f0, a1
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_neg_double: /* 0x80 */
-/* File: mips64/op_neg_double.S */
-/* File: mips64/fcvtHeader.S */
/*
* Loads a specified register from vB. Used primarily for conversions
* from or to a floating-point type.
@@ -2983,9 +2624,7 @@
srl a2, rINST, 12 # a2 <- B
GET_VREG_DOUBLE f0, a2
FETCH_ADVANCE_INST 1 # advance rPC, load rINST
-
neg.d f0, f0
-/* File: mips64/fcvtFooter.S */
/*
* Stores a specified register containing the result of conversion
* from or to a floating-point type and jumps to the next instruction.
@@ -3005,11 +2644,9 @@
SET_VREG_DOUBLE f0, a1
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_int_to_long: /* 0x81 */
-/* File: mips64/op_int_to_long.S */
/* int-to-long vA, vB */
ext a3, rINST, 12, 4 # a3 <- B
GET_VREG a0, a3 # a0 <- vB (sign-extended to 64 bits)
@@ -3022,13 +2659,11 @@
/* ------------------------------ */
.balign 128
.L_op_int_to_float: /* 0x82 */
-/* File: mips64/op_int_to_float.S */
/*
* Conversion from or to floating-point happens in a floating-point register.
* Therefore we load the input and store the output into or from a
* floating-point register irrespective of the type.
*/
-/* File: mips64/fcvtHeader.S */
/*
* Loads a specified register from vB. Used primarily for conversions
* from or to a floating-point type.
@@ -3044,9 +2679,7 @@
srl a2, rINST, 12 # a2 <- B
GET_VREG_FLOAT f0, a2
FETCH_ADVANCE_INST 1 # advance rPC, load rINST
-
cvt.s.w f0, f0
-/* File: mips64/fcvtFooter.S */
/*
* Stores a specified register containing the result of conversion
* from or to a floating-point type and jumps to the next instruction.
@@ -3066,17 +2699,14 @@
SET_VREG_FLOAT f0, a1
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_int_to_double: /* 0x83 */
-/* File: mips64/op_int_to_double.S */
/*
* Conversion from or to floating-point happens in a floating-point register.
* Therefore we load the input and store the output into or from a
* floating-point register irrespective of the type.
*/
-/* File: mips64/fcvtHeader.S */
/*
* Loads a specified register from vB. Used primarily for conversions
* from or to a floating-point type.
@@ -3092,9 +2722,7 @@
srl a2, rINST, 12 # a2 <- B
GET_VREG_FLOAT f0, a2
FETCH_ADVANCE_INST 1 # advance rPC, load rINST
-
cvt.d.w f0, f0
-/* File: mips64/fcvtFooter.S */
/*
* Stores a specified register containing the result of conversion
* from or to a floating-point type and jumps to the next instruction.
@@ -3114,13 +2742,10 @@
SET_VREG_DOUBLE f0, a1
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_long_to_int: /* 0x84 */
-/* File: mips64/op_long_to_int.S */
/* we ignore the high word, making this equivalent to a 32-bit reg move */
-/* File: mips64/op_move.S */
/* for move, move-object, long-to-int */
/* op vA, vB */
ext a2, rINST, 8, 4 # a2 <- A
@@ -3135,17 +2760,14 @@
.endif
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_long_to_float: /* 0x85 */
-/* File: mips64/op_long_to_float.S */
/*
* Conversion from or to floating-point happens in a floating-point register.
* Therefore we load the input and store the output into or from a
* floating-point register irrespective of the type.
*/
-/* File: mips64/fcvtHeader.S */
/*
* Loads a specified register from vB. Used primarily for conversions
* from or to a floating-point type.
@@ -3161,9 +2783,7 @@
srl a2, rINST, 12 # a2 <- B
GET_VREG_DOUBLE f0, a2
FETCH_ADVANCE_INST 1 # advance rPC, load rINST
-
cvt.s.l f0, f0
-/* File: mips64/fcvtFooter.S */
/*
* Stores a specified register containing the result of conversion
* from or to a floating-point type and jumps to the next instruction.
@@ -3183,17 +2803,14 @@
SET_VREG_FLOAT f0, a1
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_long_to_double: /* 0x86 */
-/* File: mips64/op_long_to_double.S */
/*
* Conversion from or to floating-point happens in a floating-point register.
* Therefore we load the input and store the output into or from a
* floating-point register irrespective of the type.
*/
-/* File: mips64/fcvtHeader.S */
/*
* Loads a specified register from vB. Used primarily for conversions
* from or to a floating-point type.
@@ -3209,9 +2826,7 @@
srl a2, rINST, 12 # a2 <- B
GET_VREG_DOUBLE f0, a2
FETCH_ADVANCE_INST 1 # advance rPC, load rINST
-
cvt.d.l f0, f0
-/* File: mips64/fcvtFooter.S */
/*
* Stores a specified register containing the result of conversion
* from or to a floating-point type and jumps to the next instruction.
@@ -3231,12 +2846,9 @@
SET_VREG_DOUBLE f0, a1
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_float_to_int: /* 0x87 */
-/* File: mips64/op_float_to_int.S */
-/* File: mips64/fcvtHeader.S */
/*
* Loads a specified register from vB. Used primarily for conversions
* from or to a floating-point type.
@@ -3252,9 +2864,7 @@
srl a2, rINST, 12 # a2 <- B
GET_VREG_FLOAT f0, a2
FETCH_ADVANCE_INST 1 # advance rPC, load rINST
-
trunc.w.s f0, f0
-/* File: mips64/fcvtFooter.S */
/*
* Stores a specified register containing the result of conversion
* from or to a floating-point type and jumps to the next instruction.
@@ -3274,12 +2884,9 @@
SET_VREG_FLOAT f0, a1
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_float_to_long: /* 0x88 */
-/* File: mips64/op_float_to_long.S */
-/* File: mips64/fcvtHeader.S */
/*
* Loads a specified register from vB. Used primarily for conversions
* from or to a floating-point type.
@@ -3295,9 +2902,7 @@
srl a2, rINST, 12 # a2 <- B
GET_VREG_FLOAT f0, a2
FETCH_ADVANCE_INST 1 # advance rPC, load rINST
-
trunc.l.s f0, f0
-/* File: mips64/fcvtFooter.S */
/*
* Stores a specified register containing the result of conversion
* from or to a floating-point type and jumps to the next instruction.
@@ -3317,17 +2922,14 @@
SET_VREG_DOUBLE f0, a1
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_float_to_double: /* 0x89 */
-/* File: mips64/op_float_to_double.S */
/*
* Conversion from or to floating-point happens in a floating-point register.
* Therefore we load the input and store the output into or from a
* floating-point register irrespective of the type.
*/
-/* File: mips64/fcvtHeader.S */
/*
* Loads a specified register from vB. Used primarily for conversions
* from or to a floating-point type.
@@ -3343,9 +2945,7 @@
srl a2, rINST, 12 # a2 <- B
GET_VREG_FLOAT f0, a2
FETCH_ADVANCE_INST 1 # advance rPC, load rINST
-
cvt.d.s f0, f0
-/* File: mips64/fcvtFooter.S */
/*
* Stores a specified register containing the result of conversion
* from or to a floating-point type and jumps to the next instruction.
@@ -3365,12 +2965,9 @@
SET_VREG_DOUBLE f0, a1
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_double_to_int: /* 0x8a */
-/* File: mips64/op_double_to_int.S */
-/* File: mips64/fcvtHeader.S */
/*
* Loads a specified register from vB. Used primarily for conversions
* from or to a floating-point type.
@@ -3386,9 +2983,7 @@
srl a2, rINST, 12 # a2 <- B
GET_VREG_DOUBLE f0, a2
FETCH_ADVANCE_INST 1 # advance rPC, load rINST
-
trunc.w.d f0, f0
-/* File: mips64/fcvtFooter.S */
/*
* Stores a specified register containing the result of conversion
* from or to a floating-point type and jumps to the next instruction.
@@ -3408,12 +3003,9 @@
SET_VREG_FLOAT f0, a1
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_double_to_long: /* 0x8b */
-/* File: mips64/op_double_to_long.S */
-/* File: mips64/fcvtHeader.S */
/*
* Loads a specified register from vB. Used primarily for conversions
* from or to a floating-point type.
@@ -3429,9 +3021,7 @@
srl a2, rINST, 12 # a2 <- B
GET_VREG_DOUBLE f0, a2
FETCH_ADVANCE_INST 1 # advance rPC, load rINST
-
trunc.l.d f0, f0
-/* File: mips64/fcvtFooter.S */
/*
* Stores a specified register containing the result of conversion
* from or to a floating-point type and jumps to the next instruction.
@@ -3451,17 +3041,14 @@
SET_VREG_DOUBLE f0, a1
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_double_to_float: /* 0x8c */
-/* File: mips64/op_double_to_float.S */
/*
* Conversion from or to floating-point happens in a floating-point register.
* Therefore we load the input and store the output into or from a
* floating-point register irrespective of the type.
*/
-/* File: mips64/fcvtHeader.S */
/*
* Loads a specified register from vB. Used primarily for conversions
* from or to a floating-point type.
@@ -3477,9 +3064,7 @@
srl a2, rINST, 12 # a2 <- B
GET_VREG_DOUBLE f0, a2
FETCH_ADVANCE_INST 1 # advance rPC, load rINST
-
cvt.s.d f0, f0
-/* File: mips64/fcvtFooter.S */
/*
* Stores a specified register containing the result of conversion
* from or to a floating-point type and jumps to the next instruction.
@@ -3499,12 +3084,9 @@
SET_VREG_FLOAT f0, a1
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_int_to_byte: /* 0x8d */
-/* File: mips64/op_int_to_byte.S */
-/* File: mips64/unop.S */
/*
* Generic 32-bit unary operation. Provide an "instr" line that
* specifies an instruction that performs "a0 = op a0".
@@ -3523,12 +3105,9 @@
SET_VREG a0, a2 # vA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_int_to_char: /* 0x8e */
-/* File: mips64/op_int_to_char.S */
-/* File: mips64/unop.S */
/*
* Generic 32-bit unary operation. Provide an "instr" line that
* specifies an instruction that performs "a0 = op a0".
@@ -3547,12 +3126,9 @@
SET_VREG a0, a2 # vA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_int_to_short: /* 0x8f */
-/* File: mips64/op_int_to_short.S */
-/* File: mips64/unop.S */
/*
* Generic 32-bit unary operation. Provide an "instr" line that
* specifies an instruction that performs "a0 = op a0".
@@ -3571,12 +3147,9 @@
SET_VREG a0, a2 # vA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_add_int: /* 0x90 */
-/* File: mips64/op_add_int.S */
-/* File: mips64/binop.S */
/*
* Generic 32-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = a0 op a1".
@@ -3607,12 +3180,9 @@
SET_VREG a0, a4 # vAA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_sub_int: /* 0x91 */
-/* File: mips64/op_sub_int.S */
-/* File: mips64/binop.S */
/*
* Generic 32-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = a0 op a1".
@@ -3643,12 +3213,9 @@
SET_VREG a0, a4 # vAA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_mul_int: /* 0x92 */
-/* File: mips64/op_mul_int.S */
-/* File: mips64/binop.S */
/*
* Generic 32-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = a0 op a1".
@@ -3679,12 +3246,9 @@
SET_VREG a0, a4 # vAA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_div_int: /* 0x93 */
-/* File: mips64/op_div_int.S */
-/* File: mips64/binop.S */
/*
* Generic 32-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = a0 op a1".
@@ -3715,12 +3279,9 @@
SET_VREG a0, a4 # vAA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_rem_int: /* 0x94 */
-/* File: mips64/op_rem_int.S */
-/* File: mips64/binop.S */
/*
* Generic 32-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = a0 op a1".
@@ -3751,12 +3312,9 @@
SET_VREG a0, a4 # vAA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_and_int: /* 0x95 */
-/* File: mips64/op_and_int.S */
-/* File: mips64/binop.S */
/*
* Generic 32-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = a0 op a1".
@@ -3787,12 +3345,9 @@
SET_VREG a0, a4 # vAA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_or_int: /* 0x96 */
-/* File: mips64/op_or_int.S */
-/* File: mips64/binop.S */
/*
* Generic 32-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = a0 op a1".
@@ -3823,12 +3378,9 @@
SET_VREG a0, a4 # vAA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_xor_int: /* 0x97 */
-/* File: mips64/op_xor_int.S */
-/* File: mips64/binop.S */
/*
* Generic 32-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = a0 op a1".
@@ -3859,12 +3411,9 @@
SET_VREG a0, a4 # vAA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_shl_int: /* 0x98 */
-/* File: mips64/op_shl_int.S */
-/* File: mips64/binop.S */
/*
* Generic 32-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = a0 op a1".
@@ -3895,12 +3444,9 @@
SET_VREG a0, a4 # vAA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_shr_int: /* 0x99 */
-/* File: mips64/op_shr_int.S */
-/* File: mips64/binop.S */
/*
* Generic 32-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = a0 op a1".
@@ -3931,12 +3477,9 @@
SET_VREG a0, a4 # vAA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_ushr_int: /* 0x9a */
-/* File: mips64/op_ushr_int.S */
-/* File: mips64/binop.S */
/*
* Generic 32-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = a0 op a1".
@@ -3967,12 +3510,9 @@
SET_VREG a0, a4 # vAA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_add_long: /* 0x9b */
-/* File: mips64/op_add_long.S */
-/* File: mips64/binopWide.S */
/*
* Generic 64-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = a0 op a1".
@@ -4003,12 +3543,9 @@
SET_VREG_WIDE a0, a4 # vAA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_sub_long: /* 0x9c */
-/* File: mips64/op_sub_long.S */
-/* File: mips64/binopWide.S */
/*
* Generic 64-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = a0 op a1".
@@ -4039,12 +3576,9 @@
SET_VREG_WIDE a0, a4 # vAA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_mul_long: /* 0x9d */
-/* File: mips64/op_mul_long.S */
-/* File: mips64/binopWide.S */
/*
* Generic 64-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = a0 op a1".
@@ -4075,12 +3609,9 @@
SET_VREG_WIDE a0, a4 # vAA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_div_long: /* 0x9e */
-/* File: mips64/op_div_long.S */
-/* File: mips64/binopWide.S */
/*
* Generic 64-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = a0 op a1".
@@ -4111,12 +3642,9 @@
SET_VREG_WIDE a0, a4 # vAA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_rem_long: /* 0x9f */
-/* File: mips64/op_rem_long.S */
-/* File: mips64/binopWide.S */
/*
* Generic 64-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = a0 op a1".
@@ -4147,12 +3675,9 @@
SET_VREG_WIDE a0, a4 # vAA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_and_long: /* 0xa0 */
-/* File: mips64/op_and_long.S */
-/* File: mips64/binopWide.S */
/*
* Generic 64-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = a0 op a1".
@@ -4183,12 +3708,9 @@
SET_VREG_WIDE a0, a4 # vAA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_or_long: /* 0xa1 */
-/* File: mips64/op_or_long.S */
-/* File: mips64/binopWide.S */
/*
* Generic 64-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = a0 op a1".
@@ -4219,12 +3741,9 @@
SET_VREG_WIDE a0, a4 # vAA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_xor_long: /* 0xa2 */
-/* File: mips64/op_xor_long.S */
-/* File: mips64/binopWide.S */
/*
* Generic 64-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = a0 op a1".
@@ -4255,12 +3774,9 @@
SET_VREG_WIDE a0, a4 # vAA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_shl_long: /* 0xa3 */
-/* File: mips64/op_shl_long.S */
-/* File: mips64/binopWide.S */
/*
* Generic 64-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = a0 op a1".
@@ -4291,12 +3807,9 @@
SET_VREG_WIDE a0, a4 # vAA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_shr_long: /* 0xa4 */
-/* File: mips64/op_shr_long.S */
-/* File: mips64/binopWide.S */
/*
* Generic 64-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = a0 op a1".
@@ -4327,12 +3840,9 @@
SET_VREG_WIDE a0, a4 # vAA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_ushr_long: /* 0xa5 */
-/* File: mips64/op_ushr_long.S */
-/* File: mips64/binopWide.S */
/*
* Generic 64-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = a0 op a1".
@@ -4363,12 +3873,9 @@
SET_VREG_WIDE a0, a4 # vAA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_add_float: /* 0xa6 */
-/* File: mips64/op_add_float.S */
-/* File: mips64/fbinop.S */
/*:
* Generic 32-bit floating-point operation.
*
@@ -4387,12 +3894,9 @@
SET_VREG_FLOAT f0, a4 # vAA <- f0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_sub_float: /* 0xa7 */
-/* File: mips64/op_sub_float.S */
-/* File: mips64/fbinop.S */
/*:
* Generic 32-bit floating-point operation.
*
@@ -4411,12 +3915,9 @@
SET_VREG_FLOAT f0, a4 # vAA <- f0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_mul_float: /* 0xa8 */
-/* File: mips64/op_mul_float.S */
-/* File: mips64/fbinop.S */
/*:
* Generic 32-bit floating-point operation.
*
@@ -4435,12 +3936,9 @@
SET_VREG_FLOAT f0, a4 # vAA <- f0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_div_float: /* 0xa9 */
-/* File: mips64/op_div_float.S */
-/* File: mips64/fbinop.S */
/*:
* Generic 32-bit floating-point operation.
*
@@ -4459,11 +3957,9 @@
SET_VREG_FLOAT f0, a4 # vAA <- f0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_rem_float: /* 0xaa */
-/* File: mips64/op_rem_float.S */
/* rem-float vAA, vBB, vCC */
.extern fmodf
lbu a2, 2(rPC) # a2 <- BB
@@ -4480,8 +3976,6 @@
/* ------------------------------ */
.balign 128
.L_op_add_double: /* 0xab */
-/* File: mips64/op_add_double.S */
-/* File: mips64/fbinopWide.S */
/*:
* Generic 64-bit floating-point operation.
*
@@ -4500,12 +3994,9 @@
SET_VREG_DOUBLE f0, a4 # vAA <- f0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_sub_double: /* 0xac */
-/* File: mips64/op_sub_double.S */
-/* File: mips64/fbinopWide.S */
/*:
* Generic 64-bit floating-point operation.
*
@@ -4524,12 +4015,9 @@
SET_VREG_DOUBLE f0, a4 # vAA <- f0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_mul_double: /* 0xad */
-/* File: mips64/op_mul_double.S */
-/* File: mips64/fbinopWide.S */
/*:
* Generic 64-bit floating-point operation.
*
@@ -4548,12 +4036,9 @@
SET_VREG_DOUBLE f0, a4 # vAA <- f0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_div_double: /* 0xae */
-/* File: mips64/op_div_double.S */
-/* File: mips64/fbinopWide.S */
/*:
* Generic 64-bit floating-point operation.
*
@@ -4572,11 +4057,9 @@
SET_VREG_DOUBLE f0, a4 # vAA <- f0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_rem_double: /* 0xaf */
-/* File: mips64/op_rem_double.S */
/* rem-double vAA, vBB, vCC */
.extern fmod
lbu a2, 2(rPC) # a2 <- BB
@@ -4593,8 +4076,6 @@
/* ------------------------------ */
.balign 128
.L_op_add_int_2addr: /* 0xb0 */
-/* File: mips64/op_add_int_2addr.S */
-/* File: mips64/binop2addr.S */
/*
* Generic 32-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -4625,12 +4106,9 @@
SET_VREG a0, a2 # vA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_sub_int_2addr: /* 0xb1 */
-/* File: mips64/op_sub_int_2addr.S */
-/* File: mips64/binop2addr.S */
/*
* Generic 32-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -4661,12 +4139,9 @@
SET_VREG a0, a2 # vA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_mul_int_2addr: /* 0xb2 */
-/* File: mips64/op_mul_int_2addr.S */
-/* File: mips64/binop2addr.S */
/*
* Generic 32-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -4697,12 +4172,9 @@
SET_VREG a0, a2 # vA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_div_int_2addr: /* 0xb3 */
-/* File: mips64/op_div_int_2addr.S */
-/* File: mips64/binop2addr.S */
/*
* Generic 32-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -4733,12 +4205,9 @@
SET_VREG a0, a2 # vA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_rem_int_2addr: /* 0xb4 */
-/* File: mips64/op_rem_int_2addr.S */
-/* File: mips64/binop2addr.S */
/*
* Generic 32-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -4769,12 +4238,9 @@
SET_VREG a0, a2 # vA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_and_int_2addr: /* 0xb5 */
-/* File: mips64/op_and_int_2addr.S */
-/* File: mips64/binop2addr.S */
/*
* Generic 32-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -4805,12 +4271,9 @@
SET_VREG a0, a2 # vA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_or_int_2addr: /* 0xb6 */
-/* File: mips64/op_or_int_2addr.S */
-/* File: mips64/binop2addr.S */
/*
* Generic 32-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -4841,12 +4304,9 @@
SET_VREG a0, a2 # vA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_xor_int_2addr: /* 0xb7 */
-/* File: mips64/op_xor_int_2addr.S */
-/* File: mips64/binop2addr.S */
/*
* Generic 32-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -4877,12 +4337,9 @@
SET_VREG a0, a2 # vA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_shl_int_2addr: /* 0xb8 */
-/* File: mips64/op_shl_int_2addr.S */
-/* File: mips64/binop2addr.S */
/*
* Generic 32-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -4913,12 +4370,9 @@
SET_VREG a0, a2 # vA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_shr_int_2addr: /* 0xb9 */
-/* File: mips64/op_shr_int_2addr.S */
-/* File: mips64/binop2addr.S */
/*
* Generic 32-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -4949,12 +4403,9 @@
SET_VREG a0, a2 # vA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_ushr_int_2addr: /* 0xba */
-/* File: mips64/op_ushr_int_2addr.S */
-/* File: mips64/binop2addr.S */
/*
* Generic 32-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -4985,12 +4436,9 @@
SET_VREG a0, a2 # vA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_add_long_2addr: /* 0xbb */
-/* File: mips64/op_add_long_2addr.S */
-/* File: mips64/binopWide2addr.S */
/*
* Generic 64-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -5021,12 +4469,9 @@
SET_VREG_WIDE a0, a2 # vA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_sub_long_2addr: /* 0xbc */
-/* File: mips64/op_sub_long_2addr.S */
-/* File: mips64/binopWide2addr.S */
/*
* Generic 64-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -5057,12 +4502,9 @@
SET_VREG_WIDE a0, a2 # vA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_mul_long_2addr: /* 0xbd */
-/* File: mips64/op_mul_long_2addr.S */
-/* File: mips64/binopWide2addr.S */
/*
* Generic 64-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -5093,12 +4535,9 @@
SET_VREG_WIDE a0, a2 # vA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_div_long_2addr: /* 0xbe */
-/* File: mips64/op_div_long_2addr.S */
-/* File: mips64/binopWide2addr.S */
/*
* Generic 64-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -5129,12 +4568,9 @@
SET_VREG_WIDE a0, a2 # vA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_rem_long_2addr: /* 0xbf */
-/* File: mips64/op_rem_long_2addr.S */
-/* File: mips64/binopWide2addr.S */
/*
* Generic 64-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -5165,12 +4601,9 @@
SET_VREG_WIDE a0, a2 # vA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_and_long_2addr: /* 0xc0 */
-/* File: mips64/op_and_long_2addr.S */
-/* File: mips64/binopWide2addr.S */
/*
* Generic 64-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -5201,12 +4634,9 @@
SET_VREG_WIDE a0, a2 # vA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_or_long_2addr: /* 0xc1 */
-/* File: mips64/op_or_long_2addr.S */
-/* File: mips64/binopWide2addr.S */
/*
* Generic 64-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -5237,12 +4667,9 @@
SET_VREG_WIDE a0, a2 # vA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_xor_long_2addr: /* 0xc2 */
-/* File: mips64/op_xor_long_2addr.S */
-/* File: mips64/binopWide2addr.S */
/*
* Generic 64-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -5273,12 +4700,9 @@
SET_VREG_WIDE a0, a2 # vA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_shl_long_2addr: /* 0xc3 */
-/* File: mips64/op_shl_long_2addr.S */
-/* File: mips64/binopWide2addr.S */
/*
* Generic 64-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -5309,12 +4733,9 @@
SET_VREG_WIDE a0, a2 # vA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_shr_long_2addr: /* 0xc4 */
-/* File: mips64/op_shr_long_2addr.S */
-/* File: mips64/binopWide2addr.S */
/*
* Generic 64-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -5345,12 +4766,9 @@
SET_VREG_WIDE a0, a2 # vA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_ushr_long_2addr: /* 0xc5 */
-/* File: mips64/op_ushr_long_2addr.S */
-/* File: mips64/binopWide2addr.S */
/*
* Generic 64-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -5381,12 +4799,9 @@
SET_VREG_WIDE a0, a2 # vA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_add_float_2addr: /* 0xc6 */
-/* File: mips64/op_add_float_2addr.S */
-/* File: mips64/fbinop2addr.S */
/*:
* Generic 32-bit "/2addr" floating-point operation.
*
@@ -5404,12 +4819,9 @@
SET_VREG_FLOAT f0, a2 # vA <- f0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_sub_float_2addr: /* 0xc7 */
-/* File: mips64/op_sub_float_2addr.S */
-/* File: mips64/fbinop2addr.S */
/*:
* Generic 32-bit "/2addr" floating-point operation.
*
@@ -5427,12 +4839,9 @@
SET_VREG_FLOAT f0, a2 # vA <- f0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_mul_float_2addr: /* 0xc8 */
-/* File: mips64/op_mul_float_2addr.S */
-/* File: mips64/fbinop2addr.S */
/*:
* Generic 32-bit "/2addr" floating-point operation.
*
@@ -5450,12 +4859,9 @@
SET_VREG_FLOAT f0, a2 # vA <- f0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_div_float_2addr: /* 0xc9 */
-/* File: mips64/op_div_float_2addr.S */
-/* File: mips64/fbinop2addr.S */
/*:
* Generic 32-bit "/2addr" floating-point operation.
*
@@ -5473,11 +4879,9 @@
SET_VREG_FLOAT f0, a2 # vA <- f0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_rem_float_2addr: /* 0xca */
-/* File: mips64/op_rem_float_2addr.S */
/* rem-float/2addr vA, vB */
.extern fmodf
ext a2, rINST, 8, 4 # a2 <- A
@@ -5494,8 +4898,6 @@
/* ------------------------------ */
.balign 128
.L_op_add_double_2addr: /* 0xcb */
-/* File: mips64/op_add_double_2addr.S */
-/* File: mips64/fbinopWide2addr.S */
/*:
* Generic 64-bit "/2addr" floating-point operation.
*
@@ -5513,12 +4915,9 @@
SET_VREG_DOUBLE f0, a2 # vA <- f0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_sub_double_2addr: /* 0xcc */
-/* File: mips64/op_sub_double_2addr.S */
-/* File: mips64/fbinopWide2addr.S */
/*:
* Generic 64-bit "/2addr" floating-point operation.
*
@@ -5536,12 +4935,9 @@
SET_VREG_DOUBLE f0, a2 # vA <- f0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_mul_double_2addr: /* 0xcd */
-/* File: mips64/op_mul_double_2addr.S */
-/* File: mips64/fbinopWide2addr.S */
/*:
* Generic 64-bit "/2addr" floating-point operation.
*
@@ -5559,12 +4955,9 @@
SET_VREG_DOUBLE f0, a2 # vA <- f0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_div_double_2addr: /* 0xce */
-/* File: mips64/op_div_double_2addr.S */
-/* File: mips64/fbinopWide2addr.S */
/*:
* Generic 64-bit "/2addr" floating-point operation.
*
@@ -5582,11 +4975,9 @@
SET_VREG_DOUBLE f0, a2 # vA <- f0
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_rem_double_2addr: /* 0xcf */
-/* File: mips64/op_rem_double_2addr.S */
/* rem-double/2addr vA, vB */
.extern fmod
ext a2, rINST, 8, 4 # a2 <- A
@@ -5603,8 +4994,6 @@
/* ------------------------------ */
.balign 128
.L_op_add_int_lit16: /* 0xd0 */
-/* File: mips64/op_add_int_lit16.S */
-/* File: mips64/binopLit16.S */
/*
* Generic 32-bit "lit16" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -5632,13 +5021,9 @@
SET_VREG a0, a2 # vA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
-
/* ------------------------------ */
.balign 128
.L_op_rsub_int: /* 0xd1 */
-/* File: mips64/op_rsub_int.S */
-/* File: mips64/binopLit16.S */
/*
* Generic 32-bit "lit16" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -5666,13 +5051,9 @@
SET_VREG a0, a2 # vA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
-
/* ------------------------------ */
.balign 128
.L_op_mul_int_lit16: /* 0xd2 */
-/* File: mips64/op_mul_int_lit16.S */
-/* File: mips64/binopLit16.S */
/*
* Generic 32-bit "lit16" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -5700,13 +5081,9 @@
SET_VREG a0, a2 # vA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
-
/* ------------------------------ */
.balign 128
.L_op_div_int_lit16: /* 0xd3 */
-/* File: mips64/op_div_int_lit16.S */
-/* File: mips64/binopLit16.S */
/*
* Generic 32-bit "lit16" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -5734,13 +5111,9 @@
SET_VREG a0, a2 # vA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
-
/* ------------------------------ */
.balign 128
.L_op_rem_int_lit16: /* 0xd4 */
-/* File: mips64/op_rem_int_lit16.S */
-/* File: mips64/binopLit16.S */
/*
* Generic 32-bit "lit16" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -5768,13 +5141,9 @@
SET_VREG a0, a2 # vA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
-
/* ------------------------------ */
.balign 128
.L_op_and_int_lit16: /* 0xd5 */
-/* File: mips64/op_and_int_lit16.S */
-/* File: mips64/binopLit16.S */
/*
* Generic 32-bit "lit16" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -5802,13 +5171,9 @@
SET_VREG a0, a2 # vA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
-
/* ------------------------------ */
.balign 128
.L_op_or_int_lit16: /* 0xd6 */
-/* File: mips64/op_or_int_lit16.S */
-/* File: mips64/binopLit16.S */
/*
* Generic 32-bit "lit16" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -5836,13 +5201,9 @@
SET_VREG a0, a2 # vA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
-
/* ------------------------------ */
.balign 128
.L_op_xor_int_lit16: /* 0xd7 */
-/* File: mips64/op_xor_int_lit16.S */
-/* File: mips64/binopLit16.S */
/*
* Generic 32-bit "lit16" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -5870,13 +5231,9 @@
SET_VREG a0, a2 # vA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
-
/* ------------------------------ */
.balign 128
.L_op_add_int_lit8: /* 0xd8 */
-/* File: mips64/op_add_int_lit8.S */
-/* File: mips64/binopLit8.S */
/*
* Generic 32-bit "lit8" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -5905,13 +5262,9 @@
SET_VREG a0, a2 # vAA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
-
/* ------------------------------ */
.balign 128
.L_op_rsub_int_lit8: /* 0xd9 */
-/* File: mips64/op_rsub_int_lit8.S */
-/* File: mips64/binopLit8.S */
/*
* Generic 32-bit "lit8" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -5940,13 +5293,9 @@
SET_VREG a0, a2 # vAA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
-
/* ------------------------------ */
.balign 128
.L_op_mul_int_lit8: /* 0xda */
-/* File: mips64/op_mul_int_lit8.S */
-/* File: mips64/binopLit8.S */
/*
* Generic 32-bit "lit8" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -5975,13 +5324,9 @@
SET_VREG a0, a2 # vAA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
-
/* ------------------------------ */
.balign 128
.L_op_div_int_lit8: /* 0xdb */
-/* File: mips64/op_div_int_lit8.S */
-/* File: mips64/binopLit8.S */
/*
* Generic 32-bit "lit8" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -6010,13 +5355,9 @@
SET_VREG a0, a2 # vAA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
-
/* ------------------------------ */
.balign 128
.L_op_rem_int_lit8: /* 0xdc */
-/* File: mips64/op_rem_int_lit8.S */
-/* File: mips64/binopLit8.S */
/*
* Generic 32-bit "lit8" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -6045,13 +5386,9 @@
SET_VREG a0, a2 # vAA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
-
/* ------------------------------ */
.balign 128
.L_op_and_int_lit8: /* 0xdd */
-/* File: mips64/op_and_int_lit8.S */
-/* File: mips64/binopLit8.S */
/*
* Generic 32-bit "lit8" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -6080,13 +5417,9 @@
SET_VREG a0, a2 # vAA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
-
/* ------------------------------ */
.balign 128
.L_op_or_int_lit8: /* 0xde */
-/* File: mips64/op_or_int_lit8.S */
-/* File: mips64/binopLit8.S */
/*
* Generic 32-bit "lit8" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -6115,13 +5448,9 @@
SET_VREG a0, a2 # vAA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
-
/* ------------------------------ */
.balign 128
.L_op_xor_int_lit8: /* 0xdf */
-/* File: mips64/op_xor_int_lit8.S */
-/* File: mips64/binopLit8.S */
/*
* Generic 32-bit "lit8" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -6150,13 +5479,9 @@
SET_VREG a0, a2 # vAA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
-
/* ------------------------------ */
.balign 128
.L_op_shl_int_lit8: /* 0xe0 */
-/* File: mips64/op_shl_int_lit8.S */
-/* File: mips64/binopLit8.S */
/*
* Generic 32-bit "lit8" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -6185,13 +5510,9 @@
SET_VREG a0, a2 # vAA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
-
/* ------------------------------ */
.balign 128
.L_op_shr_int_lit8: /* 0xe1 */
-/* File: mips64/op_shr_int_lit8.S */
-/* File: mips64/binopLit8.S */
/*
* Generic 32-bit "lit8" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -6220,13 +5541,9 @@
SET_VREG a0, a2 # vAA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
-
/* ------------------------------ */
.balign 128
.L_op_ushr_int_lit8: /* 0xe2 */
-/* File: mips64/op_ushr_int_lit8.S */
-/* File: mips64/binopLit8.S */
/*
* Generic 32-bit "lit8" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
@@ -6255,12 +5572,9 @@
SET_VREG a0, a2 # vAA <- a0
GOTO_OPCODE v0 # jump to next instruction
-
-
/* ------------------------------ */
.balign 128
.L_op_iget_quick: /* 0xe3 */
-/* File: mips64/op_iget_quick.S */
/* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick */
/* op vA, vB, offset//CCCC */
srl a2, rINST, 12 # a2 <- B
@@ -6278,7 +5592,6 @@
/* ------------------------------ */
.balign 128
.L_op_iget_wide_quick: /* 0xe4 */
-/* File: mips64/op_iget_wide_quick.S */
/* iget-wide-quick vA, vB, offset//CCCC */
srl a2, rINST, 12 # a2 <- B
lhu a4, 2(rPC) # a4 <- field byte offset
@@ -6297,7 +5610,6 @@
/* ------------------------------ */
.balign 128
.L_op_iget_object_quick: /* 0xe5 */
-/* File: mips64/op_iget_object_quick.S */
/* For: iget-object-quick */
/* op vA, vB, offset//CCCC */
.extern artIGetObjectFromMterp
@@ -6318,7 +5630,6 @@
/* ------------------------------ */
.balign 128
.L_op_iput_quick: /* 0xe6 */
-/* File: mips64/op_iput_quick.S */
/* For: iput-quick, iput-boolean-quick, iput-byte-quick, iput-char-quick, iput-short-quick */
/* op vA, vB, offset//CCCC */
srl a2, rINST, 12 # a2 <- B
@@ -6336,7 +5647,6 @@
/* ------------------------------ */
.balign 128
.L_op_iput_wide_quick: /* 0xe7 */
-/* File: mips64/op_iput_wide_quick.S */
/* iput-wide-quick vA, vB, offset//CCCC */
srl a2, rINST, 12 # a2 <- B
lhu a3, 2(rPC) # a3 <- field byte offset
@@ -6355,7 +5665,6 @@
/* ------------------------------ */
.balign 128
.L_op_iput_object_quick: /* 0xe8 */
-/* File: mips64/op_iput_object_quick.S */
.extern MterpIputObjectQuick
EXPORT_PC
daddu a0, rFP, OFF_FP_SHADOWFRAME
@@ -6370,8 +5679,6 @@
/* ------------------------------ */
.balign 128
.L_op_invoke_virtual_quick: /* 0xe9 */
-/* File: mips64/op_invoke_virtual_quick.S */
-/* File: mips64/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -6392,12 +5699,9 @@
GET_INST_OPCODE v0
GOTO_OPCODE v0
-
/* ------------------------------ */
.balign 128
.L_op_invoke_virtual_range_quick: /* 0xea */
-/* File: mips64/op_invoke_virtual_range_quick.S */
-/* File: mips64/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -6418,12 +5722,9 @@
GET_INST_OPCODE v0
GOTO_OPCODE v0
-
/* ------------------------------ */
.balign 128
.L_op_iput_boolean_quick: /* 0xeb */
-/* File: mips64/op_iput_boolean_quick.S */
-/* File: mips64/op_iput_quick.S */
/* For: iput-quick, iput-boolean-quick, iput-byte-quick, iput-char-quick, iput-short-quick */
/* op vA, vB, offset//CCCC */
srl a2, rINST, 12 # a2 <- B
@@ -6438,12 +5739,9 @@
GET_INST_OPCODE v0 # extract opcode from rINST
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_iput_byte_quick: /* 0xec */
-/* File: mips64/op_iput_byte_quick.S */
-/* File: mips64/op_iput_quick.S */
/* For: iput-quick, iput-boolean-quick, iput-byte-quick, iput-char-quick, iput-short-quick */
/* op vA, vB, offset//CCCC */
srl a2, rINST, 12 # a2 <- B
@@ -6458,12 +5756,9 @@
GET_INST_OPCODE v0 # extract opcode from rINST
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_iput_char_quick: /* 0xed */
-/* File: mips64/op_iput_char_quick.S */
-/* File: mips64/op_iput_quick.S */
/* For: iput-quick, iput-boolean-quick, iput-byte-quick, iput-char-quick, iput-short-quick */
/* op vA, vB, offset//CCCC */
srl a2, rINST, 12 # a2 <- B
@@ -6478,12 +5773,9 @@
GET_INST_OPCODE v0 # extract opcode from rINST
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_iput_short_quick: /* 0xee */
-/* File: mips64/op_iput_short_quick.S */
-/* File: mips64/op_iput_quick.S */
/* For: iput-quick, iput-boolean-quick, iput-byte-quick, iput-char-quick, iput-short-quick */
/* op vA, vB, offset//CCCC */
srl a2, rINST, 12 # a2 <- B
@@ -6498,12 +5790,9 @@
GET_INST_OPCODE v0 # extract opcode from rINST
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_iget_boolean_quick: /* 0xef */
-/* File: mips64/op_iget_boolean_quick.S */
-/* File: mips64/op_iget_quick.S */
/* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick */
/* op vA, vB, offset//CCCC */
srl a2, rINST, 12 # a2 <- B
@@ -6518,12 +5807,9 @@
GET_INST_OPCODE v0 # extract opcode from rINST
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_iget_byte_quick: /* 0xf0 */
-/* File: mips64/op_iget_byte_quick.S */
-/* File: mips64/op_iget_quick.S */
/* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick */
/* op vA, vB, offset//CCCC */
srl a2, rINST, 12 # a2 <- B
@@ -6538,12 +5824,9 @@
GET_INST_OPCODE v0 # extract opcode from rINST
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_iget_char_quick: /* 0xf1 */
-/* File: mips64/op_iget_char_quick.S */
-/* File: mips64/op_iget_quick.S */
/* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick */
/* op vA, vB, offset//CCCC */
srl a2, rINST, 12 # a2 <- B
@@ -6558,12 +5841,9 @@
GET_INST_OPCODE v0 # extract opcode from rINST
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_iget_short_quick: /* 0xf2 */
-/* File: mips64/op_iget_short_quick.S */
-/* File: mips64/op_iget_quick.S */
/* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick */
/* op vA, vB, offset//CCCC */
srl a2, rINST, 12 # a2 <- B
@@ -6578,89 +5858,65 @@
GET_INST_OPCODE v0 # extract opcode from rINST
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_unused_f3: /* 0xf3 */
-/* File: mips64/op_unused_f3.S */
-/* File: mips64/unused.S */
/*
* Bail to reference interpreter to throw.
*/
b MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_f4: /* 0xf4 */
-/* File: mips64/op_unused_f4.S */
-/* File: mips64/unused.S */
/*
* Bail to reference interpreter to throw.
*/
b MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_f5: /* 0xf5 */
-/* File: mips64/op_unused_f5.S */
-/* File: mips64/unused.S */
/*
* Bail to reference interpreter to throw.
*/
b MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_f6: /* 0xf6 */
-/* File: mips64/op_unused_f6.S */
-/* File: mips64/unused.S */
/*
* Bail to reference interpreter to throw.
*/
b MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_f7: /* 0xf7 */
-/* File: mips64/op_unused_f7.S */
-/* File: mips64/unused.S */
/*
* Bail to reference interpreter to throw.
*/
b MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_f8: /* 0xf8 */
-/* File: mips64/op_unused_f8.S */
-/* File: mips64/unused.S */
/*
* Bail to reference interpreter to throw.
*/
b MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_f9: /* 0xf9 */
-/* File: mips64/op_unused_f9.S */
-/* File: mips64/unused.S */
/*
* Bail to reference interpreter to throw.
*/
b MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_invoke_polymorphic: /* 0xfa */
-/* File: mips64/op_invoke_polymorphic.S */
-/* File: mips64/invoke_polymorphic.S */
/*
* invoke-polymorphic handler wrapper.
*/
@@ -6681,12 +5937,9 @@
GET_INST_OPCODE v0
GOTO_OPCODE v0
-
/* ------------------------------ */
.balign 128
.L_op_invoke_polymorphic_range: /* 0xfb */
-/* File: mips64/op_invoke_polymorphic_range.S */
-/* File: mips64/invoke_polymorphic.S */
/*
* invoke-polymorphic handler wrapper.
*/
@@ -6707,12 +5960,9 @@
GET_INST_OPCODE v0
GOTO_OPCODE v0
-
/* ------------------------------ */
.balign 128
.L_op_invoke_custom: /* 0xfc */
-/* File: mips64/op_invoke_custom.S */
-/* File: mips64/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -6733,12 +5983,9 @@
GET_INST_OPCODE v0
GOTO_OPCODE v0
-
/* ------------------------------ */
.balign 128
.L_op_invoke_custom_range: /* 0xfd */
-/* File: mips64/op_invoke_custom_range.S */
-/* File: mips64/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -6759,12 +6006,9 @@
GET_INST_OPCODE v0
GOTO_OPCODE v0
-
/* ------------------------------ */
.balign 128
.L_op_const_method_handle: /* 0xfe */
-/* File: mips64/op_const_method_handle.S */
-/* File: mips64/const.S */
/* const/class vAA, type@BBBB */
/* const/method-handle vAA, method_handle@BBBB */
/* const/method-type vAA, proto@BBBB */
@@ -6782,12 +6026,9 @@
GET_INST_OPCODE v0 # extract opcode from rINST
GOTO_OPCODE v0 # jump to next instruction
-
/* ------------------------------ */
.balign 128
.L_op_const_method_type: /* 0xff */
-/* File: mips64/op_const_method_type.S */
-/* File: mips64/const.S */
/* const/class vAA, type@BBBB */
/* const/method-handle vAA, method_handle@BBBB */
/* const/method-type vAA, proto@BBBB */
@@ -6805,41 +6046,25 @@
GET_INST_OPCODE v0 # extract opcode from rINST
GOTO_OPCODE v0 # jump to next instruction
-
.balign 128
-/* File: mips64/instruction_end.S */
.global artMterpAsmInstructionEnd
artMterpAsmInstructionEnd:
-
-/*
- * ===========================================================================
- * Sister implementations
- * ===========================================================================
- */
-/* File: mips64/instruction_start_sister.S */
-
.global artMterpAsmSisterStart
.text
.balign 4
artMterpAsmSisterStart:
-/* File: mips64/instruction_end_sister.S */
-
.global artMterpAsmSisterEnd
artMterpAsmSisterEnd:
-/* File: mips64/instruction_start_alt.S */
-
.global artMterpAsmAltInstructionStart
artMterpAsmAltInstructionStart = .L_ALT_op_nop
.text
-
/* ------------------------------ */
.balign 128
.L_ALT_op_nop: /* 0x00 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6858,7 +6083,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move: /* 0x01 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6877,7 +6101,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_from16: /* 0x02 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6896,7 +6119,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_16: /* 0x03 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6915,7 +6137,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_wide: /* 0x04 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6934,7 +6155,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_wide_from16: /* 0x05 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6953,7 +6173,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_wide_16: /* 0x06 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6972,7 +6191,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_object: /* 0x07 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6991,7 +6209,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_object_from16: /* 0x08 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7010,7 +6227,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_object_16: /* 0x09 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7029,7 +6245,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_result: /* 0x0a */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7048,7 +6263,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_result_wide: /* 0x0b */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7067,7 +6281,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_result_object: /* 0x0c */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7086,7 +6299,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_exception: /* 0x0d */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7105,7 +6317,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_return_void: /* 0x0e */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7124,7 +6335,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_return: /* 0x0f */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7143,7 +6353,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_return_wide: /* 0x10 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7162,7 +6371,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_return_object: /* 0x11 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7181,7 +6389,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_4: /* 0x12 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7200,7 +6407,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_16: /* 0x13 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7219,7 +6425,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const: /* 0x14 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7238,7 +6443,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_high16: /* 0x15 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7257,7 +6461,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_wide_16: /* 0x16 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7276,7 +6479,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_wide_32: /* 0x17 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7295,7 +6497,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_wide: /* 0x18 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7314,7 +6515,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_wide_high16: /* 0x19 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7333,7 +6533,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_string: /* 0x1a */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7352,7 +6551,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_string_jumbo: /* 0x1b */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7371,7 +6569,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_class: /* 0x1c */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7390,7 +6587,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_monitor_enter: /* 0x1d */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7409,7 +6605,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_monitor_exit: /* 0x1e */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7428,7 +6623,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_check_cast: /* 0x1f */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7447,7 +6641,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_instance_of: /* 0x20 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7466,7 +6659,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_array_length: /* 0x21 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7485,7 +6677,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_new_instance: /* 0x22 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7504,7 +6695,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_new_array: /* 0x23 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7523,7 +6713,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_filled_new_array: /* 0x24 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7542,7 +6731,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_filled_new_array_range: /* 0x25 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7561,7 +6749,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_fill_array_data: /* 0x26 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7580,7 +6767,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_throw: /* 0x27 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7599,7 +6785,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_goto: /* 0x28 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7618,7 +6803,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_goto_16: /* 0x29 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7637,7 +6821,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_goto_32: /* 0x2a */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7656,7 +6839,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_packed_switch: /* 0x2b */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7675,7 +6857,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sparse_switch: /* 0x2c */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7694,7 +6875,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_cmpl_float: /* 0x2d */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7713,7 +6893,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_cmpg_float: /* 0x2e */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7732,7 +6911,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_cmpl_double: /* 0x2f */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7751,7 +6929,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_cmpg_double: /* 0x30 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7770,7 +6947,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_cmp_long: /* 0x31 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7789,7 +6965,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_eq: /* 0x32 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7808,7 +6983,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_ne: /* 0x33 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7827,7 +7001,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_lt: /* 0x34 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7846,7 +7019,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_ge: /* 0x35 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7865,7 +7037,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_gt: /* 0x36 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7884,7 +7055,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_le: /* 0x37 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7903,7 +7073,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_eqz: /* 0x38 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7922,7 +7091,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_nez: /* 0x39 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7941,7 +7109,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_ltz: /* 0x3a */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7960,7 +7127,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_gez: /* 0x3b */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7979,7 +7145,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_gtz: /* 0x3c */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7998,7 +7163,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_lez: /* 0x3d */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8017,7 +7181,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_3e: /* 0x3e */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8036,7 +7199,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_3f: /* 0x3f */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8055,7 +7217,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_40: /* 0x40 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8074,7 +7235,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_41: /* 0x41 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8093,7 +7253,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_42: /* 0x42 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8112,7 +7271,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_43: /* 0x43 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8131,7 +7289,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aget: /* 0x44 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8150,7 +7307,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aget_wide: /* 0x45 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8169,7 +7325,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aget_object: /* 0x46 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8188,7 +7343,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aget_boolean: /* 0x47 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8207,7 +7361,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aget_byte: /* 0x48 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8226,7 +7379,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aget_char: /* 0x49 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8245,7 +7397,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aget_short: /* 0x4a */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8264,7 +7415,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aput: /* 0x4b */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8283,7 +7433,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aput_wide: /* 0x4c */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8302,7 +7451,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aput_object: /* 0x4d */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8321,7 +7469,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aput_boolean: /* 0x4e */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8340,7 +7487,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aput_byte: /* 0x4f */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8359,7 +7505,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aput_char: /* 0x50 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8378,7 +7523,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aput_short: /* 0x51 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8397,7 +7541,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget: /* 0x52 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8416,7 +7559,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_wide: /* 0x53 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8435,7 +7577,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_object: /* 0x54 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8454,7 +7595,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_boolean: /* 0x55 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8473,7 +7613,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_byte: /* 0x56 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8492,7 +7631,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_char: /* 0x57 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8511,7 +7649,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_short: /* 0x58 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8530,7 +7667,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput: /* 0x59 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8549,7 +7685,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_wide: /* 0x5a */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8568,7 +7703,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_object: /* 0x5b */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8587,7 +7721,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_boolean: /* 0x5c */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8606,7 +7739,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_byte: /* 0x5d */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8625,7 +7757,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_char: /* 0x5e */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8644,7 +7775,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_short: /* 0x5f */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8663,7 +7793,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sget: /* 0x60 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8682,7 +7811,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sget_wide: /* 0x61 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8701,7 +7829,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sget_object: /* 0x62 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8720,7 +7847,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sget_boolean: /* 0x63 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8739,7 +7865,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sget_byte: /* 0x64 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8758,7 +7883,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sget_char: /* 0x65 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8777,7 +7901,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sget_short: /* 0x66 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8796,7 +7919,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sput: /* 0x67 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8815,7 +7937,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sput_wide: /* 0x68 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8834,7 +7955,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sput_object: /* 0x69 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8853,7 +7973,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sput_boolean: /* 0x6a */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8872,7 +7991,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sput_byte: /* 0x6b */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8891,7 +8009,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sput_char: /* 0x6c */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8910,7 +8027,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sput_short: /* 0x6d */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8929,7 +8045,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_virtual: /* 0x6e */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8948,7 +8063,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_super: /* 0x6f */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8967,7 +8081,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_direct: /* 0x70 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8986,7 +8099,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_static: /* 0x71 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9005,7 +8117,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_interface: /* 0x72 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9024,7 +8135,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_return_void_no_barrier: /* 0x73 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9043,7 +8153,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_virtual_range: /* 0x74 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9062,7 +8171,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_super_range: /* 0x75 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9081,7 +8189,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_direct_range: /* 0x76 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9100,7 +8207,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_static_range: /* 0x77 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9119,7 +8225,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_interface_range: /* 0x78 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9138,7 +8243,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_79: /* 0x79 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9157,7 +8261,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_7a: /* 0x7a */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9176,7 +8279,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_neg_int: /* 0x7b */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9195,7 +8297,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_not_int: /* 0x7c */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9214,7 +8315,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_neg_long: /* 0x7d */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9233,7 +8333,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_not_long: /* 0x7e */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9252,7 +8351,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_neg_float: /* 0x7f */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9271,7 +8369,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_neg_double: /* 0x80 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9290,7 +8387,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_int_to_long: /* 0x81 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9309,7 +8405,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_int_to_float: /* 0x82 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9328,7 +8423,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_int_to_double: /* 0x83 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9347,7 +8441,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_long_to_int: /* 0x84 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9366,7 +8459,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_long_to_float: /* 0x85 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9385,7 +8477,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_long_to_double: /* 0x86 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9404,7 +8495,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_float_to_int: /* 0x87 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9423,7 +8513,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_float_to_long: /* 0x88 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9442,7 +8531,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_float_to_double: /* 0x89 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9461,7 +8549,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_double_to_int: /* 0x8a */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9480,7 +8567,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_double_to_long: /* 0x8b */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9499,7 +8585,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_double_to_float: /* 0x8c */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9518,7 +8603,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_int_to_byte: /* 0x8d */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9537,7 +8621,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_int_to_char: /* 0x8e */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9556,7 +8639,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_int_to_short: /* 0x8f */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9575,7 +8657,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_add_int: /* 0x90 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9594,7 +8675,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sub_int: /* 0x91 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9613,7 +8693,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_mul_int: /* 0x92 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9632,7 +8711,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_div_int: /* 0x93 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9651,7 +8729,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rem_int: /* 0x94 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9670,7 +8747,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_and_int: /* 0x95 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9689,7 +8765,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_or_int: /* 0x96 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9708,7 +8783,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_xor_int: /* 0x97 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9727,7 +8801,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_shl_int: /* 0x98 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9746,7 +8819,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_shr_int: /* 0x99 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9765,7 +8837,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_ushr_int: /* 0x9a */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9784,7 +8855,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_add_long: /* 0x9b */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9803,7 +8873,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sub_long: /* 0x9c */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9822,7 +8891,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_mul_long: /* 0x9d */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9841,7 +8909,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_div_long: /* 0x9e */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9860,7 +8927,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rem_long: /* 0x9f */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9879,7 +8945,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_and_long: /* 0xa0 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9898,7 +8963,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_or_long: /* 0xa1 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9917,7 +8981,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_xor_long: /* 0xa2 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9936,7 +8999,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_shl_long: /* 0xa3 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9955,7 +9017,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_shr_long: /* 0xa4 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9974,7 +9035,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_ushr_long: /* 0xa5 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9993,7 +9053,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_add_float: /* 0xa6 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10012,7 +9071,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sub_float: /* 0xa7 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10031,7 +9089,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_mul_float: /* 0xa8 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10050,7 +9107,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_div_float: /* 0xa9 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10069,7 +9125,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rem_float: /* 0xaa */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10088,7 +9143,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_add_double: /* 0xab */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10107,7 +9161,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sub_double: /* 0xac */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10126,7 +9179,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_mul_double: /* 0xad */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10145,7 +9197,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_div_double: /* 0xae */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10164,7 +9215,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rem_double: /* 0xaf */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10183,7 +9233,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_add_int_2addr: /* 0xb0 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10202,7 +9251,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sub_int_2addr: /* 0xb1 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10221,7 +9269,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_mul_int_2addr: /* 0xb2 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10240,7 +9287,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_div_int_2addr: /* 0xb3 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10259,7 +9305,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rem_int_2addr: /* 0xb4 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10278,7 +9323,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_and_int_2addr: /* 0xb5 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10297,7 +9341,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_or_int_2addr: /* 0xb6 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10316,7 +9359,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_xor_int_2addr: /* 0xb7 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10335,7 +9377,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_shl_int_2addr: /* 0xb8 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10354,7 +9395,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_shr_int_2addr: /* 0xb9 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10373,7 +9413,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_ushr_int_2addr: /* 0xba */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10392,7 +9431,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_add_long_2addr: /* 0xbb */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10411,7 +9449,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sub_long_2addr: /* 0xbc */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10430,7 +9467,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_mul_long_2addr: /* 0xbd */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10449,7 +9485,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_div_long_2addr: /* 0xbe */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10468,7 +9503,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rem_long_2addr: /* 0xbf */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10487,7 +9521,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_and_long_2addr: /* 0xc0 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10506,7 +9539,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_or_long_2addr: /* 0xc1 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10525,7 +9557,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_xor_long_2addr: /* 0xc2 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10544,7 +9575,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_shl_long_2addr: /* 0xc3 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10563,7 +9593,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_shr_long_2addr: /* 0xc4 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10582,7 +9611,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_ushr_long_2addr: /* 0xc5 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10601,7 +9629,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_add_float_2addr: /* 0xc6 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10620,7 +9647,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sub_float_2addr: /* 0xc7 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10639,7 +9665,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_mul_float_2addr: /* 0xc8 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10658,7 +9683,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_div_float_2addr: /* 0xc9 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10677,7 +9701,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rem_float_2addr: /* 0xca */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10696,7 +9719,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_add_double_2addr: /* 0xcb */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10715,7 +9737,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sub_double_2addr: /* 0xcc */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10734,7 +9755,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_mul_double_2addr: /* 0xcd */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10753,7 +9773,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_div_double_2addr: /* 0xce */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10772,7 +9791,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rem_double_2addr: /* 0xcf */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10791,7 +9809,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_add_int_lit16: /* 0xd0 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10810,7 +9827,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rsub_int: /* 0xd1 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10829,7 +9845,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_mul_int_lit16: /* 0xd2 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10848,7 +9863,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_div_int_lit16: /* 0xd3 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10867,7 +9881,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rem_int_lit16: /* 0xd4 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10886,7 +9899,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_and_int_lit16: /* 0xd5 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10905,7 +9917,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_or_int_lit16: /* 0xd6 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10924,7 +9935,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_xor_int_lit16: /* 0xd7 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10943,7 +9953,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_add_int_lit8: /* 0xd8 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10962,7 +9971,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rsub_int_lit8: /* 0xd9 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10981,7 +9989,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_mul_int_lit8: /* 0xda */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11000,7 +10007,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_div_int_lit8: /* 0xdb */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11019,7 +10025,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rem_int_lit8: /* 0xdc */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11038,7 +10043,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_and_int_lit8: /* 0xdd */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11057,7 +10061,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_or_int_lit8: /* 0xde */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11076,7 +10079,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_xor_int_lit8: /* 0xdf */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11095,7 +10097,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_shl_int_lit8: /* 0xe0 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11114,7 +10115,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_shr_int_lit8: /* 0xe1 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11133,7 +10133,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_ushr_int_lit8: /* 0xe2 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11152,7 +10151,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_quick: /* 0xe3 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11171,7 +10169,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_wide_quick: /* 0xe4 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11190,7 +10187,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_object_quick: /* 0xe5 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11209,7 +10205,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_quick: /* 0xe6 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11228,7 +10223,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_wide_quick: /* 0xe7 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11247,7 +10241,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_object_quick: /* 0xe8 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11266,7 +10259,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_virtual_quick: /* 0xe9 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11285,7 +10277,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_virtual_range_quick: /* 0xea */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11304,7 +10295,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_boolean_quick: /* 0xeb */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11323,7 +10313,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_byte_quick: /* 0xec */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11342,7 +10331,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_char_quick: /* 0xed */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11361,7 +10349,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_short_quick: /* 0xee */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11380,7 +10367,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_boolean_quick: /* 0xef */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11399,7 +10385,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_byte_quick: /* 0xf0 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11418,7 +10403,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_char_quick: /* 0xf1 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11437,7 +10421,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_short_quick: /* 0xf2 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11456,7 +10439,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_f3: /* 0xf3 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11475,7 +10457,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_f4: /* 0xf4 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11494,7 +10475,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_f5: /* 0xf5 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11513,7 +10493,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_f6: /* 0xf6 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11532,7 +10511,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_f7: /* 0xf7 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11551,7 +10529,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_f8: /* 0xf8 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11570,7 +10547,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_f9: /* 0xf9 */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11589,7 +10565,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_polymorphic: /* 0xfa */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11608,7 +10583,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_polymorphic_range: /* 0xfb */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11627,7 +10601,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_custom: /* 0xfc */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11646,7 +10619,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_custom_range: /* 0xfd */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11665,7 +10637,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_method_handle: /* 0xfe */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11684,7 +10655,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_method_type: /* 0xff */
-/* File: mips64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11701,12 +10671,9 @@
jalr zero, t9 # (self, shadow_frame, dex_pc_ptr) Note: tail call.
.balign 128
-/* File: mips64/instruction_end_alt.S */
.global artMterpAsmAltInstructionEnd
artMterpAsmAltInstructionEnd:
-
-/* File: mips64/footer.S */
/*
* We've detected a condition that will result in an exception, but the exception
* has not yet been thrown. Just bail out to the reference interpreter to deal with it.
@@ -11880,7 +10847,7 @@
EXPORT_PC
jal MterpMaybeDoOnStackReplacement # (self, shadow_frame, offset)
bnezc v0, MterpOnStackReplacement
- FETCH_ADVANCE_INST 2
+ FETCH_ADVANCE_INST 2
GET_INST_OPCODE v0 # extract opcode from rINST
GOTO_OPCODE v0 # jump to next instruction
@@ -11983,4 +10950,3 @@
.cfi_endproc
.set reorder
.size ExecuteMterpImpl, .-ExecuteMterpImpl
-
diff --git a/runtime/interpreter/mterp/out/mterp_x86.S b/runtime/interpreter/mterp/out/mterp_x86.S
index 32811ff..5a1bbf2 100644
--- a/runtime/interpreter/mterp/out/mterp_x86.S
+++ b/runtime/interpreter/mterp/out/mterp_x86.S
@@ -1,10 +1,4 @@
-/*
- * This file was generated automatically by gen-mterp.py for 'x86'.
- *
- * --> DO NOT EDIT <--
- */
-
-/* File: x86/header.S */
+/* DO NOT EDIT: This file was generated by gen-mterp.py. */
/*
* Copyright (C) 2016 The Android Open Source Project
*
@@ -321,8 +315,6 @@
movl MACRO_LITERAL(0), (rREFS,\_vreg,4)
movl MACRO_LITERAL(0), 4(rREFS,\_vreg,4)
.endm
-
-/* File: x86/entry.S */
/*
* Copyright (C) 2016 The Android Open Source Project
*
@@ -407,24 +399,19 @@
GOTO_NEXT
/* NOTE: no fallthrough */
-/* File: x86/instruction_start.S */
-
OBJECT_TYPE(artMterpAsmInstructionStart)
ASM_HIDDEN SYMBOL(artMterpAsmInstructionStart)
.global SYMBOL(artMterpAsmInstructionStart)
SYMBOL(artMterpAsmInstructionStart) = .L_op_nop
.text
-
/* ------------------------------ */
.balign 128
.L_op_nop: /* 0x00 */
-/* File: x86/op_nop.S */
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
/* ------------------------------ */
.balign 128
.L_op_move: /* 0x01 */
-/* File: x86/op_move.S */
/* for move, move-object, long-to-int */
/* op vA, vB */
movzbl rINSTbl, %eax # eax <- BA
@@ -441,7 +428,6 @@
/* ------------------------------ */
.balign 128
.L_op_move_from16: /* 0x02 */
-/* File: x86/op_move_from16.S */
/* for: move/from16, move-object/from16 */
/* op vAA, vBBBB */
movzx rINSTbl, %eax # eax <- AA
@@ -457,7 +443,6 @@
/* ------------------------------ */
.balign 128
.L_op_move_16: /* 0x03 */
-/* File: x86/op_move_16.S */
/* for: move/16, move-object/16 */
/* op vAAAA, vBBBB */
movzwl 4(rPC), %ecx # ecx <- BBBB
@@ -473,7 +458,6 @@
/* ------------------------------ */
.balign 128
.L_op_move_wide: /* 0x04 */
-/* File: x86/op_move_wide.S */
/* move-wide vA, vB */
/* NOTE: regs can overlap, e.g. "move v6,v7" or "move v7,v6" */
movzbl rINSTbl, %ecx # ecx <- BA
@@ -486,7 +470,6 @@
/* ------------------------------ */
.balign 128
.L_op_move_wide_from16: /* 0x05 */
-/* File: x86/op_move_wide_from16.S */
/* move-wide/from16 vAA, vBBBB */
/* NOTE: regs can overlap, e.g. "move v6,v7" or "move v7,v6" */
movzwl 2(rPC), %ecx # ecx <- BBBB
@@ -498,7 +481,6 @@
/* ------------------------------ */
.balign 128
.L_op_move_wide_16: /* 0x06 */
-/* File: x86/op_move_wide_16.S */
/* move-wide/16 vAAAA, vBBBB */
/* NOTE: regs can overlap, e.g. "move v6,v7" or "move v7,v6" */
movzwl 4(rPC), %ecx # ecx<- BBBB
@@ -510,8 +492,6 @@
/* ------------------------------ */
.balign 128
.L_op_move_object: /* 0x07 */
-/* File: x86/op_move_object.S */
-/* File: x86/op_move.S */
/* for move, move-object, long-to-int */
/* op vA, vB */
movzbl rINSTbl, %eax # eax <- BA
@@ -525,12 +505,9 @@
.endif
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_move_object_from16: /* 0x08 */
-/* File: x86/op_move_object_from16.S */
-/* File: x86/op_move_from16.S */
/* for: move/from16, move-object/from16 */
/* op vAA, vBBBB */
movzx rINSTbl, %eax # eax <- AA
@@ -543,12 +520,9 @@
.endif
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_move_object_16: /* 0x09 */
-/* File: x86/op_move_object_16.S */
-/* File: x86/op_move_16.S */
/* for: move/16, move-object/16 */
/* op vAAAA, vBBBB */
movzwl 4(rPC), %ecx # ecx <- BBBB
@@ -561,11 +535,9 @@
.endif
ADVANCE_PC_FETCH_AND_GOTO_NEXT 3
-
/* ------------------------------ */
.balign 128
.L_op_move_result: /* 0x0a */
-/* File: x86/op_move_result.S */
/* for: move-result, move-result-object */
/* op vAA */
movl OFF_FP_RESULT_REGISTER(rFP), %eax # get pointer to result JType.
@@ -580,7 +552,6 @@
/* ------------------------------ */
.balign 128
.L_op_move_result_wide: /* 0x0b */
-/* File: x86/op_move_result_wide.S */
/* move-result-wide vAA */
movl OFF_FP_RESULT_REGISTER(rFP), %eax # get pointer to result JType.
movl 4(%eax), %ecx # Get high
@@ -592,8 +563,6 @@
/* ------------------------------ */
.balign 128
.L_op_move_result_object: /* 0x0c */
-/* File: x86/op_move_result_object.S */
-/* File: x86/op_move_result.S */
/* for: move-result, move-result-object */
/* op vAA */
movl OFF_FP_RESULT_REGISTER(rFP), %eax # get pointer to result JType.
@@ -605,11 +574,9 @@
.endif
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_move_exception: /* 0x0d */
-/* File: x86/op_move_exception.S */
/* move-exception vAA */
movl rSELF, %ecx
movl THREAD_EXCEPTION_OFFSET(%ecx), %eax
@@ -620,7 +587,6 @@
/* ------------------------------ */
.balign 128
.L_op_return_void: /* 0x0e */
-/* File: x86/op_return_void.S */
.extern MterpThreadFenceForConstructor
call SYMBOL(MterpThreadFenceForConstructor)
movl rSELF, %eax
@@ -636,7 +602,6 @@
/* ------------------------------ */
.balign 128
.L_op_return: /* 0x0f */
-/* File: x86/op_return.S */
/*
* Return a 32-bit value.
*
@@ -658,7 +623,6 @@
/* ------------------------------ */
.balign 128
.L_op_return_wide: /* 0x10 */
-/* File: x86/op_return_wide.S */
/*
* Return a 64-bit value.
*/
@@ -678,8 +642,6 @@
/* ------------------------------ */
.balign 128
.L_op_return_object: /* 0x11 */
-/* File: x86/op_return_object.S */
-/* File: x86/op_return.S */
/*
* Return a 32-bit value.
*
@@ -698,11 +660,9 @@
xorl %ecx, %ecx
jmp MterpReturn
-
/* ------------------------------ */
.balign 128
.L_op_const_4: /* 0x12 */
-/* File: x86/op_const_4.S */
/* const/4 vA, #+B */
movsx rINSTbl, %eax # eax <-ssssssBx
movl $0xf, rINST
@@ -714,7 +674,6 @@
/* ------------------------------ */
.balign 128
.L_op_const_16: /* 0x13 */
-/* File: x86/op_const_16.S */
/* const/16 vAA, #+BBBB */
movswl 2(rPC), %ecx # ecx <- ssssBBBB
SET_VREG %ecx, rINST # vAA <- ssssBBBB
@@ -723,7 +682,6 @@
/* ------------------------------ */
.balign 128
.L_op_const: /* 0x14 */
-/* File: x86/op_const.S */
/* const vAA, #+BBBBbbbb */
movl 2(rPC), %eax # grab all 32 bits at once
SET_VREG %eax, rINST # vAA<- eax
@@ -732,7 +690,6 @@
/* ------------------------------ */
.balign 128
.L_op_const_high16: /* 0x15 */
-/* File: x86/op_const_high16.S */
/* const/high16 vAA, #+BBBB0000 */
movzwl 2(rPC), %eax # eax <- 0000BBBB
sall $16, %eax # eax <- BBBB0000
@@ -742,7 +699,6 @@
/* ------------------------------ */
.balign 128
.L_op_const_wide_16: /* 0x16 */
-/* File: x86/op_const_wide_16.S */
/* const-wide/16 vAA, #+BBBB */
movswl 2(rPC), %eax # eax <- ssssBBBB
movl rIBASE, %ecx # preserve rIBASE (cltd trashes it)
@@ -755,7 +711,6 @@
/* ------------------------------ */
.balign 128
.L_op_const_wide_32: /* 0x17 */
-/* File: x86/op_const_wide_32.S */
/* const-wide/32 vAA, #+BBBBbbbb */
movl 2(rPC), %eax # eax <- BBBBbbbb
movl rIBASE, %ecx # preserve rIBASE (cltd trashes it)
@@ -768,7 +723,6 @@
/* ------------------------------ */
.balign 128
.L_op_const_wide: /* 0x18 */
-/* File: x86/op_const_wide.S */
/* const-wide vAA, #+HHHHhhhhBBBBbbbb */
movl 2(rPC), %eax # eax <- lsw
movzbl rINSTbl, %ecx # ecx <- AA
@@ -780,7 +734,6 @@
/* ------------------------------ */
.balign 128
.L_op_const_wide_high16: /* 0x19 */
-/* File: x86/op_const_wide_high16.S */
/* const-wide/high16 vAA, #+BBBB000000000000 */
movzwl 2(rPC), %eax # eax <- 0000BBBB
sall $16, %eax # eax <- BBBB0000
@@ -792,8 +745,6 @@
/* ------------------------------ */
.balign 128
.L_op_const_string: /* 0x1a */
-/* File: x86/op_const_string.S */
-/* File: x86/const.S */
/* const/class vAA, type@BBBB */
/* const/method-handle vAA, method_handle@BBBB */
/* const/method-type vAA, proto@BBBB */
@@ -813,11 +764,9 @@
jnz MterpPossibleException
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_const_string_jumbo: /* 0x1b */
-/* File: x86/op_const_string_jumbo.S */
/* const/string vAA, String@BBBBBBBB */
EXPORT_PC
movl 2(rPC), %eax # eax <- BBBB
@@ -836,8 +785,6 @@
/* ------------------------------ */
.balign 128
.L_op_const_class: /* 0x1c */
-/* File: x86/op_const_class.S */
-/* File: x86/const.S */
/* const/class vAA, type@BBBB */
/* const/method-handle vAA, method_handle@BBBB */
/* const/method-type vAA, proto@BBBB */
@@ -857,11 +804,9 @@
jnz MterpPossibleException
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_monitor_enter: /* 0x1d */
-/* File: x86/op_monitor_enter.S */
/*
* Synchronize on an object.
*/
@@ -880,7 +825,6 @@
/* ------------------------------ */
.balign 128
.L_op_monitor_exit: /* 0x1e */
-/* File: x86/op_monitor_exit.S */
/*
* Unlock an object.
*
@@ -903,7 +847,6 @@
/* ------------------------------ */
.balign 128
.L_op_check_cast: /* 0x1f */
-/* File: x86/op_check_cast.S */
/*
* Check to see if a cast from one class to another is allowed.
*/
@@ -926,7 +869,6 @@
/* ------------------------------ */
.balign 128
.L_op_instance_of: /* 0x20 */
-/* File: x86/op_instance_of.S */
/*
* Check to see if an object reference is an instance of a class.
*
@@ -957,7 +899,6 @@
/* ------------------------------ */
.balign 128
.L_op_array_length: /* 0x21 */
-/* File: x86/op_array_length.S */
/*
* Return the length of an array.
*/
@@ -974,7 +915,6 @@
/* ------------------------------ */
.balign 128
.L_op_new_instance: /* 0x22 */
-/* File: x86/op_new_instance.S */
/*
* Create a new instance of a class.
*/
@@ -995,7 +935,6 @@
/* ------------------------------ */
.balign 128
.L_op_new_array: /* 0x23 */
-/* File: x86/op_new_array.S */
/*
* Allocate an array of objects, specified with the array class
* and a count.
@@ -1021,7 +960,6 @@
/* ------------------------------ */
.balign 128
.L_op_filled_new_array: /* 0x24 */
-/* File: x86/op_filled_new_array.S */
/*
* Create a new array with elements filled from registers.
*
@@ -1045,8 +983,6 @@
/* ------------------------------ */
.balign 128
.L_op_filled_new_array_range: /* 0x25 */
-/* File: x86/op_filled_new_array_range.S */
-/* File: x86/op_filled_new_array.S */
/*
* Create a new array with elements filled from registers.
*
@@ -1067,11 +1003,9 @@
jz MterpPossibleException
ADVANCE_PC_FETCH_AND_GOTO_NEXT 3
-
/* ------------------------------ */
.balign 128
.L_op_fill_array_data: /* 0x26 */
-/* File: x86/op_fill_array_data.S */
/* fill-array-data vAA, +BBBBBBBB */
EXPORT_PC
movl 2(rPC), %ecx # ecx <- BBBBbbbb
@@ -1088,7 +1022,6 @@
/* ------------------------------ */
.balign 128
.L_op_throw: /* 0x27 */
-/* File: x86/op_throw.S */
/*
* Throw an exception object in the current thread.
*/
@@ -1104,7 +1037,6 @@
/* ------------------------------ */
.balign 128
.L_op_goto: /* 0x28 */
-/* File: x86/op_goto.S */
/*
* Unconditional branch, 8-bit offset.
*
@@ -1119,7 +1051,6 @@
/* ------------------------------ */
.balign 128
.L_op_goto_16: /* 0x29 */
-/* File: x86/op_goto_16.S */
/*
* Unconditional branch, 16-bit offset.
*
@@ -1134,7 +1065,6 @@
/* ------------------------------ */
.balign 128
.L_op_goto_32: /* 0x2a */
-/* File: x86/op_goto_32.S */
/*
* Unconditional branch, 32-bit offset.
*
@@ -1154,7 +1084,6 @@
/* ------------------------------ */
.balign 128
.L_op_packed_switch: /* 0x2b */
-/* File: x86/op_packed_switch.S */
/*
* Handle a packed-switch or sparse-switch instruction. In both cases
* we decode it and hand it off to a helper function.
@@ -1179,8 +1108,6 @@
/* ------------------------------ */
.balign 128
.L_op_sparse_switch: /* 0x2c */
-/* File: x86/op_sparse_switch.S */
-/* File: x86/op_packed_switch.S */
/*
* Handle a packed-switch or sparse-switch instruction. In both cases
* we decode it and hand it off to a helper function.
@@ -1202,12 +1129,9 @@
movl %eax, rINST
jmp MterpCommonTakenBranch
-
/* ------------------------------ */
.balign 128
.L_op_cmpl_float: /* 0x2d */
-/* File: x86/op_cmpl_float.S */
-/* File: x86/fpcmp.S */
/*
* Compare two floating-point values. Puts 0, 1, or -1 into the
* destination register based on the results of the comparison.
@@ -1243,12 +1167,9 @@
SET_VREG %eax, rINST
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_cmpg_float: /* 0x2e */
-/* File: x86/op_cmpg_float.S */
-/* File: x86/fpcmp.S */
/*
* Compare two floating-point values. Puts 0, 1, or -1 into the
* destination register based on the results of the comparison.
@@ -1284,12 +1205,9 @@
SET_VREG %eax, rINST
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_cmpl_double: /* 0x2f */
-/* File: x86/op_cmpl_double.S */
-/* File: x86/fpcmp.S */
/*
* Compare two floating-point values. Puts 0, 1, or -1 into the
* destination register based on the results of the comparison.
@@ -1325,12 +1243,9 @@
SET_VREG %eax, rINST
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_cmpg_double: /* 0x30 */
-/* File: x86/op_cmpg_double.S */
-/* File: x86/fpcmp.S */
/*
* Compare two floating-point values. Puts 0, 1, or -1 into the
* destination register based on the results of the comparison.
@@ -1366,11 +1281,9 @@
SET_VREG %eax, rINST
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_cmp_long: /* 0x31 */
-/* File: x86/op_cmp_long.S */
/*
* Compare two 64-bit values. Puts 0, 1, or -1 into the destination
* register based on the results of the comparison.
@@ -1402,8 +1315,6 @@
/* ------------------------------ */
.balign 128
.L_op_if_eq: /* 0x32 */
-/* File: x86/op_if_eq.S */
-/* File: x86/bincmp.S */
/*
* Generic two-operand compare-and-branch operation. Provide a "revcmp"
* fragment that specifies the *reverse* comparison to perform, e.g.
@@ -1426,12 +1337,9 @@
je .L_check_not_taken_osr
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_if_ne: /* 0x33 */
-/* File: x86/op_if_ne.S */
-/* File: x86/bincmp.S */
/*
* Generic two-operand compare-and-branch operation. Provide a "revcmp"
* fragment that specifies the *reverse* comparison to perform, e.g.
@@ -1454,12 +1362,9 @@
je .L_check_not_taken_osr
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_if_lt: /* 0x34 */
-/* File: x86/op_if_lt.S */
-/* File: x86/bincmp.S */
/*
* Generic two-operand compare-and-branch operation. Provide a "revcmp"
* fragment that specifies the *reverse* comparison to perform, e.g.
@@ -1482,12 +1387,9 @@
je .L_check_not_taken_osr
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_if_ge: /* 0x35 */
-/* File: x86/op_if_ge.S */
-/* File: x86/bincmp.S */
/*
* Generic two-operand compare-and-branch operation. Provide a "revcmp"
* fragment that specifies the *reverse* comparison to perform, e.g.
@@ -1510,12 +1412,9 @@
je .L_check_not_taken_osr
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_if_gt: /* 0x36 */
-/* File: x86/op_if_gt.S */
-/* File: x86/bincmp.S */
/*
* Generic two-operand compare-and-branch operation. Provide a "revcmp"
* fragment that specifies the *reverse* comparison to perform, e.g.
@@ -1538,12 +1437,9 @@
je .L_check_not_taken_osr
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_if_le: /* 0x37 */
-/* File: x86/op_if_le.S */
-/* File: x86/bincmp.S */
/*
* Generic two-operand compare-and-branch operation. Provide a "revcmp"
* fragment that specifies the *reverse* comparison to perform, e.g.
@@ -1566,12 +1462,9 @@
je .L_check_not_taken_osr
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_if_eqz: /* 0x38 */
-/* File: x86/op_if_eqz.S */
-/* File: x86/zcmp.S */
/*
* Generic one-operand compare-and-branch operation. Provide a "revcmp"
* fragment that specifies the *reverse* comparison to perform, e.g.
@@ -1590,12 +1483,9 @@
je .L_check_not_taken_osr
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_if_nez: /* 0x39 */
-/* File: x86/op_if_nez.S */
-/* File: x86/zcmp.S */
/*
* Generic one-operand compare-and-branch operation. Provide a "revcmp"
* fragment that specifies the *reverse* comparison to perform, e.g.
@@ -1614,12 +1504,9 @@
je .L_check_not_taken_osr
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_if_ltz: /* 0x3a */
-/* File: x86/op_if_ltz.S */
-/* File: x86/zcmp.S */
/*
* Generic one-operand compare-and-branch operation. Provide a "revcmp"
* fragment that specifies the *reverse* comparison to perform, e.g.
@@ -1638,12 +1525,9 @@
je .L_check_not_taken_osr
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_if_gez: /* 0x3b */
-/* File: x86/op_if_gez.S */
-/* File: x86/zcmp.S */
/*
* Generic one-operand compare-and-branch operation. Provide a "revcmp"
* fragment that specifies the *reverse* comparison to perform, e.g.
@@ -1662,12 +1546,9 @@
je .L_check_not_taken_osr
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_if_gtz: /* 0x3c */
-/* File: x86/op_if_gtz.S */
-/* File: x86/zcmp.S */
/*
* Generic one-operand compare-and-branch operation. Provide a "revcmp"
* fragment that specifies the *reverse* comparison to perform, e.g.
@@ -1686,12 +1567,9 @@
je .L_check_not_taken_osr
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_if_lez: /* 0x3d */
-/* File: x86/op_if_lez.S */
-/* File: x86/zcmp.S */
/*
* Generic one-operand compare-and-branch operation. Provide a "revcmp"
* fragment that specifies the *reverse* comparison to perform, e.g.
@@ -1710,77 +1588,57 @@
je .L_check_not_taken_osr
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_unused_3e: /* 0x3e */
-/* File: x86/op_unused_3e.S */
-/* File: x86/unused.S */
/*
* Bail to reference interpreter to throw.
*/
jmp MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_3f: /* 0x3f */
-/* File: x86/op_unused_3f.S */
-/* File: x86/unused.S */
/*
* Bail to reference interpreter to throw.
*/
jmp MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_40: /* 0x40 */
-/* File: x86/op_unused_40.S */
-/* File: x86/unused.S */
/*
* Bail to reference interpreter to throw.
*/
jmp MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_41: /* 0x41 */
-/* File: x86/op_unused_41.S */
-/* File: x86/unused.S */
/*
* Bail to reference interpreter to throw.
*/
jmp MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_42: /* 0x42 */
-/* File: x86/op_unused_42.S */
-/* File: x86/unused.S */
/*
* Bail to reference interpreter to throw.
*/
jmp MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_43: /* 0x43 */
-/* File: x86/op_unused_43.S */
-/* File: x86/unused.S */
/*
* Bail to reference interpreter to throw.
*/
jmp MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_aget: /* 0x44 */
-/* File: x86/op_aget.S */
/*
* Array get, 32 bits or less. vAA <- vBB[vCC].
*
@@ -1803,7 +1661,6 @@
/* ------------------------------ */
.balign 128
.L_op_aget_wide: /* 0x45 */
-/* File: x86/op_aget_wide.S */
/*
* Array get, 64 bits. vAA <- vBB[vCC].
*/
@@ -1824,7 +1681,6 @@
/* ------------------------------ */
.balign 128
.L_op_aget_object: /* 0x46 */
-/* File: x86/op_aget_object.S */
/*
* Array object get. vAA <- vBB[vCC].
*
@@ -1849,8 +1705,6 @@
/* ------------------------------ */
.balign 128
.L_op_aget_boolean: /* 0x47 */
-/* File: x86/op_aget_boolean.S */
-/* File: x86/op_aget.S */
/*
* Array get, 32 bits or less. vAA <- vBB[vCC].
*
@@ -1870,12 +1724,9 @@
SET_VREG %eax, rINST
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_aget_byte: /* 0x48 */
-/* File: x86/op_aget_byte.S */
-/* File: x86/op_aget.S */
/*
* Array get, 32 bits or less. vAA <- vBB[vCC].
*
@@ -1895,12 +1746,9 @@
SET_VREG %eax, rINST
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_aget_char: /* 0x49 */
-/* File: x86/op_aget_char.S */
-/* File: x86/op_aget.S */
/*
* Array get, 32 bits or less. vAA <- vBB[vCC].
*
@@ -1920,12 +1768,9 @@
SET_VREG %eax, rINST
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_aget_short: /* 0x4a */
-/* File: x86/op_aget_short.S */
-/* File: x86/op_aget.S */
/*
* Array get, 32 bits or less. vAA <- vBB[vCC].
*
@@ -1945,11 +1790,9 @@
SET_VREG %eax, rINST
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_aput: /* 0x4b */
-/* File: x86/op_aput.S */
/*
* Array put, 32 bits or less. vBB[vCC] <- vAA.
*
@@ -1973,7 +1816,6 @@
/* ------------------------------ */
.balign 128
.L_op_aput_wide: /* 0x4c */
-/* File: x86/op_aput_wide.S */
/*
* Array put, 64 bits. vBB[vCC] <- vAA.
*
@@ -1995,7 +1837,6 @@
/* ------------------------------ */
.balign 128
.L_op_aput_object: /* 0x4d */
-/* File: x86/op_aput_object.S */
/*
* Store an object into an array. vBB[vCC] <- vAA.
*/
@@ -2015,8 +1856,6 @@
/* ------------------------------ */
.balign 128
.L_op_aput_boolean: /* 0x4e */
-/* File: x86/op_aput_boolean.S */
-/* File: x86/op_aput.S */
/*
* Array put, 32 bits or less. vBB[vCC] <- vAA.
*
@@ -2037,12 +1876,9 @@
movb rINSTbl, (%eax)
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_aput_byte: /* 0x4f */
-/* File: x86/op_aput_byte.S */
-/* File: x86/op_aput.S */
/*
* Array put, 32 bits or less. vBB[vCC] <- vAA.
*
@@ -2063,12 +1899,9 @@
movb rINSTbl, (%eax)
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_aput_char: /* 0x50 */
-/* File: x86/op_aput_char.S */
-/* File: x86/op_aput.S */
/*
* Array put, 32 bits or less. vBB[vCC] <- vAA.
*
@@ -2089,12 +1922,9 @@
movw rINSTw, (%eax)
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_aput_short: /* 0x51 */
-/* File: x86/op_aput_short.S */
-/* File: x86/op_aput.S */
/*
* Array put, 32 bits or less. vBB[vCC] <- vAA.
*
@@ -2115,12 +1945,9 @@
movw rINSTw, (%eax)
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_iget: /* 0x52 */
-/* File: x86/op_iget.S */
-/* File: x86/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2138,13 +1965,9 @@
RESTORE_IBASE
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_iget_wide: /* 0x53 */
-/* File: x86/op_iget_wide.S */
-/* File: x86/op_iget.S */
-/* File: x86/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2162,14 +1985,9 @@
RESTORE_IBASE
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
-
/* ------------------------------ */
.balign 128
.L_op_iget_object: /* 0x54 */
-/* File: x86/op_iget_object.S */
-/* File: x86/op_iget.S */
-/* File: x86/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2187,14 +2005,9 @@
RESTORE_IBASE
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
-
/* ------------------------------ */
.balign 128
.L_op_iget_boolean: /* 0x55 */
-/* File: x86/op_iget_boolean.S */
-/* File: x86/op_iget.S */
-/* File: x86/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2212,14 +2025,9 @@
RESTORE_IBASE
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
-
/* ------------------------------ */
.balign 128
.L_op_iget_byte: /* 0x56 */
-/* File: x86/op_iget_byte.S */
-/* File: x86/op_iget.S */
-/* File: x86/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2237,14 +2045,9 @@
RESTORE_IBASE
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
-
/* ------------------------------ */
.balign 128
.L_op_iget_char: /* 0x57 */
-/* File: x86/op_iget_char.S */
-/* File: x86/op_iget.S */
-/* File: x86/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2262,14 +2065,9 @@
RESTORE_IBASE
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
-
/* ------------------------------ */
.balign 128
.L_op_iget_short: /* 0x58 */
-/* File: x86/op_iget_short.S */
-/* File: x86/op_iget.S */
-/* File: x86/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2287,13 +2085,9 @@
RESTORE_IBASE
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
-
/* ------------------------------ */
.balign 128
.L_op_iput: /* 0x59 */
-/* File: x86/op_iput.S */
-/* File: x86/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2311,13 +2105,9 @@
RESTORE_IBASE
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_iput_wide: /* 0x5a */
-/* File: x86/op_iput_wide.S */
-/* File: x86/op_iput.S */
-/* File: x86/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2335,14 +2125,9 @@
RESTORE_IBASE
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
-
/* ------------------------------ */
.balign 128
.L_op_iput_object: /* 0x5b */
-/* File: x86/op_iput_object.S */
-/* File: x86/op_iput.S */
-/* File: x86/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2360,14 +2145,9 @@
RESTORE_IBASE
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
-
/* ------------------------------ */
.balign 128
.L_op_iput_boolean: /* 0x5c */
-/* File: x86/op_iput_boolean.S */
-/* File: x86/op_iput.S */
-/* File: x86/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2385,14 +2165,9 @@
RESTORE_IBASE
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
-
/* ------------------------------ */
.balign 128
.L_op_iput_byte: /* 0x5d */
-/* File: x86/op_iput_byte.S */
-/* File: x86/op_iput.S */
-/* File: x86/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2410,14 +2185,9 @@
RESTORE_IBASE
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
-
/* ------------------------------ */
.balign 128
.L_op_iput_char: /* 0x5e */
-/* File: x86/op_iput_char.S */
-/* File: x86/op_iput.S */
-/* File: x86/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2435,14 +2205,9 @@
RESTORE_IBASE
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
-
/* ------------------------------ */
.balign 128
.L_op_iput_short: /* 0x5f */
-/* File: x86/op_iput_short.S */
-/* File: x86/op_iput.S */
-/* File: x86/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2460,13 +2225,9 @@
RESTORE_IBASE
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
-
/* ------------------------------ */
.balign 128
.L_op_sget: /* 0x60 */
-/* File: x86/op_sget.S */
-/* File: x86/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2484,13 +2245,9 @@
RESTORE_IBASE
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_sget_wide: /* 0x61 */
-/* File: x86/op_sget_wide.S */
-/* File: x86/op_sget.S */
-/* File: x86/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2508,14 +2265,9 @@
RESTORE_IBASE
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
-
/* ------------------------------ */
.balign 128
.L_op_sget_object: /* 0x62 */
-/* File: x86/op_sget_object.S */
-/* File: x86/op_sget.S */
-/* File: x86/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2533,14 +2285,9 @@
RESTORE_IBASE
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
-
/* ------------------------------ */
.balign 128
.L_op_sget_boolean: /* 0x63 */
-/* File: x86/op_sget_boolean.S */
-/* File: x86/op_sget.S */
-/* File: x86/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2558,14 +2305,9 @@
RESTORE_IBASE
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
-
/* ------------------------------ */
.balign 128
.L_op_sget_byte: /* 0x64 */
-/* File: x86/op_sget_byte.S */
-/* File: x86/op_sget.S */
-/* File: x86/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2583,14 +2325,9 @@
RESTORE_IBASE
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
-
/* ------------------------------ */
.balign 128
.L_op_sget_char: /* 0x65 */
-/* File: x86/op_sget_char.S */
-/* File: x86/op_sget.S */
-/* File: x86/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2608,14 +2345,9 @@
RESTORE_IBASE
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
-
/* ------------------------------ */
.balign 128
.L_op_sget_short: /* 0x66 */
-/* File: x86/op_sget_short.S */
-/* File: x86/op_sget.S */
-/* File: x86/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2633,13 +2365,9 @@
RESTORE_IBASE
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
-
/* ------------------------------ */
.balign 128
.L_op_sput: /* 0x67 */
-/* File: x86/op_sput.S */
-/* File: x86/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2657,13 +2385,9 @@
RESTORE_IBASE
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_sput_wide: /* 0x68 */
-/* File: x86/op_sput_wide.S */
-/* File: x86/op_sput.S */
-/* File: x86/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2681,14 +2405,9 @@
RESTORE_IBASE
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
-
/* ------------------------------ */
.balign 128
.L_op_sput_object: /* 0x69 */
-/* File: x86/op_sput_object.S */
-/* File: x86/op_sput.S */
-/* File: x86/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2706,14 +2425,9 @@
RESTORE_IBASE
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
-
/* ------------------------------ */
.balign 128
.L_op_sput_boolean: /* 0x6a */
-/* File: x86/op_sput_boolean.S */
-/* File: x86/op_sput.S */
-/* File: x86/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2731,14 +2445,9 @@
RESTORE_IBASE
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
-
/* ------------------------------ */
.balign 128
.L_op_sput_byte: /* 0x6b */
-/* File: x86/op_sput_byte.S */
-/* File: x86/op_sput.S */
-/* File: x86/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2756,14 +2465,9 @@
RESTORE_IBASE
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
-
/* ------------------------------ */
.balign 128
.L_op_sput_char: /* 0x6c */
-/* File: x86/op_sput_char.S */
-/* File: x86/op_sput.S */
-/* File: x86/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2781,14 +2485,9 @@
RESTORE_IBASE
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
-
/* ------------------------------ */
.balign 128
.L_op_sput_short: /* 0x6d */
-/* File: x86/op_sput_short.S */
-/* File: x86/op_sput.S */
-/* File: x86/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2806,13 +2505,9 @@
RESTORE_IBASE
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
-
/* ------------------------------ */
.balign 128
.L_op_invoke_virtual: /* 0x6e */
-/* File: x86/op_invoke_virtual.S */
-/* File: x86/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -2837,7 +2532,6 @@
RESTORE_IBASE
FETCH_INST
GOTO_NEXT
-
/*
* Handle a virtual method call.
*
@@ -2849,8 +2543,6 @@
/* ------------------------------ */
.balign 128
.L_op_invoke_super: /* 0x6f */
-/* File: x86/op_invoke_super.S */
-/* File: x86/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -2875,7 +2567,6 @@
RESTORE_IBASE
FETCH_INST
GOTO_NEXT
-
/*
* Handle a "super" method call.
*
@@ -2887,8 +2578,6 @@
/* ------------------------------ */
.balign 128
.L_op_invoke_direct: /* 0x70 */
-/* File: x86/op_invoke_direct.S */
-/* File: x86/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -2914,12 +2603,9 @@
FETCH_INST
GOTO_NEXT
-
/* ------------------------------ */
.balign 128
.L_op_invoke_static: /* 0x71 */
-/* File: x86/op_invoke_static.S */
-/* File: x86/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -2945,13 +2631,9 @@
FETCH_INST
GOTO_NEXT
-
-
/* ------------------------------ */
.balign 128
.L_op_invoke_interface: /* 0x72 */
-/* File: x86/op_invoke_interface.S */
-/* File: x86/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -2976,7 +2658,6 @@
RESTORE_IBASE
FETCH_INST
GOTO_NEXT
-
/*
* Handle an interface method call.
*
@@ -2988,7 +2669,6 @@
/* ------------------------------ */
.balign 128
.L_op_return_void_no_barrier: /* 0x73 */
-/* File: x86/op_return_void_no_barrier.S */
movl rSELF, %eax
testl $(THREAD_SUSPEND_OR_CHECKPOINT_REQUEST), THREAD_FLAGS_OFFSET(%eax)
jz 1f
@@ -3002,8 +2682,6 @@
/* ------------------------------ */
.balign 128
.L_op_invoke_virtual_range: /* 0x74 */
-/* File: x86/op_invoke_virtual_range.S */
-/* File: x86/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -3029,12 +2707,9 @@
FETCH_INST
GOTO_NEXT
-
/* ------------------------------ */
.balign 128
.L_op_invoke_super_range: /* 0x75 */
-/* File: x86/op_invoke_super_range.S */
-/* File: x86/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -3060,12 +2735,9 @@
FETCH_INST
GOTO_NEXT
-
/* ------------------------------ */
.balign 128
.L_op_invoke_direct_range: /* 0x76 */
-/* File: x86/op_invoke_direct_range.S */
-/* File: x86/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -3091,12 +2763,9 @@
FETCH_INST
GOTO_NEXT
-
/* ------------------------------ */
.balign 128
.L_op_invoke_static_range: /* 0x77 */
-/* File: x86/op_invoke_static_range.S */
-/* File: x86/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -3122,12 +2791,9 @@
FETCH_INST
GOTO_NEXT
-
/* ------------------------------ */
.balign 128
.L_op_invoke_interface_range: /* 0x78 */
-/* File: x86/op_invoke_interface_range.S */
-/* File: x86/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -3153,34 +2819,25 @@
FETCH_INST
GOTO_NEXT
-
/* ------------------------------ */
.balign 128
.L_op_unused_79: /* 0x79 */
-/* File: x86/op_unused_79.S */
-/* File: x86/unused.S */
/*
* Bail to reference interpreter to throw.
*/
jmp MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_7a: /* 0x7a */
-/* File: x86/op_unused_7a.S */
-/* File: x86/unused.S */
/*
* Bail to reference interpreter to throw.
*/
jmp MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_neg_int: /* 0x7b */
-/* File: x86/op_neg_int.S */
-/* File: x86/unop.S */
/*
* Generic 32-bit unary operation. Provide an "instr" line that
* specifies an instruction that performs "result = op eax".
@@ -3194,12 +2851,9 @@
SET_VREG %eax, %ecx
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_not_int: /* 0x7c */
-/* File: x86/op_not_int.S */
-/* File: x86/unop.S */
/*
* Generic 32-bit unary operation. Provide an "instr" line that
* specifies an instruction that performs "result = op eax".
@@ -3213,11 +2867,9 @@
SET_VREG %eax, %ecx
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_neg_long: /* 0x7d */
-/* File: x86/op_neg_long.S */
/* unop vA, vB */
movzbl rINSTbl, %ecx # ecx <- BA
sarl $4, %ecx # ecx <- B
@@ -3231,11 +2883,9 @@
SET_VREG_HIGH %ecx, rINST # v[A+1] <- ecx
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_not_long: /* 0x7e */
-/* File: x86/op_not_long.S */
/* unop vA, vB */
movzbl rINSTbl, %ecx # ecx <- BA
sarl $4, %ecx # ecx <- B
@@ -3251,8 +2901,6 @@
/* ------------------------------ */
.balign 128
.L_op_neg_float: /* 0x7f */
-/* File: x86/op_neg_float.S */
-/* File: x86/fpcvt.S */
/*
* Generic 32-bit FP conversion operation.
*/
@@ -3270,12 +2918,9 @@
.endif
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_neg_double: /* 0x80 */
-/* File: x86/op_neg_double.S */
-/* File: x86/fpcvt.S */
/*
* Generic 32-bit FP conversion operation.
*/
@@ -3293,11 +2938,9 @@
.endif
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_int_to_long: /* 0x81 */
-/* File: x86/op_int_to_long.S */
/* int to long vA, vB */
movzbl rINSTbl, %eax # eax <- +A
sarl $4, %eax # eax <- B
@@ -3310,12 +2953,9 @@
movl %ecx, rIBASE
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_int_to_float: /* 0x82 */
-/* File: x86/op_int_to_float.S */
-/* File: x86/fpcvt.S */
/*
* Generic 32-bit FP conversion operation.
*/
@@ -3333,12 +2973,9 @@
.endif
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_int_to_double: /* 0x83 */
-/* File: x86/op_int_to_double.S */
-/* File: x86/fpcvt.S */
/*
* Generic 32-bit FP conversion operation.
*/
@@ -3356,13 +2993,10 @@
.endif
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_long_to_int: /* 0x84 */
-/* File: x86/op_long_to_int.S */
/* we ignore the high word, making this equivalent to a 32-bit reg move */
-/* File: x86/op_move.S */
/* for move, move-object, long-to-int */
/* op vA, vB */
movzbl rINSTbl, %eax # eax <- BA
@@ -3376,12 +3010,9 @@
.endif
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_long_to_float: /* 0x85 */
-/* File: x86/op_long_to_float.S */
-/* File: x86/fpcvt.S */
/*
* Generic 32-bit FP conversion operation.
*/
@@ -3399,12 +3030,9 @@
.endif
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_long_to_double: /* 0x86 */
-/* File: x86/op_long_to_double.S */
-/* File: x86/fpcvt.S */
/*
* Generic 32-bit FP conversion operation.
*/
@@ -3422,12 +3050,9 @@
.endif
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_float_to_int: /* 0x87 */
-/* File: x86/op_float_to_int.S */
-/* File: x86/cvtfp_int.S */
/* On fp to int conversions, Java requires that
* if the result > maxint, it should be clamped to maxint. If it is less
* than minint, it should be clamped to minint. If it is a nan, the result
@@ -3489,12 +3114,9 @@
.endif
jmp .Lop_float_to_int_finish
-
/* ------------------------------ */
.balign 128
.L_op_float_to_long: /* 0x88 */
-/* File: x86/op_float_to_long.S */
-/* File: x86/cvtfp_int.S */
/* On fp to int conversions, Java requires that
* if the result > maxint, it should be clamped to maxint. If it is less
* than minint, it should be clamped to minint. If it is a nan, the result
@@ -3556,12 +3178,9 @@
.endif
jmp .Lop_float_to_long_finish
-
/* ------------------------------ */
.balign 128
.L_op_float_to_double: /* 0x89 */
-/* File: x86/op_float_to_double.S */
-/* File: x86/fpcvt.S */
/*
* Generic 32-bit FP conversion operation.
*/
@@ -3579,12 +3198,9 @@
.endif
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_double_to_int: /* 0x8a */
-/* File: x86/op_double_to_int.S */
-/* File: x86/cvtfp_int.S */
/* On fp to int conversions, Java requires that
* if the result > maxint, it should be clamped to maxint. If it is less
* than minint, it should be clamped to minint. If it is a nan, the result
@@ -3646,12 +3262,9 @@
.endif
jmp .Lop_double_to_int_finish
-
/* ------------------------------ */
.balign 128
.L_op_double_to_long: /* 0x8b */
-/* File: x86/op_double_to_long.S */
-/* File: x86/cvtfp_int.S */
/* On fp to int conversions, Java requires that
* if the result > maxint, it should be clamped to maxint. If it is less
* than minint, it should be clamped to minint. If it is a nan, the result
@@ -3713,12 +3326,9 @@
.endif
jmp .Lop_double_to_long_finish
-
/* ------------------------------ */
.balign 128
.L_op_double_to_float: /* 0x8c */
-/* File: x86/op_double_to_float.S */
-/* File: x86/fpcvt.S */
/*
* Generic 32-bit FP conversion operation.
*/
@@ -3736,12 +3346,9 @@
.endif
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_int_to_byte: /* 0x8d */
-/* File: x86/op_int_to_byte.S */
-/* File: x86/unop.S */
/*
* Generic 32-bit unary operation. Provide an "instr" line that
* specifies an instruction that performs "result = op eax".
@@ -3755,12 +3362,9 @@
SET_VREG %eax, %ecx
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_int_to_char: /* 0x8e */
-/* File: x86/op_int_to_char.S */
-/* File: x86/unop.S */
/*
* Generic 32-bit unary operation. Provide an "instr" line that
* specifies an instruction that performs "result = op eax".
@@ -3774,12 +3378,9 @@
SET_VREG %eax, %ecx
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_int_to_short: /* 0x8f */
-/* File: x86/op_int_to_short.S */
-/* File: x86/unop.S */
/*
* Generic 32-bit unary operation. Provide an "instr" line that
* specifies an instruction that performs "result = op eax".
@@ -3793,12 +3394,9 @@
SET_VREG %eax, %ecx
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_add_int: /* 0x90 */
-/* File: x86/op_add_int.S */
-/* File: x86/binop.S */
/*
* Generic 32-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = eax op (rFP,%ecx,4)".
@@ -3816,12 +3414,9 @@
SET_VREG %eax, rINST
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_sub_int: /* 0x91 */
-/* File: x86/op_sub_int.S */
-/* File: x86/binop.S */
/*
* Generic 32-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = eax op (rFP,%ecx,4)".
@@ -3839,11 +3434,9 @@
SET_VREG %eax, rINST
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_mul_int: /* 0x92 */
-/* File: x86/op_mul_int.S */
/*
* 32-bit binary multiplication.
*/
@@ -3860,8 +3453,6 @@
/* ------------------------------ */
.balign 128
.L_op_div_int: /* 0x93 */
-/* File: x86/op_div_int.S */
-/* File: x86/bindiv.S */
/*
* 32-bit binary div/rem operation. Handles special case of op0=minint and
* op1=-1.
@@ -3910,12 +3501,9 @@
mov LOCAL0(%esp), rIBASE
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_rem_int: /* 0x94 */
-/* File: x86/op_rem_int.S */
-/* File: x86/bindiv.S */
/*
* 32-bit binary div/rem operation. Handles special case of op0=minint and
* op1=-1.
@@ -3964,12 +3552,9 @@
mov LOCAL0(%esp), rIBASE
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_and_int: /* 0x95 */
-/* File: x86/op_and_int.S */
-/* File: x86/binop.S */
/*
* Generic 32-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = eax op (rFP,%ecx,4)".
@@ -3987,12 +3572,9 @@
SET_VREG %eax, rINST
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_or_int: /* 0x96 */
-/* File: x86/op_or_int.S */
-/* File: x86/binop.S */
/*
* Generic 32-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = eax op (rFP,%ecx,4)".
@@ -4010,12 +3592,9 @@
SET_VREG %eax, rINST
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_xor_int: /* 0x97 */
-/* File: x86/op_xor_int.S */
-/* File: x86/binop.S */
/*
* Generic 32-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = eax op (rFP,%ecx,4)".
@@ -4033,12 +3612,9 @@
SET_VREG %eax, rINST
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_shl_int: /* 0x98 */
-/* File: x86/op_shl_int.S */
-/* File: x86/binop1.S */
/*
* Generic 32-bit binary operation in which both operands loaded to
* registers (op0 in eax, op1 in ecx).
@@ -4052,12 +3628,9 @@
SET_VREG %eax, rINST
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_shr_int: /* 0x99 */
-/* File: x86/op_shr_int.S */
-/* File: x86/binop1.S */
/*
* Generic 32-bit binary operation in which both operands loaded to
* registers (op0 in eax, op1 in ecx).
@@ -4071,12 +3644,9 @@
SET_VREG %eax, rINST
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_ushr_int: /* 0x9a */
-/* File: x86/op_ushr_int.S */
-/* File: x86/binop1.S */
/*
* Generic 32-bit binary operation in which both operands loaded to
* registers (op0 in eax, op1 in ecx).
@@ -4090,12 +3660,9 @@
SET_VREG %eax, rINST
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_add_long: /* 0x9b */
-/* File: x86/op_add_long.S */
-/* File: x86/binopWide.S */
/*
* Generic 64-bit binary operation.
*/
@@ -4112,12 +3679,9 @@
SET_VREG_HIGH %eax, rINST # v[AA+1] <- eax
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_sub_long: /* 0x9c */
-/* File: x86/op_sub_long.S */
-/* File: x86/binopWide.S */
/*
* Generic 64-bit binary operation.
*/
@@ -4134,11 +3698,9 @@
SET_VREG_HIGH %eax, rINST # v[AA+1] <- eax
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_mul_long: /* 0x9d */
-/* File: x86/op_mul_long.S */
/*
* Signed 64-bit integer multiply.
*
@@ -4176,7 +3738,6 @@
/* ------------------------------ */
.balign 128
.L_op_div_long: /* 0x9e */
-/* File: x86/op_div_long.S */
/* art_quick_* methods has quick abi,
* so use eax, ecx, edx, ebx for args
*/
@@ -4203,8 +3764,6 @@
/* ------------------------------ */
.balign 128
.L_op_rem_long: /* 0x9f */
-/* File: x86/op_rem_long.S */
-/* File: x86/op_div_long.S */
/* art_quick_* methods has quick abi,
* so use eax, ecx, edx, ebx for args
*/
@@ -4228,12 +3787,9 @@
mov LOCAL0(%esp), rIBASE # restore rIBASE/%edx
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_and_long: /* 0xa0 */
-/* File: x86/op_and_long.S */
-/* File: x86/binopWide.S */
/*
* Generic 64-bit binary operation.
*/
@@ -4250,12 +3806,9 @@
SET_VREG_HIGH %eax, rINST # v[AA+1] <- eax
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_or_long: /* 0xa1 */
-/* File: x86/op_or_long.S */
-/* File: x86/binopWide.S */
/*
* Generic 64-bit binary operation.
*/
@@ -4272,12 +3825,9 @@
SET_VREG_HIGH %eax, rINST # v[AA+1] <- eax
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_xor_long: /* 0xa2 */
-/* File: x86/op_xor_long.S */
-/* File: x86/binopWide.S */
/*
* Generic 64-bit binary operation.
*/
@@ -4294,11 +3844,9 @@
SET_VREG_HIGH %eax, rINST # v[AA+1] <- eax
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_shl_long: /* 0xa3 */
-/* File: x86/op_shl_long.S */
/*
* Long integer shift. This is different from the generic 32/64-bit
* binary operations because vAA/vBB are 64-bit but vCC (the shift
@@ -4332,7 +3880,6 @@
/* ------------------------------ */
.balign 128
.L_op_shr_long: /* 0xa4 */
-/* File: x86/op_shr_long.S */
/*
* Long integer shift. This is different from the generic 32/64-bit
* binary operations because vAA/vBB are 64-bit but vCC (the shift
@@ -4366,7 +3913,6 @@
/* ------------------------------ */
.balign 128
.L_op_ushr_long: /* 0xa5 */
-/* File: x86/op_ushr_long.S */
/*
* Long integer shift. This is different from the generic 32/64-bit
* binary operations because vAA/vBB are 64-bit but vCC (the shift
@@ -4400,8 +3946,6 @@
/* ------------------------------ */
.balign 128
.L_op_add_float: /* 0xa6 */
-/* File: x86/op_add_float.S */
-/* File: x86/sseBinop.S */
movzbl 2(rPC), %ecx # ecx <- BB
movzbl 3(rPC), %eax # eax <- CC
movss VREG_ADDRESS(%ecx), %xmm0 # %xmm0 <- 1st src
@@ -4411,12 +3955,9 @@
movss %xmm0, VREG_REF_ADDRESS(rINST) # clear ref
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_sub_float: /* 0xa7 */
-/* File: x86/op_sub_float.S */
-/* File: x86/sseBinop.S */
movzbl 2(rPC), %ecx # ecx <- BB
movzbl 3(rPC), %eax # eax <- CC
movss VREG_ADDRESS(%ecx), %xmm0 # %xmm0 <- 1st src
@@ -4426,12 +3967,9 @@
movss %xmm0, VREG_REF_ADDRESS(rINST) # clear ref
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_mul_float: /* 0xa8 */
-/* File: x86/op_mul_float.S */
-/* File: x86/sseBinop.S */
movzbl 2(rPC), %ecx # ecx <- BB
movzbl 3(rPC), %eax # eax <- CC
movss VREG_ADDRESS(%ecx), %xmm0 # %xmm0 <- 1st src
@@ -4441,12 +3979,9 @@
movss %xmm0, VREG_REF_ADDRESS(rINST) # clear ref
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_div_float: /* 0xa9 */
-/* File: x86/op_div_float.S */
-/* File: x86/sseBinop.S */
movzbl 2(rPC), %ecx # ecx <- BB
movzbl 3(rPC), %eax # eax <- CC
movss VREG_ADDRESS(%ecx), %xmm0 # %xmm0 <- 1st src
@@ -4456,11 +3991,9 @@
movss %xmm0, VREG_REF_ADDRESS(rINST) # clear ref
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_rem_float: /* 0xaa */
-/* File: x86/op_rem_float.S */
/* rem_float vAA, vBB, vCC */
movzbl 3(rPC), %ecx # ecx <- BB
movzbl 2(rPC), %eax # eax <- CC
@@ -4479,8 +4012,6 @@
/* ------------------------------ */
.balign 128
.L_op_add_double: /* 0xab */
-/* File: x86/op_add_double.S */
-/* File: x86/sseBinop.S */
movzbl 2(rPC), %ecx # ecx <- BB
movzbl 3(rPC), %eax # eax <- CC
movsd VREG_ADDRESS(%ecx), %xmm0 # %xmm0 <- 1st src
@@ -4490,12 +4021,9 @@
movsd %xmm0, VREG_REF_ADDRESS(rINST) # clear ref
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_sub_double: /* 0xac */
-/* File: x86/op_sub_double.S */
-/* File: x86/sseBinop.S */
movzbl 2(rPC), %ecx # ecx <- BB
movzbl 3(rPC), %eax # eax <- CC
movsd VREG_ADDRESS(%ecx), %xmm0 # %xmm0 <- 1st src
@@ -4505,12 +4033,9 @@
movsd %xmm0, VREG_REF_ADDRESS(rINST) # clear ref
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_mul_double: /* 0xad */
-/* File: x86/op_mul_double.S */
-/* File: x86/sseBinop.S */
movzbl 2(rPC), %ecx # ecx <- BB
movzbl 3(rPC), %eax # eax <- CC
movsd VREG_ADDRESS(%ecx), %xmm0 # %xmm0 <- 1st src
@@ -4520,12 +4045,9 @@
movsd %xmm0, VREG_REF_ADDRESS(rINST) # clear ref
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_div_double: /* 0xae */
-/* File: x86/op_div_double.S */
-/* File: x86/sseBinop.S */
movzbl 2(rPC), %ecx # ecx <- BB
movzbl 3(rPC), %eax # eax <- CC
movsd VREG_ADDRESS(%ecx), %xmm0 # %xmm0 <- 1st src
@@ -4535,11 +4057,9 @@
movsd %xmm0, VREG_REF_ADDRESS(rINST) # clear ref
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_rem_double: /* 0xaf */
-/* File: x86/op_rem_double.S */
/* rem_double vAA, vBB, vCC */
movzbl 3(rPC), %ecx # ecx <- BB
movzbl 2(rPC), %eax # eax <- CC
@@ -4558,8 +4078,6 @@
/* ------------------------------ */
.balign 128
.L_op_add_int_2addr: /* 0xb0 */
-/* File: x86/op_add_int_2addr.S */
-/* File: x86/binop2addr.S */
/*
* Generic 32-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = r0 op r1".
@@ -4579,12 +4097,9 @@
CLEAR_REF %ecx
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_sub_int_2addr: /* 0xb1 */
-/* File: x86/op_sub_int_2addr.S */
-/* File: x86/binop2addr.S */
/*
* Generic 32-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = r0 op r1".
@@ -4604,11 +4119,9 @@
CLEAR_REF %ecx
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_mul_int_2addr: /* 0xb2 */
-/* File: x86/op_mul_int_2addr.S */
/* mul vA, vB */
movzx rINSTbl, %ecx # ecx <- A+
sarl $4, rINST # rINST <- B
@@ -4623,8 +4136,6 @@
/* ------------------------------ */
.balign 128
.L_op_div_int_2addr: /* 0xb3 */
-/* File: x86/op_div_int_2addr.S */
-/* File: x86/bindiv2addr.S */
/*
* 32-bit binary div/rem operation. Handles special case of op0=minint and
* op1=-1.
@@ -4654,12 +4165,9 @@
mov LOCAL0(%esp), rIBASE
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_rem_int_2addr: /* 0xb4 */
-/* File: x86/op_rem_int_2addr.S */
-/* File: x86/bindiv2addr.S */
/*
* 32-bit binary div/rem operation. Handles special case of op0=minint and
* op1=-1.
@@ -4689,12 +4197,9 @@
mov LOCAL0(%esp), rIBASE
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_and_int_2addr: /* 0xb5 */
-/* File: x86/op_and_int_2addr.S */
-/* File: x86/binop2addr.S */
/*
* Generic 32-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = r0 op r1".
@@ -4714,12 +4219,9 @@
CLEAR_REF %ecx
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_or_int_2addr: /* 0xb6 */
-/* File: x86/op_or_int_2addr.S */
-/* File: x86/binop2addr.S */
/*
* Generic 32-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = r0 op r1".
@@ -4739,12 +4241,9 @@
CLEAR_REF %ecx
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_xor_int_2addr: /* 0xb7 */
-/* File: x86/op_xor_int_2addr.S */
-/* File: x86/binop2addr.S */
/*
* Generic 32-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = r0 op r1".
@@ -4764,12 +4263,9 @@
CLEAR_REF %ecx
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_shl_int_2addr: /* 0xb8 */
-/* File: x86/op_shl_int_2addr.S */
-/* File: x86/shop2addr.S */
/*
* Generic 32-bit "shift/2addr" operation.
*/
@@ -4783,12 +4279,9 @@
SET_VREG %eax, rINST
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_shr_int_2addr: /* 0xb9 */
-/* File: x86/op_shr_int_2addr.S */
-/* File: x86/shop2addr.S */
/*
* Generic 32-bit "shift/2addr" operation.
*/
@@ -4802,12 +4295,9 @@
SET_VREG %eax, rINST
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_ushr_int_2addr: /* 0xba */
-/* File: x86/op_ushr_int_2addr.S */
-/* File: x86/shop2addr.S */
/*
* Generic 32-bit "shift/2addr" operation.
*/
@@ -4821,12 +4311,9 @@
SET_VREG %eax, rINST
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_add_long_2addr: /* 0xbb */
-/* File: x86/op_add_long_2addr.S */
-/* File: x86/binopWide2addr.S */
/*
* Generic 64-bit binary operation.
*/
@@ -4841,12 +4328,9 @@
CLEAR_WIDE_REF rINST
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_sub_long_2addr: /* 0xbc */
-/* File: x86/op_sub_long_2addr.S */
-/* File: x86/binopWide2addr.S */
/*
* Generic 64-bit binary operation.
*/
@@ -4861,11 +4345,9 @@
CLEAR_WIDE_REF rINST
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_mul_long_2addr: /* 0xbd */
-/* File: x86/op_mul_long_2addr.S */
/*
* Signed 64-bit integer multiply, 2-addr version
*
@@ -4905,7 +4387,6 @@
/* ------------------------------ */
.balign 128
.L_op_div_long_2addr: /* 0xbe */
-/* File: x86/op_div_long_2addr.S */
/* art_quick_* methods has quick abi,
* so use eax, ecx, edx, ebx for args
*/
@@ -4934,8 +4415,6 @@
/* ------------------------------ */
.balign 128
.L_op_rem_long_2addr: /* 0xbf */
-/* File: x86/op_rem_long_2addr.S */
-/* File: x86/op_div_long_2addr.S */
/* art_quick_* methods has quick abi,
* so use eax, ecx, edx, ebx for args
*/
@@ -4961,12 +4440,9 @@
mov LOCAL0(%esp), rIBASE # restore rIBASE/%edx
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_and_long_2addr: /* 0xc0 */
-/* File: x86/op_and_long_2addr.S */
-/* File: x86/binopWide2addr.S */
/*
* Generic 64-bit binary operation.
*/
@@ -4981,12 +4457,9 @@
CLEAR_WIDE_REF rINST
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_or_long_2addr: /* 0xc1 */
-/* File: x86/op_or_long_2addr.S */
-/* File: x86/binopWide2addr.S */
/*
* Generic 64-bit binary operation.
*/
@@ -5001,12 +4474,9 @@
CLEAR_WIDE_REF rINST
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_xor_long_2addr: /* 0xc2 */
-/* File: x86/op_xor_long_2addr.S */
-/* File: x86/binopWide2addr.S */
/*
* Generic 64-bit binary operation.
*/
@@ -5021,11 +4491,9 @@
CLEAR_WIDE_REF rINST
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_shl_long_2addr: /* 0xc3 */
-/* File: x86/op_shl_long_2addr.S */
/*
* Long integer shift, 2addr version. vA is 64-bit value/result, vB is
* 32-bit shift distance.
@@ -5056,7 +4524,6 @@
/* ------------------------------ */
.balign 128
.L_op_shr_long_2addr: /* 0xc4 */
-/* File: x86/op_shr_long_2addr.S */
/*
* Long integer shift, 2addr version. vA is 64-bit value/result, vB is
* 32-bit shift distance.
@@ -5087,7 +4554,6 @@
/* ------------------------------ */
.balign 128
.L_op_ushr_long_2addr: /* 0xc5 */
-/* File: x86/op_ushr_long_2addr.S */
/*
* Long integer shift, 2addr version. vA is 64-bit value/result, vB is
* 32-bit shift distance.
@@ -5118,8 +4584,6 @@
/* ------------------------------ */
.balign 128
.L_op_add_float_2addr: /* 0xc6 */
-/* File: x86/op_add_float_2addr.S */
-/* File: x86/sseBinop2Addr.S */
movzx rINSTbl, %ecx # ecx <- A+
andl $0xf, %ecx # ecx <- A
movss VREG_ADDRESS(%ecx), %xmm0 # %xmm0 <- 1st src
@@ -5130,12 +4594,9 @@
movss %xmm0, VREG_REF_ADDRESS(rINST) # clear ref
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_sub_float_2addr: /* 0xc7 */
-/* File: x86/op_sub_float_2addr.S */
-/* File: x86/sseBinop2Addr.S */
movzx rINSTbl, %ecx # ecx <- A+
andl $0xf, %ecx # ecx <- A
movss VREG_ADDRESS(%ecx), %xmm0 # %xmm0 <- 1st src
@@ -5146,12 +4607,9 @@
movss %xmm0, VREG_REF_ADDRESS(rINST) # clear ref
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_mul_float_2addr: /* 0xc8 */
-/* File: x86/op_mul_float_2addr.S */
-/* File: x86/sseBinop2Addr.S */
movzx rINSTbl, %ecx # ecx <- A+
andl $0xf, %ecx # ecx <- A
movss VREG_ADDRESS(%ecx), %xmm0 # %xmm0 <- 1st src
@@ -5162,12 +4620,9 @@
movss %xmm0, VREG_REF_ADDRESS(rINST) # clear ref
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_div_float_2addr: /* 0xc9 */
-/* File: x86/op_div_float_2addr.S */
-/* File: x86/sseBinop2Addr.S */
movzx rINSTbl, %ecx # ecx <- A+
andl $0xf, %ecx # ecx <- A
movss VREG_ADDRESS(%ecx), %xmm0 # %xmm0 <- 1st src
@@ -5178,11 +4633,9 @@
movss %xmm0, VREG_REF_ADDRESS(rINST) # clear ref
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_rem_float_2addr: /* 0xca */
-/* File: x86/op_rem_float_2addr.S */
/* rem_float/2addr vA, vB */
movzx rINSTbl, %ecx # ecx <- A+
sarl $4, rINST # rINST <- B
@@ -5202,8 +4655,6 @@
/* ------------------------------ */
.balign 128
.L_op_add_double_2addr: /* 0xcb */
-/* File: x86/op_add_double_2addr.S */
-/* File: x86/sseBinop2Addr.S */
movzx rINSTbl, %ecx # ecx <- A+
andl $0xf, %ecx # ecx <- A
movsd VREG_ADDRESS(%ecx), %xmm0 # %xmm0 <- 1st src
@@ -5214,12 +4665,9 @@
movsd %xmm0, VREG_REF_ADDRESS(rINST) # clear ref
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_sub_double_2addr: /* 0xcc */
-/* File: x86/op_sub_double_2addr.S */
-/* File: x86/sseBinop2Addr.S */
movzx rINSTbl, %ecx # ecx <- A+
andl $0xf, %ecx # ecx <- A
movsd VREG_ADDRESS(%ecx), %xmm0 # %xmm0 <- 1st src
@@ -5230,12 +4678,9 @@
movsd %xmm0, VREG_REF_ADDRESS(rINST) # clear ref
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_mul_double_2addr: /* 0xcd */
-/* File: x86/op_mul_double_2addr.S */
-/* File: x86/sseBinop2Addr.S */
movzx rINSTbl, %ecx # ecx <- A+
andl $0xf, %ecx # ecx <- A
movsd VREG_ADDRESS(%ecx), %xmm0 # %xmm0 <- 1st src
@@ -5246,12 +4691,9 @@
movsd %xmm0, VREG_REF_ADDRESS(rINST) # clear ref
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_div_double_2addr: /* 0xce */
-/* File: x86/op_div_double_2addr.S */
-/* File: x86/sseBinop2Addr.S */
movzx rINSTbl, %ecx # ecx <- A+
andl $0xf, %ecx # ecx <- A
movsd VREG_ADDRESS(%ecx), %xmm0 # %xmm0 <- 1st src
@@ -5262,11 +4704,9 @@
movsd %xmm0, VREG_REF_ADDRESS(rINST) # clear ref
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_rem_double_2addr: /* 0xcf */
-/* File: x86/op_rem_double_2addr.S */
/* rem_double/2addr vA, vB */
movzx rINSTbl, %ecx # ecx <- A+
sarl $4, rINST # rINST <- B
@@ -5286,8 +4726,6 @@
/* ------------------------------ */
.balign 128
.L_op_add_int_lit16: /* 0xd0 */
-/* File: x86/op_add_int_lit16.S */
-/* File: x86/binopLit16.S */
/*
* Generic 32-bit "lit16" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = eax op ecx".
@@ -5307,13 +4745,10 @@
SET_VREG %eax, rINST
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_rsub_int: /* 0xd1 */
-/* File: x86/op_rsub_int.S */
/* this op is "rsub-int", but can be thought of as "rsub-int/lit16" */
-/* File: x86/binopLit16.S */
/*
* Generic 32-bit "lit16" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = eax op ecx".
@@ -5333,11 +4768,9 @@
SET_VREG %ecx, rINST
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_mul_int_lit16: /* 0xd2 */
-/* File: x86/op_mul_int_lit16.S */
/* mul/lit16 vA, vB, #+CCCC */
/* Need A in rINST, ssssCCCC in ecx, vB in eax */
movzbl rINSTbl, %eax # eax <- 000000BA
@@ -5354,8 +4787,6 @@
/* ------------------------------ */
.balign 128
.L_op_div_int_lit16: /* 0xd3 */
-/* File: x86/op_div_int_lit16.S */
-/* File: x86/bindivLit16.S */
/*
* 32-bit binary div/rem operation. Handles special case of op0=minint and
* op1=-1.
@@ -5385,12 +4816,9 @@
mov LOCAL0(%esp), rIBASE
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_rem_int_lit16: /* 0xd4 */
-/* File: x86/op_rem_int_lit16.S */
-/* File: x86/bindivLit16.S */
/*
* 32-bit binary div/rem operation. Handles special case of op0=minint and
* op1=-1.
@@ -5420,12 +4848,9 @@
mov LOCAL0(%esp), rIBASE
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_and_int_lit16: /* 0xd5 */
-/* File: x86/op_and_int_lit16.S */
-/* File: x86/binopLit16.S */
/*
* Generic 32-bit "lit16" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = eax op ecx".
@@ -5445,12 +4870,9 @@
SET_VREG %eax, rINST
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_or_int_lit16: /* 0xd6 */
-/* File: x86/op_or_int_lit16.S */
-/* File: x86/binopLit16.S */
/*
* Generic 32-bit "lit16" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = eax op ecx".
@@ -5470,12 +4892,9 @@
SET_VREG %eax, rINST
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_xor_int_lit16: /* 0xd7 */
-/* File: x86/op_xor_int_lit16.S */
-/* File: x86/binopLit16.S */
/*
* Generic 32-bit "lit16" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = eax op ecx".
@@ -5495,12 +4914,9 @@
SET_VREG %eax, rINST
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_add_int_lit8: /* 0xd8 */
-/* File: x86/op_add_int_lit8.S */
-/* File: x86/binopLit8.S */
/*
* Generic 32-bit "lit8" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = eax op ecx".
@@ -5519,12 +4935,9 @@
SET_VREG %eax, rINST
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_rsub_int_lit8: /* 0xd9 */
-/* File: x86/op_rsub_int_lit8.S */
-/* File: x86/binopLit8.S */
/*
* Generic 32-bit "lit8" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = eax op ecx".
@@ -5543,11 +4956,9 @@
SET_VREG %ecx, rINST
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_mul_int_lit8: /* 0xda */
-/* File: x86/op_mul_int_lit8.S */
/* mul/lit8 vAA, vBB, #+CC */
movzbl 2(rPC), %eax # eax <- BB
movl rIBASE, %ecx
@@ -5561,8 +4972,6 @@
/* ------------------------------ */
.balign 128
.L_op_div_int_lit8: /* 0xdb */
-/* File: x86/op_div_int_lit8.S */
-/* File: x86/bindivLit8.S */
/*
* 32-bit div/rem "lit8" binary operation. Handles special case of
* op0=minint & op1=-1
@@ -5589,12 +4998,9 @@
mov LOCAL0(%esp), rIBASE
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_rem_int_lit8: /* 0xdc */
-/* File: x86/op_rem_int_lit8.S */
-/* File: x86/bindivLit8.S */
/*
* 32-bit div/rem "lit8" binary operation. Handles special case of
* op0=minint & op1=-1
@@ -5621,12 +5027,9 @@
mov LOCAL0(%esp), rIBASE
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_and_int_lit8: /* 0xdd */
-/* File: x86/op_and_int_lit8.S */
-/* File: x86/binopLit8.S */
/*
* Generic 32-bit "lit8" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = eax op ecx".
@@ -5645,12 +5048,9 @@
SET_VREG %eax, rINST
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_or_int_lit8: /* 0xde */
-/* File: x86/op_or_int_lit8.S */
-/* File: x86/binopLit8.S */
/*
* Generic 32-bit "lit8" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = eax op ecx".
@@ -5669,12 +5069,9 @@
SET_VREG %eax, rINST
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_xor_int_lit8: /* 0xdf */
-/* File: x86/op_xor_int_lit8.S */
-/* File: x86/binopLit8.S */
/*
* Generic 32-bit "lit8" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = eax op ecx".
@@ -5693,12 +5090,9 @@
SET_VREG %eax, rINST
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_shl_int_lit8: /* 0xe0 */
-/* File: x86/op_shl_int_lit8.S */
-/* File: x86/binopLit8.S */
/*
* Generic 32-bit "lit8" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = eax op ecx".
@@ -5717,12 +5111,9 @@
SET_VREG %eax, rINST
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_shr_int_lit8: /* 0xe1 */
-/* File: x86/op_shr_int_lit8.S */
-/* File: x86/binopLit8.S */
/*
* Generic 32-bit "lit8" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = eax op ecx".
@@ -5741,12 +5132,9 @@
SET_VREG %eax, rINST
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_ushr_int_lit8: /* 0xe2 */
-/* File: x86/op_ushr_int_lit8.S */
-/* File: x86/binopLit8.S */
/*
* Generic 32-bit "lit8" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = eax op ecx".
@@ -5765,11 +5153,9 @@
SET_VREG %eax, rINST
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_iget_quick: /* 0xe3 */
-/* File: x86/op_iget_quick.S */
/* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick */
/* op vA, vB, offset@CCCC */
movzbl rINSTbl, %ecx # ecx <- BA
@@ -5786,7 +5172,6 @@
/* ------------------------------ */
.balign 128
.L_op_iget_wide_quick: /* 0xe4 */
-/* File: x86/op_iget_wide_quick.S */
/* iget-wide-quick vA, vB, offset@CCCC */
movzbl rINSTbl, %ecx # ecx <- BA
sarl $4, %ecx # ecx <- B
@@ -5802,7 +5187,6 @@
/* ------------------------------ */
.balign 128
.L_op_iget_object_quick: /* 0xe5 */
-/* File: x86/op_iget_object_quick.S */
/* For: iget-object-quick */
/* op vA, vB, offset@CCCC */
movzbl rINSTbl, %ecx # ecx <- BA
@@ -5824,7 +5208,6 @@
/* ------------------------------ */
.balign 128
.L_op_iput_quick: /* 0xe6 */
-/* File: x86/op_iput_quick.S */
/* For: iput-quick, iput-object-quick */
/* op vA, vB, offset@CCCC */
movzbl rINSTbl, %ecx # ecx <- BA
@@ -5841,7 +5224,6 @@
/* ------------------------------ */
.balign 128
.L_op_iput_wide_quick: /* 0xe7 */
-/* File: x86/op_iput_wide_quick.S */
/* iput-wide-quick vA, vB, offset@CCCC */
movzbl rINSTbl, %ecx # ecx<- BA
sarl $4, %ecx # ecx<- B
@@ -5858,7 +5240,6 @@
/* ------------------------------ */
.balign 128
.L_op_iput_object_quick: /* 0xe8 */
-/* File: x86/op_iput_object_quick.S */
EXPORT_PC
leal OFF_FP_SHADOWFRAME(rFP), %eax
movl %eax, OUT_ARG0(%esp)
@@ -5874,8 +5255,6 @@
/* ------------------------------ */
.balign 128
.L_op_invoke_virtual_quick: /* 0xe9 */
-/* File: x86/op_invoke_virtual_quick.S */
-/* File: x86/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -5901,12 +5280,9 @@
FETCH_INST
GOTO_NEXT
-
/* ------------------------------ */
.balign 128
.L_op_invoke_virtual_range_quick: /* 0xea */
-/* File: x86/op_invoke_virtual_range_quick.S */
-/* File: x86/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -5932,12 +5308,9 @@
FETCH_INST
GOTO_NEXT
-
/* ------------------------------ */
.balign 128
.L_op_iput_boolean_quick: /* 0xeb */
-/* File: x86/op_iput_boolean_quick.S */
-/* File: x86/op_iput_quick.S */
/* For: iput-quick, iput-object-quick */
/* op vA, vB, offset@CCCC */
movzbl rINSTbl, %ecx # ecx <- BA
@@ -5951,12 +5324,9 @@
movb rINSTbl, (%ecx,%eax,1)
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_iput_byte_quick: /* 0xec */
-/* File: x86/op_iput_byte_quick.S */
-/* File: x86/op_iput_quick.S */
/* For: iput-quick, iput-object-quick */
/* op vA, vB, offset@CCCC */
movzbl rINSTbl, %ecx # ecx <- BA
@@ -5970,12 +5340,9 @@
movb rINSTbl, (%ecx,%eax,1)
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_iput_char_quick: /* 0xed */
-/* File: x86/op_iput_char_quick.S */
-/* File: x86/op_iput_quick.S */
/* For: iput-quick, iput-object-quick */
/* op vA, vB, offset@CCCC */
movzbl rINSTbl, %ecx # ecx <- BA
@@ -5989,12 +5356,9 @@
movw rINSTw, (%ecx,%eax,1)
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_iput_short_quick: /* 0xee */
-/* File: x86/op_iput_short_quick.S */
-/* File: x86/op_iput_quick.S */
/* For: iput-quick, iput-object-quick */
/* op vA, vB, offset@CCCC */
movzbl rINSTbl, %ecx # ecx <- BA
@@ -6008,12 +5372,9 @@
movw rINSTw, (%ecx,%eax,1)
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_iget_boolean_quick: /* 0xef */
-/* File: x86/op_iget_boolean_quick.S */
-/* File: x86/op_iget_quick.S */
/* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick */
/* op vA, vB, offset@CCCC */
movzbl rINSTbl, %ecx # ecx <- BA
@@ -6027,12 +5388,9 @@
SET_VREG %eax, rINST # fp[A] <- value
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_iget_byte_quick: /* 0xf0 */
-/* File: x86/op_iget_byte_quick.S */
-/* File: x86/op_iget_quick.S */
/* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick */
/* op vA, vB, offset@CCCC */
movzbl rINSTbl, %ecx # ecx <- BA
@@ -6046,12 +5404,9 @@
SET_VREG %eax, rINST # fp[A] <- value
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_iget_char_quick: /* 0xf1 */
-/* File: x86/op_iget_char_quick.S */
-/* File: x86/op_iget_quick.S */
/* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick */
/* op vA, vB, offset@CCCC */
movzbl rINSTbl, %ecx # ecx <- BA
@@ -6065,12 +5420,9 @@
SET_VREG %eax, rINST # fp[A] <- value
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_iget_short_quick: /* 0xf2 */
-/* File: x86/op_iget_short_quick.S */
-/* File: x86/op_iget_quick.S */
/* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick */
/* op vA, vB, offset@CCCC */
movzbl rINSTbl, %ecx # ecx <- BA
@@ -6084,89 +5436,65 @@
SET_VREG %eax, rINST # fp[A] <- value
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_unused_f3: /* 0xf3 */
-/* File: x86/op_unused_f3.S */
-/* File: x86/unused.S */
/*
* Bail to reference interpreter to throw.
*/
jmp MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_f4: /* 0xf4 */
-/* File: x86/op_unused_f4.S */
-/* File: x86/unused.S */
/*
* Bail to reference interpreter to throw.
*/
jmp MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_f5: /* 0xf5 */
-/* File: x86/op_unused_f5.S */
-/* File: x86/unused.S */
/*
* Bail to reference interpreter to throw.
*/
jmp MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_f6: /* 0xf6 */
-/* File: x86/op_unused_f6.S */
-/* File: x86/unused.S */
/*
* Bail to reference interpreter to throw.
*/
jmp MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_f7: /* 0xf7 */
-/* File: x86/op_unused_f7.S */
-/* File: x86/unused.S */
/*
* Bail to reference interpreter to throw.
*/
jmp MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_f8: /* 0xf8 */
-/* File: x86/op_unused_f8.S */
-/* File: x86/unused.S */
/*
* Bail to reference interpreter to throw.
*/
jmp MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_f9: /* 0xf9 */
-/* File: x86/op_unused_f9.S */
-/* File: x86/unused.S */
/*
* Bail to reference interpreter to throw.
*/
jmp MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_invoke_polymorphic: /* 0xfa */
-/* File: x86/op_invoke_polymorphic.S */
-/* File: x86/invoke_polymorphic.S */
/*
* invoke-polymorphic handler wrapper.
*/
@@ -6192,12 +5520,9 @@
FETCH_INST
GOTO_NEXT
-
/* ------------------------------ */
.balign 128
.L_op_invoke_polymorphic_range: /* 0xfb */
-/* File: x86/op_invoke_polymorphic_range.S */
-/* File: x86/invoke_polymorphic.S */
/*
* invoke-polymorphic handler wrapper.
*/
@@ -6223,12 +5548,9 @@
FETCH_INST
GOTO_NEXT
-
/* ------------------------------ */
.balign 128
.L_op_invoke_custom: /* 0xfc */
-/* File: x86/op_invoke_custom.S */
-/* File: x86/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -6254,12 +5576,9 @@
FETCH_INST
GOTO_NEXT
-
/* ------------------------------ */
.balign 128
.L_op_invoke_custom_range: /* 0xfd */
-/* File: x86/op_invoke_custom_range.S */
-/* File: x86/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -6285,12 +5604,9 @@
FETCH_INST
GOTO_NEXT
-
/* ------------------------------ */
.balign 128
.L_op_const_method_handle: /* 0xfe */
-/* File: x86/op_const_method_handle.S */
-/* File: x86/const.S */
/* const/class vAA, type@BBBB */
/* const/method-handle vAA, method_handle@BBBB */
/* const/method-type vAA, proto@BBBB */
@@ -6310,12 +5626,9 @@
jnz MterpPossibleException
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_const_method_type: /* 0xff */
-/* File: x86/op_const_method_type.S */
-/* File: x86/const.S */
/* const/class vAA, type@BBBB */
/* const/method-handle vAA, method_handle@BBBB */
/* const/method-type vAA, proto@BBBB */
@@ -6335,23 +5648,13 @@
jnz MterpPossibleException
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
.balign 128
-/* File: x86/instruction_end.S */
OBJECT_TYPE(artMterpAsmInstructionEnd)
ASM_HIDDEN SYMBOL(artMterpAsmInstructionEnd)
.global SYMBOL(artMterpAsmInstructionEnd)
SYMBOL(artMterpAsmInstructionEnd):
-
-/*
- * ===========================================================================
- * Sister implementations
- * ===========================================================================
- */
-/* File: x86/instruction_start_sister.S */
-
OBJECT_TYPE(artMterpAsmSisterStart)
ASM_HIDDEN SYMBOL(artMterpAsmSisterStart)
.global SYMBOL(artMterpAsmSisterStart)
@@ -6359,25 +5662,19 @@
.balign 4
SYMBOL(artMterpAsmSisterStart):
-/* File: x86/instruction_end_sister.S */
-
OBJECT_TYPE(artMterpAsmSisterEnd)
ASM_HIDDEN SYMBOL(artMterpAsmSisterEnd)
.global SYMBOL(artMterpAsmSisterEnd)
SYMBOL(artMterpAsmSisterEnd):
-/* File: x86/instruction_start_alt.S */
-
OBJECT_TYPE(artMterpAsmAltInstructionStart)
ASM_HIDDEN SYMBOL(artMterpAsmAltInstructionStart)
.global SYMBOL(artMterpAsmAltInstructionStart)
.text
SYMBOL(artMterpAsmAltInstructionStart) = .L_ALT_op_nop
-
/* ------------------------------ */
.balign 128
.L_ALT_op_nop: /* 0x00 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6401,7 +5698,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move: /* 0x01 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6425,7 +5721,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_from16: /* 0x02 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6449,7 +5744,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_16: /* 0x03 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6473,7 +5767,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_wide: /* 0x04 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6497,7 +5790,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_wide_from16: /* 0x05 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6521,7 +5813,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_wide_16: /* 0x06 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6545,7 +5836,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_object: /* 0x07 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6569,7 +5859,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_object_from16: /* 0x08 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6593,7 +5882,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_object_16: /* 0x09 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6617,7 +5905,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_result: /* 0x0a */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6641,7 +5928,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_result_wide: /* 0x0b */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6665,7 +5951,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_result_object: /* 0x0c */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6689,7 +5974,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_exception: /* 0x0d */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6713,7 +5997,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_return_void: /* 0x0e */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6737,7 +6020,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_return: /* 0x0f */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6761,7 +6043,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_return_wide: /* 0x10 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6785,7 +6066,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_return_object: /* 0x11 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6809,7 +6089,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_4: /* 0x12 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6833,7 +6112,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_16: /* 0x13 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6857,7 +6135,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const: /* 0x14 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6881,7 +6158,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_high16: /* 0x15 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6905,7 +6181,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_wide_16: /* 0x16 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6929,7 +6204,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_wide_32: /* 0x17 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6953,7 +6227,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_wide: /* 0x18 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6977,7 +6250,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_wide_high16: /* 0x19 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7001,7 +6273,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_string: /* 0x1a */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7025,7 +6296,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_string_jumbo: /* 0x1b */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7049,7 +6319,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_class: /* 0x1c */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7073,7 +6342,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_monitor_enter: /* 0x1d */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7097,7 +6365,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_monitor_exit: /* 0x1e */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7121,7 +6388,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_check_cast: /* 0x1f */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7145,7 +6411,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_instance_of: /* 0x20 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7169,7 +6434,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_array_length: /* 0x21 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7193,7 +6457,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_new_instance: /* 0x22 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7217,7 +6480,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_new_array: /* 0x23 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7241,7 +6503,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_filled_new_array: /* 0x24 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7265,7 +6526,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_filled_new_array_range: /* 0x25 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7289,7 +6549,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_fill_array_data: /* 0x26 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7313,7 +6572,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_throw: /* 0x27 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7337,7 +6595,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_goto: /* 0x28 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7361,7 +6618,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_goto_16: /* 0x29 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7385,7 +6641,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_goto_32: /* 0x2a */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7409,7 +6664,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_packed_switch: /* 0x2b */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7433,7 +6687,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sparse_switch: /* 0x2c */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7457,7 +6710,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_cmpl_float: /* 0x2d */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7481,7 +6733,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_cmpg_float: /* 0x2e */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7505,7 +6756,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_cmpl_double: /* 0x2f */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7529,7 +6779,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_cmpg_double: /* 0x30 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7553,7 +6802,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_cmp_long: /* 0x31 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7577,7 +6825,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_eq: /* 0x32 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7601,7 +6848,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_ne: /* 0x33 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7625,7 +6871,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_lt: /* 0x34 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7649,7 +6894,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_ge: /* 0x35 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7673,7 +6917,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_gt: /* 0x36 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7697,7 +6940,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_le: /* 0x37 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7721,7 +6963,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_eqz: /* 0x38 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7745,7 +6986,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_nez: /* 0x39 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7769,7 +7009,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_ltz: /* 0x3a */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7793,7 +7032,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_gez: /* 0x3b */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7817,7 +7055,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_gtz: /* 0x3c */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7841,7 +7078,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_lez: /* 0x3d */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7865,7 +7101,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_3e: /* 0x3e */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7889,7 +7124,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_3f: /* 0x3f */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7913,7 +7147,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_40: /* 0x40 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7937,7 +7170,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_41: /* 0x41 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7961,7 +7193,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_42: /* 0x42 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7985,7 +7216,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_43: /* 0x43 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8009,7 +7239,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aget: /* 0x44 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8033,7 +7262,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aget_wide: /* 0x45 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8057,7 +7285,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aget_object: /* 0x46 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8081,7 +7308,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aget_boolean: /* 0x47 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8105,7 +7331,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aget_byte: /* 0x48 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8129,7 +7354,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aget_char: /* 0x49 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8153,7 +7377,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aget_short: /* 0x4a */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8177,7 +7400,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aput: /* 0x4b */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8201,7 +7423,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aput_wide: /* 0x4c */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8225,7 +7446,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aput_object: /* 0x4d */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8249,7 +7469,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aput_boolean: /* 0x4e */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8273,7 +7492,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aput_byte: /* 0x4f */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8297,7 +7515,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aput_char: /* 0x50 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8321,7 +7538,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aput_short: /* 0x51 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8345,7 +7561,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget: /* 0x52 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8369,7 +7584,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_wide: /* 0x53 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8393,7 +7607,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_object: /* 0x54 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8417,7 +7630,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_boolean: /* 0x55 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8441,7 +7653,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_byte: /* 0x56 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8465,7 +7676,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_char: /* 0x57 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8489,7 +7699,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_short: /* 0x58 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8513,7 +7722,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput: /* 0x59 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8537,7 +7745,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_wide: /* 0x5a */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8561,7 +7768,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_object: /* 0x5b */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8585,7 +7791,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_boolean: /* 0x5c */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8609,7 +7814,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_byte: /* 0x5d */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8633,7 +7837,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_char: /* 0x5e */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8657,7 +7860,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_short: /* 0x5f */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8681,7 +7883,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sget: /* 0x60 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8705,7 +7906,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sget_wide: /* 0x61 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8729,7 +7929,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sget_object: /* 0x62 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8753,7 +7952,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sget_boolean: /* 0x63 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8777,7 +7975,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sget_byte: /* 0x64 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8801,7 +7998,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sget_char: /* 0x65 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8825,7 +8021,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sget_short: /* 0x66 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8849,7 +8044,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sput: /* 0x67 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8873,7 +8067,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sput_wide: /* 0x68 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8897,7 +8090,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sput_object: /* 0x69 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8921,7 +8113,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sput_boolean: /* 0x6a */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8945,7 +8136,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sput_byte: /* 0x6b */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8969,7 +8159,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sput_char: /* 0x6c */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8993,7 +8182,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sput_short: /* 0x6d */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9017,7 +8205,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_virtual: /* 0x6e */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9041,7 +8228,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_super: /* 0x6f */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9065,7 +8251,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_direct: /* 0x70 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9089,7 +8274,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_static: /* 0x71 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9113,7 +8297,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_interface: /* 0x72 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9137,7 +8320,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_return_void_no_barrier: /* 0x73 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9161,7 +8343,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_virtual_range: /* 0x74 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9185,7 +8366,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_super_range: /* 0x75 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9209,7 +8389,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_direct_range: /* 0x76 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9233,7 +8412,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_static_range: /* 0x77 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9257,7 +8435,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_interface_range: /* 0x78 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9281,7 +8458,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_79: /* 0x79 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9305,7 +8481,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_7a: /* 0x7a */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9329,7 +8504,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_neg_int: /* 0x7b */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9353,7 +8527,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_not_int: /* 0x7c */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9377,7 +8550,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_neg_long: /* 0x7d */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9401,7 +8573,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_not_long: /* 0x7e */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9425,7 +8596,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_neg_float: /* 0x7f */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9449,7 +8619,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_neg_double: /* 0x80 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9473,7 +8642,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_int_to_long: /* 0x81 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9497,7 +8665,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_int_to_float: /* 0x82 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9521,7 +8688,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_int_to_double: /* 0x83 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9545,7 +8711,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_long_to_int: /* 0x84 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9569,7 +8734,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_long_to_float: /* 0x85 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9593,7 +8757,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_long_to_double: /* 0x86 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9617,7 +8780,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_float_to_int: /* 0x87 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9641,7 +8803,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_float_to_long: /* 0x88 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9665,7 +8826,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_float_to_double: /* 0x89 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9689,7 +8849,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_double_to_int: /* 0x8a */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9713,7 +8872,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_double_to_long: /* 0x8b */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9737,7 +8895,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_double_to_float: /* 0x8c */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9761,7 +8918,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_int_to_byte: /* 0x8d */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9785,7 +8941,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_int_to_char: /* 0x8e */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9809,7 +8964,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_int_to_short: /* 0x8f */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9833,7 +8987,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_add_int: /* 0x90 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9857,7 +9010,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sub_int: /* 0x91 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9881,7 +9033,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_mul_int: /* 0x92 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9905,7 +9056,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_div_int: /* 0x93 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9929,7 +9079,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rem_int: /* 0x94 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9953,7 +9102,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_and_int: /* 0x95 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9977,7 +9125,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_or_int: /* 0x96 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10001,7 +9148,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_xor_int: /* 0x97 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10025,7 +9171,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_shl_int: /* 0x98 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10049,7 +9194,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_shr_int: /* 0x99 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10073,7 +9217,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_ushr_int: /* 0x9a */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10097,7 +9240,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_add_long: /* 0x9b */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10121,7 +9263,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sub_long: /* 0x9c */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10145,7 +9286,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_mul_long: /* 0x9d */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10169,7 +9309,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_div_long: /* 0x9e */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10193,7 +9332,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rem_long: /* 0x9f */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10217,7 +9355,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_and_long: /* 0xa0 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10241,7 +9378,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_or_long: /* 0xa1 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10265,7 +9401,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_xor_long: /* 0xa2 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10289,7 +9424,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_shl_long: /* 0xa3 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10313,7 +9447,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_shr_long: /* 0xa4 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10337,7 +9470,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_ushr_long: /* 0xa5 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10361,7 +9493,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_add_float: /* 0xa6 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10385,7 +9516,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sub_float: /* 0xa7 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10409,7 +9539,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_mul_float: /* 0xa8 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10433,7 +9562,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_div_float: /* 0xa9 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10457,7 +9585,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rem_float: /* 0xaa */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10481,7 +9608,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_add_double: /* 0xab */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10505,7 +9631,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sub_double: /* 0xac */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10529,7 +9654,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_mul_double: /* 0xad */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10553,7 +9677,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_div_double: /* 0xae */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10577,7 +9700,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rem_double: /* 0xaf */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10601,7 +9723,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_add_int_2addr: /* 0xb0 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10625,7 +9746,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sub_int_2addr: /* 0xb1 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10649,7 +9769,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_mul_int_2addr: /* 0xb2 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10673,7 +9792,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_div_int_2addr: /* 0xb3 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10697,7 +9815,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rem_int_2addr: /* 0xb4 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10721,7 +9838,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_and_int_2addr: /* 0xb5 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10745,7 +9861,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_or_int_2addr: /* 0xb6 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10769,7 +9884,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_xor_int_2addr: /* 0xb7 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10793,7 +9907,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_shl_int_2addr: /* 0xb8 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10817,7 +9930,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_shr_int_2addr: /* 0xb9 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10841,7 +9953,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_ushr_int_2addr: /* 0xba */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10865,7 +9976,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_add_long_2addr: /* 0xbb */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10889,7 +9999,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sub_long_2addr: /* 0xbc */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10913,7 +10022,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_mul_long_2addr: /* 0xbd */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10937,7 +10045,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_div_long_2addr: /* 0xbe */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10961,7 +10068,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rem_long_2addr: /* 0xbf */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10985,7 +10091,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_and_long_2addr: /* 0xc0 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11009,7 +10114,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_or_long_2addr: /* 0xc1 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11033,7 +10137,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_xor_long_2addr: /* 0xc2 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11057,7 +10160,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_shl_long_2addr: /* 0xc3 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11081,7 +10183,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_shr_long_2addr: /* 0xc4 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11105,7 +10206,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_ushr_long_2addr: /* 0xc5 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11129,7 +10229,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_add_float_2addr: /* 0xc6 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11153,7 +10252,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sub_float_2addr: /* 0xc7 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11177,7 +10275,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_mul_float_2addr: /* 0xc8 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11201,7 +10298,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_div_float_2addr: /* 0xc9 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11225,7 +10321,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rem_float_2addr: /* 0xca */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11249,7 +10344,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_add_double_2addr: /* 0xcb */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11273,7 +10367,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sub_double_2addr: /* 0xcc */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11297,7 +10390,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_mul_double_2addr: /* 0xcd */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11321,7 +10413,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_div_double_2addr: /* 0xce */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11345,7 +10436,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rem_double_2addr: /* 0xcf */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11369,7 +10459,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_add_int_lit16: /* 0xd0 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11393,7 +10482,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rsub_int: /* 0xd1 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11417,7 +10505,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_mul_int_lit16: /* 0xd2 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11441,7 +10528,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_div_int_lit16: /* 0xd3 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11465,7 +10551,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rem_int_lit16: /* 0xd4 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11489,7 +10574,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_and_int_lit16: /* 0xd5 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11513,7 +10597,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_or_int_lit16: /* 0xd6 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11537,7 +10620,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_xor_int_lit16: /* 0xd7 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11561,7 +10643,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_add_int_lit8: /* 0xd8 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11585,7 +10666,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rsub_int_lit8: /* 0xd9 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11609,7 +10689,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_mul_int_lit8: /* 0xda */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11633,7 +10712,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_div_int_lit8: /* 0xdb */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11657,7 +10735,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rem_int_lit8: /* 0xdc */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11681,7 +10758,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_and_int_lit8: /* 0xdd */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11705,7 +10781,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_or_int_lit8: /* 0xde */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11729,7 +10804,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_xor_int_lit8: /* 0xdf */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11753,7 +10827,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_shl_int_lit8: /* 0xe0 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11777,7 +10850,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_shr_int_lit8: /* 0xe1 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11801,7 +10873,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_ushr_int_lit8: /* 0xe2 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11825,7 +10896,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_quick: /* 0xe3 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11849,7 +10919,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_wide_quick: /* 0xe4 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11873,7 +10942,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_object_quick: /* 0xe5 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11897,7 +10965,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_quick: /* 0xe6 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11921,7 +10988,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_wide_quick: /* 0xe7 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11945,7 +11011,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_object_quick: /* 0xe8 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11969,7 +11034,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_virtual_quick: /* 0xe9 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11993,7 +11057,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_virtual_range_quick: /* 0xea */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -12017,7 +11080,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_boolean_quick: /* 0xeb */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -12041,7 +11103,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_byte_quick: /* 0xec */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -12065,7 +11126,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_char_quick: /* 0xed */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -12089,7 +11149,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_short_quick: /* 0xee */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -12113,7 +11172,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_boolean_quick: /* 0xef */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -12137,7 +11195,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_byte_quick: /* 0xf0 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -12161,7 +11218,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_char_quick: /* 0xf1 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -12185,7 +11241,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_short_quick: /* 0xf2 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -12209,7 +11264,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_f3: /* 0xf3 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -12233,7 +11287,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_f4: /* 0xf4 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -12257,7 +11310,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_f5: /* 0xf5 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -12281,7 +11333,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_f6: /* 0xf6 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -12305,7 +11356,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_f7: /* 0xf7 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -12329,7 +11379,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_f8: /* 0xf8 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -12353,7 +11402,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_f9: /* 0xf9 */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -12377,7 +11425,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_polymorphic: /* 0xfa */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -12401,7 +11448,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_polymorphic_range: /* 0xfb */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -12425,7 +11471,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_custom: /* 0xfc */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -12449,7 +11494,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_custom_range: /* 0xfd */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -12473,7 +11517,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_method_handle: /* 0xfe */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -12497,7 +11540,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_method_type: /* 0xff */
-/* File: x86/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -12519,14 +11561,11 @@
jmp .L_op_nop+(255*128)
.balign 128
-/* File: x86/instruction_end_alt.S */
OBJECT_TYPE(artMterpAsmAltInstructionEnd)
ASM_HIDDEN SYMBOL(artMterpAsmAltInstructionEnd)
.global SYMBOL(artMterpAsmAltInstructionEnd)
SYMBOL(artMterpAsmAltInstructionEnd):
-
-/* File: x86/footer.S */
/*
* ===========================================================================
* Common subroutines and data
@@ -12852,4 +11891,3 @@
ret
.cfi_endproc
SIZE(ExecuteMterpImpl,ExecuteMterpImpl)
-
diff --git a/runtime/interpreter/mterp/out/mterp_x86_64.S b/runtime/interpreter/mterp/out/mterp_x86_64.S
index 6d8bb4c..1c45059 100644
--- a/runtime/interpreter/mterp/out/mterp_x86_64.S
+++ b/runtime/interpreter/mterp/out/mterp_x86_64.S
@@ -1,10 +1,4 @@
-/*
- * This file was generated automatically by gen-mterp.py for 'x86_64'.
- *
- * --> DO NOT EDIT <--
- */
-
-/* File: x86_64/header.S */
+/* DO NOT EDIT: This file was generated by gen-mterp.py. */
/*
* Copyright (C) 2016 The Android Open Source Project
*
@@ -307,8 +301,6 @@
movl MACRO_LITERAL(0), (rREFS,\_vreg,4)
movl MACRO_LITERAL(0), 4(rREFS,\_vreg,4)
.endm
-
-/* File: x86_64/entry.S */
/*
* Copyright (C) 2016 The Android Open Source Project
*
@@ -389,24 +381,19 @@
GOTO_NEXT
/* NOTE: no fallthrough */
-/* File: x86_64/instruction_start.S */
-
OBJECT_TYPE(artMterpAsmInstructionStart)
ASM_HIDDEN SYMBOL(artMterpAsmInstructionStart)
.global SYMBOL(artMterpAsmInstructionStart)
SYMBOL(artMterpAsmInstructionStart) = .L_op_nop
.text
-
/* ------------------------------ */
.balign 128
.L_op_nop: /* 0x00 */
-/* File: x86_64/op_nop.S */
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
/* ------------------------------ */
.balign 128
.L_op_move: /* 0x01 */
-/* File: x86_64/op_move.S */
/* for move, move-object, long-to-int */
/* op vA, vB */
movl rINST, %eax # eax <- BA
@@ -423,7 +410,6 @@
/* ------------------------------ */
.balign 128
.L_op_move_from16: /* 0x02 */
-/* File: x86_64/op_move_from16.S */
/* for: move/from16, move-object/from16 */
/* op vAA, vBBBB */
movzwq 2(rPC), %rax # eax <- BBBB
@@ -438,7 +424,6 @@
/* ------------------------------ */
.balign 128
.L_op_move_16: /* 0x03 */
-/* File: x86_64/op_move_16.S */
/* for: move/16, move-object/16 */
/* op vAAAA, vBBBB */
movzwq 4(rPC), %rcx # ecx <- BBBB
@@ -454,7 +439,6 @@
/* ------------------------------ */
.balign 128
.L_op_move_wide: /* 0x04 */
-/* File: x86_64/op_move_wide.S */
/* move-wide vA, vB */
/* NOTE: regs can overlap, e.g. "move v6,v7" or "move v7,v6" */
movl rINST, %ecx # ecx <- BA
@@ -467,7 +451,6 @@
/* ------------------------------ */
.balign 128
.L_op_move_wide_from16: /* 0x05 */
-/* File: x86_64/op_move_wide_from16.S */
/* move-wide/from16 vAA, vBBBB */
/* NOTE: regs can overlap, e.g. "move v6,v7" or "move v7,v6" */
movzwl 2(rPC), %ecx # ecx <- BBBB
@@ -478,7 +461,6 @@
/* ------------------------------ */
.balign 128
.L_op_move_wide_16: /* 0x06 */
-/* File: x86_64/op_move_wide_16.S */
/* move-wide/16 vAAAA, vBBBB */
/* NOTE: regs can overlap, e.g. "move v6,v7" or "move v7,v6" */
movzwq 4(rPC), %rcx # ecx<- BBBB
@@ -490,8 +472,6 @@
/* ------------------------------ */
.balign 128
.L_op_move_object: /* 0x07 */
-/* File: x86_64/op_move_object.S */
-/* File: x86_64/op_move.S */
/* for move, move-object, long-to-int */
/* op vA, vB */
movl rINST, %eax # eax <- BA
@@ -505,12 +485,9 @@
.endif
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_move_object_from16: /* 0x08 */
-/* File: x86_64/op_move_object_from16.S */
-/* File: x86_64/op_move_from16.S */
/* for: move/from16, move-object/from16 */
/* op vAA, vBBBB */
movzwq 2(rPC), %rax # eax <- BBBB
@@ -522,12 +499,9 @@
.endif
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_move_object_16: /* 0x09 */
-/* File: x86_64/op_move_object_16.S */
-/* File: x86_64/op_move_16.S */
/* for: move/16, move-object/16 */
/* op vAAAA, vBBBB */
movzwq 4(rPC), %rcx # ecx <- BBBB
@@ -540,11 +514,9 @@
.endif
ADVANCE_PC_FETCH_AND_GOTO_NEXT 3
-
/* ------------------------------ */
.balign 128
.L_op_move_result: /* 0x0a */
-/* File: x86_64/op_move_result.S */
/* for: move-result, move-result-object */
/* op vAA */
movq OFF_FP_RESULT_REGISTER(rFP), %rax # get pointer to result JType.
@@ -559,7 +531,6 @@
/* ------------------------------ */
.balign 128
.L_op_move_result_wide: /* 0x0b */
-/* File: x86_64/op_move_result_wide.S */
/* move-result-wide vAA */
movq OFF_FP_RESULT_REGISTER(rFP), %rax # get pointer to result JType.
movq (%rax), %rdx # Get wide
@@ -569,8 +540,6 @@
/* ------------------------------ */
.balign 128
.L_op_move_result_object: /* 0x0c */
-/* File: x86_64/op_move_result_object.S */
-/* File: x86_64/op_move_result.S */
/* for: move-result, move-result-object */
/* op vAA */
movq OFF_FP_RESULT_REGISTER(rFP), %rax # get pointer to result JType.
@@ -582,11 +551,9 @@
.endif
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_move_exception: /* 0x0d */
-/* File: x86_64/op_move_exception.S */
/* move-exception vAA */
movq rSELF, %rcx
movl THREAD_EXCEPTION_OFFSET(%rcx), %eax
@@ -597,7 +564,6 @@
/* ------------------------------ */
.balign 128
.L_op_return_void: /* 0x0e */
-/* File: x86_64/op_return_void.S */
.extern MterpThreadFenceForConstructor
call SYMBOL(MterpThreadFenceForConstructor)
movq rSELF, OUT_ARG0
@@ -611,7 +577,6 @@
/* ------------------------------ */
.balign 128
.L_op_return: /* 0x0f */
-/* File: x86_64/op_return.S */
/*
* Return a 32-bit value.
*
@@ -631,7 +596,6 @@
/* ------------------------------ */
.balign 128
.L_op_return_wide: /* 0x10 */
-/* File: x86_64/op_return_wide.S */
/*
* Return a 64-bit value.
*/
@@ -649,8 +613,6 @@
/* ------------------------------ */
.balign 128
.L_op_return_object: /* 0x11 */
-/* File: x86_64/op_return_object.S */
-/* File: x86_64/op_return.S */
/*
* Return a 32-bit value.
*
@@ -667,11 +629,9 @@
GET_VREG %eax, rINSTq # eax <- vAA
jmp MterpReturn
-
/* ------------------------------ */
.balign 128
.L_op_const_4: /* 0x12 */
-/* File: x86_64/op_const_4.S */
/* const/4 vA, #+B */
movsbl rINSTbl, %eax # eax <-ssssssBx
movl $0xf, rINST
@@ -683,7 +643,6 @@
/* ------------------------------ */
.balign 128
.L_op_const_16: /* 0x13 */
-/* File: x86_64/op_const_16.S */
/* const/16 vAA, #+BBBB */
movswl 2(rPC), %ecx # ecx <- ssssBBBB
SET_VREG %ecx, rINSTq # vAA <- ssssBBBB
@@ -692,7 +651,6 @@
/* ------------------------------ */
.balign 128
.L_op_const: /* 0x14 */
-/* File: x86_64/op_const.S */
/* const vAA, #+BBBBbbbb */
movl 2(rPC), %eax # grab all 32 bits at once
SET_VREG %eax, rINSTq # vAA<- eax
@@ -701,7 +659,6 @@
/* ------------------------------ */
.balign 128
.L_op_const_high16: /* 0x15 */
-/* File: x86_64/op_const_high16.S */
/* const/high16 vAA, #+BBBB0000 */
movzwl 2(rPC), %eax # eax <- 0000BBBB
sall $16, %eax # eax <- BBBB0000
@@ -711,7 +668,6 @@
/* ------------------------------ */
.balign 128
.L_op_const_wide_16: /* 0x16 */
-/* File: x86_64/op_const_wide_16.S */
/* const-wide/16 vAA, #+BBBB */
movswq 2(rPC), %rax # rax <- ssssBBBB
SET_WIDE_VREG %rax, rINSTq # store
@@ -720,7 +676,6 @@
/* ------------------------------ */
.balign 128
.L_op_const_wide_32: /* 0x17 */
-/* File: x86_64/op_const_wide_32.S */
/* const-wide/32 vAA, #+BBBBbbbb */
movslq 2(rPC), %rax # eax <- ssssssssBBBBbbbb
SET_WIDE_VREG %rax, rINSTq # store
@@ -729,7 +684,6 @@
/* ------------------------------ */
.balign 128
.L_op_const_wide: /* 0x18 */
-/* File: x86_64/op_const_wide.S */
/* const-wide vAA, #+HHHHhhhhBBBBbbbb */
movq 2(rPC), %rax # rax <- HHHHhhhhBBBBbbbb
SET_WIDE_VREG %rax, rINSTq
@@ -738,7 +692,6 @@
/* ------------------------------ */
.balign 128
.L_op_const_wide_high16: /* 0x19 */
-/* File: x86_64/op_const_wide_high16.S */
/* const-wide/high16 vAA, #+BBBB000000000000 */
movzwq 2(rPC), %rax # eax <- 0000BBBB
salq $48, %rax # eax <- BBBB0000
@@ -748,8 +701,6 @@
/* ------------------------------ */
.balign 128
.L_op_const_string: /* 0x1a */
-/* File: x86_64/op_const_string.S */
-/* File: x86_64/const.S */
/* const/class vAA, type@BBBB */
/* const/method-handle vAA, method_handle@BBBB */
/* const/method-type vAA, proto@BBBB */
@@ -765,11 +716,9 @@
jnz MterpPossibleException
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_const_string_jumbo: /* 0x1b */
-/* File: x86_64/op_const_string_jumbo.S */
/* const/string vAA, String@BBBBBBBB */
EXPORT_PC
movl 2(rPC), OUT_32_ARG0 # OUT_32_ARG0 <- BBBB
@@ -784,8 +733,6 @@
/* ------------------------------ */
.balign 128
.L_op_const_class: /* 0x1c */
-/* File: x86_64/op_const_class.S */
-/* File: x86_64/const.S */
/* const/class vAA, type@BBBB */
/* const/method-handle vAA, method_handle@BBBB */
/* const/method-type vAA, proto@BBBB */
@@ -801,11 +748,9 @@
jnz MterpPossibleException
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_monitor_enter: /* 0x1d */
-/* File: x86_64/op_monitor_enter.S */
/*
* Synchronize on an object.
*/
@@ -821,7 +766,6 @@
/* ------------------------------ */
.balign 128
.L_op_monitor_exit: /* 0x1e */
-/* File: x86_64/op_monitor_exit.S */
/*
* Unlock an object.
*
@@ -841,7 +785,6 @@
/* ------------------------------ */
.balign 128
.L_op_check_cast: /* 0x1f */
-/* File: x86_64/op_check_cast.S */
/*
* Check to see if a cast from one class to another is allowed.
*/
@@ -859,7 +802,6 @@
/* ------------------------------ */
.balign 128
.L_op_instance_of: /* 0x20 */
-/* File: x86_64/op_instance_of.S */
/*
* Check to see if an object reference is an instance of a class.
*
@@ -886,7 +828,6 @@
/* ------------------------------ */
.balign 128
.L_op_array_length: /* 0x21 */
-/* File: x86_64/op_array_length.S */
/*
* Return the length of an array.
*/
@@ -903,7 +844,6 @@
/* ------------------------------ */
.balign 128
.L_op_new_instance: /* 0x22 */
-/* File: x86_64/op_new_instance.S */
/*
* Create a new instance of a class.
*/
@@ -921,7 +861,6 @@
/* ------------------------------ */
.balign 128
.L_op_new_array: /* 0x23 */
-/* File: x86_64/op_new_array.S */
/*
* Allocate an array of objects, specified with the array class
* and a count.
@@ -944,7 +883,6 @@
/* ------------------------------ */
.balign 128
.L_op_filled_new_array: /* 0x24 */
-/* File: x86_64/op_filled_new_array.S */
/*
* Create a new array with elements filled from registers.
*
@@ -965,8 +903,6 @@
/* ------------------------------ */
.balign 128
.L_op_filled_new_array_range: /* 0x25 */
-/* File: x86_64/op_filled_new_array_range.S */
-/* File: x86_64/op_filled_new_array.S */
/*
* Create a new array with elements filled from registers.
*
@@ -984,11 +920,9 @@
jz MterpPossibleException
ADVANCE_PC_FETCH_AND_GOTO_NEXT 3
-
/* ------------------------------ */
.balign 128
.L_op_fill_array_data: /* 0x26 */
-/* File: x86_64/op_fill_array_data.S */
/* fill-array-data vAA, +BBBBBBBB */
EXPORT_PC
movslq 2(rPC), %rcx # rcx <- ssssssssBBBBbbbb
@@ -1002,7 +936,6 @@
/* ------------------------------ */
.balign 128
.L_op_throw: /* 0x27 */
-/* File: x86_64/op_throw.S */
/*
* Throw an exception object in the current thread.
*/
@@ -1018,7 +951,6 @@
/* ------------------------------ */
.balign 128
.L_op_goto: /* 0x28 */
-/* File: x86_64/op_goto.S */
/*
* Unconditional branch, 8-bit offset.
*
@@ -1033,7 +965,6 @@
/* ------------------------------ */
.balign 128
.L_op_goto_16: /* 0x29 */
-/* File: x86_64/op_goto_16.S */
/*
* Unconditional branch, 16-bit offset.
*
@@ -1048,7 +979,6 @@
/* ------------------------------ */
.balign 128
.L_op_goto_32: /* 0x2a */
-/* File: x86_64/op_goto_32.S */
/*
* Unconditional branch, 32-bit offset.
*
@@ -1066,7 +996,6 @@
/* ------------------------------ */
.balign 128
.L_op_packed_switch: /* 0x2b */
-/* File: x86_64/op_packed_switch.S */
/*
* Handle a packed-switch or sparse-switch instruction. In both cases
* we decode it and hand it off to a helper function.
@@ -1088,8 +1017,6 @@
/* ------------------------------ */
.balign 128
.L_op_sparse_switch: /* 0x2c */
-/* File: x86_64/op_sparse_switch.S */
-/* File: x86_64/op_packed_switch.S */
/*
* Handle a packed-switch or sparse-switch instruction. In both cases
* we decode it and hand it off to a helper function.
@@ -1108,12 +1035,9 @@
movslq %eax, rINSTq
jmp MterpCommonTakenBranch
-
/* ------------------------------ */
.balign 128
.L_op_cmpl_float: /* 0x2d */
-/* File: x86_64/op_cmpl_float.S */
-/* File: x86_64/fpcmp.S */
/*
* Compare two floating-point values. Puts 0, 1, or -1 into the
* destination register based on the results of the comparison.
@@ -1149,12 +1073,9 @@
SET_VREG %eax, rINSTq
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_cmpg_float: /* 0x2e */
-/* File: x86_64/op_cmpg_float.S */
-/* File: x86_64/fpcmp.S */
/*
* Compare two floating-point values. Puts 0, 1, or -1 into the
* destination register based on the results of the comparison.
@@ -1190,12 +1111,9 @@
SET_VREG %eax, rINSTq
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_cmpl_double: /* 0x2f */
-/* File: x86_64/op_cmpl_double.S */
-/* File: x86_64/fpcmp.S */
/*
* Compare two floating-point values. Puts 0, 1, or -1 into the
* destination register based on the results of the comparison.
@@ -1231,12 +1149,9 @@
SET_VREG %eax, rINSTq
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_cmpg_double: /* 0x30 */
-/* File: x86_64/op_cmpg_double.S */
-/* File: x86_64/fpcmp.S */
/*
* Compare two floating-point values. Puts 0, 1, or -1 into the
* destination register based on the results of the comparison.
@@ -1272,11 +1187,9 @@
SET_VREG %eax, rINSTq
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_cmp_long: /* 0x31 */
-/* File: x86_64/op_cmp_long.S */
/*
* Compare two 64-bit values. Puts 0, 1, or -1 into the destination
* register based on the results of the comparison.
@@ -1298,8 +1211,6 @@
/* ------------------------------ */
.balign 128
.L_op_if_eq: /* 0x32 */
-/* File: x86_64/op_if_eq.S */
-/* File: x86_64/bincmp.S */
/*
* Generic two-operand compare-and-branch operation. Provide a "revcmp"
* fragment that specifies the *reverse* comparison to perform, e.g.
@@ -1322,12 +1233,9 @@
je .L_check_not_taken_osr
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_if_ne: /* 0x33 */
-/* File: x86_64/op_if_ne.S */
-/* File: x86_64/bincmp.S */
/*
* Generic two-operand compare-and-branch operation. Provide a "revcmp"
* fragment that specifies the *reverse* comparison to perform, e.g.
@@ -1350,12 +1258,9 @@
je .L_check_not_taken_osr
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_if_lt: /* 0x34 */
-/* File: x86_64/op_if_lt.S */
-/* File: x86_64/bincmp.S */
/*
* Generic two-operand compare-and-branch operation. Provide a "revcmp"
* fragment that specifies the *reverse* comparison to perform, e.g.
@@ -1378,12 +1283,9 @@
je .L_check_not_taken_osr
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_if_ge: /* 0x35 */
-/* File: x86_64/op_if_ge.S */
-/* File: x86_64/bincmp.S */
/*
* Generic two-operand compare-and-branch operation. Provide a "revcmp"
* fragment that specifies the *reverse* comparison to perform, e.g.
@@ -1406,12 +1308,9 @@
je .L_check_not_taken_osr
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_if_gt: /* 0x36 */
-/* File: x86_64/op_if_gt.S */
-/* File: x86_64/bincmp.S */
/*
* Generic two-operand compare-and-branch operation. Provide a "revcmp"
* fragment that specifies the *reverse* comparison to perform, e.g.
@@ -1434,12 +1333,9 @@
je .L_check_not_taken_osr
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_if_le: /* 0x37 */
-/* File: x86_64/op_if_le.S */
-/* File: x86_64/bincmp.S */
/*
* Generic two-operand compare-and-branch operation. Provide a "revcmp"
* fragment that specifies the *reverse* comparison to perform, e.g.
@@ -1462,12 +1358,9 @@
je .L_check_not_taken_osr
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_if_eqz: /* 0x38 */
-/* File: x86_64/op_if_eqz.S */
-/* File: x86_64/zcmp.S */
/*
* Generic one-operand compare-and-branch operation. Provide a "revcmp"
* fragment that specifies the *reverse* comparison to perform, e.g.
@@ -1486,12 +1379,9 @@
je .L_check_not_taken_osr
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_if_nez: /* 0x39 */
-/* File: x86_64/op_if_nez.S */
-/* File: x86_64/zcmp.S */
/*
* Generic one-operand compare-and-branch operation. Provide a "revcmp"
* fragment that specifies the *reverse* comparison to perform, e.g.
@@ -1510,12 +1400,9 @@
je .L_check_not_taken_osr
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_if_ltz: /* 0x3a */
-/* File: x86_64/op_if_ltz.S */
-/* File: x86_64/zcmp.S */
/*
* Generic one-operand compare-and-branch operation. Provide a "revcmp"
* fragment that specifies the *reverse* comparison to perform, e.g.
@@ -1534,12 +1421,9 @@
je .L_check_not_taken_osr
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_if_gez: /* 0x3b */
-/* File: x86_64/op_if_gez.S */
-/* File: x86_64/zcmp.S */
/*
* Generic one-operand compare-and-branch operation. Provide a "revcmp"
* fragment that specifies the *reverse* comparison to perform, e.g.
@@ -1558,12 +1442,9 @@
je .L_check_not_taken_osr
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_if_gtz: /* 0x3c */
-/* File: x86_64/op_if_gtz.S */
-/* File: x86_64/zcmp.S */
/*
* Generic one-operand compare-and-branch operation. Provide a "revcmp"
* fragment that specifies the *reverse* comparison to perform, e.g.
@@ -1582,12 +1463,9 @@
je .L_check_not_taken_osr
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_if_lez: /* 0x3d */
-/* File: x86_64/op_if_lez.S */
-/* File: x86_64/zcmp.S */
/*
* Generic one-operand compare-and-branch operation. Provide a "revcmp"
* fragment that specifies the *reverse* comparison to perform, e.g.
@@ -1606,77 +1484,57 @@
je .L_check_not_taken_osr
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_unused_3e: /* 0x3e */
-/* File: x86_64/op_unused_3e.S */
-/* File: x86_64/unused.S */
/*
* Bail to reference interpreter to throw.
*/
jmp MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_3f: /* 0x3f */
-/* File: x86_64/op_unused_3f.S */
-/* File: x86_64/unused.S */
/*
* Bail to reference interpreter to throw.
*/
jmp MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_40: /* 0x40 */
-/* File: x86_64/op_unused_40.S */
-/* File: x86_64/unused.S */
/*
* Bail to reference interpreter to throw.
*/
jmp MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_41: /* 0x41 */
-/* File: x86_64/op_unused_41.S */
-/* File: x86_64/unused.S */
/*
* Bail to reference interpreter to throw.
*/
jmp MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_42: /* 0x42 */
-/* File: x86_64/op_unused_42.S */
-/* File: x86_64/unused.S */
/*
* Bail to reference interpreter to throw.
*/
jmp MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_43: /* 0x43 */
-/* File: x86_64/op_unused_43.S */
-/* File: x86_64/unused.S */
/*
* Bail to reference interpreter to throw.
*/
jmp MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_aget: /* 0x44 */
-/* File: x86_64/op_aget.S */
/*
* Array get, 32 bits or less. vAA <- vBB[vCC].
*
@@ -1704,8 +1562,6 @@
/* ------------------------------ */
.balign 128
.L_op_aget_wide: /* 0x45 */
-/* File: x86_64/op_aget_wide.S */
-/* File: x86_64/op_aget.S */
/*
* Array get, 32 bits or less. vAA <- vBB[vCC].
*
@@ -1730,11 +1586,9 @@
.endif
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_aget_object: /* 0x46 */
-/* File: x86_64/op_aget_object.S */
/*
* Array object get. vAA <- vBB[vCC].
*
@@ -1756,8 +1610,6 @@
/* ------------------------------ */
.balign 128
.L_op_aget_boolean: /* 0x47 */
-/* File: x86_64/op_aget_boolean.S */
-/* File: x86_64/op_aget.S */
/*
* Array get, 32 bits or less. vAA <- vBB[vCC].
*
@@ -1782,12 +1634,9 @@
.endif
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_aget_byte: /* 0x48 */
-/* File: x86_64/op_aget_byte.S */
-/* File: x86_64/op_aget.S */
/*
* Array get, 32 bits or less. vAA <- vBB[vCC].
*
@@ -1812,12 +1661,9 @@
.endif
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_aget_char: /* 0x49 */
-/* File: x86_64/op_aget_char.S */
-/* File: x86_64/op_aget.S */
/*
* Array get, 32 bits or less. vAA <- vBB[vCC].
*
@@ -1842,12 +1688,9 @@
.endif
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_aget_short: /* 0x4a */
-/* File: x86_64/op_aget_short.S */
-/* File: x86_64/op_aget.S */
/*
* Array get, 32 bits or less. vAA <- vBB[vCC].
*
@@ -1872,11 +1715,9 @@
.endif
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_aput: /* 0x4b */
-/* File: x86_64/op_aput.S */
/*
* Array put, 32 bits or less. vBB[vCC] <- vAA.
*
@@ -1903,8 +1744,6 @@
/* ------------------------------ */
.balign 128
.L_op_aput_wide: /* 0x4c */
-/* File: x86_64/op_aput_wide.S */
-/* File: x86_64/op_aput.S */
/*
* Array put, 32 bits or less. vBB[vCC] <- vAA.
*
@@ -1928,11 +1767,9 @@
movq rINSTq, MIRROR_WIDE_ARRAY_DATA_OFFSET(%rax,%rcx,8)
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_aput_object: /* 0x4d */
-/* File: x86_64/op_aput_object.S */
/*
* Store an object into an array. vBB[vCC] <- vAA.
*/
@@ -1950,8 +1787,6 @@
/* ------------------------------ */
.balign 128
.L_op_aput_boolean: /* 0x4e */
-/* File: x86_64/op_aput_boolean.S */
-/* File: x86_64/op_aput.S */
/*
* Array put, 32 bits or less. vBB[vCC] <- vAA.
*
@@ -1975,12 +1810,9 @@
movb rINSTbl, MIRROR_BOOLEAN_ARRAY_DATA_OFFSET(%rax,%rcx,1)
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_aput_byte: /* 0x4f */
-/* File: x86_64/op_aput_byte.S */
-/* File: x86_64/op_aput.S */
/*
* Array put, 32 bits or less. vBB[vCC] <- vAA.
*
@@ -2004,12 +1836,9 @@
movb rINSTbl, MIRROR_BYTE_ARRAY_DATA_OFFSET(%rax,%rcx,1)
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_aput_char: /* 0x50 */
-/* File: x86_64/op_aput_char.S */
-/* File: x86_64/op_aput.S */
/*
* Array put, 32 bits or less. vBB[vCC] <- vAA.
*
@@ -2033,12 +1862,9 @@
movw rINSTw, MIRROR_CHAR_ARRAY_DATA_OFFSET(%rax,%rcx,2)
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_aput_short: /* 0x51 */
-/* File: x86_64/op_aput_short.S */
-/* File: x86_64/op_aput.S */
/*
* Array put, 32 bits or less. vBB[vCC] <- vAA.
*
@@ -2062,12 +1888,9 @@
movw rINSTw, MIRROR_SHORT_ARRAY_DATA_OFFSET(%rax,%rcx,2)
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_iget: /* 0x52 */
-/* File: x86_64/op_iget.S */
-/* File: x86_64/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2082,13 +1905,9 @@
jz MterpPossibleException
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_iget_wide: /* 0x53 */
-/* File: x86_64/op_iget_wide.S */
-/* File: x86_64/op_iget.S */
-/* File: x86_64/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2103,14 +1922,9 @@
jz MterpPossibleException
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
-
/* ------------------------------ */
.balign 128
.L_op_iget_object: /* 0x54 */
-/* File: x86_64/op_iget_object.S */
-/* File: x86_64/op_iget.S */
-/* File: x86_64/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2125,14 +1939,9 @@
jz MterpPossibleException
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
-
/* ------------------------------ */
.balign 128
.L_op_iget_boolean: /* 0x55 */
-/* File: x86_64/op_iget_boolean.S */
-/* File: x86_64/op_iget.S */
-/* File: x86_64/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2147,14 +1956,9 @@
jz MterpPossibleException
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
-
/* ------------------------------ */
.balign 128
.L_op_iget_byte: /* 0x56 */
-/* File: x86_64/op_iget_byte.S */
-/* File: x86_64/op_iget.S */
-/* File: x86_64/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2169,14 +1973,9 @@
jz MterpPossibleException
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
-
/* ------------------------------ */
.balign 128
.L_op_iget_char: /* 0x57 */
-/* File: x86_64/op_iget_char.S */
-/* File: x86_64/op_iget.S */
-/* File: x86_64/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2191,14 +1990,9 @@
jz MterpPossibleException
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
-
/* ------------------------------ */
.balign 128
.L_op_iget_short: /* 0x58 */
-/* File: x86_64/op_iget_short.S */
-/* File: x86_64/op_iget.S */
-/* File: x86_64/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2213,13 +2007,9 @@
jz MterpPossibleException
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
-
/* ------------------------------ */
.balign 128
.L_op_iput: /* 0x59 */
-/* File: x86_64/op_iput.S */
-/* File: x86_64/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2234,13 +2024,9 @@
jz MterpPossibleException
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_iput_wide: /* 0x5a */
-/* File: x86_64/op_iput_wide.S */
-/* File: x86_64/op_iput.S */
-/* File: x86_64/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2255,14 +2041,9 @@
jz MterpPossibleException
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
-
/* ------------------------------ */
.balign 128
.L_op_iput_object: /* 0x5b */
-/* File: x86_64/op_iput_object.S */
-/* File: x86_64/op_iput.S */
-/* File: x86_64/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2277,14 +2058,9 @@
jz MterpPossibleException
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
-
/* ------------------------------ */
.balign 128
.L_op_iput_boolean: /* 0x5c */
-/* File: x86_64/op_iput_boolean.S */
-/* File: x86_64/op_iput.S */
-/* File: x86_64/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2299,14 +2075,9 @@
jz MterpPossibleException
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
-
/* ------------------------------ */
.balign 128
.L_op_iput_byte: /* 0x5d */
-/* File: x86_64/op_iput_byte.S */
-/* File: x86_64/op_iput.S */
-/* File: x86_64/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2321,14 +2092,9 @@
jz MterpPossibleException
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
-
/* ------------------------------ */
.balign 128
.L_op_iput_char: /* 0x5e */
-/* File: x86_64/op_iput_char.S */
-/* File: x86_64/op_iput.S */
-/* File: x86_64/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2343,14 +2109,9 @@
jz MterpPossibleException
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
-
/* ------------------------------ */
.balign 128
.L_op_iput_short: /* 0x5f */
-/* File: x86_64/op_iput_short.S */
-/* File: x86_64/op_iput.S */
-/* File: x86_64/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2365,13 +2126,9 @@
jz MterpPossibleException
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
-
/* ------------------------------ */
.balign 128
.L_op_sget: /* 0x60 */
-/* File: x86_64/op_sget.S */
-/* File: x86_64/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2386,13 +2143,9 @@
jz MterpPossibleException
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_sget_wide: /* 0x61 */
-/* File: x86_64/op_sget_wide.S */
-/* File: x86_64/op_sget.S */
-/* File: x86_64/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2407,14 +2160,9 @@
jz MterpPossibleException
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
-
/* ------------------------------ */
.balign 128
.L_op_sget_object: /* 0x62 */
-/* File: x86_64/op_sget_object.S */
-/* File: x86_64/op_sget.S */
-/* File: x86_64/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2429,14 +2177,9 @@
jz MterpPossibleException
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
-
/* ------------------------------ */
.balign 128
.L_op_sget_boolean: /* 0x63 */
-/* File: x86_64/op_sget_boolean.S */
-/* File: x86_64/op_sget.S */
-/* File: x86_64/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2451,14 +2194,9 @@
jz MterpPossibleException
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
-
/* ------------------------------ */
.balign 128
.L_op_sget_byte: /* 0x64 */
-/* File: x86_64/op_sget_byte.S */
-/* File: x86_64/op_sget.S */
-/* File: x86_64/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2473,14 +2211,9 @@
jz MterpPossibleException
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
-
/* ------------------------------ */
.balign 128
.L_op_sget_char: /* 0x65 */
-/* File: x86_64/op_sget_char.S */
-/* File: x86_64/op_sget.S */
-/* File: x86_64/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2495,14 +2228,9 @@
jz MterpPossibleException
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
-
/* ------------------------------ */
.balign 128
.L_op_sget_short: /* 0x66 */
-/* File: x86_64/op_sget_short.S */
-/* File: x86_64/op_sget.S */
-/* File: x86_64/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2517,13 +2245,9 @@
jz MterpPossibleException
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
-
/* ------------------------------ */
.balign 128
.L_op_sput: /* 0x67 */
-/* File: x86_64/op_sput.S */
-/* File: x86_64/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2538,13 +2262,9 @@
jz MterpPossibleException
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_sput_wide: /* 0x68 */
-/* File: x86_64/op_sput_wide.S */
-/* File: x86_64/op_sput.S */
-/* File: x86_64/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2559,14 +2279,9 @@
jz MterpPossibleException
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
-
/* ------------------------------ */
.balign 128
.L_op_sput_object: /* 0x69 */
-/* File: x86_64/op_sput_object.S */
-/* File: x86_64/op_sput.S */
-/* File: x86_64/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2581,14 +2296,9 @@
jz MterpPossibleException
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
-
/* ------------------------------ */
.balign 128
.L_op_sput_boolean: /* 0x6a */
-/* File: x86_64/op_sput_boolean.S */
-/* File: x86_64/op_sput.S */
-/* File: x86_64/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2603,14 +2313,9 @@
jz MterpPossibleException
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
-
/* ------------------------------ */
.balign 128
.L_op_sput_byte: /* 0x6b */
-/* File: x86_64/op_sput_byte.S */
-/* File: x86_64/op_sput.S */
-/* File: x86_64/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2625,14 +2330,9 @@
jz MterpPossibleException
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
-
/* ------------------------------ */
.balign 128
.L_op_sput_char: /* 0x6c */
-/* File: x86_64/op_sput_char.S */
-/* File: x86_64/op_sput.S */
-/* File: x86_64/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2647,14 +2347,9 @@
jz MterpPossibleException
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
-
/* ------------------------------ */
.balign 128
.L_op_sput_short: /* 0x6d */
-/* File: x86_64/op_sput_short.S */
-/* File: x86_64/op_sput.S */
-/* File: x86_64/field.S */
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
@@ -2669,13 +2364,9 @@
jz MterpPossibleException
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
-
/* ------------------------------ */
.balign 128
.L_op_invoke_virtual: /* 0x6e */
-/* File: x86_64/op_invoke_virtual.S */
-/* File: x86_64/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -2697,7 +2388,6 @@
jnz MterpFallback
FETCH_INST
GOTO_NEXT
-
/*
* Handle a virtual method call.
*
@@ -2709,8 +2399,6 @@
/* ------------------------------ */
.balign 128
.L_op_invoke_super: /* 0x6f */
-/* File: x86_64/op_invoke_super.S */
-/* File: x86_64/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -2732,7 +2420,6 @@
jnz MterpFallback
FETCH_INST
GOTO_NEXT
-
/*
* Handle a "super" method call.
*
@@ -2744,8 +2431,6 @@
/* ------------------------------ */
.balign 128
.L_op_invoke_direct: /* 0x70 */
-/* File: x86_64/op_invoke_direct.S */
-/* File: x86_64/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -2768,12 +2453,9 @@
FETCH_INST
GOTO_NEXT
-
/* ------------------------------ */
.balign 128
.L_op_invoke_static: /* 0x71 */
-/* File: x86_64/op_invoke_static.S */
-/* File: x86_64/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -2796,13 +2478,9 @@
FETCH_INST
GOTO_NEXT
-
-
/* ------------------------------ */
.balign 128
.L_op_invoke_interface: /* 0x72 */
-/* File: x86_64/op_invoke_interface.S */
-/* File: x86_64/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -2824,7 +2502,6 @@
jnz MterpFallback
FETCH_INST
GOTO_NEXT
-
/*
* Handle an interface method call.
*
@@ -2836,7 +2513,6 @@
/* ------------------------------ */
.balign 128
.L_op_return_void_no_barrier: /* 0x73 */
-/* File: x86_64/op_return_void_no_barrier.S */
movq rSELF, OUT_ARG0
testl $(THREAD_SUSPEND_OR_CHECKPOINT_REQUEST), THREAD_FLAGS_OFFSET(OUT_ARG0)
jz 1f
@@ -2848,8 +2524,6 @@
/* ------------------------------ */
.balign 128
.L_op_invoke_virtual_range: /* 0x74 */
-/* File: x86_64/op_invoke_virtual_range.S */
-/* File: x86_64/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -2872,12 +2546,9 @@
FETCH_INST
GOTO_NEXT
-
/* ------------------------------ */
.balign 128
.L_op_invoke_super_range: /* 0x75 */
-/* File: x86_64/op_invoke_super_range.S */
-/* File: x86_64/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -2900,12 +2571,9 @@
FETCH_INST
GOTO_NEXT
-
/* ------------------------------ */
.balign 128
.L_op_invoke_direct_range: /* 0x76 */
-/* File: x86_64/op_invoke_direct_range.S */
-/* File: x86_64/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -2928,12 +2596,9 @@
FETCH_INST
GOTO_NEXT
-
/* ------------------------------ */
.balign 128
.L_op_invoke_static_range: /* 0x77 */
-/* File: x86_64/op_invoke_static_range.S */
-/* File: x86_64/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -2956,12 +2621,9 @@
FETCH_INST
GOTO_NEXT
-
/* ------------------------------ */
.balign 128
.L_op_invoke_interface_range: /* 0x78 */
-/* File: x86_64/op_invoke_interface_range.S */
-/* File: x86_64/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -2984,34 +2646,25 @@
FETCH_INST
GOTO_NEXT
-
/* ------------------------------ */
.balign 128
.L_op_unused_79: /* 0x79 */
-/* File: x86_64/op_unused_79.S */
-/* File: x86_64/unused.S */
/*
* Bail to reference interpreter to throw.
*/
jmp MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_7a: /* 0x7a */
-/* File: x86_64/op_unused_7a.S */
-/* File: x86_64/unused.S */
/*
* Bail to reference interpreter to throw.
*/
jmp MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_neg_int: /* 0x7b */
-/* File: x86_64/op_neg_int.S */
-/* File: x86_64/unop.S */
/*
* Generic 32/64-bit unary operation. Provide an "instr" line that
* specifies an instruction that performs "result = op eax".
@@ -3034,12 +2687,9 @@
.endif
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_not_int: /* 0x7c */
-/* File: x86_64/op_not_int.S */
-/* File: x86_64/unop.S */
/*
* Generic 32/64-bit unary operation. Provide an "instr" line that
* specifies an instruction that performs "result = op eax".
@@ -3062,12 +2712,9 @@
.endif
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_neg_long: /* 0x7d */
-/* File: x86_64/op_neg_long.S */
-/* File: x86_64/unop.S */
/*
* Generic 32/64-bit unary operation. Provide an "instr" line that
* specifies an instruction that performs "result = op eax".
@@ -3090,12 +2737,9 @@
.endif
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_not_long: /* 0x7e */
-/* File: x86_64/op_not_long.S */
-/* File: x86_64/unop.S */
/*
* Generic 32/64-bit unary operation. Provide an "instr" line that
* specifies an instruction that performs "result = op eax".
@@ -3118,12 +2762,9 @@
.endif
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_neg_float: /* 0x7f */
-/* File: x86_64/op_neg_float.S */
-/* File: x86_64/unop.S */
/*
* Generic 32/64-bit unary operation. Provide an "instr" line that
* specifies an instruction that performs "result = op eax".
@@ -3146,12 +2787,9 @@
.endif
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_neg_double: /* 0x80 */
-/* File: x86_64/op_neg_double.S */
-/* File: x86_64/unop.S */
/*
* Generic 32/64-bit unary operation. Provide an "instr" line that
* specifies an instruction that performs "result = op eax".
@@ -3174,11 +2812,9 @@
.endif
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_int_to_long: /* 0x81 */
-/* File: x86_64/op_int_to_long.S */
/* int to long vA, vB */
movzbq rINSTbl, %rax # rax <- +A
sarl $4, %eax # eax <- B
@@ -3187,12 +2823,9 @@
SET_WIDE_VREG %rax, rINSTq # v[A] <- %rax
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_int_to_float: /* 0x82 */
-/* File: x86_64/op_int_to_float.S */
-/* File: x86_64/fpcvt.S */
/*
* Generic 32-bit FP conversion operation.
*/
@@ -3210,12 +2843,9 @@
.endif
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_int_to_double: /* 0x83 */
-/* File: x86_64/op_int_to_double.S */
-/* File: x86_64/fpcvt.S */
/*
* Generic 32-bit FP conversion operation.
*/
@@ -3233,13 +2863,10 @@
.endif
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_long_to_int: /* 0x84 */
-/* File: x86_64/op_long_to_int.S */
/* we ignore the high word, making this equivalent to a 32-bit reg move */
-/* File: x86_64/op_move.S */
/* for move, move-object, long-to-int */
/* op vA, vB */
movl rINST, %eax # eax <- BA
@@ -3253,12 +2880,9 @@
.endif
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_long_to_float: /* 0x85 */
-/* File: x86_64/op_long_to_float.S */
-/* File: x86_64/fpcvt.S */
/*
* Generic 32-bit FP conversion operation.
*/
@@ -3276,12 +2900,9 @@
.endif
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_long_to_double: /* 0x86 */
-/* File: x86_64/op_long_to_double.S */
-/* File: x86_64/fpcvt.S */
/*
* Generic 32-bit FP conversion operation.
*/
@@ -3299,12 +2920,9 @@
.endif
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_float_to_int: /* 0x87 */
-/* File: x86_64/op_float_to_int.S */
-/* File: x86_64/cvtfp_int.S */
/* On fp to int conversions, Java requires that
* if the result > maxint, it should be clamped to maxint. If it is less
* than minint, it should be clamped to minint. If it is a nan, the result
@@ -3332,12 +2950,9 @@
.endif
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_float_to_long: /* 0x88 */
-/* File: x86_64/op_float_to_long.S */
-/* File: x86_64/cvtfp_int.S */
/* On fp to int conversions, Java requires that
* if the result > maxint, it should be clamped to maxint. If it is less
* than minint, it should be clamped to minint. If it is a nan, the result
@@ -3365,12 +2980,9 @@
.endif
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_float_to_double: /* 0x89 */
-/* File: x86_64/op_float_to_double.S */
-/* File: x86_64/fpcvt.S */
/*
* Generic 32-bit FP conversion operation.
*/
@@ -3388,12 +3000,9 @@
.endif
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_double_to_int: /* 0x8a */
-/* File: x86_64/op_double_to_int.S */
-/* File: x86_64/cvtfp_int.S */
/* On fp to int conversions, Java requires that
* if the result > maxint, it should be clamped to maxint. If it is less
* than minint, it should be clamped to minint. If it is a nan, the result
@@ -3421,12 +3030,9 @@
.endif
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_double_to_long: /* 0x8b */
-/* File: x86_64/op_double_to_long.S */
-/* File: x86_64/cvtfp_int.S */
/* On fp to int conversions, Java requires that
* if the result > maxint, it should be clamped to maxint. If it is less
* than minint, it should be clamped to minint. If it is a nan, the result
@@ -3454,12 +3060,9 @@
.endif
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_double_to_float: /* 0x8c */
-/* File: x86_64/op_double_to_float.S */
-/* File: x86_64/fpcvt.S */
/*
* Generic 32-bit FP conversion operation.
*/
@@ -3477,12 +3080,9 @@
.endif
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_int_to_byte: /* 0x8d */
-/* File: x86_64/op_int_to_byte.S */
-/* File: x86_64/unop.S */
/*
* Generic 32/64-bit unary operation. Provide an "instr" line that
* specifies an instruction that performs "result = op eax".
@@ -3505,12 +3105,9 @@
.endif
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_int_to_char: /* 0x8e */
-/* File: x86_64/op_int_to_char.S */
-/* File: x86_64/unop.S */
/*
* Generic 32/64-bit unary operation. Provide an "instr" line that
* specifies an instruction that performs "result = op eax".
@@ -3533,12 +3130,9 @@
.endif
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_int_to_short: /* 0x8f */
-/* File: x86_64/op_int_to_short.S */
-/* File: x86_64/unop.S */
/*
* Generic 32/64-bit unary operation. Provide an "instr" line that
* specifies an instruction that performs "result = op eax".
@@ -3561,12 +3155,9 @@
.endif
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_add_int: /* 0x90 */
-/* File: x86_64/op_add_int.S */
-/* File: x86_64/binop.S */
/*
* Generic 32-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = eax op (rFP,%ecx,4)".
@@ -3584,12 +3175,9 @@
SET_VREG %eax, rINSTq
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_sub_int: /* 0x91 */
-/* File: x86_64/op_sub_int.S */
-/* File: x86_64/binop.S */
/*
* Generic 32-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = eax op (rFP,%ecx,4)".
@@ -3607,12 +3195,9 @@
SET_VREG %eax, rINSTq
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_mul_int: /* 0x92 */
-/* File: x86_64/op_mul_int.S */
-/* File: x86_64/binop.S */
/*
* Generic 32-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = eax op (rFP,%ecx,4)".
@@ -3630,12 +3215,9 @@
SET_VREG %eax, rINSTq
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_div_int: /* 0x93 */
-/* File: x86_64/op_div_int.S */
-/* File: x86_64/bindiv.S */
/*
* 32-bit binary div/rem operation. Handles special case of op1=-1.
*/
@@ -3670,12 +3252,9 @@
.endif
jmp 1b
-
/* ------------------------------ */
.balign 128
.L_op_rem_int: /* 0x94 */
-/* File: x86_64/op_rem_int.S */
-/* File: x86_64/bindiv.S */
/*
* 32-bit binary div/rem operation. Handles special case of op1=-1.
*/
@@ -3710,12 +3289,9 @@
.endif
jmp 1b
-
/* ------------------------------ */
.balign 128
.L_op_and_int: /* 0x95 */
-/* File: x86_64/op_and_int.S */
-/* File: x86_64/binop.S */
/*
* Generic 32-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = eax op (rFP,%ecx,4)".
@@ -3733,12 +3309,9 @@
SET_VREG %eax, rINSTq
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_or_int: /* 0x96 */
-/* File: x86_64/op_or_int.S */
-/* File: x86_64/binop.S */
/*
* Generic 32-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = eax op (rFP,%ecx,4)".
@@ -3756,12 +3329,9 @@
SET_VREG %eax, rINSTq
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_xor_int: /* 0x97 */
-/* File: x86_64/op_xor_int.S */
-/* File: x86_64/binop.S */
/*
* Generic 32-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = eax op (rFP,%ecx,4)".
@@ -3779,12 +3349,9 @@
SET_VREG %eax, rINSTq
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_shl_int: /* 0x98 */
-/* File: x86_64/op_shl_int.S */
-/* File: x86_64/binop1.S */
/*
* Generic 32-bit binary operation in which both operands loaded to
* registers (op0 in eax, op1 in ecx).
@@ -3804,12 +3371,9 @@
.endif
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_shr_int: /* 0x99 */
-/* File: x86_64/op_shr_int.S */
-/* File: x86_64/binop1.S */
/*
* Generic 32-bit binary operation in which both operands loaded to
* registers (op0 in eax, op1 in ecx).
@@ -3829,12 +3393,9 @@
.endif
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_ushr_int: /* 0x9a */
-/* File: x86_64/op_ushr_int.S */
-/* File: x86_64/binop1.S */
/*
* Generic 32-bit binary operation in which both operands loaded to
* registers (op0 in eax, op1 in ecx).
@@ -3854,12 +3415,9 @@
.endif
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_add_long: /* 0x9b */
-/* File: x86_64/op_add_long.S */
-/* File: x86_64/binopWide.S */
/*
* Generic 64-bit binary operation.
*/
@@ -3871,12 +3429,9 @@
SET_WIDE_VREG %rax, rINSTq # v[AA] <- rax
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_sub_long: /* 0x9c */
-/* File: x86_64/op_sub_long.S */
-/* File: x86_64/binopWide.S */
/*
* Generic 64-bit binary operation.
*/
@@ -3888,12 +3443,9 @@
SET_WIDE_VREG %rax, rINSTq # v[AA] <- rax
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_mul_long: /* 0x9d */
-/* File: x86_64/op_mul_long.S */
-/* File: x86_64/binopWide.S */
/*
* Generic 64-bit binary operation.
*/
@@ -3905,12 +3457,9 @@
SET_WIDE_VREG %rax, rINSTq # v[AA] <- rax
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_div_long: /* 0x9e */
-/* File: x86_64/op_div_long.S */
-/* File: x86_64/bindiv.S */
/*
* 32-bit binary div/rem operation. Handles special case of op1=-1.
*/
@@ -3945,12 +3494,9 @@
.endif
jmp 1b
-
/* ------------------------------ */
.balign 128
.L_op_rem_long: /* 0x9f */
-/* File: x86_64/op_rem_long.S */
-/* File: x86_64/bindiv.S */
/*
* 32-bit binary div/rem operation. Handles special case of op1=-1.
*/
@@ -3985,12 +3531,9 @@
.endif
jmp 1b
-
/* ------------------------------ */
.balign 128
.L_op_and_long: /* 0xa0 */
-/* File: x86_64/op_and_long.S */
-/* File: x86_64/binopWide.S */
/*
* Generic 64-bit binary operation.
*/
@@ -4002,12 +3545,9 @@
SET_WIDE_VREG %rax, rINSTq # v[AA] <- rax
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_or_long: /* 0xa1 */
-/* File: x86_64/op_or_long.S */
-/* File: x86_64/binopWide.S */
/*
* Generic 64-bit binary operation.
*/
@@ -4019,12 +3559,9 @@
SET_WIDE_VREG %rax, rINSTq # v[AA] <- rax
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_xor_long: /* 0xa2 */
-/* File: x86_64/op_xor_long.S */
-/* File: x86_64/binopWide.S */
/*
* Generic 64-bit binary operation.
*/
@@ -4036,12 +3573,9 @@
SET_WIDE_VREG %rax, rINSTq # v[AA] <- rax
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_shl_long: /* 0xa3 */
-/* File: x86_64/op_shl_long.S */
-/* File: x86_64/binop1.S */
/*
* Generic 32-bit binary operation in which both operands loaded to
* registers (op0 in eax, op1 in ecx).
@@ -4061,12 +3595,9 @@
.endif
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_shr_long: /* 0xa4 */
-/* File: x86_64/op_shr_long.S */
-/* File: x86_64/binop1.S */
/*
* Generic 32-bit binary operation in which both operands loaded to
* registers (op0 in eax, op1 in ecx).
@@ -4086,12 +3617,9 @@
.endif
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_ushr_long: /* 0xa5 */
-/* File: x86_64/op_ushr_long.S */
-/* File: x86_64/binop1.S */
/*
* Generic 32-bit binary operation in which both operands loaded to
* registers (op0 in eax, op1 in ecx).
@@ -4111,12 +3639,9 @@
.endif
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_add_float: /* 0xa6 */
-/* File: x86_64/op_add_float.S */
-/* File: x86_64/sseBinop.S */
movzbq 2(rPC), %rcx # ecx <- BB
movzbq 3(rPC), %rax # eax <- CC
movss VREG_ADDRESS(%rcx), %xmm0 # %xmm0 <- 1st src
@@ -4126,12 +3651,9 @@
movss %xmm0, VREG_REF_ADDRESS(rINSTq) # clear ref
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_sub_float: /* 0xa7 */
-/* File: x86_64/op_sub_float.S */
-/* File: x86_64/sseBinop.S */
movzbq 2(rPC), %rcx # ecx <- BB
movzbq 3(rPC), %rax # eax <- CC
movss VREG_ADDRESS(%rcx), %xmm0 # %xmm0 <- 1st src
@@ -4141,12 +3663,9 @@
movss %xmm0, VREG_REF_ADDRESS(rINSTq) # clear ref
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_mul_float: /* 0xa8 */
-/* File: x86_64/op_mul_float.S */
-/* File: x86_64/sseBinop.S */
movzbq 2(rPC), %rcx # ecx <- BB
movzbq 3(rPC), %rax # eax <- CC
movss VREG_ADDRESS(%rcx), %xmm0 # %xmm0 <- 1st src
@@ -4156,12 +3675,9 @@
movss %xmm0, VREG_REF_ADDRESS(rINSTq) # clear ref
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_div_float: /* 0xa9 */
-/* File: x86_64/op_div_float.S */
-/* File: x86_64/sseBinop.S */
movzbq 2(rPC), %rcx # ecx <- BB
movzbq 3(rPC), %rax # eax <- CC
movss VREG_ADDRESS(%rcx), %xmm0 # %xmm0 <- 1st src
@@ -4171,11 +3687,9 @@
movss %xmm0, VREG_REF_ADDRESS(rINSTq) # clear ref
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_rem_float: /* 0xaa */
-/* File: x86_64/op_rem_float.S */
/* rem_float vAA, vBB, vCC */
movzbq 3(rPC), %rcx # ecx <- BB
movzbq 2(rPC), %rax # eax <- CC
@@ -4194,8 +3708,6 @@
/* ------------------------------ */
.balign 128
.L_op_add_double: /* 0xab */
-/* File: x86_64/op_add_double.S */
-/* File: x86_64/sseBinop.S */
movzbq 2(rPC), %rcx # ecx <- BB
movzbq 3(rPC), %rax # eax <- CC
movsd VREG_ADDRESS(%rcx), %xmm0 # %xmm0 <- 1st src
@@ -4205,12 +3717,9 @@
movsd %xmm0, VREG_REF_ADDRESS(rINSTq) # clear ref
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_sub_double: /* 0xac */
-/* File: x86_64/op_sub_double.S */
-/* File: x86_64/sseBinop.S */
movzbq 2(rPC), %rcx # ecx <- BB
movzbq 3(rPC), %rax # eax <- CC
movsd VREG_ADDRESS(%rcx), %xmm0 # %xmm0 <- 1st src
@@ -4220,12 +3729,9 @@
movsd %xmm0, VREG_REF_ADDRESS(rINSTq) # clear ref
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_mul_double: /* 0xad */
-/* File: x86_64/op_mul_double.S */
-/* File: x86_64/sseBinop.S */
movzbq 2(rPC), %rcx # ecx <- BB
movzbq 3(rPC), %rax # eax <- CC
movsd VREG_ADDRESS(%rcx), %xmm0 # %xmm0 <- 1st src
@@ -4235,12 +3741,9 @@
movsd %xmm0, VREG_REF_ADDRESS(rINSTq) # clear ref
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_div_double: /* 0xae */
-/* File: x86_64/op_div_double.S */
-/* File: x86_64/sseBinop.S */
movzbq 2(rPC), %rcx # ecx <- BB
movzbq 3(rPC), %rax # eax <- CC
movsd VREG_ADDRESS(%rcx), %xmm0 # %xmm0 <- 1st src
@@ -4250,11 +3753,9 @@
movsd %xmm0, VREG_REF_ADDRESS(rINSTq) # clear ref
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_rem_double: /* 0xaf */
-/* File: x86_64/op_rem_double.S */
/* rem_double vAA, vBB, vCC */
movzbq 3(rPC), %rcx # ecx <- BB
movzbq 2(rPC), %rax # eax <- CC
@@ -4273,8 +3774,6 @@
/* ------------------------------ */
.balign 128
.L_op_add_int_2addr: /* 0xb0 */
-/* File: x86_64/op_add_int_2addr.S */
-/* File: x86_64/binop2addr.S */
/*
* Generic 32-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = r0 op r1".
@@ -4294,12 +3793,9 @@
CLEAR_REF %rcx
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_sub_int_2addr: /* 0xb1 */
-/* File: x86_64/op_sub_int_2addr.S */
-/* File: x86_64/binop2addr.S */
/*
* Generic 32-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = r0 op r1".
@@ -4319,11 +3815,9 @@
CLEAR_REF %rcx
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_mul_int_2addr: /* 0xb2 */
-/* File: x86_64/op_mul_int_2addr.S */
/* mul vA, vB */
movl rINST, %ecx # rcx <- A+
sarl $4, rINST # rINST <- B
@@ -4336,8 +3830,6 @@
/* ------------------------------ */
.balign 128
.L_op_div_int_2addr: /* 0xb3 */
-/* File: x86_64/op_div_int_2addr.S */
-/* File: x86_64/bindiv2addr.S */
/*
* 32-bit binary div/rem operation. Handles special case of op1=-1.
*/
@@ -4373,12 +3865,9 @@
.endif
jmp 1b
-
/* ------------------------------ */
.balign 128
.L_op_rem_int_2addr: /* 0xb4 */
-/* File: x86_64/op_rem_int_2addr.S */
-/* File: x86_64/bindiv2addr.S */
/*
* 32-bit binary div/rem operation. Handles special case of op1=-1.
*/
@@ -4414,12 +3903,9 @@
.endif
jmp 1b
-
/* ------------------------------ */
.balign 128
.L_op_and_int_2addr: /* 0xb5 */
-/* File: x86_64/op_and_int_2addr.S */
-/* File: x86_64/binop2addr.S */
/*
* Generic 32-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = r0 op r1".
@@ -4439,12 +3925,9 @@
CLEAR_REF %rcx
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_or_int_2addr: /* 0xb6 */
-/* File: x86_64/op_or_int_2addr.S */
-/* File: x86_64/binop2addr.S */
/*
* Generic 32-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = r0 op r1".
@@ -4464,12 +3947,9 @@
CLEAR_REF %rcx
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_xor_int_2addr: /* 0xb7 */
-/* File: x86_64/op_xor_int_2addr.S */
-/* File: x86_64/binop2addr.S */
/*
* Generic 32-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = r0 op r1".
@@ -4489,12 +3969,9 @@
CLEAR_REF %rcx
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_shl_int_2addr: /* 0xb8 */
-/* File: x86_64/op_shl_int_2addr.S */
-/* File: x86_64/shop2addr.S */
/*
* Generic 32-bit "shift/2addr" operation.
*/
@@ -4514,12 +3991,9 @@
.endif
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_shr_int_2addr: /* 0xb9 */
-/* File: x86_64/op_shr_int_2addr.S */
-/* File: x86_64/shop2addr.S */
/*
* Generic 32-bit "shift/2addr" operation.
*/
@@ -4539,12 +4013,9 @@
.endif
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_ushr_int_2addr: /* 0xba */
-/* File: x86_64/op_ushr_int_2addr.S */
-/* File: x86_64/shop2addr.S */
/*
* Generic 32-bit "shift/2addr" operation.
*/
@@ -4564,12 +4035,9 @@
.endif
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_add_long_2addr: /* 0xbb */
-/* File: x86_64/op_add_long_2addr.S */
-/* File: x86_64/binopWide2addr.S */
/*
* Generic 64-bit binary operation.
*/
@@ -4582,12 +4050,9 @@
CLEAR_WIDE_REF %rcx
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_sub_long_2addr: /* 0xbc */
-/* File: x86_64/op_sub_long_2addr.S */
-/* File: x86_64/binopWide2addr.S */
/*
* Generic 64-bit binary operation.
*/
@@ -4600,11 +4065,9 @@
CLEAR_WIDE_REF %rcx
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_mul_long_2addr: /* 0xbd */
-/* File: x86_64/op_mul_long_2addr.S */
/* mul vA, vB */
movl rINST, %ecx # rcx <- A+
sarl $4, rINST # rINST <- B
@@ -4617,8 +4080,6 @@
/* ------------------------------ */
.balign 128
.L_op_div_long_2addr: /* 0xbe */
-/* File: x86_64/op_div_long_2addr.S */
-/* File: x86_64/bindiv2addr.S */
/*
* 32-bit binary div/rem operation. Handles special case of op1=-1.
*/
@@ -4654,12 +4115,9 @@
.endif
jmp 1b
-
/* ------------------------------ */
.balign 128
.L_op_rem_long_2addr: /* 0xbf */
-/* File: x86_64/op_rem_long_2addr.S */
-/* File: x86_64/bindiv2addr.S */
/*
* 32-bit binary div/rem operation. Handles special case of op1=-1.
*/
@@ -4695,12 +4153,9 @@
.endif
jmp 1b
-
/* ------------------------------ */
.balign 128
.L_op_and_long_2addr: /* 0xc0 */
-/* File: x86_64/op_and_long_2addr.S */
-/* File: x86_64/binopWide2addr.S */
/*
* Generic 64-bit binary operation.
*/
@@ -4713,12 +4168,9 @@
CLEAR_WIDE_REF %rcx
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_or_long_2addr: /* 0xc1 */
-/* File: x86_64/op_or_long_2addr.S */
-/* File: x86_64/binopWide2addr.S */
/*
* Generic 64-bit binary operation.
*/
@@ -4731,12 +4183,9 @@
CLEAR_WIDE_REF %rcx
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_xor_long_2addr: /* 0xc2 */
-/* File: x86_64/op_xor_long_2addr.S */
-/* File: x86_64/binopWide2addr.S */
/*
* Generic 64-bit binary operation.
*/
@@ -4749,12 +4198,9 @@
CLEAR_WIDE_REF %rcx
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_shl_long_2addr: /* 0xc3 */
-/* File: x86_64/op_shl_long_2addr.S */
-/* File: x86_64/shop2addr.S */
/*
* Generic 32-bit "shift/2addr" operation.
*/
@@ -4774,12 +4220,9 @@
.endif
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_shr_long_2addr: /* 0xc4 */
-/* File: x86_64/op_shr_long_2addr.S */
-/* File: x86_64/shop2addr.S */
/*
* Generic 32-bit "shift/2addr" operation.
*/
@@ -4799,12 +4242,9 @@
.endif
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_ushr_long_2addr: /* 0xc5 */
-/* File: x86_64/op_ushr_long_2addr.S */
-/* File: x86_64/shop2addr.S */
/*
* Generic 32-bit "shift/2addr" operation.
*/
@@ -4824,12 +4264,9 @@
.endif
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_add_float_2addr: /* 0xc6 */
-/* File: x86_64/op_add_float_2addr.S */
-/* File: x86_64/sseBinop2Addr.S */
movl rINST, %ecx # ecx <- A+
andl $0xf, %ecx # ecx <- A
movss VREG_ADDRESS(%rcx), %xmm0 # %xmm0 <- 1st src
@@ -4840,12 +4277,9 @@
movss %xmm0, VREG_REF_ADDRESS(rINSTq) # clear ref
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_sub_float_2addr: /* 0xc7 */
-/* File: x86_64/op_sub_float_2addr.S */
-/* File: x86_64/sseBinop2Addr.S */
movl rINST, %ecx # ecx <- A+
andl $0xf, %ecx # ecx <- A
movss VREG_ADDRESS(%rcx), %xmm0 # %xmm0 <- 1st src
@@ -4856,12 +4290,9 @@
movss %xmm0, VREG_REF_ADDRESS(rINSTq) # clear ref
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_mul_float_2addr: /* 0xc8 */
-/* File: x86_64/op_mul_float_2addr.S */
-/* File: x86_64/sseBinop2Addr.S */
movl rINST, %ecx # ecx <- A+
andl $0xf, %ecx # ecx <- A
movss VREG_ADDRESS(%rcx), %xmm0 # %xmm0 <- 1st src
@@ -4872,12 +4303,9 @@
movss %xmm0, VREG_REF_ADDRESS(rINSTq) # clear ref
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_div_float_2addr: /* 0xc9 */
-/* File: x86_64/op_div_float_2addr.S */
-/* File: x86_64/sseBinop2Addr.S */
movl rINST, %ecx # ecx <- A+
andl $0xf, %ecx # ecx <- A
movss VREG_ADDRESS(%rcx), %xmm0 # %xmm0 <- 1st src
@@ -4888,11 +4316,9 @@
movss %xmm0, VREG_REF_ADDRESS(rINSTq) # clear ref
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_rem_float_2addr: /* 0xca */
-/* File: x86_64/op_rem_float_2addr.S */
/* rem_float/2addr vA, vB */
movzbq rINSTbl, %rcx # ecx <- A+
sarl $4, rINST # rINST <- B
@@ -4912,8 +4338,6 @@
/* ------------------------------ */
.balign 128
.L_op_add_double_2addr: /* 0xcb */
-/* File: x86_64/op_add_double_2addr.S */
-/* File: x86_64/sseBinop2Addr.S */
movl rINST, %ecx # ecx <- A+
andl $0xf, %ecx # ecx <- A
movsd VREG_ADDRESS(%rcx), %xmm0 # %xmm0 <- 1st src
@@ -4924,12 +4348,9 @@
movsd %xmm0, VREG_REF_ADDRESS(rINSTq) # clear ref
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_sub_double_2addr: /* 0xcc */
-/* File: x86_64/op_sub_double_2addr.S */
-/* File: x86_64/sseBinop2Addr.S */
movl rINST, %ecx # ecx <- A+
andl $0xf, %ecx # ecx <- A
movsd VREG_ADDRESS(%rcx), %xmm0 # %xmm0 <- 1st src
@@ -4940,12 +4361,9 @@
movsd %xmm0, VREG_REF_ADDRESS(rINSTq) # clear ref
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_mul_double_2addr: /* 0xcd */
-/* File: x86_64/op_mul_double_2addr.S */
-/* File: x86_64/sseBinop2Addr.S */
movl rINST, %ecx # ecx <- A+
andl $0xf, %ecx # ecx <- A
movsd VREG_ADDRESS(%rcx), %xmm0 # %xmm0 <- 1st src
@@ -4956,12 +4374,9 @@
movsd %xmm0, VREG_REF_ADDRESS(rINSTq) # clear ref
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_div_double_2addr: /* 0xce */
-/* File: x86_64/op_div_double_2addr.S */
-/* File: x86_64/sseBinop2Addr.S */
movl rINST, %ecx # ecx <- A+
andl $0xf, %ecx # ecx <- A
movsd VREG_ADDRESS(%rcx), %xmm0 # %xmm0 <- 1st src
@@ -4972,11 +4387,9 @@
movsd %xmm0, VREG_REF_ADDRESS(rINSTq) # clear ref
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
-
/* ------------------------------ */
.balign 128
.L_op_rem_double_2addr: /* 0xcf */
-/* File: x86_64/op_rem_double_2addr.S */
/* rem_double/2addr vA, vB */
movzbq rINSTbl, %rcx # ecx <- A+
sarl $4, rINST # rINST <- B
@@ -4996,8 +4409,6 @@
/* ------------------------------ */
.balign 128
.L_op_add_int_lit16: /* 0xd0 */
-/* File: x86_64/op_add_int_lit16.S */
-/* File: x86_64/binopLit16.S */
/*
* Generic 32-bit "lit16" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = eax op ecx".
@@ -5017,13 +4428,10 @@
SET_VREG %eax, rINSTq
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_rsub_int: /* 0xd1 */
-/* File: x86_64/op_rsub_int.S */
/* this op is "rsub-int", but can be thought of as "rsub-int/lit16" */
-/* File: x86_64/binopLit16.S */
/*
* Generic 32-bit "lit16" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = eax op ecx".
@@ -5043,12 +4451,9 @@
SET_VREG %ecx, rINSTq
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_mul_int_lit16: /* 0xd2 */
-/* File: x86_64/op_mul_int_lit16.S */
-/* File: x86_64/binopLit16.S */
/*
* Generic 32-bit "lit16" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = eax op ecx".
@@ -5068,12 +4473,9 @@
SET_VREG %eax, rINSTq
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_div_int_lit16: /* 0xd3 */
-/* File: x86_64/op_div_int_lit16.S */
-/* File: x86_64/bindivLit16.S */
/*
* 32-bit binary div/rem operation. Handles special case of op1=-1.
*/
@@ -5101,12 +4503,9 @@
.endif
jmp 1b
-
/* ------------------------------ */
.balign 128
.L_op_rem_int_lit16: /* 0xd4 */
-/* File: x86_64/op_rem_int_lit16.S */
-/* File: x86_64/bindivLit16.S */
/*
* 32-bit binary div/rem operation. Handles special case of op1=-1.
*/
@@ -5134,12 +4533,9 @@
.endif
jmp 1b
-
/* ------------------------------ */
.balign 128
.L_op_and_int_lit16: /* 0xd5 */
-/* File: x86_64/op_and_int_lit16.S */
-/* File: x86_64/binopLit16.S */
/*
* Generic 32-bit "lit16" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = eax op ecx".
@@ -5159,12 +4555,9 @@
SET_VREG %eax, rINSTq
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_or_int_lit16: /* 0xd6 */
-/* File: x86_64/op_or_int_lit16.S */
-/* File: x86_64/binopLit16.S */
/*
* Generic 32-bit "lit16" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = eax op ecx".
@@ -5184,12 +4577,9 @@
SET_VREG %eax, rINSTq
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_xor_int_lit16: /* 0xd7 */
-/* File: x86_64/op_xor_int_lit16.S */
-/* File: x86_64/binopLit16.S */
/*
* Generic 32-bit "lit16" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = eax op ecx".
@@ -5209,12 +4599,9 @@
SET_VREG %eax, rINSTq
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_add_int_lit8: /* 0xd8 */
-/* File: x86_64/op_add_int_lit8.S */
-/* File: x86_64/binopLit8.S */
/*
* Generic 32-bit "lit8" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = eax op ecx".
@@ -5233,12 +4620,9 @@
SET_VREG %eax, rINSTq
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_rsub_int_lit8: /* 0xd9 */
-/* File: x86_64/op_rsub_int_lit8.S */
-/* File: x86_64/binopLit8.S */
/*
* Generic 32-bit "lit8" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = eax op ecx".
@@ -5257,12 +4641,9 @@
SET_VREG %ecx, rINSTq
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_mul_int_lit8: /* 0xda */
-/* File: x86_64/op_mul_int_lit8.S */
-/* File: x86_64/binopLit8.S */
/*
* Generic 32-bit "lit8" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = eax op ecx".
@@ -5281,12 +4662,9 @@
SET_VREG %eax, rINSTq
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_div_int_lit8: /* 0xdb */
-/* File: x86_64/op_div_int_lit8.S */
-/* File: x86_64/bindivLit8.S */
/*
* 32-bit div/rem "lit8" binary operation. Handles special case of
* op0=minint & op1=-1
@@ -5312,12 +4690,9 @@
.endif
jmp 1b
-
/* ------------------------------ */
.balign 128
.L_op_rem_int_lit8: /* 0xdc */
-/* File: x86_64/op_rem_int_lit8.S */
-/* File: x86_64/bindivLit8.S */
/*
* 32-bit div/rem "lit8" binary operation. Handles special case of
* op0=minint & op1=-1
@@ -5343,12 +4718,9 @@
.endif
jmp 1b
-
/* ------------------------------ */
.balign 128
.L_op_and_int_lit8: /* 0xdd */
-/* File: x86_64/op_and_int_lit8.S */
-/* File: x86_64/binopLit8.S */
/*
* Generic 32-bit "lit8" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = eax op ecx".
@@ -5367,12 +4739,9 @@
SET_VREG %eax, rINSTq
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_or_int_lit8: /* 0xde */
-/* File: x86_64/op_or_int_lit8.S */
-/* File: x86_64/binopLit8.S */
/*
* Generic 32-bit "lit8" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = eax op ecx".
@@ -5391,12 +4760,9 @@
SET_VREG %eax, rINSTq
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_xor_int_lit8: /* 0xdf */
-/* File: x86_64/op_xor_int_lit8.S */
-/* File: x86_64/binopLit8.S */
/*
* Generic 32-bit "lit8" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = eax op ecx".
@@ -5415,12 +4781,9 @@
SET_VREG %eax, rINSTq
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_shl_int_lit8: /* 0xe0 */
-/* File: x86_64/op_shl_int_lit8.S */
-/* File: x86_64/binopLit8.S */
/*
* Generic 32-bit "lit8" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = eax op ecx".
@@ -5439,12 +4802,9 @@
SET_VREG %eax, rINSTq
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_shr_int_lit8: /* 0xe1 */
-/* File: x86_64/op_shr_int_lit8.S */
-/* File: x86_64/binopLit8.S */
/*
* Generic 32-bit "lit8" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = eax op ecx".
@@ -5463,12 +4823,9 @@
SET_VREG %eax, rINSTq
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_ushr_int_lit8: /* 0xe2 */
-/* File: x86_64/op_ushr_int_lit8.S */
-/* File: x86_64/binopLit8.S */
/*
* Generic 32-bit "lit8" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = eax op ecx".
@@ -5487,11 +4844,9 @@
SET_VREG %eax, rINSTq
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_iget_quick: /* 0xe3 */
-/* File: x86_64/op_iget_quick.S */
/* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick, iget-wide-quick */
/* op vA, vB, offset@CCCC */
movl rINST, %ecx # rcx <- BA
@@ -5513,8 +4868,6 @@
/* ------------------------------ */
.balign 128
.L_op_iget_wide_quick: /* 0xe4 */
-/* File: x86_64/op_iget_wide_quick.S */
-/* File: x86_64/op_iget_quick.S */
/* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick, iget-wide-quick */
/* op vA, vB, offset@CCCC */
movl rINST, %ecx # rcx <- BA
@@ -5533,11 +4886,9 @@
.endif
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_iget_object_quick: /* 0xe5 */
-/* File: x86_64/op_iget_object_quick.S */
/* For: iget-object-quick */
/* op vA, vB, offset@CCCC */
.extern artIGetObjectFromMterp
@@ -5557,7 +4908,6 @@
/* ------------------------------ */
.balign 128
.L_op_iput_quick: /* 0xe6 */
-/* File: x86_64/op_iput_quick.S */
/* For: iput-quick, iput-object-quick */
/* op vA, vB, offset@CCCC */
movzbq rINSTbl, %rcx # rcx <- BA
@@ -5574,7 +4924,6 @@
/* ------------------------------ */
.balign 128
.L_op_iput_wide_quick: /* 0xe7 */
-/* File: x86_64/op_iput_wide_quick.S */
/* iput-wide-quick vA, vB, offset@CCCC */
movzbq rINSTbl, %rcx # rcx<- BA
sarl $4, %ecx # ecx<- B
@@ -5591,7 +4940,6 @@
/* ------------------------------ */
.balign 128
.L_op_iput_object_quick: /* 0xe8 */
-/* File: x86_64/op_iput_object_quick.S */
EXPORT_PC
leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG0
movq rPC, OUT_ARG1
@@ -5605,8 +4953,6 @@
/* ------------------------------ */
.balign 128
.L_op_invoke_virtual_quick: /* 0xe9 */
-/* File: x86_64/op_invoke_virtual_quick.S */
-/* File: x86_64/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -5629,12 +4975,9 @@
FETCH_INST
GOTO_NEXT
-
/* ------------------------------ */
.balign 128
.L_op_invoke_virtual_range_quick: /* 0xea */
-/* File: x86_64/op_invoke_virtual_range_quick.S */
-/* File: x86_64/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -5657,12 +5000,9 @@
FETCH_INST
GOTO_NEXT
-
/* ------------------------------ */
.balign 128
.L_op_iput_boolean_quick: /* 0xeb */
-/* File: x86_64/op_iput_boolean_quick.S */
-/* File: x86_64/op_iput_quick.S */
/* For: iput-quick, iput-object-quick */
/* op vA, vB, offset@CCCC */
movzbq rINSTbl, %rcx # rcx <- BA
@@ -5676,12 +5016,9 @@
movb rINSTbl, (%rcx,%rax,1)
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_iput_byte_quick: /* 0xec */
-/* File: x86_64/op_iput_byte_quick.S */
-/* File: x86_64/op_iput_quick.S */
/* For: iput-quick, iput-object-quick */
/* op vA, vB, offset@CCCC */
movzbq rINSTbl, %rcx # rcx <- BA
@@ -5695,12 +5032,9 @@
movb rINSTbl, (%rcx,%rax,1)
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_iput_char_quick: /* 0xed */
-/* File: x86_64/op_iput_char_quick.S */
-/* File: x86_64/op_iput_quick.S */
/* For: iput-quick, iput-object-quick */
/* op vA, vB, offset@CCCC */
movzbq rINSTbl, %rcx # rcx <- BA
@@ -5714,12 +5048,9 @@
movw rINSTw, (%rcx,%rax,1)
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_iput_short_quick: /* 0xee */
-/* File: x86_64/op_iput_short_quick.S */
-/* File: x86_64/op_iput_quick.S */
/* For: iput-quick, iput-object-quick */
/* op vA, vB, offset@CCCC */
movzbq rINSTbl, %rcx # rcx <- BA
@@ -5733,12 +5064,9 @@
movw rINSTw, (%rcx,%rax,1)
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_iget_boolean_quick: /* 0xef */
-/* File: x86_64/op_iget_boolean_quick.S */
-/* File: x86_64/op_iget_quick.S */
/* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick, iget-wide-quick */
/* op vA, vB, offset@CCCC */
movl rINST, %ecx # rcx <- BA
@@ -5757,12 +5085,9 @@
.endif
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_iget_byte_quick: /* 0xf0 */
-/* File: x86_64/op_iget_byte_quick.S */
-/* File: x86_64/op_iget_quick.S */
/* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick, iget-wide-quick */
/* op vA, vB, offset@CCCC */
movl rINST, %ecx # rcx <- BA
@@ -5781,12 +5106,9 @@
.endif
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_iget_char_quick: /* 0xf1 */
-/* File: x86_64/op_iget_char_quick.S */
-/* File: x86_64/op_iget_quick.S */
/* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick, iget-wide-quick */
/* op vA, vB, offset@CCCC */
movl rINST, %ecx # rcx <- BA
@@ -5805,12 +5127,9 @@
.endif
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_iget_short_quick: /* 0xf2 */
-/* File: x86_64/op_iget_short_quick.S */
-/* File: x86_64/op_iget_quick.S */
/* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick, iget-wide-quick */
/* op vA, vB, offset@CCCC */
movl rINST, %ecx # rcx <- BA
@@ -5829,89 +5148,65 @@
.endif
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_unused_f3: /* 0xf3 */
-/* File: x86_64/op_unused_f3.S */
-/* File: x86_64/unused.S */
/*
* Bail to reference interpreter to throw.
*/
jmp MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_f4: /* 0xf4 */
-/* File: x86_64/op_unused_f4.S */
-/* File: x86_64/unused.S */
/*
* Bail to reference interpreter to throw.
*/
jmp MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_f5: /* 0xf5 */
-/* File: x86_64/op_unused_f5.S */
-/* File: x86_64/unused.S */
/*
* Bail to reference interpreter to throw.
*/
jmp MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_f6: /* 0xf6 */
-/* File: x86_64/op_unused_f6.S */
-/* File: x86_64/unused.S */
/*
* Bail to reference interpreter to throw.
*/
jmp MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_f7: /* 0xf7 */
-/* File: x86_64/op_unused_f7.S */
-/* File: x86_64/unused.S */
/*
* Bail to reference interpreter to throw.
*/
jmp MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_f8: /* 0xf8 */
-/* File: x86_64/op_unused_f8.S */
-/* File: x86_64/unused.S */
/*
* Bail to reference interpreter to throw.
*/
jmp MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_unused_f9: /* 0xf9 */
-/* File: x86_64/op_unused_f9.S */
-/* File: x86_64/unused.S */
/*
* Bail to reference interpreter to throw.
*/
jmp MterpFallback
-
/* ------------------------------ */
.balign 128
.L_op_invoke_polymorphic: /* 0xfa */
-/* File: x86_64/op_invoke_polymorphic.S */
-/* File: x86_64/invoke_polymorphic.S */
/*
* invoke-polymorphic handler wrapper.
*/
@@ -5934,12 +5229,9 @@
FETCH_INST
GOTO_NEXT
-
/* ------------------------------ */
.balign 128
.L_op_invoke_polymorphic_range: /* 0xfb */
-/* File: x86_64/op_invoke_polymorphic_range.S */
-/* File: x86_64/invoke_polymorphic.S */
/*
* invoke-polymorphic handler wrapper.
*/
@@ -5962,12 +5254,9 @@
FETCH_INST
GOTO_NEXT
-
/* ------------------------------ */
.balign 128
.L_op_invoke_custom: /* 0xfc */
-/* File: x86_64/op_invoke_custom.S */
-/* File: x86_64/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -5990,12 +5279,9 @@
FETCH_INST
GOTO_NEXT
-
/* ------------------------------ */
.balign 128
.L_op_invoke_custom_range: /* 0xfd */
-/* File: x86_64/op_invoke_custom_range.S */
-/* File: x86_64/invoke.S */
/*
* Generic invoke handler wrapper.
*/
@@ -6018,12 +5304,9 @@
FETCH_INST
GOTO_NEXT
-
/* ------------------------------ */
.balign 128
.L_op_const_method_handle: /* 0xfe */
-/* File: x86_64/op_const_method_handle.S */
-/* File: x86_64/const.S */
/* const/class vAA, type@BBBB */
/* const/method-handle vAA, method_handle@BBBB */
/* const/method-type vAA, proto@BBBB */
@@ -6039,12 +5322,9 @@
jnz MterpPossibleException
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
/* ------------------------------ */
.balign 128
.L_op_const_method_type: /* 0xff */
-/* File: x86_64/op_const_method_type.S */
-/* File: x86_64/const.S */
/* const/class vAA, type@BBBB */
/* const/method-handle vAA, method_handle@BBBB */
/* const/method-type vAA, proto@BBBB */
@@ -6060,23 +5340,13 @@
jnz MterpPossibleException
ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
-
.balign 128
-/* File: x86_64/instruction_end.S */
OBJECT_TYPE(artMterpAsmInstructionEnd)
ASM_HIDDEN SYMBOL(artMterpAsmInstructionEnd)
.global SYMBOL(artMterpAsmInstructionEnd)
SYMBOL(artMterpAsmInstructionEnd):
-
-/*
- * ===========================================================================
- * Sister implementations
- * ===========================================================================
- */
-/* File: x86_64/instruction_start_sister.S */
-
OBJECT_TYPE(artMterpAsmSisterStart)
ASM_HIDDEN SYMBOL(artMterpAsmSisterStart)
.global SYMBOL(artMterpAsmSisterStart)
@@ -6084,25 +5354,19 @@
.balign 4
SYMBOL(artMterpAsmSisterStart):
-/* File: x86_64/instruction_end_sister.S */
-
OBJECT_TYPE(artMterpAsmSisterEnd)
ASM_HIDDEN SYMBOL(artMterpAsmSisterEnd)
.global SYMBOL(artMterpAsmSisterEnd)
SYMBOL(artMterpAsmSisterEnd):
-/* File: x86_64/instruction_start_alt.S */
-
OBJECT_TYPE(artMterpAsmAltInstructionStart)
ASM_HIDDEN SYMBOL(artMterpAsmAltInstructionStart)
.global SYMBOL(artMterpAsmAltInstructionStart)
.text
SYMBOL(artMterpAsmAltInstructionStart) = .L_ALT_op_nop
-
/* ------------------------------ */
.balign 128
.L_ALT_op_nop: /* 0x00 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6124,7 +5388,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move: /* 0x01 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6146,7 +5409,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_from16: /* 0x02 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6168,7 +5430,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_16: /* 0x03 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6190,7 +5451,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_wide: /* 0x04 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6212,7 +5472,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_wide_from16: /* 0x05 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6234,7 +5493,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_wide_16: /* 0x06 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6256,7 +5514,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_object: /* 0x07 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6278,7 +5535,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_object_from16: /* 0x08 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6300,7 +5556,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_object_16: /* 0x09 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6322,7 +5577,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_result: /* 0x0a */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6344,7 +5598,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_result_wide: /* 0x0b */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6366,7 +5619,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_result_object: /* 0x0c */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6388,7 +5640,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_move_exception: /* 0x0d */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6410,7 +5661,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_return_void: /* 0x0e */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6432,7 +5682,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_return: /* 0x0f */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6454,7 +5703,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_return_wide: /* 0x10 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6476,7 +5724,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_return_object: /* 0x11 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6498,7 +5745,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_4: /* 0x12 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6520,7 +5766,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_16: /* 0x13 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6542,7 +5787,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const: /* 0x14 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6564,7 +5808,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_high16: /* 0x15 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6586,7 +5829,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_wide_16: /* 0x16 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6608,7 +5850,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_wide_32: /* 0x17 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6630,7 +5871,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_wide: /* 0x18 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6652,7 +5892,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_wide_high16: /* 0x19 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6674,7 +5913,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_string: /* 0x1a */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6696,7 +5934,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_string_jumbo: /* 0x1b */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6718,7 +5955,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_class: /* 0x1c */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6740,7 +5976,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_monitor_enter: /* 0x1d */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6762,7 +5997,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_monitor_exit: /* 0x1e */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6784,7 +6018,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_check_cast: /* 0x1f */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6806,7 +6039,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_instance_of: /* 0x20 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6828,7 +6060,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_array_length: /* 0x21 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6850,7 +6081,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_new_instance: /* 0x22 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6872,7 +6102,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_new_array: /* 0x23 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6894,7 +6123,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_filled_new_array: /* 0x24 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6916,7 +6144,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_filled_new_array_range: /* 0x25 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6938,7 +6165,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_fill_array_data: /* 0x26 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6960,7 +6186,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_throw: /* 0x27 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -6982,7 +6207,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_goto: /* 0x28 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7004,7 +6228,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_goto_16: /* 0x29 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7026,7 +6249,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_goto_32: /* 0x2a */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7048,7 +6270,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_packed_switch: /* 0x2b */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7070,7 +6291,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sparse_switch: /* 0x2c */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7092,7 +6312,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_cmpl_float: /* 0x2d */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7114,7 +6333,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_cmpg_float: /* 0x2e */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7136,7 +6354,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_cmpl_double: /* 0x2f */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7158,7 +6375,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_cmpg_double: /* 0x30 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7180,7 +6396,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_cmp_long: /* 0x31 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7202,7 +6417,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_eq: /* 0x32 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7224,7 +6438,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_ne: /* 0x33 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7246,7 +6459,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_lt: /* 0x34 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7268,7 +6480,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_ge: /* 0x35 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7290,7 +6501,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_gt: /* 0x36 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7312,7 +6522,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_le: /* 0x37 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7334,7 +6543,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_eqz: /* 0x38 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7356,7 +6564,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_nez: /* 0x39 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7378,7 +6585,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_ltz: /* 0x3a */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7400,7 +6606,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_gez: /* 0x3b */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7422,7 +6627,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_gtz: /* 0x3c */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7444,7 +6648,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_if_lez: /* 0x3d */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7466,7 +6669,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_3e: /* 0x3e */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7488,7 +6690,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_3f: /* 0x3f */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7510,7 +6711,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_40: /* 0x40 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7532,7 +6732,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_41: /* 0x41 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7554,7 +6753,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_42: /* 0x42 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7576,7 +6774,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_43: /* 0x43 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7598,7 +6795,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aget: /* 0x44 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7620,7 +6816,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aget_wide: /* 0x45 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7642,7 +6837,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aget_object: /* 0x46 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7664,7 +6858,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aget_boolean: /* 0x47 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7686,7 +6879,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aget_byte: /* 0x48 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7708,7 +6900,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aget_char: /* 0x49 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7730,7 +6921,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aget_short: /* 0x4a */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7752,7 +6942,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aput: /* 0x4b */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7774,7 +6963,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aput_wide: /* 0x4c */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7796,7 +6984,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aput_object: /* 0x4d */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7818,7 +7005,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aput_boolean: /* 0x4e */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7840,7 +7026,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aput_byte: /* 0x4f */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7862,7 +7047,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aput_char: /* 0x50 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7884,7 +7068,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_aput_short: /* 0x51 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7906,7 +7089,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget: /* 0x52 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7928,7 +7110,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_wide: /* 0x53 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7950,7 +7131,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_object: /* 0x54 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7972,7 +7152,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_boolean: /* 0x55 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -7994,7 +7173,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_byte: /* 0x56 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8016,7 +7194,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_char: /* 0x57 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8038,7 +7215,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_short: /* 0x58 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8060,7 +7236,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput: /* 0x59 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8082,7 +7257,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_wide: /* 0x5a */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8104,7 +7278,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_object: /* 0x5b */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8126,7 +7299,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_boolean: /* 0x5c */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8148,7 +7320,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_byte: /* 0x5d */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8170,7 +7341,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_char: /* 0x5e */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8192,7 +7362,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_short: /* 0x5f */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8214,7 +7383,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sget: /* 0x60 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8236,7 +7404,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sget_wide: /* 0x61 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8258,7 +7425,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sget_object: /* 0x62 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8280,7 +7446,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sget_boolean: /* 0x63 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8302,7 +7467,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sget_byte: /* 0x64 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8324,7 +7488,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sget_char: /* 0x65 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8346,7 +7509,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sget_short: /* 0x66 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8368,7 +7530,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sput: /* 0x67 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8390,7 +7551,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sput_wide: /* 0x68 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8412,7 +7572,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sput_object: /* 0x69 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8434,7 +7593,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sput_boolean: /* 0x6a */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8456,7 +7614,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sput_byte: /* 0x6b */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8478,7 +7635,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sput_char: /* 0x6c */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8500,7 +7656,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sput_short: /* 0x6d */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8522,7 +7677,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_virtual: /* 0x6e */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8544,7 +7698,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_super: /* 0x6f */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8566,7 +7719,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_direct: /* 0x70 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8588,7 +7740,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_static: /* 0x71 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8610,7 +7761,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_interface: /* 0x72 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8632,7 +7782,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_return_void_no_barrier: /* 0x73 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8654,7 +7803,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_virtual_range: /* 0x74 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8676,7 +7824,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_super_range: /* 0x75 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8698,7 +7845,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_direct_range: /* 0x76 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8720,7 +7866,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_static_range: /* 0x77 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8742,7 +7887,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_interface_range: /* 0x78 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8764,7 +7908,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_79: /* 0x79 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8786,7 +7929,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_7a: /* 0x7a */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8808,7 +7950,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_neg_int: /* 0x7b */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8830,7 +7971,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_not_int: /* 0x7c */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8852,7 +7992,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_neg_long: /* 0x7d */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8874,7 +8013,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_not_long: /* 0x7e */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8896,7 +8034,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_neg_float: /* 0x7f */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8918,7 +8055,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_neg_double: /* 0x80 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8940,7 +8076,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_int_to_long: /* 0x81 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8962,7 +8097,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_int_to_float: /* 0x82 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -8984,7 +8118,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_int_to_double: /* 0x83 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9006,7 +8139,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_long_to_int: /* 0x84 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9028,7 +8160,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_long_to_float: /* 0x85 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9050,7 +8181,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_long_to_double: /* 0x86 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9072,7 +8202,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_float_to_int: /* 0x87 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9094,7 +8223,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_float_to_long: /* 0x88 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9116,7 +8244,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_float_to_double: /* 0x89 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9138,7 +8265,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_double_to_int: /* 0x8a */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9160,7 +8286,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_double_to_long: /* 0x8b */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9182,7 +8307,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_double_to_float: /* 0x8c */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9204,7 +8328,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_int_to_byte: /* 0x8d */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9226,7 +8349,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_int_to_char: /* 0x8e */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9248,7 +8370,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_int_to_short: /* 0x8f */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9270,7 +8391,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_add_int: /* 0x90 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9292,7 +8412,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sub_int: /* 0x91 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9314,7 +8433,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_mul_int: /* 0x92 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9336,7 +8454,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_div_int: /* 0x93 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9358,7 +8475,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rem_int: /* 0x94 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9380,7 +8496,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_and_int: /* 0x95 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9402,7 +8517,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_or_int: /* 0x96 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9424,7 +8538,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_xor_int: /* 0x97 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9446,7 +8559,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_shl_int: /* 0x98 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9468,7 +8580,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_shr_int: /* 0x99 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9490,7 +8601,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_ushr_int: /* 0x9a */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9512,7 +8622,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_add_long: /* 0x9b */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9534,7 +8643,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sub_long: /* 0x9c */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9556,7 +8664,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_mul_long: /* 0x9d */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9578,7 +8685,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_div_long: /* 0x9e */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9600,7 +8706,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rem_long: /* 0x9f */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9622,7 +8727,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_and_long: /* 0xa0 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9644,7 +8748,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_or_long: /* 0xa1 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9666,7 +8769,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_xor_long: /* 0xa2 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9688,7 +8790,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_shl_long: /* 0xa3 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9710,7 +8811,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_shr_long: /* 0xa4 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9732,7 +8832,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_ushr_long: /* 0xa5 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9754,7 +8853,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_add_float: /* 0xa6 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9776,7 +8874,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sub_float: /* 0xa7 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9798,7 +8895,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_mul_float: /* 0xa8 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9820,7 +8916,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_div_float: /* 0xa9 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9842,7 +8937,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rem_float: /* 0xaa */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9864,7 +8958,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_add_double: /* 0xab */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9886,7 +8979,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sub_double: /* 0xac */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9908,7 +9000,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_mul_double: /* 0xad */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9930,7 +9021,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_div_double: /* 0xae */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9952,7 +9042,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rem_double: /* 0xaf */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9974,7 +9063,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_add_int_2addr: /* 0xb0 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -9996,7 +9084,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sub_int_2addr: /* 0xb1 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10018,7 +9105,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_mul_int_2addr: /* 0xb2 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10040,7 +9126,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_div_int_2addr: /* 0xb3 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10062,7 +9147,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rem_int_2addr: /* 0xb4 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10084,7 +9168,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_and_int_2addr: /* 0xb5 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10106,7 +9189,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_or_int_2addr: /* 0xb6 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10128,7 +9210,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_xor_int_2addr: /* 0xb7 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10150,7 +9231,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_shl_int_2addr: /* 0xb8 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10172,7 +9252,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_shr_int_2addr: /* 0xb9 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10194,7 +9273,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_ushr_int_2addr: /* 0xba */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10216,7 +9294,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_add_long_2addr: /* 0xbb */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10238,7 +9315,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sub_long_2addr: /* 0xbc */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10260,7 +9336,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_mul_long_2addr: /* 0xbd */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10282,7 +9357,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_div_long_2addr: /* 0xbe */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10304,7 +9378,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rem_long_2addr: /* 0xbf */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10326,7 +9399,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_and_long_2addr: /* 0xc0 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10348,7 +9420,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_or_long_2addr: /* 0xc1 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10370,7 +9441,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_xor_long_2addr: /* 0xc2 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10392,7 +9462,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_shl_long_2addr: /* 0xc3 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10414,7 +9483,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_shr_long_2addr: /* 0xc4 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10436,7 +9504,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_ushr_long_2addr: /* 0xc5 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10458,7 +9525,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_add_float_2addr: /* 0xc6 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10480,7 +9546,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sub_float_2addr: /* 0xc7 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10502,7 +9567,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_mul_float_2addr: /* 0xc8 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10524,7 +9588,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_div_float_2addr: /* 0xc9 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10546,7 +9609,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rem_float_2addr: /* 0xca */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10568,7 +9630,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_add_double_2addr: /* 0xcb */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10590,7 +9651,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_sub_double_2addr: /* 0xcc */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10612,7 +9672,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_mul_double_2addr: /* 0xcd */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10634,7 +9693,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_div_double_2addr: /* 0xce */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10656,7 +9714,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rem_double_2addr: /* 0xcf */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10678,7 +9735,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_add_int_lit16: /* 0xd0 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10700,7 +9756,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rsub_int: /* 0xd1 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10722,7 +9777,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_mul_int_lit16: /* 0xd2 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10744,7 +9798,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_div_int_lit16: /* 0xd3 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10766,7 +9819,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rem_int_lit16: /* 0xd4 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10788,7 +9840,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_and_int_lit16: /* 0xd5 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10810,7 +9861,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_or_int_lit16: /* 0xd6 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10832,7 +9882,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_xor_int_lit16: /* 0xd7 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10854,7 +9903,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_add_int_lit8: /* 0xd8 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10876,7 +9924,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rsub_int_lit8: /* 0xd9 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10898,7 +9945,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_mul_int_lit8: /* 0xda */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10920,7 +9966,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_div_int_lit8: /* 0xdb */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10942,7 +9987,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_rem_int_lit8: /* 0xdc */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10964,7 +10008,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_and_int_lit8: /* 0xdd */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -10986,7 +10029,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_or_int_lit8: /* 0xde */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11008,7 +10050,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_xor_int_lit8: /* 0xdf */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11030,7 +10071,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_shl_int_lit8: /* 0xe0 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11052,7 +10092,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_shr_int_lit8: /* 0xe1 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11074,7 +10113,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_ushr_int_lit8: /* 0xe2 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11096,7 +10134,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_quick: /* 0xe3 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11118,7 +10155,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_wide_quick: /* 0xe4 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11140,7 +10176,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_object_quick: /* 0xe5 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11162,7 +10197,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_quick: /* 0xe6 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11184,7 +10218,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_wide_quick: /* 0xe7 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11206,7 +10239,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_object_quick: /* 0xe8 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11228,7 +10260,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_virtual_quick: /* 0xe9 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11250,7 +10281,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_virtual_range_quick: /* 0xea */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11272,7 +10302,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_boolean_quick: /* 0xeb */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11294,7 +10323,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_byte_quick: /* 0xec */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11316,7 +10344,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_char_quick: /* 0xed */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11338,7 +10365,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iput_short_quick: /* 0xee */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11360,7 +10386,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_boolean_quick: /* 0xef */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11382,7 +10407,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_byte_quick: /* 0xf0 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11404,7 +10428,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_char_quick: /* 0xf1 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11426,7 +10449,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_iget_short_quick: /* 0xf2 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11448,7 +10470,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_f3: /* 0xf3 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11470,7 +10491,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_f4: /* 0xf4 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11492,7 +10512,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_f5: /* 0xf5 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11514,7 +10533,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_f6: /* 0xf6 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11536,7 +10554,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_f7: /* 0xf7 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11558,7 +10575,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_f8: /* 0xf8 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11580,7 +10596,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_unused_f9: /* 0xf9 */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11602,7 +10617,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_polymorphic: /* 0xfa */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11624,7 +10638,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_polymorphic_range: /* 0xfb */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11646,7 +10659,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_custom: /* 0xfc */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11668,7 +10680,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_invoke_custom_range: /* 0xfd */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11690,7 +10701,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_method_handle: /* 0xfe */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11712,7 +10722,6 @@
/* ------------------------------ */
.balign 128
.L_ALT_op_const_method_type: /* 0xff */
-/* File: x86_64/alt_stub.S */
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
@@ -11732,14 +10741,11 @@
jmp .L_op_nop+(255*128)
.balign 128
-/* File: x86_64/instruction_end_alt.S */
OBJECT_TYPE(artMterpAsmAltInstructionEnd)
ASM_HIDDEN SYMBOL(artMterpAsmAltInstructionEnd)
.global SYMBOL(artMterpAsmAltInstructionEnd)
SYMBOL(artMterpAsmAltInstructionEnd):
-
-/* File: x86_64/footer.S */
/*
* ===========================================================================
* Common subroutines and data
@@ -12037,4 +11043,3 @@
ret
.cfi_endproc
SIZE(ExecuteMterpImpl,ExecuteMterpImpl)
-
diff --git a/runtime/interpreter/mterp/rebuild.sh b/runtime/interpreter/mterp/rebuild.sh
deleted file mode 100755
index ca3dcd9..0000000
--- a/runtime/interpreter/mterp/rebuild.sh
+++ /dev/null
@@ -1,23 +0,0 @@
-#!/bin/sh
-#
-# Copyright (C) 2016 The Android Open Source Project
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-# See the License for the specific language governing permissions and
-# limitations under the License.
-
-#
-# Rebuild for all known targets. Necessary until the stuff in "out" gets
-# generated as part of the build.
-#
-set -e
-
-for arch in arm x86 mips arm64 x86_64 mips64; do TARGET_ARCH_EXT=$arch make -f Makefile_mterp; done
diff --git a/runtime/interpreter/mterp/x86/alt_stub.S b/runtime/interpreter/mterp/x86/alt_stub.S
index a5b39b8..79e3f74 100644
--- a/runtime/interpreter/mterp/x86/alt_stub.S
+++ b/runtime/interpreter/mterp/x86/alt_stub.S
@@ -1,3 +1,4 @@
+%def alt_stub():
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
diff --git a/runtime/interpreter/mterp/x86/bincmp.S b/runtime/interpreter/mterp/x86/bincmp.S
index ee32278..28ea08e 100644
--- a/runtime/interpreter/mterp/x86/bincmp.S
+++ b/runtime/interpreter/mterp/x86/bincmp.S
@@ -1,3 +1,4 @@
+%def bincmp(revcmp=""):
/*
* Generic two-operand compare-and-branch operation. Provide a "revcmp"
* fragment that specifies the *reverse* comparison to perform, e.g.
diff --git a/runtime/interpreter/mterp/x86/bindiv.S b/runtime/interpreter/mterp/x86/bindiv.S
index e87ba45..e59e6ad 100644
--- a/runtime/interpreter/mterp/x86/bindiv.S
+++ b/runtime/interpreter/mterp/x86/bindiv.S
@@ -1,4 +1,4 @@
-%default {"result":"","special":"","rem":""}
+%def bindiv(result="", special="", rem=""):
/*
* 32-bit binary div/rem operation. Handles special case of op0=minint and
* op1=-1.
diff --git a/runtime/interpreter/mterp/x86/bindiv2addr.S b/runtime/interpreter/mterp/x86/bindiv2addr.S
index e620996..40c22bb 100644
--- a/runtime/interpreter/mterp/x86/bindiv2addr.S
+++ b/runtime/interpreter/mterp/x86/bindiv2addr.S
@@ -1,4 +1,4 @@
-%default {"result":"","special":""}
+%def bindiv2addr(result="", special=""):
/*
* 32-bit binary div/rem operation. Handles special case of op0=minint and
* op1=-1.
diff --git a/runtime/interpreter/mterp/x86/bindivLit16.S b/runtime/interpreter/mterp/x86/bindivLit16.S
index be094ae..a89f452 100644
--- a/runtime/interpreter/mterp/x86/bindivLit16.S
+++ b/runtime/interpreter/mterp/x86/bindivLit16.S
@@ -1,4 +1,4 @@
-%default {"result":"","special":""}
+%def bindivLit16(result="", special=""):
/*
* 32-bit binary div/rem operation. Handles special case of op0=minint and
* op1=-1.
diff --git a/runtime/interpreter/mterp/x86/bindivLit8.S b/runtime/interpreter/mterp/x86/bindivLit8.S
index fddb545..ce13019 100644
--- a/runtime/interpreter/mterp/x86/bindivLit8.S
+++ b/runtime/interpreter/mterp/x86/bindivLit8.S
@@ -1,4 +1,4 @@
-%default {"result":"","special":""}
+%def bindivLit8(result="", special=""):
/*
* 32-bit div/rem "lit8" binary operation. Handles special case of
* op0=minint & op1=-1
diff --git a/runtime/interpreter/mterp/x86/binop.S b/runtime/interpreter/mterp/x86/binop.S
index d895235..c827372 100644
--- a/runtime/interpreter/mterp/x86/binop.S
+++ b/runtime/interpreter/mterp/x86/binop.S
@@ -1,4 +1,4 @@
-%default {"result":"%eax"}
+%def binop(result="%eax", instr=""):
/*
* Generic 32-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = eax op (rFP,%ecx,4)".
diff --git a/runtime/interpreter/mterp/x86/binop1.S b/runtime/interpreter/mterp/x86/binop1.S
index 5049bb3..e6ae857 100644
--- a/runtime/interpreter/mterp/x86/binop1.S
+++ b/runtime/interpreter/mterp/x86/binop1.S
@@ -1,4 +1,4 @@
-%default {"result":"%eax","tmp":"%ecx"}
+%def binop1(result="%eax", tmp="%ecx", instr=""):
/*
* Generic 32-bit binary operation in which both operands loaded to
* registers (op0 in eax, op1 in ecx).
diff --git a/runtime/interpreter/mterp/x86/binop2addr.S b/runtime/interpreter/mterp/x86/binop2addr.S
index f126234..0b74364 100644
--- a/runtime/interpreter/mterp/x86/binop2addr.S
+++ b/runtime/interpreter/mterp/x86/binop2addr.S
@@ -1,4 +1,4 @@
-%default {"result":"%eax"}
+%def binop2addr(result="%eax", instr=""):
/*
* Generic 32-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = r0 op r1".
diff --git a/runtime/interpreter/mterp/x86/binopLit16.S b/runtime/interpreter/mterp/x86/binopLit16.S
index 2fd59de..5b162f1 100644
--- a/runtime/interpreter/mterp/x86/binopLit16.S
+++ b/runtime/interpreter/mterp/x86/binopLit16.S
@@ -1,4 +1,4 @@
-%default {"result":"%eax"}
+%def binopLit16(result="%eax", instr=""):
/*
* Generic 32-bit "lit16" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = eax op ecx".
diff --git a/runtime/interpreter/mterp/x86/binopLit8.S b/runtime/interpreter/mterp/x86/binopLit8.S
index 67cead2..c2ebc18 100644
--- a/runtime/interpreter/mterp/x86/binopLit8.S
+++ b/runtime/interpreter/mterp/x86/binopLit8.S
@@ -1,4 +1,4 @@
-%default {"result":"%eax"}
+%def binopLit8(result="%eax", instr=""):
/*
* Generic 32-bit "lit8" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = eax op ecx".
diff --git a/runtime/interpreter/mterp/x86/binopWide.S b/runtime/interpreter/mterp/x86/binopWide.S
index da1293d..1e878c8 100644
--- a/runtime/interpreter/mterp/x86/binopWide.S
+++ b/runtime/interpreter/mterp/x86/binopWide.S
@@ -1,3 +1,4 @@
+%def binopWide(instr1="", instr2=""):
/*
* Generic 64-bit binary operation.
*/
diff --git a/runtime/interpreter/mterp/x86/binopWide2addr.S b/runtime/interpreter/mterp/x86/binopWide2addr.S
index da816f4..65da1df 100644
--- a/runtime/interpreter/mterp/x86/binopWide2addr.S
+++ b/runtime/interpreter/mterp/x86/binopWide2addr.S
@@ -1,3 +1,4 @@
+%def binopWide2addr(instr1="", instr2=""):
/*
* Generic 64-bit binary operation.
*/
diff --git a/runtime/interpreter/mterp/x86/const.S b/runtime/interpreter/mterp/x86/const.S
index f0cac1a..aad76bb 100644
--- a/runtime/interpreter/mterp/x86/const.S
+++ b/runtime/interpreter/mterp/x86/const.S
@@ -1,4 +1,4 @@
-%default { "helper":"UndefinedConstHandler" }
+%def const(helper="UndefinedConstHandler"):
/* const/class vAA, type@BBBB */
/* const/method-handle vAA, method_handle@BBBB */
/* const/method-type vAA, proto@BBBB */
diff --git a/runtime/interpreter/mterp/x86/cvtfp_int.S b/runtime/interpreter/mterp/x86/cvtfp_int.S
index a8bad63..0bc9908 100644
--- a/runtime/interpreter/mterp/x86/cvtfp_int.S
+++ b/runtime/interpreter/mterp/x86/cvtfp_int.S
@@ -1,4 +1,4 @@
-%default {"srcdouble":"1","tgtlong":"1"}
+%def cvtfp_int(srcdouble="1", tgtlong="1"):
/* On fp to int conversions, Java requires that
* if the result > maxint, it should be clamped to maxint. If it is less
* than minint, it should be clamped to minint. If it is a nan, the result
diff --git a/runtime/interpreter/mterp/x86/entry.S b/runtime/interpreter/mterp/x86/entry.S
index 939dc61..b6291c1 100644
--- a/runtime/interpreter/mterp/x86/entry.S
+++ b/runtime/interpreter/mterp/x86/entry.S
@@ -1,3 +1,4 @@
+%def entry():
/*
* Copyright (C) 2016 The Android Open Source Project
*
diff --git a/runtime/interpreter/mterp/x86/fallback.S b/runtime/interpreter/mterp/x86/fallback.S
index 8d61166..e3c2e2b 100644
--- a/runtime/interpreter/mterp/x86/fallback.S
+++ b/runtime/interpreter/mterp/x86/fallback.S
@@ -1,3 +1,4 @@
+%def fallback():
/* Transfer stub to alternate interpreter */
jmp MterpFallback
diff --git a/runtime/interpreter/mterp/x86/field.S b/runtime/interpreter/mterp/x86/field.S
index 8432c74..06362d8 100644
--- a/runtime/interpreter/mterp/x86/field.S
+++ b/runtime/interpreter/mterp/x86/field.S
@@ -1,4 +1,4 @@
-%default { }
+%def field(helper=""):
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
diff --git a/runtime/interpreter/mterp/x86/footer.S b/runtime/interpreter/mterp/x86/footer.S
index 0b08cf9..31cc067 100644
--- a/runtime/interpreter/mterp/x86/footer.S
+++ b/runtime/interpreter/mterp/x86/footer.S
@@ -1,3 +1,4 @@
+%def footer():
/*
* ===========================================================================
* Common subroutines and data
diff --git a/runtime/interpreter/mterp/x86/fpcmp.S b/runtime/interpreter/mterp/x86/fpcmp.S
index 5f9eef9..7cd18f6 100644
--- a/runtime/interpreter/mterp/x86/fpcmp.S
+++ b/runtime/interpreter/mterp/x86/fpcmp.S
@@ -1,4 +1,4 @@
-%default {"suff":"d","nanval":"pos"}
+%def fpcmp(suff="d", nanval="pos"):
/*
* Compare two floating-point values. Puts 0, 1, or -1 into the
* destination register based on the results of the comparison.
diff --git a/runtime/interpreter/mterp/x86/fpcvt.S b/runtime/interpreter/mterp/x86/fpcvt.S
index 7808285..4280f15 100644
--- a/runtime/interpreter/mterp/x86/fpcvt.S
+++ b/runtime/interpreter/mterp/x86/fpcvt.S
@@ -1,4 +1,4 @@
-%default {"instr":"","load":"","store":"","wide":"0"}
+%def fpcvt(instr="", load="", store="", wide="0"):
/*
* Generic 32-bit FP conversion operation.
*/
diff --git a/runtime/interpreter/mterp/x86/header.S b/runtime/interpreter/mterp/x86/header.S
index a79db27..f0d14fe 100644
--- a/runtime/interpreter/mterp/x86/header.S
+++ b/runtime/interpreter/mterp/x86/header.S
@@ -1,3 +1,4 @@
+%def header():
/*
* Copyright (C) 2016 The Android Open Source Project
*
diff --git a/runtime/interpreter/mterp/x86/instruction_end.S b/runtime/interpreter/mterp/x86/instruction_end.S
index 94587f8..5a24b66 100644
--- a/runtime/interpreter/mterp/x86/instruction_end.S
+++ b/runtime/interpreter/mterp/x86/instruction_end.S
@@ -1,3 +1,4 @@
+%def instruction_end():
OBJECT_TYPE(artMterpAsmInstructionEnd)
ASM_HIDDEN SYMBOL(artMterpAsmInstructionEnd)
diff --git a/runtime/interpreter/mterp/x86/instruction_end_alt.S b/runtime/interpreter/mterp/x86/instruction_end_alt.S
index 7757bce..d037db9 100644
--- a/runtime/interpreter/mterp/x86/instruction_end_alt.S
+++ b/runtime/interpreter/mterp/x86/instruction_end_alt.S
@@ -1,3 +1,4 @@
+%def instruction_end_alt():
OBJECT_TYPE(artMterpAsmAltInstructionEnd)
ASM_HIDDEN SYMBOL(artMterpAsmAltInstructionEnd)
diff --git a/runtime/interpreter/mterp/x86/instruction_end_sister.S b/runtime/interpreter/mterp/x86/instruction_end_sister.S
index 8eb79ac..7b1ec89 100644
--- a/runtime/interpreter/mterp/x86/instruction_end_sister.S
+++ b/runtime/interpreter/mterp/x86/instruction_end_sister.S
@@ -1,3 +1,4 @@
+%def instruction_end_sister():
OBJECT_TYPE(artMterpAsmSisterEnd)
ASM_HIDDEN SYMBOL(artMterpAsmSisterEnd)
diff --git a/runtime/interpreter/mterp/x86/instruction_start.S b/runtime/interpreter/mterp/x86/instruction_start.S
index 5d29a819..dee581b 100644
--- a/runtime/interpreter/mterp/x86/instruction_start.S
+++ b/runtime/interpreter/mterp/x86/instruction_start.S
@@ -1,3 +1,4 @@
+%def instruction_start():
OBJECT_TYPE(artMterpAsmInstructionStart)
ASM_HIDDEN SYMBOL(artMterpAsmInstructionStart)
diff --git a/runtime/interpreter/mterp/x86/instruction_start_alt.S b/runtime/interpreter/mterp/x86/instruction_start_alt.S
index 8dcf5bf..66650e7 100644
--- a/runtime/interpreter/mterp/x86/instruction_start_alt.S
+++ b/runtime/interpreter/mterp/x86/instruction_start_alt.S
@@ -1,3 +1,4 @@
+%def instruction_start_alt():
OBJECT_TYPE(artMterpAsmAltInstructionStart)
ASM_HIDDEN SYMBOL(artMterpAsmAltInstructionStart)
diff --git a/runtime/interpreter/mterp/x86/instruction_start_sister.S b/runtime/interpreter/mterp/x86/instruction_start_sister.S
index 796e98b..8c156ad 100644
--- a/runtime/interpreter/mterp/x86/instruction_start_sister.S
+++ b/runtime/interpreter/mterp/x86/instruction_start_sister.S
@@ -1,3 +1,4 @@
+%def instruction_start_sister():
OBJECT_TYPE(artMterpAsmSisterStart)
ASM_HIDDEN SYMBOL(artMterpAsmSisterStart)
diff --git a/runtime/interpreter/mterp/x86/invoke.S b/runtime/interpreter/mterp/x86/invoke.S
index c23053b..eb5cdbc 100644
--- a/runtime/interpreter/mterp/x86/invoke.S
+++ b/runtime/interpreter/mterp/x86/invoke.S
@@ -1,4 +1,4 @@
-%default { "helper":"UndefinedInvokeHandler" }
+%def invoke(helper="UndefinedInvokeHandler"):
/*
* Generic invoke handler wrapper.
*/
diff --git a/runtime/interpreter/mterp/x86/invoke_polymorphic.S b/runtime/interpreter/mterp/x86/invoke_polymorphic.S
index 5690b22..63196ec 100644
--- a/runtime/interpreter/mterp/x86/invoke_polymorphic.S
+++ b/runtime/interpreter/mterp/x86/invoke_polymorphic.S
@@ -1,4 +1,4 @@
-%default { "helper":"UndefinedInvokeHandler" }
+%def invoke_polymorphic(helper="UndefinedInvokeHandler"):
/*
* invoke-polymorphic handler wrapper.
*/
diff --git a/runtime/interpreter/mterp/x86/op_add_double.S b/runtime/interpreter/mterp/x86/op_add_double.S
index de2708f..a009239 100644
--- a/runtime/interpreter/mterp/x86/op_add_double.S
+++ b/runtime/interpreter/mterp/x86/op_add_double.S
@@ -1 +1,2 @@
-%include "x86/sseBinop.S" {"instr":"adds","suff":"d"}
+%def op_add_double():
+% sseBinop(instr="adds", suff="d")
diff --git a/runtime/interpreter/mterp/x86/op_add_double_2addr.S b/runtime/interpreter/mterp/x86/op_add_double_2addr.S
index 538c9ab..8cb45a9 100644
--- a/runtime/interpreter/mterp/x86/op_add_double_2addr.S
+++ b/runtime/interpreter/mterp/x86/op_add_double_2addr.S
@@ -1 +1,2 @@
-%include "x86/sseBinop2Addr.S" {"instr":"adds","suff":"d"}
+%def op_add_double_2addr():
+% sseBinop2Addr(instr="adds", suff="d")
diff --git a/runtime/interpreter/mterp/x86/op_add_float.S b/runtime/interpreter/mterp/x86/op_add_float.S
index 80b1736..dee28c7 100644
--- a/runtime/interpreter/mterp/x86/op_add_float.S
+++ b/runtime/interpreter/mterp/x86/op_add_float.S
@@ -1 +1,2 @@
-%include "x86/sseBinop.S" {"instr":"adds","suff":"s"}
+%def op_add_float():
+% sseBinop(instr="adds", suff="s")
diff --git a/runtime/interpreter/mterp/x86/op_add_float_2addr.S b/runtime/interpreter/mterp/x86/op_add_float_2addr.S
index 6649253..4deb445 100644
--- a/runtime/interpreter/mterp/x86/op_add_float_2addr.S
+++ b/runtime/interpreter/mterp/x86/op_add_float_2addr.S
@@ -1 +1,2 @@
-%include "x86/sseBinop2Addr.S" {"instr":"adds","suff":"s"}
+%def op_add_float_2addr():
+% sseBinop2Addr(instr="adds", suff="s")
diff --git a/runtime/interpreter/mterp/x86/op_add_int.S b/runtime/interpreter/mterp/x86/op_add_int.S
index f71a56b..9c4455a 100644
--- a/runtime/interpreter/mterp/x86/op_add_int.S
+++ b/runtime/interpreter/mterp/x86/op_add_int.S
@@ -1 +1,2 @@
-%include "x86/binop.S" {"instr":"addl (rFP,%ecx,4), %eax"}
+%def op_add_int():
+% binop(instr="addl (rFP,%ecx,4), %eax")
diff --git a/runtime/interpreter/mterp/x86/op_add_int_2addr.S b/runtime/interpreter/mterp/x86/op_add_int_2addr.S
index 5d43b65..b04ae4c 100644
--- a/runtime/interpreter/mterp/x86/op_add_int_2addr.S
+++ b/runtime/interpreter/mterp/x86/op_add_int_2addr.S
@@ -1 +1,2 @@
-%include "x86/binop2addr.S" {"instr":"addl %eax, (rFP,%ecx,4)"}
+%def op_add_int_2addr():
+% binop2addr(instr="addl %eax, (rFP,%ecx,4)")
diff --git a/runtime/interpreter/mterp/x86/op_add_int_lit16.S b/runtime/interpreter/mterp/x86/op_add_int_lit16.S
index 4f34d17..a431030 100644
--- a/runtime/interpreter/mterp/x86/op_add_int_lit16.S
+++ b/runtime/interpreter/mterp/x86/op_add_int_lit16.S
@@ -1 +1,2 @@
-%include "x86/binopLit16.S" {"instr":"addl %ecx, %eax"}
+%def op_add_int_lit16():
+% binopLit16(instr="addl %ecx, %eax")
diff --git a/runtime/interpreter/mterp/x86/op_add_int_lit8.S b/runtime/interpreter/mterp/x86/op_add_int_lit8.S
index 3f14744..3205aee 100644
--- a/runtime/interpreter/mterp/x86/op_add_int_lit8.S
+++ b/runtime/interpreter/mterp/x86/op_add_int_lit8.S
@@ -1 +1,2 @@
-%include "x86/binopLit8.S" {"instr":"addl %ecx, %eax"}
+%def op_add_int_lit8():
+% binopLit8(instr="addl %ecx, %eax")
diff --git a/runtime/interpreter/mterp/x86/op_add_long.S b/runtime/interpreter/mterp/x86/op_add_long.S
index dce0c26..24a9226 100644
--- a/runtime/interpreter/mterp/x86/op_add_long.S
+++ b/runtime/interpreter/mterp/x86/op_add_long.S
@@ -1 +1,2 @@
-%include "x86/binopWide.S" {"instr1":"addl (rFP,%ecx,4), rIBASE", "instr2":"adcl 4(rFP,%ecx,4), %eax"}
+%def op_add_long():
+% binopWide(instr1="addl (rFP,%ecx,4), rIBASE", instr2="adcl 4(rFP,%ecx,4), %eax")
diff --git a/runtime/interpreter/mterp/x86/op_add_long_2addr.S b/runtime/interpreter/mterp/x86/op_add_long_2addr.S
index 7847640..e020714 100644
--- a/runtime/interpreter/mterp/x86/op_add_long_2addr.S
+++ b/runtime/interpreter/mterp/x86/op_add_long_2addr.S
@@ -1 +1,2 @@
-%include "x86/binopWide2addr.S" {"instr1":"addl %eax, (rFP,rINST,4)","instr2":"adcl %ecx, 4(rFP,rINST,4)"}
+%def op_add_long_2addr():
+% binopWide2addr(instr1="addl %eax, (rFP,rINST,4)", instr2="adcl %ecx, 4(rFP,rINST,4)")
diff --git a/runtime/interpreter/mterp/x86/op_aget.S b/runtime/interpreter/mterp/x86/op_aget.S
index 338386f..fc57a91 100644
--- a/runtime/interpreter/mterp/x86/op_aget.S
+++ b/runtime/interpreter/mterp/x86/op_aget.S
@@ -1,4 +1,4 @@
-%default { "load":"movl", "shift":"4", "data_offset":"MIRROR_INT_ARRAY_DATA_OFFSET" }
+%def op_aget(load="movl", shift="4", data_offset="MIRROR_INT_ARRAY_DATA_OFFSET"):
/*
* Array get, 32 bits or less. vAA <- vBB[vCC].
*
diff --git a/runtime/interpreter/mterp/x86/op_aget_boolean.S b/runtime/interpreter/mterp/x86/op_aget_boolean.S
index d910c94..279e6fc 100644
--- a/runtime/interpreter/mterp/x86/op_aget_boolean.S
+++ b/runtime/interpreter/mterp/x86/op_aget_boolean.S
@@ -1 +1,2 @@
-%include "x86/op_aget.S" { "load":"movzbl", "shift":"1", "data_offset":"MIRROR_BOOLEAN_ARRAY_DATA_OFFSET" }
+%def op_aget_boolean():
+% op_aget(load="movzbl", shift="1", data_offset="MIRROR_BOOLEAN_ARRAY_DATA_OFFSET")
diff --git a/runtime/interpreter/mterp/x86/op_aget_byte.S b/runtime/interpreter/mterp/x86/op_aget_byte.S
index aba9ffc..1989450 100644
--- a/runtime/interpreter/mterp/x86/op_aget_byte.S
+++ b/runtime/interpreter/mterp/x86/op_aget_byte.S
@@ -1 +1,2 @@
-%include "x86/op_aget.S" { "load":"movsbl", "shift":"1", "data_offset":"MIRROR_BYTE_ARRAY_DATA_OFFSET" }
+%def op_aget_byte():
+% op_aget(load="movsbl", shift="1", data_offset="MIRROR_BYTE_ARRAY_DATA_OFFSET")
diff --git a/runtime/interpreter/mterp/x86/op_aget_char.S b/runtime/interpreter/mterp/x86/op_aget_char.S
index 748e410..a35269b 100644
--- a/runtime/interpreter/mterp/x86/op_aget_char.S
+++ b/runtime/interpreter/mterp/x86/op_aget_char.S
@@ -1 +1,2 @@
-%include "x86/op_aget.S" { "load":"movzwl", "shift":"2", "data_offset":"MIRROR_CHAR_ARRAY_DATA_OFFSET" }
+%def op_aget_char():
+% op_aget(load="movzwl", shift="2", data_offset="MIRROR_CHAR_ARRAY_DATA_OFFSET")
diff --git a/runtime/interpreter/mterp/x86/op_aget_object.S b/runtime/interpreter/mterp/x86/op_aget_object.S
index 35ec053..4cf90e9 100644
--- a/runtime/interpreter/mterp/x86/op_aget_object.S
+++ b/runtime/interpreter/mterp/x86/op_aget_object.S
@@ -1,3 +1,4 @@
+%def op_aget_object():
/*
* Array object get. vAA <- vBB[vCC].
*
diff --git a/runtime/interpreter/mterp/x86/op_aget_short.S b/runtime/interpreter/mterp/x86/op_aget_short.S
index 6eaf5d9..ca51ec8 100644
--- a/runtime/interpreter/mterp/x86/op_aget_short.S
+++ b/runtime/interpreter/mterp/x86/op_aget_short.S
@@ -1 +1,2 @@
-%include "x86/op_aget.S" { "load":"movswl", "shift":"2", "data_offset":"MIRROR_SHORT_ARRAY_DATA_OFFSET" }
+%def op_aget_short():
+% op_aget(load="movswl", shift="2", data_offset="MIRROR_SHORT_ARRAY_DATA_OFFSET")
diff --git a/runtime/interpreter/mterp/x86/op_aget_wide.S b/runtime/interpreter/mterp/x86/op_aget_wide.S
index 92c612a..03cf50a 100644
--- a/runtime/interpreter/mterp/x86/op_aget_wide.S
+++ b/runtime/interpreter/mterp/x86/op_aget_wide.S
@@ -1,3 +1,4 @@
+%def op_aget_wide():
/*
* Array get, 64 bits. vAA <- vBB[vCC].
*/
diff --git a/runtime/interpreter/mterp/x86/op_and_int.S b/runtime/interpreter/mterp/x86/op_and_int.S
index 6272c4e..ffa28d7 100644
--- a/runtime/interpreter/mterp/x86/op_and_int.S
+++ b/runtime/interpreter/mterp/x86/op_and_int.S
@@ -1 +1,2 @@
-%include "x86/binop.S" {"instr":"andl (rFP,%ecx,4), %eax"}
+%def op_and_int():
+% binop(instr="andl (rFP,%ecx,4), %eax")
diff --git a/runtime/interpreter/mterp/x86/op_and_int_2addr.S b/runtime/interpreter/mterp/x86/op_and_int_2addr.S
index 95df873..8648980 100644
--- a/runtime/interpreter/mterp/x86/op_and_int_2addr.S
+++ b/runtime/interpreter/mterp/x86/op_and_int_2addr.S
@@ -1 +1,2 @@
-%include "x86/binop2addr.S" {"instr":"andl %eax, (rFP,%ecx,4)"}
+%def op_and_int_2addr():
+% binop2addr(instr="andl %eax, (rFP,%ecx,4)")
diff --git a/runtime/interpreter/mterp/x86/op_and_int_lit16.S b/runtime/interpreter/mterp/x86/op_and_int_lit16.S
index b062064..d7752b1 100644
--- a/runtime/interpreter/mterp/x86/op_and_int_lit16.S
+++ b/runtime/interpreter/mterp/x86/op_and_int_lit16.S
@@ -1 +1,2 @@
-%include "x86/binopLit16.S" {"instr":"andl %ecx, %eax"}
+%def op_and_int_lit16():
+% binopLit16(instr="andl %ecx, %eax")
diff --git a/runtime/interpreter/mterp/x86/op_and_int_lit8.S b/runtime/interpreter/mterp/x86/op_and_int_lit8.S
index 99915df..a353178 100644
--- a/runtime/interpreter/mterp/x86/op_and_int_lit8.S
+++ b/runtime/interpreter/mterp/x86/op_and_int_lit8.S
@@ -1 +1,2 @@
-%include "x86/binopLit8.S" {"instr":"andl %ecx, %eax"}
+%def op_and_int_lit8():
+% binopLit8(instr="andl %ecx, %eax")
diff --git a/runtime/interpreter/mterp/x86/op_and_long.S b/runtime/interpreter/mterp/x86/op_and_long.S
index f8514ea..15164ae 100644
--- a/runtime/interpreter/mterp/x86/op_and_long.S
+++ b/runtime/interpreter/mterp/x86/op_and_long.S
@@ -1 +1,2 @@
-%include "x86/binopWide.S" {"instr1":"andl (rFP,%ecx,4), rIBASE", "instr2":"andl 4(rFP,%ecx,4), %eax"}
+%def op_and_long():
+% binopWide(instr1="andl (rFP,%ecx,4), rIBASE", instr2="andl 4(rFP,%ecx,4), %eax")
diff --git a/runtime/interpreter/mterp/x86/op_and_long_2addr.S b/runtime/interpreter/mterp/x86/op_and_long_2addr.S
index 37249b8..173c159 100644
--- a/runtime/interpreter/mterp/x86/op_and_long_2addr.S
+++ b/runtime/interpreter/mterp/x86/op_and_long_2addr.S
@@ -1 +1,2 @@
-%include "x86/binopWide2addr.S" {"instr1":"andl %eax, (rFP,rINST,4)","instr2":"andl %ecx, 4(rFP,rINST,4)"}
+%def op_and_long_2addr():
+% binopWide2addr(instr1="andl %eax, (rFP,rINST,4)", instr2="andl %ecx, 4(rFP,rINST,4)")
diff --git a/runtime/interpreter/mterp/x86/op_aput.S b/runtime/interpreter/mterp/x86/op_aput.S
index 9d8c52d..60bcc50 100644
--- a/runtime/interpreter/mterp/x86/op_aput.S
+++ b/runtime/interpreter/mterp/x86/op_aput.S
@@ -1,4 +1,4 @@
-%default { "reg":"rINST", "store":"movl", "shift":"4", "data_offset":"MIRROR_INT_ARRAY_DATA_OFFSET" }
+%def op_aput(reg="rINST", store="movl", shift="4", data_offset="MIRROR_INT_ARRAY_DATA_OFFSET"):
/*
* Array put, 32 bits or less. vBB[vCC] <- vAA.
*
diff --git a/runtime/interpreter/mterp/x86/op_aput_boolean.S b/runtime/interpreter/mterp/x86/op_aput_boolean.S
index e7fdd53..8420b5a 100644
--- a/runtime/interpreter/mterp/x86/op_aput_boolean.S
+++ b/runtime/interpreter/mterp/x86/op_aput_boolean.S
@@ -1 +1,2 @@
-%include "x86/op_aput.S" { "reg":"rINSTbl", "store":"movb", "shift":"1", "data_offset":"MIRROR_BOOLEAN_ARRAY_DATA_OFFSET" }
+%def op_aput_boolean():
+% op_aput(reg="rINSTbl", store="movb", shift="1", data_offset="MIRROR_BOOLEAN_ARRAY_DATA_OFFSET")
diff --git a/runtime/interpreter/mterp/x86/op_aput_byte.S b/runtime/interpreter/mterp/x86/op_aput_byte.S
index 491d03c..6c181a4 100644
--- a/runtime/interpreter/mterp/x86/op_aput_byte.S
+++ b/runtime/interpreter/mterp/x86/op_aput_byte.S
@@ -1 +1,2 @@
-%include "x86/op_aput.S" { "reg":"rINSTbl", "store":"movb", "shift":"1", "data_offset":"MIRROR_BYTE_ARRAY_DATA_OFFSET" }
+%def op_aput_byte():
+% op_aput(reg="rINSTbl", store="movb", shift="1", data_offset="MIRROR_BYTE_ARRAY_DATA_OFFSET")
diff --git a/runtime/interpreter/mterp/x86/op_aput_char.S b/runtime/interpreter/mterp/x86/op_aput_char.S
index ca42cf0..3f4602a 100644
--- a/runtime/interpreter/mterp/x86/op_aput_char.S
+++ b/runtime/interpreter/mterp/x86/op_aput_char.S
@@ -1 +1,2 @@
-%include "x86/op_aput.S" { "reg":"rINSTw", "store":"movw", "shift":"2", "data_offset":"MIRROR_CHAR_ARRAY_DATA_OFFSET" }
+%def op_aput_char():
+% op_aput(reg="rINSTw", store="movw", shift="2", data_offset="MIRROR_CHAR_ARRAY_DATA_OFFSET")
diff --git a/runtime/interpreter/mterp/x86/op_aput_object.S b/runtime/interpreter/mterp/x86/op_aput_object.S
index 980b26a..5d0bb0b 100644
--- a/runtime/interpreter/mterp/x86/op_aput_object.S
+++ b/runtime/interpreter/mterp/x86/op_aput_object.S
@@ -1,3 +1,4 @@
+%def op_aput_object():
/*
* Store an object into an array. vBB[vCC] <- vAA.
*/
diff --git a/runtime/interpreter/mterp/x86/op_aput_short.S b/runtime/interpreter/mterp/x86/op_aput_short.S
index 5e63482..e76d833 100644
--- a/runtime/interpreter/mterp/x86/op_aput_short.S
+++ b/runtime/interpreter/mterp/x86/op_aput_short.S
@@ -1 +1,2 @@
-%include "x86/op_aput.S" { "reg":"rINSTw", "store":"movw", "shift":"2", "data_offset":"MIRROR_SHORT_ARRAY_DATA_OFFSET" }
+%def op_aput_short():
+% op_aput(reg="rINSTw", store="movw", shift="2", data_offset="MIRROR_SHORT_ARRAY_DATA_OFFSET")
diff --git a/runtime/interpreter/mterp/x86/op_aput_wide.S b/runtime/interpreter/mterp/x86/op_aput_wide.S
index 43ef64a..c59f7b3 100644
--- a/runtime/interpreter/mterp/x86/op_aput_wide.S
+++ b/runtime/interpreter/mterp/x86/op_aput_wide.S
@@ -1,3 +1,4 @@
+%def op_aput_wide():
/*
* Array put, 64 bits. vBB[vCC] <- vAA.
*
diff --git a/runtime/interpreter/mterp/x86/op_array_length.S b/runtime/interpreter/mterp/x86/op_array_length.S
index 60ed80b..c9d8930 100644
--- a/runtime/interpreter/mterp/x86/op_array_length.S
+++ b/runtime/interpreter/mterp/x86/op_array_length.S
@@ -1,3 +1,4 @@
+%def op_array_length():
/*
* Return the length of an array.
*/
diff --git a/runtime/interpreter/mterp/x86/op_check_cast.S b/runtime/interpreter/mterp/x86/op_check_cast.S
index d090aa3..12f8543 100644
--- a/runtime/interpreter/mterp/x86/op_check_cast.S
+++ b/runtime/interpreter/mterp/x86/op_check_cast.S
@@ -1,3 +1,4 @@
+%def op_check_cast():
/*
* Check to see if a cast from one class to another is allowed.
*/
diff --git a/runtime/interpreter/mterp/x86/op_cmp_long.S b/runtime/interpreter/mterp/x86/op_cmp_long.S
index 1f729b0..0e33874 100644
--- a/runtime/interpreter/mterp/x86/op_cmp_long.S
+++ b/runtime/interpreter/mterp/x86/op_cmp_long.S
@@ -1,3 +1,4 @@
+%def op_cmp_long():
/*
* Compare two 64-bit values. Puts 0, 1, or -1 into the destination
* register based on the results of the comparison.
diff --git a/runtime/interpreter/mterp/x86/op_cmpg_double.S b/runtime/interpreter/mterp/x86/op_cmpg_double.S
index a73ba55..1c04e99 100644
--- a/runtime/interpreter/mterp/x86/op_cmpg_double.S
+++ b/runtime/interpreter/mterp/x86/op_cmpg_double.S
@@ -1 +1,2 @@
-%include "x86/fpcmp.S" {"suff":"d","nanval":"pos"}
+%def op_cmpg_double():
+% fpcmp(suff="d", nanval="pos")
diff --git a/runtime/interpreter/mterp/x86/op_cmpg_float.S b/runtime/interpreter/mterp/x86/op_cmpg_float.S
index 648051b..797c3d5 100644
--- a/runtime/interpreter/mterp/x86/op_cmpg_float.S
+++ b/runtime/interpreter/mterp/x86/op_cmpg_float.S
@@ -1 +1,2 @@
-%include "x86/fpcmp.S" {"suff":"s","nanval":"pos"}
+%def op_cmpg_float():
+% fpcmp(suff="s", nanval="pos")
diff --git a/runtime/interpreter/mterp/x86/op_cmpl_double.S b/runtime/interpreter/mterp/x86/op_cmpl_double.S
index 058163e..cbe8db7 100644
--- a/runtime/interpreter/mterp/x86/op_cmpl_double.S
+++ b/runtime/interpreter/mterp/x86/op_cmpl_double.S
@@ -1 +1,2 @@
-%include "x86/fpcmp.S" {"suff":"d","nanval":"neg"}
+%def op_cmpl_double():
+% fpcmp(suff="d", nanval="neg")
diff --git a/runtime/interpreter/mterp/x86/op_cmpl_float.S b/runtime/interpreter/mterp/x86/op_cmpl_float.S
index 302f078..068f4cb 100644
--- a/runtime/interpreter/mterp/x86/op_cmpl_float.S
+++ b/runtime/interpreter/mterp/x86/op_cmpl_float.S
@@ -1 +1,2 @@
-%include "x86/fpcmp.S" {"suff":"s","nanval":"neg"}
+%def op_cmpl_float():
+% fpcmp(suff="s", nanval="neg")
diff --git a/runtime/interpreter/mterp/x86/op_const.S b/runtime/interpreter/mterp/x86/op_const.S
index 544d63b..dc4342f 100644
--- a/runtime/interpreter/mterp/x86/op_const.S
+++ b/runtime/interpreter/mterp/x86/op_const.S
@@ -1,3 +1,4 @@
+%def op_const():
/* const vAA, #+BBBBbbbb */
movl 2(rPC), %eax # grab all 32 bits at once
SET_VREG %eax, rINST # vAA<- eax
diff --git a/runtime/interpreter/mterp/x86/op_const_16.S b/runtime/interpreter/mterp/x86/op_const_16.S
index 97cd5fa..84678ae 100644
--- a/runtime/interpreter/mterp/x86/op_const_16.S
+++ b/runtime/interpreter/mterp/x86/op_const_16.S
@@ -1,3 +1,4 @@
+%def op_const_16():
/* const/16 vAA, #+BBBB */
movswl 2(rPC), %ecx # ecx <- ssssBBBB
SET_VREG %ecx, rINST # vAA <- ssssBBBB
diff --git a/runtime/interpreter/mterp/x86/op_const_4.S b/runtime/interpreter/mterp/x86/op_const_4.S
index a60ba96..8cfd9c0 100644
--- a/runtime/interpreter/mterp/x86/op_const_4.S
+++ b/runtime/interpreter/mterp/x86/op_const_4.S
@@ -1,3 +1,4 @@
+%def op_const_4():
/* const/4 vA, #+B */
movsx rINSTbl, %eax # eax <-ssssssBx
movl $$0xf, rINST
diff --git a/runtime/interpreter/mterp/x86/op_const_class.S b/runtime/interpreter/mterp/x86/op_const_class.S
index 71648b5..db12ec3 100644
--- a/runtime/interpreter/mterp/x86/op_const_class.S
+++ b/runtime/interpreter/mterp/x86/op_const_class.S
@@ -1 +1,2 @@
-%include "x86/const.S" { "helper":"MterpConstClass" }
+%def op_const_class():
+% const(helper="MterpConstClass")
diff --git a/runtime/interpreter/mterp/x86/op_const_high16.S b/runtime/interpreter/mterp/x86/op_const_high16.S
index 576967a..5252ba2 100644
--- a/runtime/interpreter/mterp/x86/op_const_high16.S
+++ b/runtime/interpreter/mterp/x86/op_const_high16.S
@@ -1,3 +1,4 @@
+%def op_const_high16():
/* const/high16 vAA, #+BBBB0000 */
movzwl 2(rPC), %eax # eax <- 0000BBBB
sall $$16, %eax # eax <- BBBB0000
diff --git a/runtime/interpreter/mterp/x86/op_const_method_handle.S b/runtime/interpreter/mterp/x86/op_const_method_handle.S
index 77948fd..2680c17 100644
--- a/runtime/interpreter/mterp/x86/op_const_method_handle.S
+++ b/runtime/interpreter/mterp/x86/op_const_method_handle.S
@@ -1 +1,2 @@
-%include "x86/const.S" { "helper":"MterpConstMethodHandle" }
+%def op_const_method_handle():
+% const(helper="MterpConstMethodHandle")
diff --git a/runtime/interpreter/mterp/x86/op_const_method_type.S b/runtime/interpreter/mterp/x86/op_const_method_type.S
index 03c6ce5..ea814bf 100644
--- a/runtime/interpreter/mterp/x86/op_const_method_type.S
+++ b/runtime/interpreter/mterp/x86/op_const_method_type.S
@@ -1 +1,2 @@
-%include "x86/const.S" { "helper":"MterpConstMethodType" }
+%def op_const_method_type():
+% const(helper="MterpConstMethodType")
diff --git a/runtime/interpreter/mterp/x86/op_const_string.S b/runtime/interpreter/mterp/x86/op_const_string.S
index 5553aab..41376f8 100644
--- a/runtime/interpreter/mterp/x86/op_const_string.S
+++ b/runtime/interpreter/mterp/x86/op_const_string.S
@@ -1 +1,2 @@
-%include "x86/const.S" { "helper":"MterpConstString" }
+%def op_const_string():
+% const(helper="MterpConstString")
diff --git a/runtime/interpreter/mterp/x86/op_const_string_jumbo.S b/runtime/interpreter/mterp/x86/op_const_string_jumbo.S
index e7f952a..dc70c25 100644
--- a/runtime/interpreter/mterp/x86/op_const_string_jumbo.S
+++ b/runtime/interpreter/mterp/x86/op_const_string_jumbo.S
@@ -1,3 +1,4 @@
+%def op_const_string_jumbo():
/* const/string vAA, String@BBBBBBBB */
EXPORT_PC
movl 2(rPC), %eax # eax <- BBBB
diff --git a/runtime/interpreter/mterp/x86/op_const_wide.S b/runtime/interpreter/mterp/x86/op_const_wide.S
index 3750728..d076e83 100644
--- a/runtime/interpreter/mterp/x86/op_const_wide.S
+++ b/runtime/interpreter/mterp/x86/op_const_wide.S
@@ -1,3 +1,4 @@
+%def op_const_wide():
/* const-wide vAA, #+HHHHhhhhBBBBbbbb */
movl 2(rPC), %eax # eax <- lsw
movzbl rINSTbl, %ecx # ecx <- AA
diff --git a/runtime/interpreter/mterp/x86/op_const_wide_16.S b/runtime/interpreter/mterp/x86/op_const_wide_16.S
index 1331c32..328cdee 100644
--- a/runtime/interpreter/mterp/x86/op_const_wide_16.S
+++ b/runtime/interpreter/mterp/x86/op_const_wide_16.S
@@ -1,3 +1,4 @@
+%def op_const_wide_16():
/* const-wide/16 vAA, #+BBBB */
movswl 2(rPC), %eax # eax <- ssssBBBB
movl rIBASE, %ecx # preserve rIBASE (cltd trashes it)
diff --git a/runtime/interpreter/mterp/x86/op_const_wide_32.S b/runtime/interpreter/mterp/x86/op_const_wide_32.S
index ed7d62b..c4b5b67 100644
--- a/runtime/interpreter/mterp/x86/op_const_wide_32.S
+++ b/runtime/interpreter/mterp/x86/op_const_wide_32.S
@@ -1,3 +1,4 @@
+%def op_const_wide_32():
/* const-wide/32 vAA, #+BBBBbbbb */
movl 2(rPC), %eax # eax <- BBBBbbbb
movl rIBASE, %ecx # preserve rIBASE (cltd trashes it)
diff --git a/runtime/interpreter/mterp/x86/op_const_wide_high16.S b/runtime/interpreter/mterp/x86/op_const_wide_high16.S
index 11b9310..f99e674 100644
--- a/runtime/interpreter/mterp/x86/op_const_wide_high16.S
+++ b/runtime/interpreter/mterp/x86/op_const_wide_high16.S
@@ -1,3 +1,4 @@
+%def op_const_wide_high16():
/* const-wide/high16 vAA, #+BBBB000000000000 */
movzwl 2(rPC), %eax # eax <- 0000BBBB
sall $$16, %eax # eax <- BBBB0000
diff --git a/runtime/interpreter/mterp/x86/op_div_double.S b/runtime/interpreter/mterp/x86/op_div_double.S
index 575716d..6b342f8 100644
--- a/runtime/interpreter/mterp/x86/op_div_double.S
+++ b/runtime/interpreter/mterp/x86/op_div_double.S
@@ -1 +1,2 @@
-%include "x86/sseBinop.S" {"instr":"divs","suff":"d"}
+%def op_div_double():
+% sseBinop(instr="divs", suff="d")
diff --git a/runtime/interpreter/mterp/x86/op_div_double_2addr.S b/runtime/interpreter/mterp/x86/op_div_double_2addr.S
index 8229a31..212c825 100644
--- a/runtime/interpreter/mterp/x86/op_div_double_2addr.S
+++ b/runtime/interpreter/mterp/x86/op_div_double_2addr.S
@@ -1 +1,2 @@
-%include "x86/sseBinop2Addr.S" {"instr":"divs","suff":"d"}
+%def op_div_double_2addr():
+% sseBinop2Addr(instr="divs", suff="d")
diff --git a/runtime/interpreter/mterp/x86/op_div_float.S b/runtime/interpreter/mterp/x86/op_div_float.S
index 250f1dc..b6537d9 100644
--- a/runtime/interpreter/mterp/x86/op_div_float.S
+++ b/runtime/interpreter/mterp/x86/op_div_float.S
@@ -1 +1,2 @@
-%include "x86/sseBinop.S" {"instr":"divs","suff":"s"}
+%def op_div_float():
+% sseBinop(instr="divs", suff="s")
diff --git a/runtime/interpreter/mterp/x86/op_div_float_2addr.S b/runtime/interpreter/mterp/x86/op_div_float_2addr.S
index c30d148..19ae27d 100644
--- a/runtime/interpreter/mterp/x86/op_div_float_2addr.S
+++ b/runtime/interpreter/mterp/x86/op_div_float_2addr.S
@@ -1 +1,2 @@
-%include "x86/sseBinop2Addr.S" {"instr":"divs","suff":"s"}
+%def op_div_float_2addr():
+% sseBinop2Addr(instr="divs", suff="s")
diff --git a/runtime/interpreter/mterp/x86/op_div_int.S b/runtime/interpreter/mterp/x86/op_div_int.S
index 5fc8fa5..4df3b92 100644
--- a/runtime/interpreter/mterp/x86/op_div_int.S
+++ b/runtime/interpreter/mterp/x86/op_div_int.S
@@ -1 +1,2 @@
-%include "x86/bindiv.S" {"result":"%eax","special":"$0x80000000","rem":"0"}
+%def op_div_int():
+% bindiv(result="%eax", special="$0x80000000", rem="0")
diff --git a/runtime/interpreter/mterp/x86/op_div_int_2addr.S b/runtime/interpreter/mterp/x86/op_div_int_2addr.S
index 04cf1ba..d43135f 100644
--- a/runtime/interpreter/mterp/x86/op_div_int_2addr.S
+++ b/runtime/interpreter/mterp/x86/op_div_int_2addr.S
@@ -1 +1,2 @@
-%include "x86/bindiv2addr.S" {"result":"%eax","special":"$0x80000000"}
+%def op_div_int_2addr():
+% bindiv2addr(result="%eax", special="$0x80000000")
diff --git a/runtime/interpreter/mterp/x86/op_div_int_lit16.S b/runtime/interpreter/mterp/x86/op_div_int_lit16.S
index dd396bb..e561eae 100644
--- a/runtime/interpreter/mterp/x86/op_div_int_lit16.S
+++ b/runtime/interpreter/mterp/x86/op_div_int_lit16.S
@@ -1 +1,2 @@
-%include "x86/bindivLit16.S" {"result":"%eax","special":"$0x80000000"}
+%def op_div_int_lit16():
+% bindivLit16(result="%eax", special="$0x80000000")
diff --git a/runtime/interpreter/mterp/x86/op_div_int_lit8.S b/runtime/interpreter/mterp/x86/op_div_int_lit8.S
index 3cbd9d0..5facee2 100644
--- a/runtime/interpreter/mterp/x86/op_div_int_lit8.S
+++ b/runtime/interpreter/mterp/x86/op_div_int_lit8.S
@@ -1 +1,2 @@
-%include "x86/bindivLit8.S" {"result":"%eax","special":"$0x80000000"}
+%def op_div_int_lit8():
+% bindivLit8(result="%eax", special="$0x80000000")
diff --git a/runtime/interpreter/mterp/x86/op_div_long.S b/runtime/interpreter/mterp/x86/op_div_long.S
index e56a035..2fdf6ad 100644
--- a/runtime/interpreter/mterp/x86/op_div_long.S
+++ b/runtime/interpreter/mterp/x86/op_div_long.S
@@ -1,4 +1,4 @@
-%default {"routine":"art_quick_ldiv"}
+%def op_div_long(routine="art_quick_ldiv"):
/* art_quick_* methods has quick abi,
* so use eax, ecx, edx, ebx for args
*/
diff --git a/runtime/interpreter/mterp/x86/op_div_long_2addr.S b/runtime/interpreter/mterp/x86/op_div_long_2addr.S
index 159cc44..b3d81a4 100644
--- a/runtime/interpreter/mterp/x86/op_div_long_2addr.S
+++ b/runtime/interpreter/mterp/x86/op_div_long_2addr.S
@@ -1,4 +1,4 @@
-%default {"routine":"art_quick_ldiv"}
+%def op_div_long_2addr(routine="art_quick_ldiv"):
/* art_quick_* methods has quick abi,
* so use eax, ecx, edx, ebx for args
*/
diff --git a/runtime/interpreter/mterp/x86/op_double_to_float.S b/runtime/interpreter/mterp/x86/op_double_to_float.S
index 5135d60..a52b505 100644
--- a/runtime/interpreter/mterp/x86/op_double_to_float.S
+++ b/runtime/interpreter/mterp/x86/op_double_to_float.S
@@ -1 +1,2 @@
-%include "x86/fpcvt.S" {"load":"fldl","store":"fstps"}
+%def op_double_to_float():
+% fpcvt(load="fldl", store="fstps")
diff --git a/runtime/interpreter/mterp/x86/op_double_to_int.S b/runtime/interpreter/mterp/x86/op_double_to_int.S
index 9c4e11c..65c31fb 100644
--- a/runtime/interpreter/mterp/x86/op_double_to_int.S
+++ b/runtime/interpreter/mterp/x86/op_double_to_int.S
@@ -1 +1,2 @@
-%include "x86/cvtfp_int.S" {"srcdouble":"1","tgtlong":"0"}
+%def op_double_to_int():
+% cvtfp_int(srcdouble="1", tgtlong="0")
diff --git a/runtime/interpreter/mterp/x86/op_double_to_long.S b/runtime/interpreter/mterp/x86/op_double_to_long.S
index fe0eee2..1eb74bf 100644
--- a/runtime/interpreter/mterp/x86/op_double_to_long.S
+++ b/runtime/interpreter/mterp/x86/op_double_to_long.S
@@ -1 +1,2 @@
-%include "x86/cvtfp_int.S" {"srcdouble":"1","tgtlong":"1"}
+%def op_double_to_long():
+% cvtfp_int(srcdouble="1", tgtlong="1")
diff --git a/runtime/interpreter/mterp/x86/op_fill_array_data.S b/runtime/interpreter/mterp/x86/op_fill_array_data.S
index 5855284..f121787 100644
--- a/runtime/interpreter/mterp/x86/op_fill_array_data.S
+++ b/runtime/interpreter/mterp/x86/op_fill_array_data.S
@@ -1,3 +1,4 @@
+%def op_fill_array_data():
/* fill-array-data vAA, +BBBBBBBB */
EXPORT_PC
movl 2(rPC), %ecx # ecx <- BBBBbbbb
diff --git a/runtime/interpreter/mterp/x86/op_filled_new_array.S b/runtime/interpreter/mterp/x86/op_filled_new_array.S
index 35b2fe8..8e5bd03 100644
--- a/runtime/interpreter/mterp/x86/op_filled_new_array.S
+++ b/runtime/interpreter/mterp/x86/op_filled_new_array.S
@@ -1,4 +1,4 @@
-%default { "helper":"MterpFilledNewArray" }
+%def op_filled_new_array(helper="MterpFilledNewArray"):
/*
* Create a new array with elements filled from registers.
*
diff --git a/runtime/interpreter/mterp/x86/op_filled_new_array_range.S b/runtime/interpreter/mterp/x86/op_filled_new_array_range.S
index 841059e..1667de1 100644
--- a/runtime/interpreter/mterp/x86/op_filled_new_array_range.S
+++ b/runtime/interpreter/mterp/x86/op_filled_new_array_range.S
@@ -1 +1,2 @@
-%include "x86/op_filled_new_array.S" { "helper":"MterpFilledNewArrayRange" }
+%def op_filled_new_array_range():
+% op_filled_new_array(helper="MterpFilledNewArrayRange")
diff --git a/runtime/interpreter/mterp/x86/op_float_to_double.S b/runtime/interpreter/mterp/x86/op_float_to_double.S
index 12a3e14..152bb00 100644
--- a/runtime/interpreter/mterp/x86/op_float_to_double.S
+++ b/runtime/interpreter/mterp/x86/op_float_to_double.S
@@ -1 +1,2 @@
-%include "x86/fpcvt.S" {"load":"flds","store":"fstpl","wide":"1"}
+%def op_float_to_double():
+% fpcvt(load="flds", store="fstpl", wide="1")
diff --git a/runtime/interpreter/mterp/x86/op_float_to_int.S b/runtime/interpreter/mterp/x86/op_float_to_int.S
index ac57388..1f8e5cc 100644
--- a/runtime/interpreter/mterp/x86/op_float_to_int.S
+++ b/runtime/interpreter/mterp/x86/op_float_to_int.S
@@ -1 +1,2 @@
-%include "x86/cvtfp_int.S" {"srcdouble":"0","tgtlong":"0"}
+%def op_float_to_int():
+% cvtfp_int(srcdouble="0", tgtlong="0")
diff --git a/runtime/interpreter/mterp/x86/op_float_to_long.S b/runtime/interpreter/mterp/x86/op_float_to_long.S
index be1d982..a056769 100644
--- a/runtime/interpreter/mterp/x86/op_float_to_long.S
+++ b/runtime/interpreter/mterp/x86/op_float_to_long.S
@@ -1 +1,2 @@
-%include "x86/cvtfp_int.S" {"srcdouble":"0","tgtlong":"1"}
+%def op_float_to_long():
+% cvtfp_int(srcdouble="0", tgtlong="1")
diff --git a/runtime/interpreter/mterp/x86/op_goto.S b/runtime/interpreter/mterp/x86/op_goto.S
index 1827d68..b6236fe 100644
--- a/runtime/interpreter/mterp/x86/op_goto.S
+++ b/runtime/interpreter/mterp/x86/op_goto.S
@@ -1,3 +1,4 @@
+%def op_goto():
/*
* Unconditional branch, 8-bit offset.
*
diff --git a/runtime/interpreter/mterp/x86/op_goto_16.S b/runtime/interpreter/mterp/x86/op_goto_16.S
index ea5ea90..a8c2bf5 100644
--- a/runtime/interpreter/mterp/x86/op_goto_16.S
+++ b/runtime/interpreter/mterp/x86/op_goto_16.S
@@ -1,3 +1,4 @@
+%def op_goto_16():
/*
* Unconditional branch, 16-bit offset.
*
diff --git a/runtime/interpreter/mterp/x86/op_goto_32.S b/runtime/interpreter/mterp/x86/op_goto_32.S
index 4becaf3..87d0e33 100644
--- a/runtime/interpreter/mterp/x86/op_goto_32.S
+++ b/runtime/interpreter/mterp/x86/op_goto_32.S
@@ -1,3 +1,4 @@
+%def op_goto_32():
/*
* Unconditional branch, 32-bit offset.
*
diff --git a/runtime/interpreter/mterp/x86/op_if_eq.S b/runtime/interpreter/mterp/x86/op_if_eq.S
index 5413d98..4d1f6a5 100644
--- a/runtime/interpreter/mterp/x86/op_if_eq.S
+++ b/runtime/interpreter/mterp/x86/op_if_eq.S
@@ -1 +1,2 @@
-%include "x86/bincmp.S" { "revcmp":"ne" }
+%def op_if_eq():
+% bincmp(revcmp="ne")
diff --git a/runtime/interpreter/mterp/x86/op_if_eqz.S b/runtime/interpreter/mterp/x86/op_if_eqz.S
index 53dc99e..12de558 100644
--- a/runtime/interpreter/mterp/x86/op_if_eqz.S
+++ b/runtime/interpreter/mterp/x86/op_if_eqz.S
@@ -1 +1,2 @@
-%include "x86/zcmp.S" { "revcmp":"ne" }
+%def op_if_eqz():
+% zcmp(revcmp="ne")
diff --git a/runtime/interpreter/mterp/x86/op_if_ge.S b/runtime/interpreter/mterp/x86/op_if_ge.S
index c2ba3c6..6849027 100644
--- a/runtime/interpreter/mterp/x86/op_if_ge.S
+++ b/runtime/interpreter/mterp/x86/op_if_ge.S
@@ -1 +1,2 @@
-%include "x86/bincmp.S" { "revcmp":"l" }
+%def op_if_ge():
+% bincmp(revcmp="l")
diff --git a/runtime/interpreter/mterp/x86/op_if_gez.S b/runtime/interpreter/mterp/x86/op_if_gez.S
index cd2c772..87bdcbf 100644
--- a/runtime/interpreter/mterp/x86/op_if_gez.S
+++ b/runtime/interpreter/mterp/x86/op_if_gez.S
@@ -1 +1,2 @@
-%include "x86/zcmp.S" { "revcmp":"l" }
+%def op_if_gez():
+% zcmp(revcmp="l")
diff --git a/runtime/interpreter/mterp/x86/op_if_gt.S b/runtime/interpreter/mterp/x86/op_if_gt.S
index 9fe84bb..4a52100 100644
--- a/runtime/interpreter/mterp/x86/op_if_gt.S
+++ b/runtime/interpreter/mterp/x86/op_if_gt.S
@@ -1 +1,2 @@
-%include "x86/bincmp.S" { "revcmp":"le" }
+%def op_if_gt():
+% bincmp(revcmp="le")
diff --git a/runtime/interpreter/mterp/x86/op_if_gtz.S b/runtime/interpreter/mterp/x86/op_if_gtz.S
index b454ffd..a0b2e3a 100644
--- a/runtime/interpreter/mterp/x86/op_if_gtz.S
+++ b/runtime/interpreter/mterp/x86/op_if_gtz.S
@@ -1 +1,2 @@
-%include "x86/zcmp.S" { "revcmp":"le" }
+%def op_if_gtz():
+% zcmp(revcmp="le")
diff --git a/runtime/interpreter/mterp/x86/op_if_le.S b/runtime/interpreter/mterp/x86/op_if_le.S
index 93571a7..69e94db 100644
--- a/runtime/interpreter/mterp/x86/op_if_le.S
+++ b/runtime/interpreter/mterp/x86/op_if_le.S
@@ -1 +1,2 @@
-%include "x86/bincmp.S" { "revcmp":"g" }
+%def op_if_le():
+% bincmp(revcmp="g")
diff --git a/runtime/interpreter/mterp/x86/op_if_lez.S b/runtime/interpreter/mterp/x86/op_if_lez.S
index 779c77f..42e69d9 100644
--- a/runtime/interpreter/mterp/x86/op_if_lez.S
+++ b/runtime/interpreter/mterp/x86/op_if_lez.S
@@ -1 +1,2 @@
-%include "x86/zcmp.S" { "revcmp":"g" }
+%def op_if_lez():
+% zcmp(revcmp="g")
diff --git a/runtime/interpreter/mterp/x86/op_if_lt.S b/runtime/interpreter/mterp/x86/op_if_lt.S
index 1fb1521..052aabe 100644
--- a/runtime/interpreter/mterp/x86/op_if_lt.S
+++ b/runtime/interpreter/mterp/x86/op_if_lt.S
@@ -1 +1,2 @@
-%include "x86/bincmp.S" { "revcmp":"ge" }
+%def op_if_lt():
+% bincmp(revcmp="ge")
diff --git a/runtime/interpreter/mterp/x86/op_if_ltz.S b/runtime/interpreter/mterp/x86/op_if_ltz.S
index 155c356..8e13e48 100644
--- a/runtime/interpreter/mterp/x86/op_if_ltz.S
+++ b/runtime/interpreter/mterp/x86/op_if_ltz.S
@@ -1 +1,2 @@
-%include "x86/zcmp.S" { "revcmp":"ge" }
+%def op_if_ltz():
+% zcmp(revcmp="ge")
diff --git a/runtime/interpreter/mterp/x86/op_if_ne.S b/runtime/interpreter/mterp/x86/op_if_ne.S
index 7e1b065..2cfd8a9 100644
--- a/runtime/interpreter/mterp/x86/op_if_ne.S
+++ b/runtime/interpreter/mterp/x86/op_if_ne.S
@@ -1 +1,2 @@
-%include "x86/bincmp.S" { "revcmp":"e" }
+%def op_if_ne():
+% bincmp(revcmp="e")
diff --git a/runtime/interpreter/mterp/x86/op_if_nez.S b/runtime/interpreter/mterp/x86/op_if_nez.S
index 8951f5b..261a173 100644
--- a/runtime/interpreter/mterp/x86/op_if_nez.S
+++ b/runtime/interpreter/mterp/x86/op_if_nez.S
@@ -1 +1,2 @@
-%include "x86/zcmp.S" { "revcmp":"e" }
+%def op_if_nez():
+% zcmp(revcmp="e")
diff --git a/runtime/interpreter/mterp/x86/op_iget.S b/runtime/interpreter/mterp/x86/op_iget.S
index d85d54c..d09edc0 100644
--- a/runtime/interpreter/mterp/x86/op_iget.S
+++ b/runtime/interpreter/mterp/x86/op_iget.S
@@ -1,2 +1,2 @@
-%default { "is_object":"0", "helper":"MterpIGetU32"}
-%include "x86/field.S" { }
+%def op_iget(is_object="0", helper="MterpIGetU32"):
+% field(helper=helper)
diff --git a/runtime/interpreter/mterp/x86/op_iget_boolean.S b/runtime/interpreter/mterp/x86/op_iget_boolean.S
index ddccc41..cb8edee 100644
--- a/runtime/interpreter/mterp/x86/op_iget_boolean.S
+++ b/runtime/interpreter/mterp/x86/op_iget_boolean.S
@@ -1 +1,2 @@
-%include "x86/op_iget.S" { "helper":"MterpIGetU8" }
+%def op_iget_boolean():
+% op_iget(helper="MterpIGetU8")
diff --git a/runtime/interpreter/mterp/x86/op_iget_boolean_quick.S b/runtime/interpreter/mterp/x86/op_iget_boolean_quick.S
index 02b0c16..4e16768 100644
--- a/runtime/interpreter/mterp/x86/op_iget_boolean_quick.S
+++ b/runtime/interpreter/mterp/x86/op_iget_boolean_quick.S
@@ -1 +1,2 @@
-%include "x86/op_iget_quick.S" { "load":"movsbl" }
+%def op_iget_boolean_quick():
+% op_iget_quick(load="movsbl")
diff --git a/runtime/interpreter/mterp/x86/op_iget_byte.S b/runtime/interpreter/mterp/x86/op_iget_byte.S
index cd46d3d..2b87fb1 100644
--- a/runtime/interpreter/mterp/x86/op_iget_byte.S
+++ b/runtime/interpreter/mterp/x86/op_iget_byte.S
@@ -1 +1,2 @@
-%include "x86/op_iget.S" { "helper":"MterpIGetI8" }
+%def op_iget_byte():
+% op_iget(helper="MterpIGetI8")
diff --git a/runtime/interpreter/mterp/x86/op_iget_byte_quick.S b/runtime/interpreter/mterp/x86/op_iget_byte_quick.S
index 02b0c16..b92936c 100644
--- a/runtime/interpreter/mterp/x86/op_iget_byte_quick.S
+++ b/runtime/interpreter/mterp/x86/op_iget_byte_quick.S
@@ -1 +1,2 @@
-%include "x86/op_iget_quick.S" { "load":"movsbl" }
+%def op_iget_byte_quick():
+% op_iget_quick(load="movsbl")
diff --git a/runtime/interpreter/mterp/x86/op_iget_char.S b/runtime/interpreter/mterp/x86/op_iget_char.S
index 9969734..001bd03 100644
--- a/runtime/interpreter/mterp/x86/op_iget_char.S
+++ b/runtime/interpreter/mterp/x86/op_iget_char.S
@@ -1 +1,2 @@
-%include "x86/op_iget.S" { "helper":"MterpIGetU16" }
+%def op_iget_char():
+% op_iget(helper="MterpIGetU16")
diff --git a/runtime/interpreter/mterp/x86/op_iget_char_quick.S b/runtime/interpreter/mterp/x86/op_iget_char_quick.S
index a5d9712..d6f836b 100644
--- a/runtime/interpreter/mterp/x86/op_iget_char_quick.S
+++ b/runtime/interpreter/mterp/x86/op_iget_char_quick.S
@@ -1 +1,2 @@
-%include "x86/op_iget_quick.S" { "load":"movzwl" }
+%def op_iget_char_quick():
+% op_iget_quick(load="movzwl")
diff --git a/runtime/interpreter/mterp/x86/op_iget_object.S b/runtime/interpreter/mterp/x86/op_iget_object.S
index 3d421fc..4e5f769 100644
--- a/runtime/interpreter/mterp/x86/op_iget_object.S
+++ b/runtime/interpreter/mterp/x86/op_iget_object.S
@@ -1 +1,2 @@
-%include "x86/op_iget.S" { "is_object":"1", "helper":"MterpIGetObj" }
+%def op_iget_object():
+% op_iget(is_object="1", helper="MterpIGetObj")
diff --git a/runtime/interpreter/mterp/x86/op_iget_object_quick.S b/runtime/interpreter/mterp/x86/op_iget_object_quick.S
index b1551a0..66340e9 100644
--- a/runtime/interpreter/mterp/x86/op_iget_object_quick.S
+++ b/runtime/interpreter/mterp/x86/op_iget_object_quick.S
@@ -1,3 +1,4 @@
+%def op_iget_object_quick():
/* For: iget-object-quick */
/* op vA, vB, offset@CCCC */
movzbl rINSTbl, %ecx # ecx <- BA
diff --git a/runtime/interpreter/mterp/x86/op_iget_quick.S b/runtime/interpreter/mterp/x86/op_iget_quick.S
index 1b7440f..8ca2c86 100644
--- a/runtime/interpreter/mterp/x86/op_iget_quick.S
+++ b/runtime/interpreter/mterp/x86/op_iget_quick.S
@@ -1,4 +1,4 @@
-%default { "load":"movl"}
+%def op_iget_quick(load="movl"):
/* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick */
/* op vA, vB, offset@CCCC */
movzbl rINSTbl, %ecx # ecx <- BA
diff --git a/runtime/interpreter/mterp/x86/op_iget_short.S b/runtime/interpreter/mterp/x86/op_iget_short.S
index c7477f5..a62c4d9 100644
--- a/runtime/interpreter/mterp/x86/op_iget_short.S
+++ b/runtime/interpreter/mterp/x86/op_iget_short.S
@@ -1 +1,2 @@
-%include "x86/op_iget.S" { "helper":"MterpIGetI16" }
+%def op_iget_short():
+% op_iget(helper="MterpIGetI16")
diff --git a/runtime/interpreter/mterp/x86/op_iget_short_quick.S b/runtime/interpreter/mterp/x86/op_iget_short_quick.S
index 2c3aeb6..f5e48d6 100644
--- a/runtime/interpreter/mterp/x86/op_iget_short_quick.S
+++ b/runtime/interpreter/mterp/x86/op_iget_short_quick.S
@@ -1 +1,2 @@
-%include "x86/op_iget_quick.S" { "load":"movswl" }
+%def op_iget_short_quick():
+% op_iget_quick(load="movswl")
diff --git a/runtime/interpreter/mterp/x86/op_iget_wide.S b/runtime/interpreter/mterp/x86/op_iget_wide.S
index 741a64e..9643cc3 100644
--- a/runtime/interpreter/mterp/x86/op_iget_wide.S
+++ b/runtime/interpreter/mterp/x86/op_iget_wide.S
@@ -1 +1,2 @@
-%include "x86/op_iget.S" { "helper":"MterpIGetU64" }
+%def op_iget_wide():
+% op_iget(helper="MterpIGetU64")
diff --git a/runtime/interpreter/mterp/x86/op_iget_wide_quick.S b/runtime/interpreter/mterp/x86/op_iget_wide_quick.S
index 7ce74cc..c1a1326 100644
--- a/runtime/interpreter/mterp/x86/op_iget_wide_quick.S
+++ b/runtime/interpreter/mterp/x86/op_iget_wide_quick.S
@@ -1,3 +1,4 @@
+%def op_iget_wide_quick():
/* iget-wide-quick vA, vB, offset@CCCC */
movzbl rINSTbl, %ecx # ecx <- BA
sarl $$4, %ecx # ecx <- B
diff --git a/runtime/interpreter/mterp/x86/op_instance_of.S b/runtime/interpreter/mterp/x86/op_instance_of.S
index e6fe5b2..ae1afae 100644
--- a/runtime/interpreter/mterp/x86/op_instance_of.S
+++ b/runtime/interpreter/mterp/x86/op_instance_of.S
@@ -1,3 +1,4 @@
+%def op_instance_of():
/*
* Check to see if an object reference is an instance of a class.
*
diff --git a/runtime/interpreter/mterp/x86/op_int_to_byte.S b/runtime/interpreter/mterp/x86/op_int_to_byte.S
index b4e8d22c..80e4d5c 100644
--- a/runtime/interpreter/mterp/x86/op_int_to_byte.S
+++ b/runtime/interpreter/mterp/x86/op_int_to_byte.S
@@ -1 +1,2 @@
-%include "x86/unop.S" {"instr":"movsbl %al, %eax"}
+%def op_int_to_byte():
+% unop(instr="movsbl %al, %eax")
diff --git a/runtime/interpreter/mterp/x86/op_int_to_char.S b/runtime/interpreter/mterp/x86/op_int_to_char.S
index 4608971..83e9868 100644
--- a/runtime/interpreter/mterp/x86/op_int_to_char.S
+++ b/runtime/interpreter/mterp/x86/op_int_to_char.S
@@ -1 +1,2 @@
-%include "x86/unop.S" {"instr":"movzwl %ax,%eax"}
+%def op_int_to_char():
+% unop(instr="movzwl %ax,%eax")
diff --git a/runtime/interpreter/mterp/x86/op_int_to_double.S b/runtime/interpreter/mterp/x86/op_int_to_double.S
index 3e9921e..e304d8e 100644
--- a/runtime/interpreter/mterp/x86/op_int_to_double.S
+++ b/runtime/interpreter/mterp/x86/op_int_to_double.S
@@ -1 +1,2 @@
-%include "x86/fpcvt.S" {"load":"fildl","store":"fstpl","wide":"1"}
+%def op_int_to_double():
+% fpcvt(load="fildl", store="fstpl", wide="1")
diff --git a/runtime/interpreter/mterp/x86/op_int_to_float.S b/runtime/interpreter/mterp/x86/op_int_to_float.S
index 849540d..fe00097 100644
--- a/runtime/interpreter/mterp/x86/op_int_to_float.S
+++ b/runtime/interpreter/mterp/x86/op_int_to_float.S
@@ -1 +1,2 @@
-%include "x86/fpcvt.S" {"load":"fildl","store":"fstps"}
+%def op_int_to_float():
+% fpcvt(load="fildl", store="fstps")
diff --git a/runtime/interpreter/mterp/x86/op_int_to_long.S b/runtime/interpreter/mterp/x86/op_int_to_long.S
index 6f9ea26..8491973 100644
--- a/runtime/interpreter/mterp/x86/op_int_to_long.S
+++ b/runtime/interpreter/mterp/x86/op_int_to_long.S
@@ -1,3 +1,4 @@
+%def op_int_to_long():
/* int to long vA, vB */
movzbl rINSTbl, %eax # eax <- +A
sarl $$4, %eax # eax <- B
diff --git a/runtime/interpreter/mterp/x86/op_int_to_short.S b/runtime/interpreter/mterp/x86/op_int_to_short.S
index 90d0ae6..e4db90b 100644
--- a/runtime/interpreter/mterp/x86/op_int_to_short.S
+++ b/runtime/interpreter/mterp/x86/op_int_to_short.S
@@ -1 +1,2 @@
-%include "x86/unop.S" {"instr":"movswl %ax, %eax"}
+%def op_int_to_short():
+% unop(instr="movswl %ax, %eax")
diff --git a/runtime/interpreter/mterp/x86/op_invoke_custom.S b/runtime/interpreter/mterp/x86/op_invoke_custom.S
index eddd5b3..4bba9ee 100644
--- a/runtime/interpreter/mterp/x86/op_invoke_custom.S
+++ b/runtime/interpreter/mterp/x86/op_invoke_custom.S
@@ -1 +1,2 @@
-%include "x86/invoke.S" { "helper":"MterpInvokeCustom" }
+%def op_invoke_custom():
+% invoke(helper="MterpInvokeCustom")
diff --git a/runtime/interpreter/mterp/x86/op_invoke_custom_range.S b/runtime/interpreter/mterp/x86/op_invoke_custom_range.S
index 1a4e884..57e61af 100644
--- a/runtime/interpreter/mterp/x86/op_invoke_custom_range.S
+++ b/runtime/interpreter/mterp/x86/op_invoke_custom_range.S
@@ -1 +1,2 @@
-%include "x86/invoke.S" { "helper":"MterpInvokeCustomRange" }
+%def op_invoke_custom_range():
+% invoke(helper="MterpInvokeCustomRange")
diff --git a/runtime/interpreter/mterp/x86/op_invoke_direct.S b/runtime/interpreter/mterp/x86/op_invoke_direct.S
index 76fb9a6..d3139cf 100644
--- a/runtime/interpreter/mterp/x86/op_invoke_direct.S
+++ b/runtime/interpreter/mterp/x86/op_invoke_direct.S
@@ -1 +1,2 @@
-%include "x86/invoke.S" { "helper":"MterpInvokeDirect" }
+%def op_invoke_direct():
+% invoke(helper="MterpInvokeDirect")
diff --git a/runtime/interpreter/mterp/x86/op_invoke_direct_range.S b/runtime/interpreter/mterp/x86/op_invoke_direct_range.S
index a6ab604..b4a161f 100644
--- a/runtime/interpreter/mterp/x86/op_invoke_direct_range.S
+++ b/runtime/interpreter/mterp/x86/op_invoke_direct_range.S
@@ -1 +1,2 @@
-%include "x86/invoke.S" { "helper":"MterpInvokeDirectRange" }
+%def op_invoke_direct_range():
+% invoke(helper="MterpInvokeDirectRange")
diff --git a/runtime/interpreter/mterp/x86/op_invoke_interface.S b/runtime/interpreter/mterp/x86/op_invoke_interface.S
index 91c24f5..559b976 100644
--- a/runtime/interpreter/mterp/x86/op_invoke_interface.S
+++ b/runtime/interpreter/mterp/x86/op_invoke_interface.S
@@ -1,4 +1,5 @@
-%include "x86/invoke.S" { "helper":"MterpInvokeInterface" }
+%def op_invoke_interface():
+% invoke(helper="MterpInvokeInterface")
/*
* Handle an interface method call.
*
diff --git a/runtime/interpreter/mterp/x86/op_invoke_interface_range.S b/runtime/interpreter/mterp/x86/op_invoke_interface_range.S
index e478beb..2989115 100644
--- a/runtime/interpreter/mterp/x86/op_invoke_interface_range.S
+++ b/runtime/interpreter/mterp/x86/op_invoke_interface_range.S
@@ -1 +1,2 @@
-%include "x86/invoke.S" { "helper":"MterpInvokeInterfaceRange" }
+%def op_invoke_interface_range():
+% invoke(helper="MterpInvokeInterfaceRange")
diff --git a/runtime/interpreter/mterp/x86/op_invoke_polymorphic.S b/runtime/interpreter/mterp/x86/op_invoke_polymorphic.S
index 3907689..ce61f5a 100644
--- a/runtime/interpreter/mterp/x86/op_invoke_polymorphic.S
+++ b/runtime/interpreter/mterp/x86/op_invoke_polymorphic.S
@@ -1 +1,2 @@
-%include "x86/invoke_polymorphic.S" { "helper":"MterpInvokePolymorphic" }
+%def op_invoke_polymorphic():
+% invoke_polymorphic(helper="MterpInvokePolymorphic")
diff --git a/runtime/interpreter/mterp/x86/op_invoke_polymorphic_range.S b/runtime/interpreter/mterp/x86/op_invoke_polymorphic_range.S
index 59a8230..16731bd 100644
--- a/runtime/interpreter/mterp/x86/op_invoke_polymorphic_range.S
+++ b/runtime/interpreter/mterp/x86/op_invoke_polymorphic_range.S
@@ -1 +1,2 @@
-%include "x86/invoke_polymorphic.S" { "helper":"MterpInvokePolymorphicRange" }
+%def op_invoke_polymorphic_range():
+% invoke_polymorphic(helper="MterpInvokePolymorphicRange")
diff --git a/runtime/interpreter/mterp/x86/op_invoke_static.S b/runtime/interpreter/mterp/x86/op_invoke_static.S
index b4c1236..3e38d36 100644
--- a/runtime/interpreter/mterp/x86/op_invoke_static.S
+++ b/runtime/interpreter/mterp/x86/op_invoke_static.S
@@ -1,2 +1,3 @@
-%include "x86/invoke.S" { "helper":"MterpInvokeStatic" }
+%def op_invoke_static():
+% invoke(helper="MterpInvokeStatic")
diff --git a/runtime/interpreter/mterp/x86/op_invoke_static_range.S b/runtime/interpreter/mterp/x86/op_invoke_static_range.S
index 3dc8a26..e0a546c 100644
--- a/runtime/interpreter/mterp/x86/op_invoke_static_range.S
+++ b/runtime/interpreter/mterp/x86/op_invoke_static_range.S
@@ -1 +1,2 @@
-%include "x86/invoke.S" { "helper":"MterpInvokeStaticRange" }
+%def op_invoke_static_range():
+% invoke(helper="MterpInvokeStaticRange")
diff --git a/runtime/interpreter/mterp/x86/op_invoke_super.S b/runtime/interpreter/mterp/x86/op_invoke_super.S
index be20edd..5b20550 100644
--- a/runtime/interpreter/mterp/x86/op_invoke_super.S
+++ b/runtime/interpreter/mterp/x86/op_invoke_super.S
@@ -1,4 +1,5 @@
-%include "x86/invoke.S" { "helper":"MterpInvokeSuper" }
+%def op_invoke_super():
+% invoke(helper="MterpInvokeSuper")
/*
* Handle a "super" method call.
*
diff --git a/runtime/interpreter/mterp/x86/op_invoke_super_range.S b/runtime/interpreter/mterp/x86/op_invoke_super_range.S
index f36bf72..caeafaa 100644
--- a/runtime/interpreter/mterp/x86/op_invoke_super_range.S
+++ b/runtime/interpreter/mterp/x86/op_invoke_super_range.S
@@ -1 +1,2 @@
-%include "x86/invoke.S" { "helper":"MterpInvokeSuperRange" }
+%def op_invoke_super_range():
+% invoke(helper="MterpInvokeSuperRange")
diff --git a/runtime/interpreter/mterp/x86/op_invoke_virtual.S b/runtime/interpreter/mterp/x86/op_invoke_virtual.S
index 7e9c456..e27eeed 100644
--- a/runtime/interpreter/mterp/x86/op_invoke_virtual.S
+++ b/runtime/interpreter/mterp/x86/op_invoke_virtual.S
@@ -1,4 +1,5 @@
-%include "x86/invoke.S" { "helper":"MterpInvokeVirtual" }
+%def op_invoke_virtual():
+% invoke(helper="MterpInvokeVirtual")
/*
* Handle a virtual method call.
*
diff --git a/runtime/interpreter/mterp/x86/op_invoke_virtual_quick.S b/runtime/interpreter/mterp/x86/op_invoke_virtual_quick.S
index 2dc9ab6..ea72c17 100644
--- a/runtime/interpreter/mterp/x86/op_invoke_virtual_quick.S
+++ b/runtime/interpreter/mterp/x86/op_invoke_virtual_quick.S
@@ -1 +1,2 @@
-%include "x86/invoke.S" { "helper":"MterpInvokeVirtualQuick" }
+%def op_invoke_virtual_quick():
+% invoke(helper="MterpInvokeVirtualQuick")
diff --git a/runtime/interpreter/mterp/x86/op_invoke_virtual_range.S b/runtime/interpreter/mterp/x86/op_invoke_virtual_range.S
index d1d20d2..baa0779 100644
--- a/runtime/interpreter/mterp/x86/op_invoke_virtual_range.S
+++ b/runtime/interpreter/mterp/x86/op_invoke_virtual_range.S
@@ -1 +1,2 @@
-%include "x86/invoke.S" { "helper":"MterpInvokeVirtualRange" }
+%def op_invoke_virtual_range():
+% invoke(helper="MterpInvokeVirtualRange")
diff --git a/runtime/interpreter/mterp/x86/op_invoke_virtual_range_quick.S b/runtime/interpreter/mterp/x86/op_invoke_virtual_range_quick.S
index 21bfc55..1d961a0 100644
--- a/runtime/interpreter/mterp/x86/op_invoke_virtual_range_quick.S
+++ b/runtime/interpreter/mterp/x86/op_invoke_virtual_range_quick.S
@@ -1 +1,2 @@
-%include "x86/invoke.S" { "helper":"MterpInvokeVirtualQuickRange" }
+%def op_invoke_virtual_range_quick():
+% invoke(helper="MterpInvokeVirtualQuickRange")
diff --git a/runtime/interpreter/mterp/x86/op_iput.S b/runtime/interpreter/mterp/x86/op_iput.S
index 3628ffd..e5351ba 100644
--- a/runtime/interpreter/mterp/x86/op_iput.S
+++ b/runtime/interpreter/mterp/x86/op_iput.S
@@ -1,2 +1,2 @@
-%default { "is_object":"0", "helper":"MterpIPutU32" }
-%include "x86/field.S" { }
+%def op_iput(is_object="0", helper="MterpIPutU32"):
+% field(helper=helper)
diff --git a/runtime/interpreter/mterp/x86/op_iput_boolean.S b/runtime/interpreter/mterp/x86/op_iput_boolean.S
index fdd5303..9eb8498 100644
--- a/runtime/interpreter/mterp/x86/op_iput_boolean.S
+++ b/runtime/interpreter/mterp/x86/op_iput_boolean.S
@@ -1 +1,2 @@
-%include "x86/op_iput.S" { "helper":"MterpIPutU8" }
+%def op_iput_boolean():
+% op_iput(helper="MterpIPutU8")
diff --git a/runtime/interpreter/mterp/x86/op_iput_boolean_quick.S b/runtime/interpreter/mterp/x86/op_iput_boolean_quick.S
index 93865de..c304c76 100644
--- a/runtime/interpreter/mterp/x86/op_iput_boolean_quick.S
+++ b/runtime/interpreter/mterp/x86/op_iput_boolean_quick.S
@@ -1 +1,2 @@
-%include "x86/op_iput_quick.S" { "reg":"rINSTbl", "store":"movb" }
+%def op_iput_boolean_quick():
+% op_iput_quick(reg="rINSTbl", store="movb")
diff --git a/runtime/interpreter/mterp/x86/op_iput_byte.S b/runtime/interpreter/mterp/x86/op_iput_byte.S
index b81850c..4b74f9f 100644
--- a/runtime/interpreter/mterp/x86/op_iput_byte.S
+++ b/runtime/interpreter/mterp/x86/op_iput_byte.S
@@ -1 +1,2 @@
-%include "x86/op_iput.S" { "helper":"MterpIPutI8" }
+%def op_iput_byte():
+% op_iput(helper="MterpIPutI8")
diff --git a/runtime/interpreter/mterp/x86/op_iput_byte_quick.S b/runtime/interpreter/mterp/x86/op_iput_byte_quick.S
index 93865de..dac18e6 100644
--- a/runtime/interpreter/mterp/x86/op_iput_byte_quick.S
+++ b/runtime/interpreter/mterp/x86/op_iput_byte_quick.S
@@ -1 +1,2 @@
-%include "x86/op_iput_quick.S" { "reg":"rINSTbl", "store":"movb" }
+%def op_iput_byte_quick():
+% op_iput_quick(reg="rINSTbl", store="movb")
diff --git a/runtime/interpreter/mterp/x86/op_iput_char.S b/runtime/interpreter/mterp/x86/op_iput_char.S
index dde3853..64a249f 100644
--- a/runtime/interpreter/mterp/x86/op_iput_char.S
+++ b/runtime/interpreter/mterp/x86/op_iput_char.S
@@ -1 +1,2 @@
-%include "x86/op_iput.S" { "helper":"MterpIPutU16" }
+%def op_iput_char():
+% op_iput(helper="MterpIPutU16")
diff --git a/runtime/interpreter/mterp/x86/op_iput_char_quick.S b/runtime/interpreter/mterp/x86/op_iput_char_quick.S
index 4ec8029..21a2581 100644
--- a/runtime/interpreter/mterp/x86/op_iput_char_quick.S
+++ b/runtime/interpreter/mterp/x86/op_iput_char_quick.S
@@ -1 +1,2 @@
-%include "x86/op_iput_quick.S" { "reg":"rINSTw", "store":"movw" }
+%def op_iput_char_quick():
+% op_iput_quick(reg="rINSTw", store="movw")
diff --git a/runtime/interpreter/mterp/x86/op_iput_object.S b/runtime/interpreter/mterp/x86/op_iput_object.S
index a124b7e..131edd5 100644
--- a/runtime/interpreter/mterp/x86/op_iput_object.S
+++ b/runtime/interpreter/mterp/x86/op_iput_object.S
@@ -1 +1,2 @@
-%include "x86/op_iput.S" { "is_object":"1", "helper":"MterpIPutObj" }
+%def op_iput_object():
+% op_iput(is_object="1", helper="MterpIPutObj")
diff --git a/runtime/interpreter/mterp/x86/op_iput_object_quick.S b/runtime/interpreter/mterp/x86/op_iput_object_quick.S
index cb77929..6b6fb2d 100644
--- a/runtime/interpreter/mterp/x86/op_iput_object_quick.S
+++ b/runtime/interpreter/mterp/x86/op_iput_object_quick.S
@@ -1,3 +1,4 @@
+%def op_iput_object_quick():
EXPORT_PC
leal OFF_FP_SHADOWFRAME(rFP), %eax
movl %eax, OUT_ARG0(%esp)
diff --git a/runtime/interpreter/mterp/x86/op_iput_quick.S b/runtime/interpreter/mterp/x86/op_iput_quick.S
index b67cee0..5198cfe 100644
--- a/runtime/interpreter/mterp/x86/op_iput_quick.S
+++ b/runtime/interpreter/mterp/x86/op_iput_quick.S
@@ -1,4 +1,4 @@
-%default { "reg":"rINST", "store":"movl" }
+%def op_iput_quick(reg="rINST", store="movl"):
/* For: iput-quick, iput-object-quick */
/* op vA, vB, offset@CCCC */
movzbl rINSTbl, %ecx # ecx <- BA
diff --git a/runtime/interpreter/mterp/x86/op_iput_short.S b/runtime/interpreter/mterp/x86/op_iput_short.S
index 130e875..e631a3b 100644
--- a/runtime/interpreter/mterp/x86/op_iput_short.S
+++ b/runtime/interpreter/mterp/x86/op_iput_short.S
@@ -1 +1,2 @@
-%include "x86/op_iput.S" { "helper":"MterpIPutI16" }
+%def op_iput_short():
+% op_iput(helper="MterpIPutI16")
diff --git a/runtime/interpreter/mterp/x86/op_iput_short_quick.S b/runtime/interpreter/mterp/x86/op_iput_short_quick.S
index 4ec8029..5eb28d6 100644
--- a/runtime/interpreter/mterp/x86/op_iput_short_quick.S
+++ b/runtime/interpreter/mterp/x86/op_iput_short_quick.S
@@ -1 +1,2 @@
-%include "x86/op_iput_quick.S" { "reg":"rINSTw", "store":"movw" }
+%def op_iput_short_quick():
+% op_iput_quick(reg="rINSTw", store="movw")
diff --git a/runtime/interpreter/mterp/x86/op_iput_wide.S b/runtime/interpreter/mterp/x86/op_iput_wide.S
index 2820ede..2f34fd3 100644
--- a/runtime/interpreter/mterp/x86/op_iput_wide.S
+++ b/runtime/interpreter/mterp/x86/op_iput_wide.S
@@ -1 +1,2 @@
-%include "x86/op_iput.S" { "helper":"MterpIPutU64" }
+%def op_iput_wide():
+% op_iput(helper="MterpIPutU64")
diff --git a/runtime/interpreter/mterp/x86/op_iput_wide_quick.S b/runtime/interpreter/mterp/x86/op_iput_wide_quick.S
index 17de6f8..6e1feef 100644
--- a/runtime/interpreter/mterp/x86/op_iput_wide_quick.S
+++ b/runtime/interpreter/mterp/x86/op_iput_wide_quick.S
@@ -1,3 +1,4 @@
+%def op_iput_wide_quick():
/* iput-wide-quick vA, vB, offset@CCCC */
movzbl rINSTbl, %ecx # ecx<- BA
sarl $$4, %ecx # ecx<- B
diff --git a/runtime/interpreter/mterp/x86/op_long_to_double.S b/runtime/interpreter/mterp/x86/op_long_to_double.S
index 2c7f905..858cb2e 100644
--- a/runtime/interpreter/mterp/x86/op_long_to_double.S
+++ b/runtime/interpreter/mterp/x86/op_long_to_double.S
@@ -1 +1,2 @@
-%include "x86/fpcvt.S" {"load":"fildll","store":"fstpl","wide":"1"}
+%def op_long_to_double():
+% fpcvt(load="fildll", store="fstpl", wide="1")
diff --git a/runtime/interpreter/mterp/x86/op_long_to_float.S b/runtime/interpreter/mterp/x86/op_long_to_float.S
index e500e39..b26085a 100644
--- a/runtime/interpreter/mterp/x86/op_long_to_float.S
+++ b/runtime/interpreter/mterp/x86/op_long_to_float.S
@@ -1 +1,2 @@
-%include "x86/fpcvt.S" {"load":"fildll","store":"fstps"}
+%def op_long_to_float():
+% fpcvt(load="fildll", store="fstps")
diff --git a/runtime/interpreter/mterp/x86/op_long_to_int.S b/runtime/interpreter/mterp/x86/op_long_to_int.S
index 1c39b96..eacb8f5 100644
--- a/runtime/interpreter/mterp/x86/op_long_to_int.S
+++ b/runtime/interpreter/mterp/x86/op_long_to_int.S
@@ -1,2 +1,3 @@
+%def op_long_to_int():
/* we ignore the high word, making this equivalent to a 32-bit reg move */
-%include "x86/op_move.S"
+% op_move()
diff --git a/runtime/interpreter/mterp/x86/op_monitor_enter.S b/runtime/interpreter/mterp/x86/op_monitor_enter.S
index b35c684..d28ab4c 100644
--- a/runtime/interpreter/mterp/x86/op_monitor_enter.S
+++ b/runtime/interpreter/mterp/x86/op_monitor_enter.S
@@ -1,3 +1,4 @@
+%def op_monitor_enter():
/*
* Synchronize on an object.
*/
diff --git a/runtime/interpreter/mterp/x86/op_monitor_exit.S b/runtime/interpreter/mterp/x86/op_monitor_exit.S
index 2d17d5e..63a8287 100644
--- a/runtime/interpreter/mterp/x86/op_monitor_exit.S
+++ b/runtime/interpreter/mterp/x86/op_monitor_exit.S
@@ -1,3 +1,4 @@
+%def op_monitor_exit():
/*
* Unlock an object.
*
diff --git a/runtime/interpreter/mterp/x86/op_move.S b/runtime/interpreter/mterp/x86/op_move.S
index ea173b9..e023755 100644
--- a/runtime/interpreter/mterp/x86/op_move.S
+++ b/runtime/interpreter/mterp/x86/op_move.S
@@ -1,4 +1,4 @@
-%default { "is_object":"0" }
+%def op_move(is_object="0"):
/* for move, move-object, long-to-int */
/* op vA, vB */
movzbl rINSTbl, %eax # eax <- BA
diff --git a/runtime/interpreter/mterp/x86/op_move_16.S b/runtime/interpreter/mterp/x86/op_move_16.S
index 454deb5..0b4f839 100644
--- a/runtime/interpreter/mterp/x86/op_move_16.S
+++ b/runtime/interpreter/mterp/x86/op_move_16.S
@@ -1,4 +1,4 @@
-%default { "is_object":"0" }
+%def op_move_16(is_object="0"):
/* for: move/16, move-object/16 */
/* op vAAAA, vBBBB */
movzwl 4(rPC), %ecx # ecx <- BBBB
diff --git a/runtime/interpreter/mterp/x86/op_move_exception.S b/runtime/interpreter/mterp/x86/op_move_exception.S
index d8dc74f..cadce40 100644
--- a/runtime/interpreter/mterp/x86/op_move_exception.S
+++ b/runtime/interpreter/mterp/x86/op_move_exception.S
@@ -1,3 +1,4 @@
+%def op_move_exception():
/* move-exception vAA */
movl rSELF, %ecx
movl THREAD_EXCEPTION_OFFSET(%ecx), %eax
diff --git a/runtime/interpreter/mterp/x86/op_move_from16.S b/runtime/interpreter/mterp/x86/op_move_from16.S
index e869855..b8a9c8b 100644
--- a/runtime/interpreter/mterp/x86/op_move_from16.S
+++ b/runtime/interpreter/mterp/x86/op_move_from16.S
@@ -1,4 +1,4 @@
-%default { "is_object":"0" }
+%def op_move_from16(is_object="0"):
/* for: move/from16, move-object/from16 */
/* op vAA, vBBBB */
movzx rINSTbl, %eax # eax <- AA
diff --git a/runtime/interpreter/mterp/x86/op_move_object.S b/runtime/interpreter/mterp/x86/op_move_object.S
index a6a7c90..dbb4d59 100644
--- a/runtime/interpreter/mterp/x86/op_move_object.S
+++ b/runtime/interpreter/mterp/x86/op_move_object.S
@@ -1 +1,2 @@
-%include "x86/op_move.S" {"is_object":"1"}
+%def op_move_object():
+% op_move(is_object="1")
diff --git a/runtime/interpreter/mterp/x86/op_move_object_16.S b/runtime/interpreter/mterp/x86/op_move_object_16.S
index e0c8527..4012037 100644
--- a/runtime/interpreter/mterp/x86/op_move_object_16.S
+++ b/runtime/interpreter/mterp/x86/op_move_object_16.S
@@ -1 +1,2 @@
-%include "x86/op_move_16.S" {"is_object":"1"}
+%def op_move_object_16():
+% op_move_16(is_object="1")
diff --git a/runtime/interpreter/mterp/x86/op_move_object_from16.S b/runtime/interpreter/mterp/x86/op_move_object_from16.S
index e623820..c82698e 100644
--- a/runtime/interpreter/mterp/x86/op_move_object_from16.S
+++ b/runtime/interpreter/mterp/x86/op_move_object_from16.S
@@ -1 +1,2 @@
-%include "x86/op_move_from16.S" {"is_object":"1"}
+%def op_move_object_from16():
+% op_move_from16(is_object="1")
diff --git a/runtime/interpreter/mterp/x86/op_move_result.S b/runtime/interpreter/mterp/x86/op_move_result.S
index f6f2129..c287faa 100644
--- a/runtime/interpreter/mterp/x86/op_move_result.S
+++ b/runtime/interpreter/mterp/x86/op_move_result.S
@@ -1,4 +1,4 @@
-%default { "is_object":"0" }
+%def op_move_result(is_object="0"):
/* for: move-result, move-result-object */
/* op vAA */
movl OFF_FP_RESULT_REGISTER(rFP), %eax # get pointer to result JType.
diff --git a/runtime/interpreter/mterp/x86/op_move_result_object.S b/runtime/interpreter/mterp/x86/op_move_result_object.S
index cbf5e1d..87aea26 100644
--- a/runtime/interpreter/mterp/x86/op_move_result_object.S
+++ b/runtime/interpreter/mterp/x86/op_move_result_object.S
@@ -1 +1,2 @@
-%include "x86/op_move_result.S" {"is_object":"1"}
+%def op_move_result_object():
+% op_move_result(is_object="1")
diff --git a/runtime/interpreter/mterp/x86/op_move_result_wide.S b/runtime/interpreter/mterp/x86/op_move_result_wide.S
index 7818cce..68b1d80 100644
--- a/runtime/interpreter/mterp/x86/op_move_result_wide.S
+++ b/runtime/interpreter/mterp/x86/op_move_result_wide.S
@@ -1,3 +1,4 @@
+%def op_move_result_wide():
/* move-result-wide vAA */
movl OFF_FP_RESULT_REGISTER(rFP), %eax # get pointer to result JType.
movl 4(%eax), %ecx # Get high
diff --git a/runtime/interpreter/mterp/x86/op_move_wide.S b/runtime/interpreter/mterp/x86/op_move_wide.S
index 79ce7b7..0559d01 100644
--- a/runtime/interpreter/mterp/x86/op_move_wide.S
+++ b/runtime/interpreter/mterp/x86/op_move_wide.S
@@ -1,3 +1,4 @@
+%def op_move_wide():
/* move-wide vA, vB */
/* NOTE: regs can overlap, e.g. "move v6,v7" or "move v7,v6" */
movzbl rINSTbl, %ecx # ecx <- BA
diff --git a/runtime/interpreter/mterp/x86/op_move_wide_16.S b/runtime/interpreter/mterp/x86/op_move_wide_16.S
index a6b8596..13a5e0d 100644
--- a/runtime/interpreter/mterp/x86/op_move_wide_16.S
+++ b/runtime/interpreter/mterp/x86/op_move_wide_16.S
@@ -1,3 +1,4 @@
+%def op_move_wide_16():
/* move-wide/16 vAAAA, vBBBB */
/* NOTE: regs can overlap, e.g. "move v6,v7" or "move v7,v6" */
movzwl 4(rPC), %ecx # ecx<- BBBB
diff --git a/runtime/interpreter/mterp/x86/op_move_wide_from16.S b/runtime/interpreter/mterp/x86/op_move_wide_from16.S
index ec344de..5380a8f 100644
--- a/runtime/interpreter/mterp/x86/op_move_wide_from16.S
+++ b/runtime/interpreter/mterp/x86/op_move_wide_from16.S
@@ -1,3 +1,4 @@
+%def op_move_wide_from16():
/* move-wide/from16 vAA, vBBBB */
/* NOTE: regs can overlap, e.g. "move v6,v7" or "move v7,v6" */
movzwl 2(rPC), %ecx # ecx <- BBBB
diff --git a/runtime/interpreter/mterp/x86/op_mul_double.S b/runtime/interpreter/mterp/x86/op_mul_double.S
index 7cef4c0..5353028 100644
--- a/runtime/interpreter/mterp/x86/op_mul_double.S
+++ b/runtime/interpreter/mterp/x86/op_mul_double.S
@@ -1 +1,2 @@
-%include "x86/sseBinop.S" {"instr":"muls","suff":"d"}
+%def op_mul_double():
+% sseBinop(instr="muls", suff="d")
diff --git a/runtime/interpreter/mterp/x86/op_mul_double_2addr.S b/runtime/interpreter/mterp/x86/op_mul_double_2addr.S
index bb722b6..7a6dcd0 100644
--- a/runtime/interpreter/mterp/x86/op_mul_double_2addr.S
+++ b/runtime/interpreter/mterp/x86/op_mul_double_2addr.S
@@ -1 +1,2 @@
-%include "x86/sseBinop2Addr.S" {"instr":"muls","suff":"d"}
+%def op_mul_double_2addr():
+% sseBinop2Addr(instr="muls", suff="d")
diff --git a/runtime/interpreter/mterp/x86/op_mul_float.S b/runtime/interpreter/mterp/x86/op_mul_float.S
index 1156230..b9eeeee 100644
--- a/runtime/interpreter/mterp/x86/op_mul_float.S
+++ b/runtime/interpreter/mterp/x86/op_mul_float.S
@@ -1 +1,2 @@
-%include "x86/sseBinop.S" {"instr":"muls","suff":"s"}
+%def op_mul_float():
+% sseBinop(instr="muls", suff="s")
diff --git a/runtime/interpreter/mterp/x86/op_mul_float_2addr.S b/runtime/interpreter/mterp/x86/op_mul_float_2addr.S
index e9316df..949af7b 100644
--- a/runtime/interpreter/mterp/x86/op_mul_float_2addr.S
+++ b/runtime/interpreter/mterp/x86/op_mul_float_2addr.S
@@ -1 +1,2 @@
-%include "x86/sseBinop2Addr.S" {"instr":"muls","suff":"s"}
+%def op_mul_float_2addr():
+% sseBinop2Addr(instr="muls", suff="s")
diff --git a/runtime/interpreter/mterp/x86/op_mul_int.S b/runtime/interpreter/mterp/x86/op_mul_int.S
index 77f4659..9388486 100644
--- a/runtime/interpreter/mterp/x86/op_mul_int.S
+++ b/runtime/interpreter/mterp/x86/op_mul_int.S
@@ -1,3 +1,4 @@
+%def op_mul_int():
/*
* 32-bit binary multiplication.
*/
diff --git a/runtime/interpreter/mterp/x86/op_mul_int_2addr.S b/runtime/interpreter/mterp/x86/op_mul_int_2addr.S
index da699ae..34e9b31 100644
--- a/runtime/interpreter/mterp/x86/op_mul_int_2addr.S
+++ b/runtime/interpreter/mterp/x86/op_mul_int_2addr.S
@@ -1,3 +1,4 @@
+%def op_mul_int_2addr():
/* mul vA, vB */
movzx rINSTbl, %ecx # ecx <- A+
sarl $$4, rINST # rINST <- B
diff --git a/runtime/interpreter/mterp/x86/op_mul_int_lit16.S b/runtime/interpreter/mterp/x86/op_mul_int_lit16.S
index 056f491..491fde4 100644
--- a/runtime/interpreter/mterp/x86/op_mul_int_lit16.S
+++ b/runtime/interpreter/mterp/x86/op_mul_int_lit16.S
@@ -1,3 +1,4 @@
+%def op_mul_int_lit16():
/* mul/lit16 vA, vB, #+CCCC */
/* Need A in rINST, ssssCCCC in ecx, vB in eax */
movzbl rINSTbl, %eax # eax <- 000000BA
diff --git a/runtime/interpreter/mterp/x86/op_mul_int_lit8.S b/runtime/interpreter/mterp/x86/op_mul_int_lit8.S
index 59b3844..d76973c 100644
--- a/runtime/interpreter/mterp/x86/op_mul_int_lit8.S
+++ b/runtime/interpreter/mterp/x86/op_mul_int_lit8.S
@@ -1,3 +1,4 @@
+%def op_mul_int_lit8():
/* mul/lit8 vAA, vBB, #+CC */
movzbl 2(rPC), %eax # eax <- BB
movl rIBASE, %ecx
diff --git a/runtime/interpreter/mterp/x86/op_mul_long.S b/runtime/interpreter/mterp/x86/op_mul_long.S
index f35ca13..0359272 100644
--- a/runtime/interpreter/mterp/x86/op_mul_long.S
+++ b/runtime/interpreter/mterp/x86/op_mul_long.S
@@ -1,3 +1,4 @@
+%def op_mul_long():
/*
* Signed 64-bit integer multiply.
*
diff --git a/runtime/interpreter/mterp/x86/op_mul_long_2addr.S b/runtime/interpreter/mterp/x86/op_mul_long_2addr.S
index 565a57c..b48f58d 100644
--- a/runtime/interpreter/mterp/x86/op_mul_long_2addr.S
+++ b/runtime/interpreter/mterp/x86/op_mul_long_2addr.S
@@ -1,3 +1,4 @@
+%def op_mul_long_2addr():
/*
* Signed 64-bit integer multiply, 2-addr version
*
diff --git a/runtime/interpreter/mterp/x86/op_neg_double.S b/runtime/interpreter/mterp/x86/op_neg_double.S
index fac4322..df29053 100644
--- a/runtime/interpreter/mterp/x86/op_neg_double.S
+++ b/runtime/interpreter/mterp/x86/op_neg_double.S
@@ -1 +1,2 @@
-%include "x86/fpcvt.S" {"instr":"fchs","load":"fldl","store":"fstpl","wide":"1"}
+%def op_neg_double():
+% fpcvt(instr="fchs", load="fldl", store="fstpl", wide="1")
diff --git a/runtime/interpreter/mterp/x86/op_neg_float.S b/runtime/interpreter/mterp/x86/op_neg_float.S
index 30f071b..0abe45c 100644
--- a/runtime/interpreter/mterp/x86/op_neg_float.S
+++ b/runtime/interpreter/mterp/x86/op_neg_float.S
@@ -1 +1,2 @@
-%include "x86/fpcvt.S" {"instr":"fchs","load":"flds","store":"fstps"}
+%def op_neg_float():
+% fpcvt(instr="fchs", load="flds", store="fstps")
diff --git a/runtime/interpreter/mterp/x86/op_neg_int.S b/runtime/interpreter/mterp/x86/op_neg_int.S
index 67d4d18..24604a9 100644
--- a/runtime/interpreter/mterp/x86/op_neg_int.S
+++ b/runtime/interpreter/mterp/x86/op_neg_int.S
@@ -1 +1,2 @@
-%include "x86/unop.S" {"instr":"negl %eax"}
+%def op_neg_int():
+% unop(instr="negl %eax")
diff --git a/runtime/interpreter/mterp/x86/op_neg_long.S b/runtime/interpreter/mterp/x86/op_neg_long.S
index 30da247..75f3279 100644
--- a/runtime/interpreter/mterp/x86/op_neg_long.S
+++ b/runtime/interpreter/mterp/x86/op_neg_long.S
@@ -1,3 +1,4 @@
+%def op_neg_long():
/* unop vA, vB */
movzbl rINSTbl, %ecx # ecx <- BA
sarl $$4, %ecx # ecx <- B
diff --git a/runtime/interpreter/mterp/x86/op_new_array.S b/runtime/interpreter/mterp/x86/op_new_array.S
index 16226e9..e59e106 100644
--- a/runtime/interpreter/mterp/x86/op_new_array.S
+++ b/runtime/interpreter/mterp/x86/op_new_array.S
@@ -1,3 +1,4 @@
+%def op_new_array():
/*
* Allocate an array of objects, specified with the array class
* and a count.
diff --git a/runtime/interpreter/mterp/x86/op_new_instance.S b/runtime/interpreter/mterp/x86/op_new_instance.S
index f976acc..81631c6 100644
--- a/runtime/interpreter/mterp/x86/op_new_instance.S
+++ b/runtime/interpreter/mterp/x86/op_new_instance.S
@@ -1,3 +1,4 @@
+%def op_new_instance():
/*
* Create a new instance of a class.
*/
diff --git a/runtime/interpreter/mterp/x86/op_nop.S b/runtime/interpreter/mterp/x86/op_nop.S
index 4cb68e3..aa4a843 100644
--- a/runtime/interpreter/mterp/x86/op_nop.S
+++ b/runtime/interpreter/mterp/x86/op_nop.S
@@ -1 +1,2 @@
+%def op_nop():
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
diff --git a/runtime/interpreter/mterp/x86/op_not_int.S b/runtime/interpreter/mterp/x86/op_not_int.S
index 335ab09..c95ac08 100644
--- a/runtime/interpreter/mterp/x86/op_not_int.S
+++ b/runtime/interpreter/mterp/x86/op_not_int.S
@@ -1 +1,2 @@
-%include "x86/unop.S" {"instr":"notl %eax"}
+%def op_not_int():
+% unop(instr="notl %eax")
diff --git a/runtime/interpreter/mterp/x86/op_not_long.S b/runtime/interpreter/mterp/x86/op_not_long.S
index 8f706e1..c79f9d0 100644
--- a/runtime/interpreter/mterp/x86/op_not_long.S
+++ b/runtime/interpreter/mterp/x86/op_not_long.S
@@ -1,3 +1,4 @@
+%def op_not_long():
/* unop vA, vB */
movzbl rINSTbl, %ecx # ecx <- BA
sarl $$4, %ecx # ecx <- B
diff --git a/runtime/interpreter/mterp/x86/op_or_int.S b/runtime/interpreter/mterp/x86/op_or_int.S
index ebe2ec2..f44ac0d 100644
--- a/runtime/interpreter/mterp/x86/op_or_int.S
+++ b/runtime/interpreter/mterp/x86/op_or_int.S
@@ -1 +1,2 @@
-%include "x86/binop.S" {"instr":"orl (rFP,%ecx,4), %eax"}
+%def op_or_int():
+% binop(instr="orl (rFP,%ecx,4), %eax")
diff --git a/runtime/interpreter/mterp/x86/op_or_int_2addr.S b/runtime/interpreter/mterp/x86/op_or_int_2addr.S
index 36c17db..f0f278c 100644
--- a/runtime/interpreter/mterp/x86/op_or_int_2addr.S
+++ b/runtime/interpreter/mterp/x86/op_or_int_2addr.S
@@ -1 +1,2 @@
-%include "x86/binop2addr.S" {"instr":"orl %eax, (rFP,%ecx,4)"}
+%def op_or_int_2addr():
+% binop2addr(instr="orl %eax, (rFP,%ecx,4)")
diff --git a/runtime/interpreter/mterp/x86/op_or_int_lit16.S b/runtime/interpreter/mterp/x86/op_or_int_lit16.S
index 0a88ff59..ba9b6bf 100644
--- a/runtime/interpreter/mterp/x86/op_or_int_lit16.S
+++ b/runtime/interpreter/mterp/x86/op_or_int_lit16.S
@@ -1 +1,2 @@
-%include "x86/binopLit16.S" {"instr":"orl %ecx, %eax"}
+%def op_or_int_lit16():
+% binopLit16(instr="orl %ecx, %eax")
diff --git a/runtime/interpreter/mterp/x86/op_or_int_lit8.S b/runtime/interpreter/mterp/x86/op_or_int_lit8.S
index 0670b67..758109b 100644
--- a/runtime/interpreter/mterp/x86/op_or_int_lit8.S
+++ b/runtime/interpreter/mterp/x86/op_or_int_lit8.S
@@ -1 +1,2 @@
-%include "x86/binopLit8.S" {"instr":"orl %ecx, %eax"}
+%def op_or_int_lit8():
+% binopLit8(instr="orl %ecx, %eax")
diff --git a/runtime/interpreter/mterp/x86/op_or_long.S b/runtime/interpreter/mterp/x86/op_or_long.S
index 09ca539..389081d 100644
--- a/runtime/interpreter/mterp/x86/op_or_long.S
+++ b/runtime/interpreter/mterp/x86/op_or_long.S
@@ -1 +1,2 @@
-%include "x86/binopWide.S" {"instr1":"orl (rFP,%ecx,4), rIBASE", "instr2":"orl 4(rFP,%ecx,4), %eax"}
+%def op_or_long():
+% binopWide(instr1="orl (rFP,%ecx,4), rIBASE", instr2="orl 4(rFP,%ecx,4), %eax")
diff --git a/runtime/interpreter/mterp/x86/op_or_long_2addr.S b/runtime/interpreter/mterp/x86/op_or_long_2addr.S
index 2062e81..5beb9a2 100644
--- a/runtime/interpreter/mterp/x86/op_or_long_2addr.S
+++ b/runtime/interpreter/mterp/x86/op_or_long_2addr.S
@@ -1 +1,2 @@
-%include "x86/binopWide2addr.S" {"instr1":"orl %eax, (rFP,rINST,4)","instr2":"orl %ecx, 4(rFP,rINST,4)"}
+%def op_or_long_2addr():
+% binopWide2addr(instr1="orl %eax, (rFP,rINST,4)", instr2="orl %ecx, 4(rFP,rINST,4)")
diff --git a/runtime/interpreter/mterp/x86/op_packed_switch.S b/runtime/interpreter/mterp/x86/op_packed_switch.S
index fcb7509..b4c393f 100644
--- a/runtime/interpreter/mterp/x86/op_packed_switch.S
+++ b/runtime/interpreter/mterp/x86/op_packed_switch.S
@@ -1,4 +1,4 @@
-%default { "func":"MterpDoPackedSwitch" }
+%def op_packed_switch(func="MterpDoPackedSwitch"):
/*
* Handle a packed-switch or sparse-switch instruction. In both cases
* we decode it and hand it off to a helper function.
diff --git a/runtime/interpreter/mterp/x86/op_rem_double.S b/runtime/interpreter/mterp/x86/op_rem_double.S
index 4b52a06..df7b740 100644
--- a/runtime/interpreter/mterp/x86/op_rem_double.S
+++ b/runtime/interpreter/mterp/x86/op_rem_double.S
@@ -1,3 +1,4 @@
+%def op_rem_double():
/* rem_double vAA, vBB, vCC */
movzbl 3(rPC), %ecx # ecx <- BB
movzbl 2(rPC), %eax # eax <- CC
diff --git a/runtime/interpreter/mterp/x86/op_rem_double_2addr.S b/runtime/interpreter/mterp/x86/op_rem_double_2addr.S
index 5a0e669..fb4e393 100644
--- a/runtime/interpreter/mterp/x86/op_rem_double_2addr.S
+++ b/runtime/interpreter/mterp/x86/op_rem_double_2addr.S
@@ -1,3 +1,4 @@
+%def op_rem_double_2addr():
/* rem_double/2addr vA, vB */
movzx rINSTbl, %ecx # ecx <- A+
sarl $$4, rINST # rINST <- B
diff --git a/runtime/interpreter/mterp/x86/op_rem_float.S b/runtime/interpreter/mterp/x86/op_rem_float.S
index 05e0bf1..9b436f2 100644
--- a/runtime/interpreter/mterp/x86/op_rem_float.S
+++ b/runtime/interpreter/mterp/x86/op_rem_float.S
@@ -1,3 +1,4 @@
+%def op_rem_float():
/* rem_float vAA, vBB, vCC */
movzbl 3(rPC), %ecx # ecx <- BB
movzbl 2(rPC), %eax # eax <- CC
diff --git a/runtime/interpreter/mterp/x86/op_rem_float_2addr.S b/runtime/interpreter/mterp/x86/op_rem_float_2addr.S
index 29f84e6..81d44c8 100644
--- a/runtime/interpreter/mterp/x86/op_rem_float_2addr.S
+++ b/runtime/interpreter/mterp/x86/op_rem_float_2addr.S
@@ -1,3 +1,4 @@
+%def op_rem_float_2addr():
/* rem_float/2addr vA, vB */
movzx rINSTbl, %ecx # ecx <- A+
sarl $$4, rINST # rINST <- B
diff --git a/runtime/interpreter/mterp/x86/op_rem_int.S b/runtime/interpreter/mterp/x86/op_rem_int.S
index d25b93c..71da7b8 100644
--- a/runtime/interpreter/mterp/x86/op_rem_int.S
+++ b/runtime/interpreter/mterp/x86/op_rem_int.S
@@ -1 +1,2 @@
-%include "x86/bindiv.S" {"result":"rIBASE","special":"$0","rem":"1"}
+%def op_rem_int():
+% bindiv(result="rIBASE", special="$0", rem="1")
diff --git a/runtime/interpreter/mterp/x86/op_rem_int_2addr.S b/runtime/interpreter/mterp/x86/op_rem_int_2addr.S
index c788e0e..f58f4ac 100644
--- a/runtime/interpreter/mterp/x86/op_rem_int_2addr.S
+++ b/runtime/interpreter/mterp/x86/op_rem_int_2addr.S
@@ -1 +1,2 @@
-%include "x86/bindiv2addr.S" {"result":"rIBASE","special":"$0"}
+%def op_rem_int_2addr():
+% bindiv2addr(result="rIBASE", special="$0")
diff --git a/runtime/interpreter/mterp/x86/op_rem_int_lit16.S b/runtime/interpreter/mterp/x86/op_rem_int_lit16.S
index 3df9d39..8915740 100644
--- a/runtime/interpreter/mterp/x86/op_rem_int_lit16.S
+++ b/runtime/interpreter/mterp/x86/op_rem_int_lit16.S
@@ -1 +1,2 @@
-%include "x86/bindivLit16.S" {"result":"rIBASE","special":"$0"}
+%def op_rem_int_lit16():
+% bindivLit16(result="rIBASE", special="$0")
diff --git a/runtime/interpreter/mterp/x86/op_rem_int_lit8.S b/runtime/interpreter/mterp/x86/op_rem_int_lit8.S
index 56e19c6..88369de 100644
--- a/runtime/interpreter/mterp/x86/op_rem_int_lit8.S
+++ b/runtime/interpreter/mterp/x86/op_rem_int_lit8.S
@@ -1 +1,2 @@
-%include "x86/bindivLit8.S" {"result":"rIBASE","special":"$0"}
+%def op_rem_int_lit8():
+% bindivLit8(result="rIBASE", special="$0")
diff --git a/runtime/interpreter/mterp/x86/op_rem_long.S b/runtime/interpreter/mterp/x86/op_rem_long.S
index 0ffe1f6..ef23c05 100644
--- a/runtime/interpreter/mterp/x86/op_rem_long.S
+++ b/runtime/interpreter/mterp/x86/op_rem_long.S
@@ -1 +1,2 @@
-%include "x86/op_div_long.S" {"routine":"art_quick_lmod"}
+%def op_rem_long():
+% op_div_long(routine="art_quick_lmod")
diff --git a/runtime/interpreter/mterp/x86/op_rem_long_2addr.S b/runtime/interpreter/mterp/x86/op_rem_long_2addr.S
index 4b97735..f6a8ec3 100644
--- a/runtime/interpreter/mterp/x86/op_rem_long_2addr.S
+++ b/runtime/interpreter/mterp/x86/op_rem_long_2addr.S
@@ -1 +1,2 @@
-%include "x86/op_div_long_2addr.S" {"routine":"art_quick_lmod"}
+%def op_rem_long_2addr():
+% op_div_long_2addr(routine="art_quick_lmod")
diff --git a/runtime/interpreter/mterp/x86/op_return.S b/runtime/interpreter/mterp/x86/op_return.S
index a8ebbed..0fdd6f5 100644
--- a/runtime/interpreter/mterp/x86/op_return.S
+++ b/runtime/interpreter/mterp/x86/op_return.S
@@ -1,3 +1,4 @@
+%def op_return():
/*
* Return a 32-bit value.
*
diff --git a/runtime/interpreter/mterp/x86/op_return_object.S b/runtime/interpreter/mterp/x86/op_return_object.S
index 12c84b3..2eeec0b 100644
--- a/runtime/interpreter/mterp/x86/op_return_object.S
+++ b/runtime/interpreter/mterp/x86/op_return_object.S
@@ -1 +1,2 @@
-%include "x86/op_return.S"
+%def op_return_object():
+% op_return()
diff --git a/runtime/interpreter/mterp/x86/op_return_void.S b/runtime/interpreter/mterp/x86/op_return_void.S
index d9eddf3..3eb5b66 100644
--- a/runtime/interpreter/mterp/x86/op_return_void.S
+++ b/runtime/interpreter/mterp/x86/op_return_void.S
@@ -1,3 +1,4 @@
+%def op_return_void():
.extern MterpThreadFenceForConstructor
call SYMBOL(MterpThreadFenceForConstructor)
movl rSELF, %eax
diff --git a/runtime/interpreter/mterp/x86/op_return_void_no_barrier.S b/runtime/interpreter/mterp/x86/op_return_void_no_barrier.S
index 2fbda6b..eadd522 100644
--- a/runtime/interpreter/mterp/x86/op_return_void_no_barrier.S
+++ b/runtime/interpreter/mterp/x86/op_return_void_no_barrier.S
@@ -1,3 +1,4 @@
+%def op_return_void_no_barrier():
movl rSELF, %eax
testl $$(THREAD_SUSPEND_OR_CHECKPOINT_REQUEST), THREAD_FLAGS_OFFSET(%eax)
jz 1f
diff --git a/runtime/interpreter/mterp/x86/op_return_wide.S b/runtime/interpreter/mterp/x86/op_return_wide.S
index 5fff626..67a103d 100644
--- a/runtime/interpreter/mterp/x86/op_return_wide.S
+++ b/runtime/interpreter/mterp/x86/op_return_wide.S
@@ -1,3 +1,4 @@
+%def op_return_wide():
/*
* Return a 64-bit value.
*/
diff --git a/runtime/interpreter/mterp/x86/op_rsub_int.S b/runtime/interpreter/mterp/x86/op_rsub_int.S
index d6449c6..05ba130 100644
--- a/runtime/interpreter/mterp/x86/op_rsub_int.S
+++ b/runtime/interpreter/mterp/x86/op_rsub_int.S
@@ -1,2 +1,3 @@
+%def op_rsub_int():
/* this op is "rsub-int", but can be thought of as "rsub-int/lit16" */
-%include "x86/binopLit16.S" {"instr":"subl %eax, %ecx","result":"%ecx"}
+% binopLit16(instr="subl %eax, %ecx", result="%ecx")
diff --git a/runtime/interpreter/mterp/x86/op_rsub_int_lit8.S b/runtime/interpreter/mterp/x86/op_rsub_int_lit8.S
index 15d0e35..d023047 100644
--- a/runtime/interpreter/mterp/x86/op_rsub_int_lit8.S
+++ b/runtime/interpreter/mterp/x86/op_rsub_int_lit8.S
@@ -1 +1,2 @@
-%include "x86/binopLit8.S" {"instr":"subl %eax, %ecx" , "result":"%ecx"}
+%def op_rsub_int_lit8():
+% binopLit8(instr="subl %eax, %ecx", result="%ecx")
diff --git a/runtime/interpreter/mterp/x86/op_sget.S b/runtime/interpreter/mterp/x86/op_sget.S
index ada4e0e..8a6a66a 100644
--- a/runtime/interpreter/mterp/x86/op_sget.S
+++ b/runtime/interpreter/mterp/x86/op_sget.S
@@ -1,2 +1,2 @@
-%default { "is_object":"0", "helper":"MterpSGetU32" }
-%include "x86/field.S" { }
+%def op_sget(is_object="0", helper="MterpSGetU32"):
+% field(helper=helper)
diff --git a/runtime/interpreter/mterp/x86/op_sget_boolean.S b/runtime/interpreter/mterp/x86/op_sget_boolean.S
index 3936eea..d9c12c9 100644
--- a/runtime/interpreter/mterp/x86/op_sget_boolean.S
+++ b/runtime/interpreter/mterp/x86/op_sget_boolean.S
@@ -1 +1,2 @@
-%include "x86/op_sget.S" {"helper":"MterpSGetU8"}
+%def op_sget_boolean():
+% op_sget(helper="MterpSGetU8")
diff --git a/runtime/interpreter/mterp/x86/op_sget_byte.S b/runtime/interpreter/mterp/x86/op_sget_byte.S
index 967586d..37c6879 100644
--- a/runtime/interpreter/mterp/x86/op_sget_byte.S
+++ b/runtime/interpreter/mterp/x86/op_sget_byte.S
@@ -1 +1,2 @@
-%include "x86/op_sget.S" {"helper":"MterpSGetI8"}
+%def op_sget_byte():
+% op_sget(helper="MterpSGetI8")
diff --git a/runtime/interpreter/mterp/x86/op_sget_char.S b/runtime/interpreter/mterp/x86/op_sget_char.S
index b706f18..003bcd1 100644
--- a/runtime/interpreter/mterp/x86/op_sget_char.S
+++ b/runtime/interpreter/mterp/x86/op_sget_char.S
@@ -1 +1,2 @@
-%include "x86/op_sget.S" {"helper":"MterpSGetU16"}
+%def op_sget_char():
+% op_sget(helper="MterpSGetU16")
diff --git a/runtime/interpreter/mterp/x86/op_sget_object.S b/runtime/interpreter/mterp/x86/op_sget_object.S
index eac8836..7cf3597 100644
--- a/runtime/interpreter/mterp/x86/op_sget_object.S
+++ b/runtime/interpreter/mterp/x86/op_sget_object.S
@@ -1 +1,2 @@
-%include "x86/op_sget.S" {"is_object":"1", "helper":"MterpSGetObj"}
+%def op_sget_object():
+% op_sget(is_object="1", helper="MterpSGetObj")
diff --git a/runtime/interpreter/mterp/x86/op_sget_short.S b/runtime/interpreter/mterp/x86/op_sget_short.S
index ee058a6..afacb57 100644
--- a/runtime/interpreter/mterp/x86/op_sget_short.S
+++ b/runtime/interpreter/mterp/x86/op_sget_short.S
@@ -1 +1,2 @@
-%include "x86/op_sget.S" {"helper":"MterpSGetI16"}
+%def op_sget_short():
+% op_sget(helper="MterpSGetI16")
diff --git a/runtime/interpreter/mterp/x86/op_sget_wide.S b/runtime/interpreter/mterp/x86/op_sget_wide.S
index 5923274..fff2be6 100644
--- a/runtime/interpreter/mterp/x86/op_sget_wide.S
+++ b/runtime/interpreter/mterp/x86/op_sget_wide.S
@@ -1 +1,2 @@
-%include "x86/op_sget.S" {"helper":"MterpSGetU64"}
+%def op_sget_wide():
+% op_sget(helper="MterpSGetU64")
diff --git a/runtime/interpreter/mterp/x86/op_shl_int.S b/runtime/interpreter/mterp/x86/op_shl_int.S
index 6a41d1c..a98b256 100644
--- a/runtime/interpreter/mterp/x86/op_shl_int.S
+++ b/runtime/interpreter/mterp/x86/op_shl_int.S
@@ -1 +1,2 @@
-%include "x86/binop1.S" {"instr":"sall %cl, %eax"}
+%def op_shl_int():
+% binop1(instr="sall %cl, %eax")
diff --git a/runtime/interpreter/mterp/x86/op_shl_int_2addr.S b/runtime/interpreter/mterp/x86/op_shl_int_2addr.S
index 72abb8e..987c7d1 100644
--- a/runtime/interpreter/mterp/x86/op_shl_int_2addr.S
+++ b/runtime/interpreter/mterp/x86/op_shl_int_2addr.S
@@ -1 +1,2 @@
-%include "x86/shop2addr.S" {"instr":"sall %cl, %eax"}
+%def op_shl_int_2addr():
+% shop2addr(instr="sall %cl, %eax")
diff --git a/runtime/interpreter/mterp/x86/op_shl_int_lit8.S b/runtime/interpreter/mterp/x86/op_shl_int_lit8.S
index b8d6069..ee1a15e 100644
--- a/runtime/interpreter/mterp/x86/op_shl_int_lit8.S
+++ b/runtime/interpreter/mterp/x86/op_shl_int_lit8.S
@@ -1 +1,2 @@
-%include "x86/binopLit8.S" {"instr":"sall %cl, %eax"}
+%def op_shl_int_lit8():
+% binopLit8(instr="sall %cl, %eax")
diff --git a/runtime/interpreter/mterp/x86/op_shl_long.S b/runtime/interpreter/mterp/x86/op_shl_long.S
index aa58a93..d45705a 100644
--- a/runtime/interpreter/mterp/x86/op_shl_long.S
+++ b/runtime/interpreter/mterp/x86/op_shl_long.S
@@ -1,3 +1,4 @@
+%def op_shl_long():
/*
* Long integer shift. This is different from the generic 32/64-bit
* binary operations because vAA/vBB are 64-bit but vCC (the shift
diff --git a/runtime/interpreter/mterp/x86/op_shl_long_2addr.S b/runtime/interpreter/mterp/x86/op_shl_long_2addr.S
index 6bbf49c..7d40f56 100644
--- a/runtime/interpreter/mterp/x86/op_shl_long_2addr.S
+++ b/runtime/interpreter/mterp/x86/op_shl_long_2addr.S
@@ -1,3 +1,4 @@
+%def op_shl_long_2addr():
/*
* Long integer shift, 2addr version. vA is 64-bit value/result, vB is
* 32-bit shift distance.
diff --git a/runtime/interpreter/mterp/x86/op_shr_int.S b/runtime/interpreter/mterp/x86/op_shr_int.S
index 687b2c3..4d4d79c 100644
--- a/runtime/interpreter/mterp/x86/op_shr_int.S
+++ b/runtime/interpreter/mterp/x86/op_shr_int.S
@@ -1 +1,2 @@
-%include "x86/binop1.S" {"instr":"sarl %cl, %eax"}
+%def op_shr_int():
+% binop1(instr="sarl %cl, %eax")
diff --git a/runtime/interpreter/mterp/x86/op_shr_int_2addr.S b/runtime/interpreter/mterp/x86/op_shr_int_2addr.S
index 533b0e9..8e4b055 100644
--- a/runtime/interpreter/mterp/x86/op_shr_int_2addr.S
+++ b/runtime/interpreter/mterp/x86/op_shr_int_2addr.S
@@ -1 +1,2 @@
-%include "x86/shop2addr.S" {"instr":"sarl %cl, %eax"}
+%def op_shr_int_2addr():
+% shop2addr(instr="sarl %cl, %eax")
diff --git a/runtime/interpreter/mterp/x86/op_shr_int_lit8.S b/runtime/interpreter/mterp/x86/op_shr_int_lit8.S
index ebd1bea..a7acf5f 100644
--- a/runtime/interpreter/mterp/x86/op_shr_int_lit8.S
+++ b/runtime/interpreter/mterp/x86/op_shr_int_lit8.S
@@ -1 +1,2 @@
-%include "x86/binopLit8.S" {"instr":"sarl %cl, %eax"}
+%def op_shr_int_lit8():
+% binopLit8(instr="sarl %cl, %eax")
diff --git a/runtime/interpreter/mterp/x86/op_shr_long.S b/runtime/interpreter/mterp/x86/op_shr_long.S
index 68aa0ee..3b85941 100644
--- a/runtime/interpreter/mterp/x86/op_shr_long.S
+++ b/runtime/interpreter/mterp/x86/op_shr_long.S
@@ -1,3 +1,4 @@
+%def op_shr_long():
/*
* Long integer shift. This is different from the generic 32/64-bit
* binary operations because vAA/vBB are 64-bit but vCC (the shift
diff --git a/runtime/interpreter/mterp/x86/op_shr_long_2addr.S b/runtime/interpreter/mterp/x86/op_shr_long_2addr.S
index 148bd1b..6427ded 100644
--- a/runtime/interpreter/mterp/x86/op_shr_long_2addr.S
+++ b/runtime/interpreter/mterp/x86/op_shr_long_2addr.S
@@ -1,3 +1,4 @@
+%def op_shr_long_2addr():
/*
* Long integer shift, 2addr version. vA is 64-bit value/result, vB is
* 32-bit shift distance.
diff --git a/runtime/interpreter/mterp/x86/op_sparse_switch.S b/runtime/interpreter/mterp/x86/op_sparse_switch.S
index fdaec47..b74d7da 100644
--- a/runtime/interpreter/mterp/x86/op_sparse_switch.S
+++ b/runtime/interpreter/mterp/x86/op_sparse_switch.S
@@ -1 +1,2 @@
-%include "x86/op_packed_switch.S" { "func":"MterpDoSparseSwitch" }
+%def op_sparse_switch():
+% op_packed_switch(func="MterpDoSparseSwitch")
diff --git a/runtime/interpreter/mterp/x86/op_sput.S b/runtime/interpreter/mterp/x86/op_sput.S
index 2ad68e7..cbd6ee9 100644
--- a/runtime/interpreter/mterp/x86/op_sput.S
+++ b/runtime/interpreter/mterp/x86/op_sput.S
@@ -1,2 +1,2 @@
-%default { "is_object":"0", "helper":"MterpSPutU32"}
-%include "x86/field.S" { }
+%def op_sput(is_object="0", helper="MterpSPutU32"):
+% field(helper=helper)
diff --git a/runtime/interpreter/mterp/x86/op_sput_boolean.S b/runtime/interpreter/mterp/x86/op_sput_boolean.S
index c6aa7c4..36fba84 100644
--- a/runtime/interpreter/mterp/x86/op_sput_boolean.S
+++ b/runtime/interpreter/mterp/x86/op_sput_boolean.S
@@ -1 +1,2 @@
-%include "x86/op_sput.S" {"helper":"MterpSPutU8"}
+%def op_sput_boolean():
+% op_sput(helper="MterpSPutU8")
diff --git a/runtime/interpreter/mterp/x86/op_sput_byte.S b/runtime/interpreter/mterp/x86/op_sput_byte.S
index fd504a8..84ad4a0 100644
--- a/runtime/interpreter/mterp/x86/op_sput_byte.S
+++ b/runtime/interpreter/mterp/x86/op_sput_byte.S
@@ -1 +1,2 @@
-%include "x86/op_sput.S" {"helper":"MterpSPutI8"}
+%def op_sput_byte():
+% op_sput(helper="MterpSPutI8")
diff --git a/runtime/interpreter/mterp/x86/op_sput_char.S b/runtime/interpreter/mterp/x86/op_sput_char.S
index b4d0997..9b8eeba 100644
--- a/runtime/interpreter/mterp/x86/op_sput_char.S
+++ b/runtime/interpreter/mterp/x86/op_sput_char.S
@@ -1 +1,2 @@
-%include "x86/op_sput.S" {"helper":"MterpSPutU16"}
+%def op_sput_char():
+% op_sput(helper="MterpSPutU16")
diff --git a/runtime/interpreter/mterp/x86/op_sput_object.S b/runtime/interpreter/mterp/x86/op_sput_object.S
index 4452dba..081360c 100644
--- a/runtime/interpreter/mterp/x86/op_sput_object.S
+++ b/runtime/interpreter/mterp/x86/op_sput_object.S
@@ -1 +1,2 @@
-%include "x86/op_sput.S" {"is_object":"1", "helper":"MterpSPutObj"}
+%def op_sput_object():
+% op_sput(is_object="1", helper="MterpSPutObj")
diff --git a/runtime/interpreter/mterp/x86/op_sput_short.S b/runtime/interpreter/mterp/x86/op_sput_short.S
index eba01bd..ee16513 100644
--- a/runtime/interpreter/mterp/x86/op_sput_short.S
+++ b/runtime/interpreter/mterp/x86/op_sput_short.S
@@ -1 +1,2 @@
-%include "x86/op_sput.S" {"helper":"MterpSPutI16"}
+%def op_sput_short():
+% op_sput(helper="MterpSPutI16")
diff --git a/runtime/interpreter/mterp/x86/op_sput_wide.S b/runtime/interpreter/mterp/x86/op_sput_wide.S
index d79b068..44c1a18 100644
--- a/runtime/interpreter/mterp/x86/op_sput_wide.S
+++ b/runtime/interpreter/mterp/x86/op_sput_wide.S
@@ -1 +1,2 @@
-%include "x86/op_sput.S" {"helper":"MterpSPutU64"}
+%def op_sput_wide():
+% op_sput(helper="MterpSPutU64")
diff --git a/runtime/interpreter/mterp/x86/op_sub_double.S b/runtime/interpreter/mterp/x86/op_sub_double.S
index e83afeb..64a28c3 100644
--- a/runtime/interpreter/mterp/x86/op_sub_double.S
+++ b/runtime/interpreter/mterp/x86/op_sub_double.S
@@ -1 +1,2 @@
-%include "x86/sseBinop.S" {"instr":"subs","suff":"d"}
+%def op_sub_double():
+% sseBinop(instr="subs", suff="d")
diff --git a/runtime/interpreter/mterp/x86/op_sub_double_2addr.S b/runtime/interpreter/mterp/x86/op_sub_double_2addr.S
index af9a2ab..753074b 100644
--- a/runtime/interpreter/mterp/x86/op_sub_double_2addr.S
+++ b/runtime/interpreter/mterp/x86/op_sub_double_2addr.S
@@ -1 +1,2 @@
-%include "x86/sseBinop2Addr.S" {"instr":"subs","suff":"d"}
+%def op_sub_double_2addr():
+% sseBinop2Addr(instr="subs", suff="d")
diff --git a/runtime/interpreter/mterp/x86/op_sub_float.S b/runtime/interpreter/mterp/x86/op_sub_float.S
index 423d834..1a1966d 100644
--- a/runtime/interpreter/mterp/x86/op_sub_float.S
+++ b/runtime/interpreter/mterp/x86/op_sub_float.S
@@ -1 +1,2 @@
-%include "x86/sseBinop.S" {"instr":"subs","suff":"s"}
+%def op_sub_float():
+% sseBinop(instr="subs", suff="s")
diff --git a/runtime/interpreter/mterp/x86/op_sub_float_2addr.S b/runtime/interpreter/mterp/x86/op_sub_float_2addr.S
index 18de000..9557907 100644
--- a/runtime/interpreter/mterp/x86/op_sub_float_2addr.S
+++ b/runtime/interpreter/mterp/x86/op_sub_float_2addr.S
@@ -1 +1,2 @@
-%include "x86/sseBinop2Addr.S" {"instr":"subs","suff":"s"}
+%def op_sub_float_2addr():
+% sseBinop2Addr(instr="subs", suff="s")
diff --git a/runtime/interpreter/mterp/x86/op_sub_int.S b/runtime/interpreter/mterp/x86/op_sub_int.S
index 7fe03fb..289d241 100644
--- a/runtime/interpreter/mterp/x86/op_sub_int.S
+++ b/runtime/interpreter/mterp/x86/op_sub_int.S
@@ -1 +1,2 @@
-%include "x86/binop.S" {"instr":"subl (rFP,%ecx,4), %eax"}
+%def op_sub_int():
+% binop(instr="subl (rFP,%ecx,4), %eax")
diff --git a/runtime/interpreter/mterp/x86/op_sub_int_2addr.S b/runtime/interpreter/mterp/x86/op_sub_int_2addr.S
index cc9bf60..b55f887 100644
--- a/runtime/interpreter/mterp/x86/op_sub_int_2addr.S
+++ b/runtime/interpreter/mterp/x86/op_sub_int_2addr.S
@@ -1 +1,2 @@
-%include "x86/binop2addr.S" {"instr":"subl %eax, (rFP,%ecx,4)"}
+%def op_sub_int_2addr():
+% binop2addr(instr="subl %eax, (rFP,%ecx,4)")
diff --git a/runtime/interpreter/mterp/x86/op_sub_long.S b/runtime/interpreter/mterp/x86/op_sub_long.S
index 014591e..d45c9a7 100644
--- a/runtime/interpreter/mterp/x86/op_sub_long.S
+++ b/runtime/interpreter/mterp/x86/op_sub_long.S
@@ -1 +1,2 @@
-%include "x86/binopWide.S" {"instr1":"subl (rFP,%ecx,4), rIBASE", "instr2":"sbbl 4(rFP,%ecx,4), %eax"}
+%def op_sub_long():
+% binopWide(instr1="subl (rFP,%ecx,4), rIBASE", instr2="sbbl 4(rFP,%ecx,4), %eax")
diff --git a/runtime/interpreter/mterp/x86/op_sub_long_2addr.S b/runtime/interpreter/mterp/x86/op_sub_long_2addr.S
index 7498029..615b535 100644
--- a/runtime/interpreter/mterp/x86/op_sub_long_2addr.S
+++ b/runtime/interpreter/mterp/x86/op_sub_long_2addr.S
@@ -1 +1,2 @@
-%include "x86/binopWide2addr.S" {"instr1":"subl %eax, (rFP,rINST,4)","instr2":"sbbl %ecx, 4(rFP,rINST,4)"}
+%def op_sub_long_2addr():
+% binopWide2addr(instr1="subl %eax, (rFP,rINST,4)", instr2="sbbl %ecx, 4(rFP,rINST,4)")
diff --git a/runtime/interpreter/mterp/x86/op_throw.S b/runtime/interpreter/mterp/x86/op_throw.S
index a6e6b1e..fa4a9d0 100644
--- a/runtime/interpreter/mterp/x86/op_throw.S
+++ b/runtime/interpreter/mterp/x86/op_throw.S
@@ -1,3 +1,4 @@
+%def op_throw():
/*
* Throw an exception object in the current thread.
*/
diff --git a/runtime/interpreter/mterp/x86/op_unused_3e.S b/runtime/interpreter/mterp/x86/op_unused_3e.S
index 31d98c1..d889f1a 100644
--- a/runtime/interpreter/mterp/x86/op_unused_3e.S
+++ b/runtime/interpreter/mterp/x86/op_unused_3e.S
@@ -1 +1,2 @@
-%include "x86/unused.S"
+%def op_unused_3e():
+% unused()
diff --git a/runtime/interpreter/mterp/x86/op_unused_3f.S b/runtime/interpreter/mterp/x86/op_unused_3f.S
index 31d98c1..b3ebcfa 100644
--- a/runtime/interpreter/mterp/x86/op_unused_3f.S
+++ b/runtime/interpreter/mterp/x86/op_unused_3f.S
@@ -1 +1,2 @@
-%include "x86/unused.S"
+%def op_unused_3f():
+% unused()
diff --git a/runtime/interpreter/mterp/x86/op_unused_40.S b/runtime/interpreter/mterp/x86/op_unused_40.S
index 31d98c1..7920fb3 100644
--- a/runtime/interpreter/mterp/x86/op_unused_40.S
+++ b/runtime/interpreter/mterp/x86/op_unused_40.S
@@ -1 +1,2 @@
-%include "x86/unused.S"
+%def op_unused_40():
+% unused()
diff --git a/runtime/interpreter/mterp/x86/op_unused_41.S b/runtime/interpreter/mterp/x86/op_unused_41.S
index 31d98c1..5ed03b8 100644
--- a/runtime/interpreter/mterp/x86/op_unused_41.S
+++ b/runtime/interpreter/mterp/x86/op_unused_41.S
@@ -1 +1,2 @@
-%include "x86/unused.S"
+%def op_unused_41():
+% unused()
diff --git a/runtime/interpreter/mterp/x86/op_unused_42.S b/runtime/interpreter/mterp/x86/op_unused_42.S
index 31d98c1..ac32521 100644
--- a/runtime/interpreter/mterp/x86/op_unused_42.S
+++ b/runtime/interpreter/mterp/x86/op_unused_42.S
@@ -1 +1,2 @@
-%include "x86/unused.S"
+%def op_unused_42():
+% unused()
diff --git a/runtime/interpreter/mterp/x86/op_unused_43.S b/runtime/interpreter/mterp/x86/op_unused_43.S
index 31d98c1..33e2aa1 100644
--- a/runtime/interpreter/mterp/x86/op_unused_43.S
+++ b/runtime/interpreter/mterp/x86/op_unused_43.S
@@ -1 +1,2 @@
-%include "x86/unused.S"
+%def op_unused_43():
+% unused()
diff --git a/runtime/interpreter/mterp/x86/op_unused_79.S b/runtime/interpreter/mterp/x86/op_unused_79.S
index 31d98c1..3c6dafc 100644
--- a/runtime/interpreter/mterp/x86/op_unused_79.S
+++ b/runtime/interpreter/mterp/x86/op_unused_79.S
@@ -1 +1,2 @@
-%include "x86/unused.S"
+%def op_unused_79():
+% unused()
diff --git a/runtime/interpreter/mterp/x86/op_unused_7a.S b/runtime/interpreter/mterp/x86/op_unused_7a.S
index 31d98c1..9c03cd5 100644
--- a/runtime/interpreter/mterp/x86/op_unused_7a.S
+++ b/runtime/interpreter/mterp/x86/op_unused_7a.S
@@ -1 +1,2 @@
-%include "x86/unused.S"
+%def op_unused_7a():
+% unused()
diff --git a/runtime/interpreter/mterp/x86/op_unused_f3.S b/runtime/interpreter/mterp/x86/op_unused_f3.S
index 31d98c1..ab10b78 100644
--- a/runtime/interpreter/mterp/x86/op_unused_f3.S
+++ b/runtime/interpreter/mterp/x86/op_unused_f3.S
@@ -1 +1,2 @@
-%include "x86/unused.S"
+%def op_unused_f3():
+% unused()
diff --git a/runtime/interpreter/mterp/x86/op_unused_f4.S b/runtime/interpreter/mterp/x86/op_unused_f4.S
index 31d98c1..09229d6 100644
--- a/runtime/interpreter/mterp/x86/op_unused_f4.S
+++ b/runtime/interpreter/mterp/x86/op_unused_f4.S
@@ -1 +1,2 @@
-%include "x86/unused.S"
+%def op_unused_f4():
+% unused()
diff --git a/runtime/interpreter/mterp/x86/op_unused_f5.S b/runtime/interpreter/mterp/x86/op_unused_f5.S
index 31d98c1..0d6149b 100644
--- a/runtime/interpreter/mterp/x86/op_unused_f5.S
+++ b/runtime/interpreter/mterp/x86/op_unused_f5.S
@@ -1 +1,2 @@
-%include "x86/unused.S"
+%def op_unused_f5():
+% unused()
diff --git a/runtime/interpreter/mterp/x86/op_unused_f6.S b/runtime/interpreter/mterp/x86/op_unused_f6.S
index 31d98c1..117b03d 100644
--- a/runtime/interpreter/mterp/x86/op_unused_f6.S
+++ b/runtime/interpreter/mterp/x86/op_unused_f6.S
@@ -1 +1,2 @@
-%include "x86/unused.S"
+%def op_unused_f6():
+% unused()
diff --git a/runtime/interpreter/mterp/x86/op_unused_f7.S b/runtime/interpreter/mterp/x86/op_unused_f7.S
index 31d98c1..4e3a0f3 100644
--- a/runtime/interpreter/mterp/x86/op_unused_f7.S
+++ b/runtime/interpreter/mterp/x86/op_unused_f7.S
@@ -1 +1,2 @@
-%include "x86/unused.S"
+%def op_unused_f7():
+% unused()
diff --git a/runtime/interpreter/mterp/x86/op_unused_f8.S b/runtime/interpreter/mterp/x86/op_unused_f8.S
index 31d98c1..d122075 100644
--- a/runtime/interpreter/mterp/x86/op_unused_f8.S
+++ b/runtime/interpreter/mterp/x86/op_unused_f8.S
@@ -1 +1,2 @@
-%include "x86/unused.S"
+%def op_unused_f8():
+% unused()
diff --git a/runtime/interpreter/mterp/x86/op_unused_f9.S b/runtime/interpreter/mterp/x86/op_unused_f9.S
index 31d98c1..7d09a0e 100644
--- a/runtime/interpreter/mterp/x86/op_unused_f9.S
+++ b/runtime/interpreter/mterp/x86/op_unused_f9.S
@@ -1 +1,2 @@
-%include "x86/unused.S"
+%def op_unused_f9():
+% unused()
diff --git a/runtime/interpreter/mterp/x86/op_unused_fc.S b/runtime/interpreter/mterp/x86/op_unused_fc.S
index 31d98c1..0697819 100644
--- a/runtime/interpreter/mterp/x86/op_unused_fc.S
+++ b/runtime/interpreter/mterp/x86/op_unused_fc.S
@@ -1 +1,2 @@
-%include "x86/unused.S"
+%def op_unused_fc():
+% unused()
diff --git a/runtime/interpreter/mterp/x86/op_unused_fd.S b/runtime/interpreter/mterp/x86/op_unused_fd.S
index 31d98c1..4bc2b4b 100644
--- a/runtime/interpreter/mterp/x86/op_unused_fd.S
+++ b/runtime/interpreter/mterp/x86/op_unused_fd.S
@@ -1 +1,2 @@
-%include "x86/unused.S"
+%def op_unused_fd():
+% unused()
diff --git a/runtime/interpreter/mterp/x86/op_ushr_int.S b/runtime/interpreter/mterp/x86/op_ushr_int.S
index dfe25ff..38c8782 100644
--- a/runtime/interpreter/mterp/x86/op_ushr_int.S
+++ b/runtime/interpreter/mterp/x86/op_ushr_int.S
@@ -1 +1,2 @@
-%include "x86/binop1.S" {"instr":"shrl %cl, %eax"}
+%def op_ushr_int():
+% binop1(instr="shrl %cl, %eax")
diff --git a/runtime/interpreter/mterp/x86/op_ushr_int_2addr.S b/runtime/interpreter/mterp/x86/op_ushr_int_2addr.S
index c14bc98..f1da71a 100644
--- a/runtime/interpreter/mterp/x86/op_ushr_int_2addr.S
+++ b/runtime/interpreter/mterp/x86/op_ushr_int_2addr.S
@@ -1 +1,2 @@
-%include "x86/shop2addr.S" {"instr":"shrl %cl, %eax"}
+%def op_ushr_int_2addr():
+% shop2addr(instr="shrl %cl, %eax")
diff --git a/runtime/interpreter/mterp/x86/op_ushr_int_lit8.S b/runtime/interpreter/mterp/x86/op_ushr_int_lit8.S
index e129f6b..4298d36 100644
--- a/runtime/interpreter/mterp/x86/op_ushr_int_lit8.S
+++ b/runtime/interpreter/mterp/x86/op_ushr_int_lit8.S
@@ -1 +1,2 @@
-%include "x86/binopLit8.S" {"instr":"shrl %cl, %eax"}
+%def op_ushr_int_lit8():
+% binopLit8(instr="shrl %cl, %eax")
diff --git a/runtime/interpreter/mterp/x86/op_ushr_long.S b/runtime/interpreter/mterp/x86/op_ushr_long.S
index 9527c9c..5837a9a 100644
--- a/runtime/interpreter/mterp/x86/op_ushr_long.S
+++ b/runtime/interpreter/mterp/x86/op_ushr_long.S
@@ -1,3 +1,4 @@
+%def op_ushr_long():
/*
* Long integer shift. This is different from the generic 32/64-bit
* binary operations because vAA/vBB are 64-bit but vCC (the shift
diff --git a/runtime/interpreter/mterp/x86/op_ushr_long_2addr.S b/runtime/interpreter/mterp/x86/op_ushr_long_2addr.S
index 72fcc36..f07318a 100644
--- a/runtime/interpreter/mterp/x86/op_ushr_long_2addr.S
+++ b/runtime/interpreter/mterp/x86/op_ushr_long_2addr.S
@@ -1,3 +1,4 @@
+%def op_ushr_long_2addr():
/*
* Long integer shift, 2addr version. vA is 64-bit value/result, vB is
* 32-bit shift distance.
diff --git a/runtime/interpreter/mterp/x86/op_xor_int.S b/runtime/interpreter/mterp/x86/op_xor_int.S
index 35aca6a..351d73a 100644
--- a/runtime/interpreter/mterp/x86/op_xor_int.S
+++ b/runtime/interpreter/mterp/x86/op_xor_int.S
@@ -1 +1,2 @@
-%include "x86/binop.S" {"instr":"xorl (rFP,%ecx,4), %eax"}
+%def op_xor_int():
+% binop(instr="xorl (rFP,%ecx,4), %eax")
diff --git a/runtime/interpreter/mterp/x86/op_xor_int_2addr.S b/runtime/interpreter/mterp/x86/op_xor_int_2addr.S
index d7b70e2..daeebed 100644
--- a/runtime/interpreter/mterp/x86/op_xor_int_2addr.S
+++ b/runtime/interpreter/mterp/x86/op_xor_int_2addr.S
@@ -1 +1,2 @@
-%include "x86/binop2addr.S" {"instr":"xorl %eax, (rFP,%ecx,4)"}
+%def op_xor_int_2addr():
+% binop2addr(instr="xorl %eax, (rFP,%ecx,4)")
diff --git a/runtime/interpreter/mterp/x86/op_xor_int_lit16.S b/runtime/interpreter/mterp/x86/op_xor_int_lit16.S
index 115f0a0..f5dc00e 100644
--- a/runtime/interpreter/mterp/x86/op_xor_int_lit16.S
+++ b/runtime/interpreter/mterp/x86/op_xor_int_lit16.S
@@ -1 +1,2 @@
-%include "x86/binopLit16.S" {"instr":"xorl %ecx, %eax"}
+%def op_xor_int_lit16():
+% binopLit16(instr="xorl %ecx, %eax")
diff --git a/runtime/interpreter/mterp/x86/op_xor_int_lit8.S b/runtime/interpreter/mterp/x86/op_xor_int_lit8.S
index 243971c..98a1a432 100644
--- a/runtime/interpreter/mterp/x86/op_xor_int_lit8.S
+++ b/runtime/interpreter/mterp/x86/op_xor_int_lit8.S
@@ -1 +1,2 @@
-%include "x86/binopLit8.S" {"instr":"xorl %ecx, %eax"}
+%def op_xor_int_lit8():
+% binopLit8(instr="xorl %ecx, %eax")
diff --git a/runtime/interpreter/mterp/x86/op_xor_long.S b/runtime/interpreter/mterp/x86/op_xor_long.S
index 0d3c0f5..cc749e6 100644
--- a/runtime/interpreter/mterp/x86/op_xor_long.S
+++ b/runtime/interpreter/mterp/x86/op_xor_long.S
@@ -1 +1,2 @@
-%include "x86/binopWide.S" {"instr1":"xorl (rFP,%ecx,4), rIBASE", "instr2":"xorl 4(rFP,%ecx,4), %eax"}
+%def op_xor_long():
+% binopWide(instr1="xorl (rFP,%ecx,4), rIBASE", instr2="xorl 4(rFP,%ecx,4), %eax")
diff --git a/runtime/interpreter/mterp/x86/op_xor_long_2addr.S b/runtime/interpreter/mterp/x86/op_xor_long_2addr.S
index b5000e4..3aa9235 100644
--- a/runtime/interpreter/mterp/x86/op_xor_long_2addr.S
+++ b/runtime/interpreter/mterp/x86/op_xor_long_2addr.S
@@ -1 +1,2 @@
-%include "x86/binopWide2addr.S" {"instr1":"xorl %eax, (rFP,rINST,4)","instr2":"xorl %ecx, 4(rFP,rINST,4)"}
+%def op_xor_long_2addr():
+% binopWide2addr(instr1="xorl %eax, (rFP,rINST,4)", instr2="xorl %ecx, 4(rFP,rINST,4)")
diff --git a/runtime/interpreter/mterp/x86/shop2addr.S b/runtime/interpreter/mterp/x86/shop2addr.S
index 96c9954..9a57677 100644
--- a/runtime/interpreter/mterp/x86/shop2addr.S
+++ b/runtime/interpreter/mterp/x86/shop2addr.S
@@ -1,4 +1,4 @@
-%default {"result":"%eax"}
+%def shop2addr(result="%eax", instr=""):
/*
* Generic 32-bit "shift/2addr" operation.
*/
diff --git a/runtime/interpreter/mterp/x86/sseBinop.S b/runtime/interpreter/mterp/x86/sseBinop.S
index 63a1e21..a20db7c 100644
--- a/runtime/interpreter/mterp/x86/sseBinop.S
+++ b/runtime/interpreter/mterp/x86/sseBinop.S
@@ -1,4 +1,4 @@
-%default {"instr":"","suff":""}
+%def sseBinop(instr="", suff=""):
movzbl 2(rPC), %ecx # ecx <- BB
movzbl 3(rPC), %eax # eax <- CC
movs${suff} VREG_ADDRESS(%ecx), %xmm0 # %xmm0 <- 1st src
diff --git a/runtime/interpreter/mterp/x86/sseBinop2Addr.S b/runtime/interpreter/mterp/x86/sseBinop2Addr.S
index d157e67..1186fb7 100644
--- a/runtime/interpreter/mterp/x86/sseBinop2Addr.S
+++ b/runtime/interpreter/mterp/x86/sseBinop2Addr.S
@@ -1,4 +1,4 @@
-%default {"instr":"","suff":""}
+%def sseBinop2Addr(instr="", suff=""):
movzx rINSTbl, %ecx # ecx <- A+
andl $$0xf, %ecx # ecx <- A
movs${suff} VREG_ADDRESS(%ecx), %xmm0 # %xmm0 <- 1st src
diff --git a/runtime/interpreter/mterp/x86/unop.S b/runtime/interpreter/mterp/x86/unop.S
index db09fc0..5594cb9 100644
--- a/runtime/interpreter/mterp/x86/unop.S
+++ b/runtime/interpreter/mterp/x86/unop.S
@@ -1,4 +1,4 @@
-%default {"instr":""}
+%def unop(instr=""):
/*
* Generic 32-bit unary operation. Provide an "instr" line that
* specifies an instruction that performs "result = op eax".
diff --git a/runtime/interpreter/mterp/x86/unused.S b/runtime/interpreter/mterp/x86/unused.S
index c95ef94..ef35b6e 100644
--- a/runtime/interpreter/mterp/x86/unused.S
+++ b/runtime/interpreter/mterp/x86/unused.S
@@ -1,3 +1,4 @@
+%def unused():
/*
* Bail to reference interpreter to throw.
*/
diff --git a/runtime/interpreter/mterp/x86/zcmp.S b/runtime/interpreter/mterp/x86/zcmp.S
index c116159..120f1ed 100644
--- a/runtime/interpreter/mterp/x86/zcmp.S
+++ b/runtime/interpreter/mterp/x86/zcmp.S
@@ -1,3 +1,4 @@
+%def zcmp(revcmp=""):
/*
* Generic one-operand compare-and-branch operation. Provide a "revcmp"
* fragment that specifies the *reverse* comparison to perform, e.g.
diff --git a/runtime/interpreter/mterp/x86_64/alt_stub.S b/runtime/interpreter/mterp/x86_64/alt_stub.S
index 24cd1a8..0c71716 100644
--- a/runtime/interpreter/mterp/x86_64/alt_stub.S
+++ b/runtime/interpreter/mterp/x86_64/alt_stub.S
@@ -1,3 +1,4 @@
+%def alt_stub():
/*
* Inter-instruction transfer stub. Call out to MterpCheckBefore to handle
* any interesting requests and then jump to the real instruction
diff --git a/runtime/interpreter/mterp/x86_64/bincmp.S b/runtime/interpreter/mterp/x86_64/bincmp.S
index 6601483..64a118c 100644
--- a/runtime/interpreter/mterp/x86_64/bincmp.S
+++ b/runtime/interpreter/mterp/x86_64/bincmp.S
@@ -1,3 +1,4 @@
+%def bincmp(revcmp=""):
/*
* Generic two-operand compare-and-branch operation. Provide a "revcmp"
* fragment that specifies the *reverse* comparison to perform, e.g.
diff --git a/runtime/interpreter/mterp/x86_64/bindiv.S b/runtime/interpreter/mterp/x86_64/bindiv.S
index e10d1dc..d7e5333 100644
--- a/runtime/interpreter/mterp/x86_64/bindiv.S
+++ b/runtime/interpreter/mterp/x86_64/bindiv.S
@@ -1,4 +1,4 @@
-%default {"result":"","second":"","wide":"","suffix":"","rem":"0","ext":"cdq"}
+%def bindiv(result="", second="", wide="", suffix="", rem="0", ext="cdq"):
/*
* 32-bit binary div/rem operation. Handles special case of op1=-1.
*/
diff --git a/runtime/interpreter/mterp/x86_64/bindiv2addr.S b/runtime/interpreter/mterp/x86_64/bindiv2addr.S
index 8b9bc95..c55351e 100644
--- a/runtime/interpreter/mterp/x86_64/bindiv2addr.S
+++ b/runtime/interpreter/mterp/x86_64/bindiv2addr.S
@@ -1,4 +1,4 @@
-%default {"result":"","second":"","wide":"","suffix":"","rem":"0","ext":"cdq"}
+%def bindiv2addr(result="", second="", wide="", suffix="", rem="0", ext="cdq"):
/*
* 32-bit binary div/rem operation. Handles special case of op1=-1.
*/
diff --git a/runtime/interpreter/mterp/x86_64/bindivLit16.S b/runtime/interpreter/mterp/x86_64/bindivLit16.S
index 80dbce2..dbda834 100644
--- a/runtime/interpreter/mterp/x86_64/bindivLit16.S
+++ b/runtime/interpreter/mterp/x86_64/bindivLit16.S
@@ -1,4 +1,4 @@
-%default {"result":"","rem":"0"}
+%def bindivLit16(result="", rem="0"):
/*
* 32-bit binary div/rem operation. Handles special case of op1=-1.
*/
diff --git a/runtime/interpreter/mterp/x86_64/bindivLit8.S b/runtime/interpreter/mterp/x86_64/bindivLit8.S
index ab535f3..a5164b5 100644
--- a/runtime/interpreter/mterp/x86_64/bindivLit8.S
+++ b/runtime/interpreter/mterp/x86_64/bindivLit8.S
@@ -1,4 +1,4 @@
-%default {"result":"","rem":"0"}
+%def bindivLit8(result="", rem="0"):
/*
* 32-bit div/rem "lit8" binary operation. Handles special case of
* op0=minint & op1=-1
diff --git a/runtime/interpreter/mterp/x86_64/binop.S b/runtime/interpreter/mterp/x86_64/binop.S
index 962dd61..fddeaa1 100644
--- a/runtime/interpreter/mterp/x86_64/binop.S
+++ b/runtime/interpreter/mterp/x86_64/binop.S
@@ -1,4 +1,4 @@
-%default {"result":"%eax"}
+%def binop(result="%eax", instr=""):
/*
* Generic 32-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = eax op (rFP,%ecx,4)".
diff --git a/runtime/interpreter/mterp/x86_64/binop1.S b/runtime/interpreter/mterp/x86_64/binop1.S
index bdd5732..9915c32 100644
--- a/runtime/interpreter/mterp/x86_64/binop1.S
+++ b/runtime/interpreter/mterp/x86_64/binop1.S
@@ -1,4 +1,4 @@
-%default {"wide":"0"}
+%def binop1(wide="0", instr=""):
/*
* Generic 32-bit binary operation in which both operands loaded to
* registers (op0 in eax, op1 in ecx).
diff --git a/runtime/interpreter/mterp/x86_64/binop2addr.S b/runtime/interpreter/mterp/x86_64/binop2addr.S
index 4448a81..1cdf7fd 100644
--- a/runtime/interpreter/mterp/x86_64/binop2addr.S
+++ b/runtime/interpreter/mterp/x86_64/binop2addr.S
@@ -1,4 +1,4 @@
-%default {"result":"%eax"}
+%def binop2addr(result="%eax", instr=""):
/*
* Generic 32-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = r0 op r1".
diff --git a/runtime/interpreter/mterp/x86_64/binopLit16.S b/runtime/interpreter/mterp/x86_64/binopLit16.S
index de43b53..bb882cb 100644
--- a/runtime/interpreter/mterp/x86_64/binopLit16.S
+++ b/runtime/interpreter/mterp/x86_64/binopLit16.S
@@ -1,4 +1,4 @@
-%default {"result":"%eax"}
+%def binopLit16(result="%eax", instr=""):
/*
* Generic 32-bit "lit16" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = eax op ecx".
diff --git a/runtime/interpreter/mterp/x86_64/binopLit8.S b/runtime/interpreter/mterp/x86_64/binopLit8.S
index 995002b..a30d2e8 100644
--- a/runtime/interpreter/mterp/x86_64/binopLit8.S
+++ b/runtime/interpreter/mterp/x86_64/binopLit8.S
@@ -1,4 +1,4 @@
-%default {"result":"%eax"}
+%def binopLit8(result="%eax", instr=""):
/*
* Generic 32-bit "lit8" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = eax op ecx".
diff --git a/runtime/interpreter/mterp/x86_64/binopWide.S b/runtime/interpreter/mterp/x86_64/binopWide.S
index f92f18e..015d9ee 100644
--- a/runtime/interpreter/mterp/x86_64/binopWide.S
+++ b/runtime/interpreter/mterp/x86_64/binopWide.S
@@ -1,3 +1,4 @@
+%def binopWide(instr=""):
/*
* Generic 64-bit binary operation.
*/
diff --git a/runtime/interpreter/mterp/x86_64/binopWide2addr.S b/runtime/interpreter/mterp/x86_64/binopWide2addr.S
index d9e6cfb..e4c1e4d 100644
--- a/runtime/interpreter/mterp/x86_64/binopWide2addr.S
+++ b/runtime/interpreter/mterp/x86_64/binopWide2addr.S
@@ -1,3 +1,4 @@
+%def binopWide2addr(instr=""):
/*
* Generic 64-bit binary operation.
*/
diff --git a/runtime/interpreter/mterp/x86_64/const.S b/runtime/interpreter/mterp/x86_64/const.S
index 1ddf20f..fa98637 100644
--- a/runtime/interpreter/mterp/x86_64/const.S
+++ b/runtime/interpreter/mterp/x86_64/const.S
@@ -1,4 +1,4 @@
-%default { "helper":"UndefinedConstHandler" }
+%def const(helper="UndefinedConstHandler"):
/* const/class vAA, type@BBBB */
/* const/method-handle vAA, method_handle@BBBB */
/* const/method-type vAA, proto@BBBB */
diff --git a/runtime/interpreter/mterp/x86_64/cvtfp_int.S b/runtime/interpreter/mterp/x86_64/cvtfp_int.S
index 1472bd2..e18986f 100644
--- a/runtime/interpreter/mterp/x86_64/cvtfp_int.S
+++ b/runtime/interpreter/mterp/x86_64/cvtfp_int.S
@@ -1,4 +1,4 @@
-%default {"fp_suffix":"","i_suffix":"","max_const":"","result_reg":"","wide":""}
+%def cvtfp_int(fp_suffix="", i_suffix="", max_const="", result_reg="", wide=""):
/* On fp to int conversions, Java requires that
* if the result > maxint, it should be clamped to maxint. If it is less
* than minint, it should be clamped to minint. If it is a nan, the result
diff --git a/runtime/interpreter/mterp/x86_64/entry.S b/runtime/interpreter/mterp/x86_64/entry.S
index b08419b..515ffbc 100644
--- a/runtime/interpreter/mterp/x86_64/entry.S
+++ b/runtime/interpreter/mterp/x86_64/entry.S
@@ -1,3 +1,4 @@
+%def entry():
/*
* Copyright (C) 2016 The Android Open Source Project
*
diff --git a/runtime/interpreter/mterp/x86_64/fallback.S b/runtime/interpreter/mterp/x86_64/fallback.S
index 8d61166..e3c2e2b 100644
--- a/runtime/interpreter/mterp/x86_64/fallback.S
+++ b/runtime/interpreter/mterp/x86_64/fallback.S
@@ -1,3 +1,4 @@
+%def fallback():
/* Transfer stub to alternate interpreter */
jmp MterpFallback
diff --git a/runtime/interpreter/mterp/x86_64/field.S b/runtime/interpreter/mterp/x86_64/field.S
index f8b0588..f6c40eb 100644
--- a/runtime/interpreter/mterp/x86_64/field.S
+++ b/runtime/interpreter/mterp/x86_64/field.S
@@ -1,4 +1,4 @@
-%default { }
+%def field(helper=""):
/*
* General field read / write (iget-* iput-* sget-* sput-*).
*/
diff --git a/runtime/interpreter/mterp/x86_64/footer.S b/runtime/interpreter/mterp/x86_64/footer.S
index 3cc7532..140fbae 100644
--- a/runtime/interpreter/mterp/x86_64/footer.S
+++ b/runtime/interpreter/mterp/x86_64/footer.S
@@ -1,3 +1,4 @@
+%def footer():
/*
* ===========================================================================
* Common subroutines and data
diff --git a/runtime/interpreter/mterp/x86_64/fpcmp.S b/runtime/interpreter/mterp/x86_64/fpcmp.S
index 806bc2b..15161c8 100644
--- a/runtime/interpreter/mterp/x86_64/fpcmp.S
+++ b/runtime/interpreter/mterp/x86_64/fpcmp.S
@@ -1,4 +1,4 @@
-%default {"suff":"d","nanval":"pos"}
+%def fpcmp(suff="d", nanval="pos"):
/*
* Compare two floating-point values. Puts 0, 1, or -1 into the
* destination register based on the results of the comparison.
diff --git a/runtime/interpreter/mterp/x86_64/fpcvt.S b/runtime/interpreter/mterp/x86_64/fpcvt.S
index 657869e..6647ff3 100644
--- a/runtime/interpreter/mterp/x86_64/fpcvt.S
+++ b/runtime/interpreter/mterp/x86_64/fpcvt.S
@@ -1,4 +1,4 @@
-%default {"source_suffix":"","dest_suffix":"","wide":""}
+%def fpcvt(source_suffix="", dest_suffix="", wide=""):
/*
* Generic 32-bit FP conversion operation.
*/
diff --git a/runtime/interpreter/mterp/x86_64/header.S b/runtime/interpreter/mterp/x86_64/header.S
index 0332ce2..44ece2e 100644
--- a/runtime/interpreter/mterp/x86_64/header.S
+++ b/runtime/interpreter/mterp/x86_64/header.S
@@ -1,3 +1,4 @@
+%def header():
/*
* Copyright (C) 2016 The Android Open Source Project
*
diff --git a/runtime/interpreter/mterp/x86_64/instruction_end.S b/runtime/interpreter/mterp/x86_64/instruction_end.S
index 94587f8..5a24b66 100644
--- a/runtime/interpreter/mterp/x86_64/instruction_end.S
+++ b/runtime/interpreter/mterp/x86_64/instruction_end.S
@@ -1,3 +1,4 @@
+%def instruction_end():
OBJECT_TYPE(artMterpAsmInstructionEnd)
ASM_HIDDEN SYMBOL(artMterpAsmInstructionEnd)
diff --git a/runtime/interpreter/mterp/x86_64/instruction_end_alt.S b/runtime/interpreter/mterp/x86_64/instruction_end_alt.S
index 7757bce..d037db9 100644
--- a/runtime/interpreter/mterp/x86_64/instruction_end_alt.S
+++ b/runtime/interpreter/mterp/x86_64/instruction_end_alt.S
@@ -1,3 +1,4 @@
+%def instruction_end_alt():
OBJECT_TYPE(artMterpAsmAltInstructionEnd)
ASM_HIDDEN SYMBOL(artMterpAsmAltInstructionEnd)
diff --git a/runtime/interpreter/mterp/x86_64/instruction_end_sister.S b/runtime/interpreter/mterp/x86_64/instruction_end_sister.S
index 8eb79ac..7b1ec89 100644
--- a/runtime/interpreter/mterp/x86_64/instruction_end_sister.S
+++ b/runtime/interpreter/mterp/x86_64/instruction_end_sister.S
@@ -1,3 +1,4 @@
+%def instruction_end_sister():
OBJECT_TYPE(artMterpAsmSisterEnd)
ASM_HIDDEN SYMBOL(artMterpAsmSisterEnd)
diff --git a/runtime/interpreter/mterp/x86_64/instruction_start.S b/runtime/interpreter/mterp/x86_64/instruction_start.S
index 5d29a819..dee581b 100644
--- a/runtime/interpreter/mterp/x86_64/instruction_start.S
+++ b/runtime/interpreter/mterp/x86_64/instruction_start.S
@@ -1,3 +1,4 @@
+%def instruction_start():
OBJECT_TYPE(artMterpAsmInstructionStart)
ASM_HIDDEN SYMBOL(artMterpAsmInstructionStart)
diff --git a/runtime/interpreter/mterp/x86_64/instruction_start_alt.S b/runtime/interpreter/mterp/x86_64/instruction_start_alt.S
index 8dcf5bf..66650e7 100644
--- a/runtime/interpreter/mterp/x86_64/instruction_start_alt.S
+++ b/runtime/interpreter/mterp/x86_64/instruction_start_alt.S
@@ -1,3 +1,4 @@
+%def instruction_start_alt():
OBJECT_TYPE(artMterpAsmAltInstructionStart)
ASM_HIDDEN SYMBOL(artMterpAsmAltInstructionStart)
diff --git a/runtime/interpreter/mterp/x86_64/instruction_start_sister.S b/runtime/interpreter/mterp/x86_64/instruction_start_sister.S
index 796e98b..8c156ad 100644
--- a/runtime/interpreter/mterp/x86_64/instruction_start_sister.S
+++ b/runtime/interpreter/mterp/x86_64/instruction_start_sister.S
@@ -1,3 +1,4 @@
+%def instruction_start_sister():
OBJECT_TYPE(artMterpAsmSisterStart)
ASM_HIDDEN SYMBOL(artMterpAsmSisterStart)
diff --git a/runtime/interpreter/mterp/x86_64/invoke.S b/runtime/interpreter/mterp/x86_64/invoke.S
index f7e6155..42b50f2 100644
--- a/runtime/interpreter/mterp/x86_64/invoke.S
+++ b/runtime/interpreter/mterp/x86_64/invoke.S
@@ -1,4 +1,4 @@
-%default { "helper":"UndefinedInvokeHandler" }
+%def invoke(helper="UndefinedInvokeHandler"):
/*
* Generic invoke handler wrapper.
*/
diff --git a/runtime/interpreter/mterp/x86_64/invoke_polymorphic.S b/runtime/interpreter/mterp/x86_64/invoke_polymorphic.S
index 5157860..18fd5e6 100644
--- a/runtime/interpreter/mterp/x86_64/invoke_polymorphic.S
+++ b/runtime/interpreter/mterp/x86_64/invoke_polymorphic.S
@@ -1,4 +1,4 @@
-%default { "helper":"UndefinedInvokeHandler" }
+%def invoke_polymorphic(helper="UndefinedInvokeHandler"):
/*
* invoke-polymorphic handler wrapper.
*/
diff --git a/runtime/interpreter/mterp/x86_64/op_add_double.S b/runtime/interpreter/mterp/x86_64/op_add_double.S
index cb462cb..a009239 100644
--- a/runtime/interpreter/mterp/x86_64/op_add_double.S
+++ b/runtime/interpreter/mterp/x86_64/op_add_double.S
@@ -1 +1,2 @@
-%include "x86_64/sseBinop.S" {"instr":"adds","suff":"d"}
+%def op_add_double():
+% sseBinop(instr="adds", suff="d")
diff --git a/runtime/interpreter/mterp/x86_64/op_add_double_2addr.S b/runtime/interpreter/mterp/x86_64/op_add_double_2addr.S
index 063bde3..8cb45a9 100644
--- a/runtime/interpreter/mterp/x86_64/op_add_double_2addr.S
+++ b/runtime/interpreter/mterp/x86_64/op_add_double_2addr.S
@@ -1 +1,2 @@
-%include "x86_64/sseBinop2Addr.S" {"instr":"adds","suff":"d"}
+%def op_add_double_2addr():
+% sseBinop2Addr(instr="adds", suff="d")
diff --git a/runtime/interpreter/mterp/x86_64/op_add_float.S b/runtime/interpreter/mterp/x86_64/op_add_float.S
index 7753bf8..dee28c7 100644
--- a/runtime/interpreter/mterp/x86_64/op_add_float.S
+++ b/runtime/interpreter/mterp/x86_64/op_add_float.S
@@ -1 +1,2 @@
-%include "x86_64/sseBinop.S" {"instr":"adds","suff":"s"}
+%def op_add_float():
+% sseBinop(instr="adds", suff="s")
diff --git a/runtime/interpreter/mterp/x86_64/op_add_float_2addr.S b/runtime/interpreter/mterp/x86_64/op_add_float_2addr.S
index 6c8005b..4deb445 100644
--- a/runtime/interpreter/mterp/x86_64/op_add_float_2addr.S
+++ b/runtime/interpreter/mterp/x86_64/op_add_float_2addr.S
@@ -1 +1,2 @@
-%include "x86_64/sseBinop2Addr.S" {"instr":"adds","suff":"s"}
+%def op_add_float_2addr():
+% sseBinop2Addr(instr="adds", suff="s")
diff --git a/runtime/interpreter/mterp/x86_64/op_add_int.S b/runtime/interpreter/mterp/x86_64/op_add_int.S
index e316be7..aaf0b35 100644
--- a/runtime/interpreter/mterp/x86_64/op_add_int.S
+++ b/runtime/interpreter/mterp/x86_64/op_add_int.S
@@ -1 +1,2 @@
-%include "x86_64/binop.S" {"instr":"addl (rFP,%rcx,4), %eax"}
+%def op_add_int():
+% binop(instr="addl (rFP,%rcx,4), %eax")
diff --git a/runtime/interpreter/mterp/x86_64/op_add_int_2addr.S b/runtime/interpreter/mterp/x86_64/op_add_int_2addr.S
index 2ff8293..8ce26f6 100644
--- a/runtime/interpreter/mterp/x86_64/op_add_int_2addr.S
+++ b/runtime/interpreter/mterp/x86_64/op_add_int_2addr.S
@@ -1 +1,2 @@
-%include "x86_64/binop2addr.S" {"instr":"addl %eax, (rFP,%rcx,4)"}
+%def op_add_int_2addr():
+% binop2addr(instr="addl %eax, (rFP,%rcx,4)")
diff --git a/runtime/interpreter/mterp/x86_64/op_add_int_lit16.S b/runtime/interpreter/mterp/x86_64/op_add_int_lit16.S
index bfeb7ca..a431030 100644
--- a/runtime/interpreter/mterp/x86_64/op_add_int_lit16.S
+++ b/runtime/interpreter/mterp/x86_64/op_add_int_lit16.S
@@ -1 +1,2 @@
-%include "x86_64/binopLit16.S" {"instr":"addl %ecx, %eax"}
+%def op_add_int_lit16():
+% binopLit16(instr="addl %ecx, %eax")
diff --git a/runtime/interpreter/mterp/x86_64/op_add_int_lit8.S b/runtime/interpreter/mterp/x86_64/op_add_int_lit8.S
index 8954844..3205aee 100644
--- a/runtime/interpreter/mterp/x86_64/op_add_int_lit8.S
+++ b/runtime/interpreter/mterp/x86_64/op_add_int_lit8.S
@@ -1 +1,2 @@
-%include "x86_64/binopLit8.S" {"instr":"addl %ecx, %eax"}
+%def op_add_int_lit8():
+% binopLit8(instr="addl %ecx, %eax")
diff --git a/runtime/interpreter/mterp/x86_64/op_add_long.S b/runtime/interpreter/mterp/x86_64/op_add_long.S
index 89131ff..fac8163 100644
--- a/runtime/interpreter/mterp/x86_64/op_add_long.S
+++ b/runtime/interpreter/mterp/x86_64/op_add_long.S
@@ -1 +1,2 @@
-%include "x86_64/binopWide.S" {"instr":"addq (rFP,%rcx,4), %rax"}
+%def op_add_long():
+% binopWide(instr="addq (rFP,%rcx,4), %rax")
diff --git a/runtime/interpreter/mterp/x86_64/op_add_long_2addr.S b/runtime/interpreter/mterp/x86_64/op_add_long_2addr.S
index fed98bc..17684e6 100644
--- a/runtime/interpreter/mterp/x86_64/op_add_long_2addr.S
+++ b/runtime/interpreter/mterp/x86_64/op_add_long_2addr.S
@@ -1 +1,2 @@
-%include "x86_64/binopWide2addr.S" {"instr":"addq %rax, (rFP,%rcx,4)"}
+%def op_add_long_2addr():
+% binopWide2addr(instr="addq %rax, (rFP,%rcx,4)")
diff --git a/runtime/interpreter/mterp/x86_64/op_aget.S b/runtime/interpreter/mterp/x86_64/op_aget.S
index 58d4948..b45f43a 100644
--- a/runtime/interpreter/mterp/x86_64/op_aget.S
+++ b/runtime/interpreter/mterp/x86_64/op_aget.S
@@ -1,4 +1,4 @@
-%default { "load":"movl", "shift":"4", "data_offset":"MIRROR_INT_ARRAY_DATA_OFFSET", "wide":"0" }
+%def op_aget(load="movl", shift="4", data_offset="MIRROR_INT_ARRAY_DATA_OFFSET", wide="0"):
/*
* Array get, 32 bits or less. vAA <- vBB[vCC].
*
diff --git a/runtime/interpreter/mterp/x86_64/op_aget_boolean.S b/runtime/interpreter/mterp/x86_64/op_aget_boolean.S
index cf7bdb5..279e6fc 100644
--- a/runtime/interpreter/mterp/x86_64/op_aget_boolean.S
+++ b/runtime/interpreter/mterp/x86_64/op_aget_boolean.S
@@ -1 +1,2 @@
-%include "x86_64/op_aget.S" { "load":"movzbl", "shift":"1", "data_offset":"MIRROR_BOOLEAN_ARRAY_DATA_OFFSET" }
+%def op_aget_boolean():
+% op_aget(load="movzbl", shift="1", data_offset="MIRROR_BOOLEAN_ARRAY_DATA_OFFSET")
diff --git a/runtime/interpreter/mterp/x86_64/op_aget_byte.S b/runtime/interpreter/mterp/x86_64/op_aget_byte.S
index 1cbb569..1989450 100644
--- a/runtime/interpreter/mterp/x86_64/op_aget_byte.S
+++ b/runtime/interpreter/mterp/x86_64/op_aget_byte.S
@@ -1 +1,2 @@
-%include "x86_64/op_aget.S" { "load":"movsbl", "shift":"1", "data_offset":"MIRROR_BYTE_ARRAY_DATA_OFFSET" }
+%def op_aget_byte():
+% op_aget(load="movsbl", shift="1", data_offset="MIRROR_BYTE_ARRAY_DATA_OFFSET")
diff --git a/runtime/interpreter/mterp/x86_64/op_aget_char.S b/runtime/interpreter/mterp/x86_64/op_aget_char.S
index 45c9085..a35269b 100644
--- a/runtime/interpreter/mterp/x86_64/op_aget_char.S
+++ b/runtime/interpreter/mterp/x86_64/op_aget_char.S
@@ -1 +1,2 @@
-%include "x86_64/op_aget.S" { "load":"movzwl", "shift":"2", "data_offset":"MIRROR_CHAR_ARRAY_DATA_OFFSET" }
+%def op_aget_char():
+% op_aget(load="movzwl", shift="2", data_offset="MIRROR_CHAR_ARRAY_DATA_OFFSET")
diff --git a/runtime/interpreter/mterp/x86_64/op_aget_object.S b/runtime/interpreter/mterp/x86_64/op_aget_object.S
index 5f77a97..fc099dc 100644
--- a/runtime/interpreter/mterp/x86_64/op_aget_object.S
+++ b/runtime/interpreter/mterp/x86_64/op_aget_object.S
@@ -1,3 +1,4 @@
+%def op_aget_object():
/*
* Array object get. vAA <- vBB[vCC].
*
diff --git a/runtime/interpreter/mterp/x86_64/op_aget_short.S b/runtime/interpreter/mterp/x86_64/op_aget_short.S
index 82c4a1d..ca51ec8 100644
--- a/runtime/interpreter/mterp/x86_64/op_aget_short.S
+++ b/runtime/interpreter/mterp/x86_64/op_aget_short.S
@@ -1 +1,2 @@
-%include "x86_64/op_aget.S" { "load":"movswl", "shift":"2", "data_offset":"MIRROR_SHORT_ARRAY_DATA_OFFSET" }
+%def op_aget_short():
+% op_aget(load="movswl", shift="2", data_offset="MIRROR_SHORT_ARRAY_DATA_OFFSET")
diff --git a/runtime/interpreter/mterp/x86_64/op_aget_wide.S b/runtime/interpreter/mterp/x86_64/op_aget_wide.S
index 4f2771b..42513fc 100644
--- a/runtime/interpreter/mterp/x86_64/op_aget_wide.S
+++ b/runtime/interpreter/mterp/x86_64/op_aget_wide.S
@@ -1 +1,2 @@
-%include "x86_64/op_aget.S" { "load":"movq", "shift":"8", "data_offset":"MIRROR_WIDE_ARRAY_DATA_OFFSET", "wide":"1" }
+%def op_aget_wide():
+% op_aget(load="movq", shift="8", data_offset="MIRROR_WIDE_ARRAY_DATA_OFFSET", wide="1")
diff --git a/runtime/interpreter/mterp/x86_64/op_and_int.S b/runtime/interpreter/mterp/x86_64/op_and_int.S
index 4469889..afe2d67 100644
--- a/runtime/interpreter/mterp/x86_64/op_and_int.S
+++ b/runtime/interpreter/mterp/x86_64/op_and_int.S
@@ -1 +1,2 @@
-%include "x86_64/binop.S" {"instr":"andl (rFP,%rcx,4), %eax"}
+%def op_and_int():
+% binop(instr="andl (rFP,%rcx,4), %eax")
diff --git a/runtime/interpreter/mterp/x86_64/op_and_int_2addr.S b/runtime/interpreter/mterp/x86_64/op_and_int_2addr.S
index 16315bb..ed9fc65 100644
--- a/runtime/interpreter/mterp/x86_64/op_and_int_2addr.S
+++ b/runtime/interpreter/mterp/x86_64/op_and_int_2addr.S
@@ -1 +1,2 @@
-%include "x86_64/binop2addr.S" {"instr":"andl %eax, (rFP,%rcx,4)"}
+%def op_and_int_2addr():
+% binop2addr(instr="andl %eax, (rFP,%rcx,4)")
diff --git a/runtime/interpreter/mterp/x86_64/op_and_int_lit16.S b/runtime/interpreter/mterp/x86_64/op_and_int_lit16.S
index 63e851b..d7752b1 100644
--- a/runtime/interpreter/mterp/x86_64/op_and_int_lit16.S
+++ b/runtime/interpreter/mterp/x86_64/op_and_int_lit16.S
@@ -1 +1,2 @@
-%include "x86_64/binopLit16.S" {"instr":"andl %ecx, %eax"}
+%def op_and_int_lit16():
+% binopLit16(instr="andl %ecx, %eax")
diff --git a/runtime/interpreter/mterp/x86_64/op_and_int_lit8.S b/runtime/interpreter/mterp/x86_64/op_and_int_lit8.S
index da7a20f..a353178 100644
--- a/runtime/interpreter/mterp/x86_64/op_and_int_lit8.S
+++ b/runtime/interpreter/mterp/x86_64/op_and_int_lit8.S
@@ -1 +1,2 @@
-%include "x86_64/binopLit8.S" {"instr":"andl %ecx, %eax"}
+%def op_and_int_lit8():
+% binopLit8(instr="andl %ecx, %eax")
diff --git a/runtime/interpreter/mterp/x86_64/op_and_long.S b/runtime/interpreter/mterp/x86_64/op_and_long.S
index ce1dd26..7375154 100644
--- a/runtime/interpreter/mterp/x86_64/op_and_long.S
+++ b/runtime/interpreter/mterp/x86_64/op_and_long.S
@@ -1 +1,2 @@
-%include "x86_64/binopWide.S" {"instr":"andq (rFP,%rcx,4), %rax"}
+%def op_and_long():
+% binopWide(instr="andq (rFP,%rcx,4), %rax")
diff --git a/runtime/interpreter/mterp/x86_64/op_and_long_2addr.S b/runtime/interpreter/mterp/x86_64/op_and_long_2addr.S
index d17ab8d..41938ac 100644
--- a/runtime/interpreter/mterp/x86_64/op_and_long_2addr.S
+++ b/runtime/interpreter/mterp/x86_64/op_and_long_2addr.S
@@ -1 +1,2 @@
-%include "x86_64/binopWide2addr.S" {"instr":"andq %rax, (rFP,%rcx,4)"}
+%def op_and_long_2addr():
+% binopWide2addr(instr="andq %rax, (rFP,%rcx,4)")
diff --git a/runtime/interpreter/mterp/x86_64/op_aput.S b/runtime/interpreter/mterp/x86_64/op_aput.S
index 11500ad..bef2e2a 100644
--- a/runtime/interpreter/mterp/x86_64/op_aput.S
+++ b/runtime/interpreter/mterp/x86_64/op_aput.S
@@ -1,4 +1,4 @@
-%default { "reg":"rINST", "store":"movl", "shift":"4", "data_offset":"MIRROR_INT_ARRAY_DATA_OFFSET", "wide":"0" }
+%def op_aput(reg="rINST", store="movl", shift="4", data_offset="MIRROR_INT_ARRAY_DATA_OFFSET", wide="0"):
/*
* Array put, 32 bits or less. vBB[vCC] <- vAA.
*
diff --git a/runtime/interpreter/mterp/x86_64/op_aput_boolean.S b/runtime/interpreter/mterp/x86_64/op_aput_boolean.S
index 7d77a86..8420b5a 100644
--- a/runtime/interpreter/mterp/x86_64/op_aput_boolean.S
+++ b/runtime/interpreter/mterp/x86_64/op_aput_boolean.S
@@ -1 +1,2 @@
-%include "x86_64/op_aput.S" { "reg":"rINSTbl", "store":"movb", "shift":"1", "data_offset":"MIRROR_BOOLEAN_ARRAY_DATA_OFFSET" }
+%def op_aput_boolean():
+% op_aput(reg="rINSTbl", store="movb", shift="1", data_offset="MIRROR_BOOLEAN_ARRAY_DATA_OFFSET")
diff --git a/runtime/interpreter/mterp/x86_64/op_aput_byte.S b/runtime/interpreter/mterp/x86_64/op_aput_byte.S
index 7a1723e..6c181a4 100644
--- a/runtime/interpreter/mterp/x86_64/op_aput_byte.S
+++ b/runtime/interpreter/mterp/x86_64/op_aput_byte.S
@@ -1 +1,2 @@
-%include "x86_64/op_aput.S" { "reg":"rINSTbl", "store":"movb", "shift":"1", "data_offset":"MIRROR_BYTE_ARRAY_DATA_OFFSET" }
+%def op_aput_byte():
+% op_aput(reg="rINSTbl", store="movb", shift="1", data_offset="MIRROR_BYTE_ARRAY_DATA_OFFSET")
diff --git a/runtime/interpreter/mterp/x86_64/op_aput_char.S b/runtime/interpreter/mterp/x86_64/op_aput_char.S
index f8f50a3..3f4602a 100644
--- a/runtime/interpreter/mterp/x86_64/op_aput_char.S
+++ b/runtime/interpreter/mterp/x86_64/op_aput_char.S
@@ -1 +1,2 @@
-%include "x86_64/op_aput.S" { "reg":"rINSTw", "store":"movw", "shift":"2", "data_offset":"MIRROR_CHAR_ARRAY_DATA_OFFSET" }
+%def op_aput_char():
+% op_aput(reg="rINSTw", store="movw", shift="2", data_offset="MIRROR_CHAR_ARRAY_DATA_OFFSET")
diff --git a/runtime/interpreter/mterp/x86_64/op_aput_object.S b/runtime/interpreter/mterp/x86_64/op_aput_object.S
index b1bae0f..cf4bdf1 100644
--- a/runtime/interpreter/mterp/x86_64/op_aput_object.S
+++ b/runtime/interpreter/mterp/x86_64/op_aput_object.S
@@ -1,3 +1,4 @@
+%def op_aput_object():
/*
* Store an object into an array. vBB[vCC] <- vAA.
*/
diff --git a/runtime/interpreter/mterp/x86_64/op_aput_short.S b/runtime/interpreter/mterp/x86_64/op_aput_short.S
index 481fd68..e76d833 100644
--- a/runtime/interpreter/mterp/x86_64/op_aput_short.S
+++ b/runtime/interpreter/mterp/x86_64/op_aput_short.S
@@ -1 +1,2 @@
-%include "x86_64/op_aput.S" { "reg":"rINSTw", "store":"movw", "shift":"2", "data_offset":"MIRROR_SHORT_ARRAY_DATA_OFFSET" }
+%def op_aput_short():
+% op_aput(reg="rINSTw", store="movw", shift="2", data_offset="MIRROR_SHORT_ARRAY_DATA_OFFSET")
diff --git a/runtime/interpreter/mterp/x86_64/op_aput_wide.S b/runtime/interpreter/mterp/x86_64/op_aput_wide.S
index 5bbd39b..c1ca1ef 100644
--- a/runtime/interpreter/mterp/x86_64/op_aput_wide.S
+++ b/runtime/interpreter/mterp/x86_64/op_aput_wide.S
@@ -1 +1,2 @@
-%include "x86_64/op_aput.S" { "reg":"rINSTq", "store":"movq", "shift":"8", "data_offset":"MIRROR_WIDE_ARRAY_DATA_OFFSET", "wide":"1" }
+%def op_aput_wide():
+% op_aput(reg="rINSTq", store="movq", shift="8", data_offset="MIRROR_WIDE_ARRAY_DATA_OFFSET", wide="1")
diff --git a/runtime/interpreter/mterp/x86_64/op_array_length.S b/runtime/interpreter/mterp/x86_64/op_array_length.S
index e80d665..7e6c5c0 100644
--- a/runtime/interpreter/mterp/x86_64/op_array_length.S
+++ b/runtime/interpreter/mterp/x86_64/op_array_length.S
@@ -1,3 +1,4 @@
+%def op_array_length():
/*
* Return the length of an array.
*/
diff --git a/runtime/interpreter/mterp/x86_64/op_check_cast.S b/runtime/interpreter/mterp/x86_64/op_check_cast.S
index f8fa7b2..ac7051b 100644
--- a/runtime/interpreter/mterp/x86_64/op_check_cast.S
+++ b/runtime/interpreter/mterp/x86_64/op_check_cast.S
@@ -1,3 +1,4 @@
+%def op_check_cast():
/*
* Check to see if a cast from one class to another is allowed.
*/
diff --git a/runtime/interpreter/mterp/x86_64/op_cmp_long.S b/runtime/interpreter/mterp/x86_64/op_cmp_long.S
index 23ca3e5..f222813 100644
--- a/runtime/interpreter/mterp/x86_64/op_cmp_long.S
+++ b/runtime/interpreter/mterp/x86_64/op_cmp_long.S
@@ -1,3 +1,4 @@
+%def op_cmp_long():
/*
* Compare two 64-bit values. Puts 0, 1, or -1 into the destination
* register based on the results of the comparison.
diff --git a/runtime/interpreter/mterp/x86_64/op_cmpg_double.S b/runtime/interpreter/mterp/x86_64/op_cmpg_double.S
index 7c0aa1b..1c04e99 100644
--- a/runtime/interpreter/mterp/x86_64/op_cmpg_double.S
+++ b/runtime/interpreter/mterp/x86_64/op_cmpg_double.S
@@ -1 +1,2 @@
-%include "x86_64/fpcmp.S" {"suff":"d","nanval":"pos"}
+%def op_cmpg_double():
+% fpcmp(suff="d", nanval="pos")
diff --git a/runtime/interpreter/mterp/x86_64/op_cmpg_float.S b/runtime/interpreter/mterp/x86_64/op_cmpg_float.S
index 14e8472..797c3d5 100644
--- a/runtime/interpreter/mterp/x86_64/op_cmpg_float.S
+++ b/runtime/interpreter/mterp/x86_64/op_cmpg_float.S
@@ -1 +1,2 @@
-%include "x86_64/fpcmp.S" {"suff":"s","nanval":"pos"}
+%def op_cmpg_float():
+% fpcmp(suff="s", nanval="pos")
diff --git a/runtime/interpreter/mterp/x86_64/op_cmpl_double.S b/runtime/interpreter/mterp/x86_64/op_cmpl_double.S
index 1d4c424..cbe8db7 100644
--- a/runtime/interpreter/mterp/x86_64/op_cmpl_double.S
+++ b/runtime/interpreter/mterp/x86_64/op_cmpl_double.S
@@ -1 +1,2 @@
-%include "x86_64/fpcmp.S" {"suff":"d","nanval":"neg"}
+%def op_cmpl_double():
+% fpcmp(suff="d", nanval="neg")
diff --git a/runtime/interpreter/mterp/x86_64/op_cmpl_float.S b/runtime/interpreter/mterp/x86_64/op_cmpl_float.S
index 97a12a6..068f4cb 100644
--- a/runtime/interpreter/mterp/x86_64/op_cmpl_float.S
+++ b/runtime/interpreter/mterp/x86_64/op_cmpl_float.S
@@ -1 +1,2 @@
-%include "x86_64/fpcmp.S" {"suff":"s","nanval":"neg"}
+%def op_cmpl_float():
+% fpcmp(suff="s", nanval="neg")
diff --git a/runtime/interpreter/mterp/x86_64/op_const.S b/runtime/interpreter/mterp/x86_64/op_const.S
index 3cfafdb..3622095 100644
--- a/runtime/interpreter/mterp/x86_64/op_const.S
+++ b/runtime/interpreter/mterp/x86_64/op_const.S
@@ -1,3 +1,4 @@
+%def op_const():
/* const vAA, #+BBBBbbbb */
movl 2(rPC), %eax # grab all 32 bits at once
SET_VREG %eax, rINSTq # vAA<- eax
diff --git a/runtime/interpreter/mterp/x86_64/op_const_16.S b/runtime/interpreter/mterp/x86_64/op_const_16.S
index 1a139c6..fa86060 100644
--- a/runtime/interpreter/mterp/x86_64/op_const_16.S
+++ b/runtime/interpreter/mterp/x86_64/op_const_16.S
@@ -1,3 +1,4 @@
+%def op_const_16():
/* const/16 vAA, #+BBBB */
movswl 2(rPC), %ecx # ecx <- ssssBBBB
SET_VREG %ecx, rINSTq # vAA <- ssssBBBB
diff --git a/runtime/interpreter/mterp/x86_64/op_const_4.S b/runtime/interpreter/mterp/x86_64/op_const_4.S
index 23c4816..9f39cee 100644
--- a/runtime/interpreter/mterp/x86_64/op_const_4.S
+++ b/runtime/interpreter/mterp/x86_64/op_const_4.S
@@ -1,3 +1,4 @@
+%def op_const_4():
/* const/4 vA, #+B */
movsbl rINSTbl, %eax # eax <-ssssssBx
movl $$0xf, rINST
diff --git a/runtime/interpreter/mterp/x86_64/op_const_class.S b/runtime/interpreter/mterp/x86_64/op_const_class.S
index 0c402e1..db12ec3 100644
--- a/runtime/interpreter/mterp/x86_64/op_const_class.S
+++ b/runtime/interpreter/mterp/x86_64/op_const_class.S
@@ -1 +1,2 @@
-%include "x86_64/const.S" { "helper":"MterpConstClass" }
+%def op_const_class():
+% const(helper="MterpConstClass")
diff --git a/runtime/interpreter/mterp/x86_64/op_const_high16.S b/runtime/interpreter/mterp/x86_64/op_const_high16.S
index 64e633c..e1e61e3 100644
--- a/runtime/interpreter/mterp/x86_64/op_const_high16.S
+++ b/runtime/interpreter/mterp/x86_64/op_const_high16.S
@@ -1,3 +1,4 @@
+%def op_const_high16():
/* const/high16 vAA, #+BBBB0000 */
movzwl 2(rPC), %eax # eax <- 0000BBBB
sall $$16, %eax # eax <- BBBB0000
diff --git a/runtime/interpreter/mterp/x86_64/op_const_method_handle.S b/runtime/interpreter/mterp/x86_64/op_const_method_handle.S
index 2b8b0a2..2680c17 100644
--- a/runtime/interpreter/mterp/x86_64/op_const_method_handle.S
+++ b/runtime/interpreter/mterp/x86_64/op_const_method_handle.S
@@ -1 +1,2 @@
-%include "x86_64/const.S" { "helper":"MterpConstMethodHandle" }
+%def op_const_method_handle():
+% const(helper="MterpConstMethodHandle")
diff --git a/runtime/interpreter/mterp/x86_64/op_const_method_type.S b/runtime/interpreter/mterp/x86_64/op_const_method_type.S
index 33ce952..ea814bf 100644
--- a/runtime/interpreter/mterp/x86_64/op_const_method_type.S
+++ b/runtime/interpreter/mterp/x86_64/op_const_method_type.S
@@ -1 +1,2 @@
-%include "x86_64/const.S" { "helper":"MterpConstMethodType" }
+%def op_const_method_type():
+% const(helper="MterpConstMethodType")
diff --git a/runtime/interpreter/mterp/x86_64/op_const_string.S b/runtime/interpreter/mterp/x86_64/op_const_string.S
index 5a29bd3..41376f8 100644
--- a/runtime/interpreter/mterp/x86_64/op_const_string.S
+++ b/runtime/interpreter/mterp/x86_64/op_const_string.S
@@ -1 +1,2 @@
-%include "x86_64/const.S" { "helper":"MterpConstString" }
+%def op_const_string():
+% const(helper="MterpConstString")
diff --git a/runtime/interpreter/mterp/x86_64/op_const_string_jumbo.S b/runtime/interpreter/mterp/x86_64/op_const_string_jumbo.S
index ae03d20..c12abb1 100644
--- a/runtime/interpreter/mterp/x86_64/op_const_string_jumbo.S
+++ b/runtime/interpreter/mterp/x86_64/op_const_string_jumbo.S
@@ -1,3 +1,4 @@
+%def op_const_string_jumbo():
/* const/string vAA, String@BBBBBBBB */
EXPORT_PC
movl 2(rPC), OUT_32_ARG0 # OUT_32_ARG0 <- BBBB
diff --git a/runtime/interpreter/mterp/x86_64/op_const_wide.S b/runtime/interpreter/mterp/x86_64/op_const_wide.S
index 5615177..f7a74c2 100644
--- a/runtime/interpreter/mterp/x86_64/op_const_wide.S
+++ b/runtime/interpreter/mterp/x86_64/op_const_wide.S
@@ -1,3 +1,4 @@
+%def op_const_wide():
/* const-wide vAA, #+HHHHhhhhBBBBbbbb */
movq 2(rPC), %rax # rax <- HHHHhhhhBBBBbbbb
SET_WIDE_VREG %rax, rINSTq
diff --git a/runtime/interpreter/mterp/x86_64/op_const_wide_16.S b/runtime/interpreter/mterp/x86_64/op_const_wide_16.S
index 593b624..8d1e17c 100644
--- a/runtime/interpreter/mterp/x86_64/op_const_wide_16.S
+++ b/runtime/interpreter/mterp/x86_64/op_const_wide_16.S
@@ -1,3 +1,4 @@
+%def op_const_wide_16():
/* const-wide/16 vAA, #+BBBB */
movswq 2(rPC), %rax # rax <- ssssBBBB
SET_WIDE_VREG %rax, rINSTq # store
diff --git a/runtime/interpreter/mterp/x86_64/op_const_wide_32.S b/runtime/interpreter/mterp/x86_64/op_const_wide_32.S
index 5ef3636..22b8074 100644
--- a/runtime/interpreter/mterp/x86_64/op_const_wide_32.S
+++ b/runtime/interpreter/mterp/x86_64/op_const_wide_32.S
@@ -1,3 +1,4 @@
+%def op_const_wide_32():
/* const-wide/32 vAA, #+BBBBbbbb */
movslq 2(rPC), %rax # eax <- ssssssssBBBBbbbb
SET_WIDE_VREG %rax, rINSTq # store
diff --git a/runtime/interpreter/mterp/x86_64/op_const_wide_high16.S b/runtime/interpreter/mterp/x86_64/op_const_wide_high16.S
index b86b4e5..d41b02a 100644
--- a/runtime/interpreter/mterp/x86_64/op_const_wide_high16.S
+++ b/runtime/interpreter/mterp/x86_64/op_const_wide_high16.S
@@ -1,3 +1,4 @@
+%def op_const_wide_high16():
/* const-wide/high16 vAA, #+BBBB000000000000 */
movzwq 2(rPC), %rax # eax <- 0000BBBB
salq $$48, %rax # eax <- BBBB0000
diff --git a/runtime/interpreter/mterp/x86_64/op_div_double.S b/runtime/interpreter/mterp/x86_64/op_div_double.S
index 45c700c..6b342f8 100644
--- a/runtime/interpreter/mterp/x86_64/op_div_double.S
+++ b/runtime/interpreter/mterp/x86_64/op_div_double.S
@@ -1 +1,2 @@
-%include "x86_64/sseBinop.S" {"instr":"divs","suff":"d"}
+%def op_div_double():
+% sseBinop(instr="divs", suff="d")
diff --git a/runtime/interpreter/mterp/x86_64/op_div_double_2addr.S b/runtime/interpreter/mterp/x86_64/op_div_double_2addr.S
index 83f270e..212c825 100644
--- a/runtime/interpreter/mterp/x86_64/op_div_double_2addr.S
+++ b/runtime/interpreter/mterp/x86_64/op_div_double_2addr.S
@@ -1 +1,2 @@
-%include "x86_64/sseBinop2Addr.S" {"instr":"divs","suff":"d"}
+%def op_div_double_2addr():
+% sseBinop2Addr(instr="divs", suff="d")
diff --git a/runtime/interpreter/mterp/x86_64/op_div_float.S b/runtime/interpreter/mterp/x86_64/op_div_float.S
index aa90b24..b6537d9 100644
--- a/runtime/interpreter/mterp/x86_64/op_div_float.S
+++ b/runtime/interpreter/mterp/x86_64/op_div_float.S
@@ -1 +1,2 @@
-%include "x86_64/sseBinop.S" {"instr":"divs","suff":"s"}
+%def op_div_float():
+% sseBinop(instr="divs", suff="s")
diff --git a/runtime/interpreter/mterp/x86_64/op_div_float_2addr.S b/runtime/interpreter/mterp/x86_64/op_div_float_2addr.S
index f0f8f1a..19ae27d 100644
--- a/runtime/interpreter/mterp/x86_64/op_div_float_2addr.S
+++ b/runtime/interpreter/mterp/x86_64/op_div_float_2addr.S
@@ -1 +1,2 @@
-%include "x86_64/sseBinop2Addr.S" {"instr":"divs","suff":"s"}
+%def op_div_float_2addr():
+% sseBinop2Addr(instr="divs", suff="s")
diff --git a/runtime/interpreter/mterp/x86_64/op_div_int.S b/runtime/interpreter/mterp/x86_64/op_div_int.S
index bba5a17..cd7f3db 100644
--- a/runtime/interpreter/mterp/x86_64/op_div_int.S
+++ b/runtime/interpreter/mterp/x86_64/op_div_int.S
@@ -1 +1,2 @@
-%include "x86_64/bindiv.S" {"result":"%eax","second":"%ecx","wide":"0","suffix":"l"}
+%def op_div_int():
+% bindiv(result="%eax", second="%ecx", wide="0", suffix="l")
diff --git a/runtime/interpreter/mterp/x86_64/op_div_int_2addr.S b/runtime/interpreter/mterp/x86_64/op_div_int_2addr.S
index fa4255d..3a734db 100644
--- a/runtime/interpreter/mterp/x86_64/op_div_int_2addr.S
+++ b/runtime/interpreter/mterp/x86_64/op_div_int_2addr.S
@@ -1 +1,2 @@
-%include "x86_64/bindiv2addr.S" {"result":"%eax","second":"%ecx","wide":"0","suffix":"l"}
+%def op_div_int_2addr():
+% bindiv2addr(result="%eax", second="%ecx", wide="0", suffix="l")
diff --git a/runtime/interpreter/mterp/x86_64/op_div_int_lit16.S b/runtime/interpreter/mterp/x86_64/op_div_int_lit16.S
index 3fa1e09..cdcee2d 100644
--- a/runtime/interpreter/mterp/x86_64/op_div_int_lit16.S
+++ b/runtime/interpreter/mterp/x86_64/op_div_int_lit16.S
@@ -1 +1,2 @@
-%include "x86_64/bindivLit16.S" {"result":"%eax"}
+%def op_div_int_lit16():
+% bindivLit16(result="%eax")
diff --git a/runtime/interpreter/mterp/x86_64/op_div_int_lit8.S b/runtime/interpreter/mterp/x86_64/op_div_int_lit8.S
index 859883e..7d258c8 100644
--- a/runtime/interpreter/mterp/x86_64/op_div_int_lit8.S
+++ b/runtime/interpreter/mterp/x86_64/op_div_int_lit8.S
@@ -1 +1,2 @@
-%include "x86_64/bindivLit8.S" {"result":"%eax"}
+%def op_div_int_lit8():
+% bindivLit8(result="%eax")
diff --git a/runtime/interpreter/mterp/x86_64/op_div_long.S b/runtime/interpreter/mterp/x86_64/op_div_long.S
index a061a88..59f9073 100644
--- a/runtime/interpreter/mterp/x86_64/op_div_long.S
+++ b/runtime/interpreter/mterp/x86_64/op_div_long.S
@@ -1 +1,2 @@
-%include "x86_64/bindiv.S" {"result":"%rax","second":"%rcx","wide":"1","suffix":"q","ext":"cqo"}
+%def op_div_long():
+% bindiv(result="%rax", second="%rcx", wide="1", suffix="q", ext="cqo")
diff --git a/runtime/interpreter/mterp/x86_64/op_div_long_2addr.S b/runtime/interpreter/mterp/x86_64/op_div_long_2addr.S
index 8886e68..d7a46f5 100644
--- a/runtime/interpreter/mterp/x86_64/op_div_long_2addr.S
+++ b/runtime/interpreter/mterp/x86_64/op_div_long_2addr.S
@@ -1 +1,2 @@
-%include "x86_64/bindiv2addr.S" {"result":"%rax","second":"%rcx","wide":"1","suffix":"q","ext":"cqo"}
+%def op_div_long_2addr():
+% bindiv2addr(result="%rax", second="%rcx", wide="1", suffix="q", ext="cqo")
diff --git a/runtime/interpreter/mterp/x86_64/op_double_to_float.S b/runtime/interpreter/mterp/x86_64/op_double_to_float.S
index cea1482..e62aa4d 100644
--- a/runtime/interpreter/mterp/x86_64/op_double_to_float.S
+++ b/runtime/interpreter/mterp/x86_64/op_double_to_float.S
@@ -1 +1,2 @@
-%include "x86_64/fpcvt.S" {"source_suffix":"d","dest_suffix":"s","wide":"0"}
+%def op_double_to_float():
+% fpcvt(source_suffix="d", dest_suffix="s", wide="0")
diff --git a/runtime/interpreter/mterp/x86_64/op_double_to_int.S b/runtime/interpreter/mterp/x86_64/op_double_to_int.S
index a9965ed..24fca63 100644
--- a/runtime/interpreter/mterp/x86_64/op_double_to_int.S
+++ b/runtime/interpreter/mterp/x86_64/op_double_to_int.S
@@ -1 +1,2 @@
-%include "x86_64/cvtfp_int.S" {"fp_suffix":"d","i_suffix":"l","max_const":"$0x7fffffff","result_reg":"%eax","wide":"0"}
+%def op_double_to_int():
+% cvtfp_int(fp_suffix="d", i_suffix="l", max_const="$0x7fffffff", result_reg="%eax", wide="0")
diff --git a/runtime/interpreter/mterp/x86_64/op_double_to_long.S b/runtime/interpreter/mterp/x86_64/op_double_to_long.S
index 179e6a1..8f042c0 100644
--- a/runtime/interpreter/mterp/x86_64/op_double_to_long.S
+++ b/runtime/interpreter/mterp/x86_64/op_double_to_long.S
@@ -1 +1,2 @@
-%include "x86_64/cvtfp_int.S" {"fp_suffix":"d","i_suffix":"q","max_const":"$0x7fffffffffffffff","result_reg":"%rax","wide":"1"}
+%def op_double_to_long():
+% cvtfp_int(fp_suffix="d", i_suffix="q", max_const="$0x7fffffffffffffff", result_reg="%rax", wide="1")
diff --git a/runtime/interpreter/mterp/x86_64/op_fill_array_data.S b/runtime/interpreter/mterp/x86_64/op_fill_array_data.S
index 7ea36a6..694ee79 100644
--- a/runtime/interpreter/mterp/x86_64/op_fill_array_data.S
+++ b/runtime/interpreter/mterp/x86_64/op_fill_array_data.S
@@ -1,3 +1,4 @@
+%def op_fill_array_data():
/* fill-array-data vAA, +BBBBBBBB */
EXPORT_PC
movslq 2(rPC), %rcx # rcx <- ssssssssBBBBbbbb
diff --git a/runtime/interpreter/mterp/x86_64/op_filled_new_array.S b/runtime/interpreter/mterp/x86_64/op_filled_new_array.S
index a7f7ddc..0f8b20e 100644
--- a/runtime/interpreter/mterp/x86_64/op_filled_new_array.S
+++ b/runtime/interpreter/mterp/x86_64/op_filled_new_array.S
@@ -1,4 +1,4 @@
-%default { "helper":"MterpFilledNewArray" }
+%def op_filled_new_array(helper="MterpFilledNewArray"):
/*
* Create a new array with elements filled from registers.
*
diff --git a/runtime/interpreter/mterp/x86_64/op_filled_new_array_range.S b/runtime/interpreter/mterp/x86_64/op_filled_new_array_range.S
index 4ca79a3..1667de1 100644
--- a/runtime/interpreter/mterp/x86_64/op_filled_new_array_range.S
+++ b/runtime/interpreter/mterp/x86_64/op_filled_new_array_range.S
@@ -1 +1,2 @@
-%include "x86_64/op_filled_new_array.S" { "helper":"MterpFilledNewArrayRange" }
+%def op_filled_new_array_range():
+% op_filled_new_array(helper="MterpFilledNewArrayRange")
diff --git a/runtime/interpreter/mterp/x86_64/op_float_to_double.S b/runtime/interpreter/mterp/x86_64/op_float_to_double.S
index 7855205..a7cf8d3 100644
--- a/runtime/interpreter/mterp/x86_64/op_float_to_double.S
+++ b/runtime/interpreter/mterp/x86_64/op_float_to_double.S
@@ -1 +1,2 @@
-%include "x86_64/fpcvt.S" {"source_suffix":"s","dest_suffix":"d","wide":"1"}
+%def op_float_to_double():
+% fpcvt(source_suffix="s", dest_suffix="d", wide="1")
diff --git a/runtime/interpreter/mterp/x86_64/op_float_to_int.S b/runtime/interpreter/mterp/x86_64/op_float_to_int.S
index cb90555..1195586 100644
--- a/runtime/interpreter/mterp/x86_64/op_float_to_int.S
+++ b/runtime/interpreter/mterp/x86_64/op_float_to_int.S
@@ -1 +1,2 @@
-%include "x86_64/cvtfp_int.S" {"fp_suffix":"s","i_suffix":"l","max_const":"$0x7fffffff","result_reg":"%eax","wide":"0"}
+%def op_float_to_int():
+% cvtfp_int(fp_suffix="s", i_suffix="l", max_const="$0x7fffffff", result_reg="%eax", wide="0")
diff --git a/runtime/interpreter/mterp/x86_64/op_float_to_long.S b/runtime/interpreter/mterp/x86_64/op_float_to_long.S
index 96bb4ee..4548d6a 100644
--- a/runtime/interpreter/mterp/x86_64/op_float_to_long.S
+++ b/runtime/interpreter/mterp/x86_64/op_float_to_long.S
@@ -1 +1,2 @@
-%include "x86_64/cvtfp_int.S" {"fp_suffix":"s","i_suffix":"q","max_const":"$0x7fffffffffffffff","result_reg":"%rax","wide":"1"}
+%def op_float_to_long():
+% cvtfp_int(fp_suffix="s", i_suffix="q", max_const="$0x7fffffffffffffff", result_reg="%rax", wide="1")
diff --git a/runtime/interpreter/mterp/x86_64/op_goto.S b/runtime/interpreter/mterp/x86_64/op_goto.S
index 9749901..0659bbc 100644
--- a/runtime/interpreter/mterp/x86_64/op_goto.S
+++ b/runtime/interpreter/mterp/x86_64/op_goto.S
@@ -1,3 +1,4 @@
+%def op_goto():
/*
* Unconditional branch, 8-bit offset.
*
diff --git a/runtime/interpreter/mterp/x86_64/op_goto_16.S b/runtime/interpreter/mterp/x86_64/op_goto_16.S
index 77688e0..1193f70 100644
--- a/runtime/interpreter/mterp/x86_64/op_goto_16.S
+++ b/runtime/interpreter/mterp/x86_64/op_goto_16.S
@@ -1,3 +1,4 @@
+%def op_goto_16():
/*
* Unconditional branch, 16-bit offset.
*
diff --git a/runtime/interpreter/mterp/x86_64/op_goto_32.S b/runtime/interpreter/mterp/x86_64/op_goto_32.S
index 29d777b..cd0b522 100644
--- a/runtime/interpreter/mterp/x86_64/op_goto_32.S
+++ b/runtime/interpreter/mterp/x86_64/op_goto_32.S
@@ -1,3 +1,4 @@
+%def op_goto_32():
/*
* Unconditional branch, 32-bit offset.
*
diff --git a/runtime/interpreter/mterp/x86_64/op_if_eq.S b/runtime/interpreter/mterp/x86_64/op_if_eq.S
index d56ce72..4d1f6a5 100644
--- a/runtime/interpreter/mterp/x86_64/op_if_eq.S
+++ b/runtime/interpreter/mterp/x86_64/op_if_eq.S
@@ -1 +1,2 @@
-%include "x86_64/bincmp.S" { "revcmp":"ne" }
+%def op_if_eq():
+% bincmp(revcmp="ne")
diff --git a/runtime/interpreter/mterp/x86_64/op_if_eqz.S b/runtime/interpreter/mterp/x86_64/op_if_eqz.S
index a0fc444..12de558 100644
--- a/runtime/interpreter/mterp/x86_64/op_if_eqz.S
+++ b/runtime/interpreter/mterp/x86_64/op_if_eqz.S
@@ -1 +1,2 @@
-%include "x86_64/zcmp.S" { "revcmp":"ne" }
+%def op_if_eqz():
+% zcmp(revcmp="ne")
diff --git a/runtime/interpreter/mterp/x86_64/op_if_ge.S b/runtime/interpreter/mterp/x86_64/op_if_ge.S
index a7832ef..6849027 100644
--- a/runtime/interpreter/mterp/x86_64/op_if_ge.S
+++ b/runtime/interpreter/mterp/x86_64/op_if_ge.S
@@ -1 +1,2 @@
-%include "x86_64/bincmp.S" { "revcmp":"l" }
+%def op_if_ge():
+% bincmp(revcmp="l")
diff --git a/runtime/interpreter/mterp/x86_64/op_if_gez.S b/runtime/interpreter/mterp/x86_64/op_if_gez.S
index f9af5db..87bdcbf 100644
--- a/runtime/interpreter/mterp/x86_64/op_if_gez.S
+++ b/runtime/interpreter/mterp/x86_64/op_if_gez.S
@@ -1 +1,2 @@
-%include "x86_64/zcmp.S" { "revcmp":"l" }
+%def op_if_gez():
+% zcmp(revcmp="l")
diff --git a/runtime/interpreter/mterp/x86_64/op_if_gt.S b/runtime/interpreter/mterp/x86_64/op_if_gt.S
index 70f2b9e..4a52100 100644
--- a/runtime/interpreter/mterp/x86_64/op_if_gt.S
+++ b/runtime/interpreter/mterp/x86_64/op_if_gt.S
@@ -1 +1,2 @@
-%include "x86_64/bincmp.S" { "revcmp":"le" }
+%def op_if_gt():
+% bincmp(revcmp="le")
diff --git a/runtime/interpreter/mterp/x86_64/op_if_gtz.S b/runtime/interpreter/mterp/x86_64/op_if_gtz.S
index 2fb0d50..a0b2e3a 100644
--- a/runtime/interpreter/mterp/x86_64/op_if_gtz.S
+++ b/runtime/interpreter/mterp/x86_64/op_if_gtz.S
@@ -1 +1,2 @@
-%include "x86_64/zcmp.S" { "revcmp":"le" }
+%def op_if_gtz():
+% zcmp(revcmp="le")
diff --git a/runtime/interpreter/mterp/x86_64/op_if_le.S b/runtime/interpreter/mterp/x86_64/op_if_le.S
index 321962a..69e94db 100644
--- a/runtime/interpreter/mterp/x86_64/op_if_le.S
+++ b/runtime/interpreter/mterp/x86_64/op_if_le.S
@@ -1 +1,2 @@
-%include "x86_64/bincmp.S" { "revcmp":"g" }
+%def op_if_le():
+% bincmp(revcmp="g")
diff --git a/runtime/interpreter/mterp/x86_64/op_if_lez.S b/runtime/interpreter/mterp/x86_64/op_if_lez.S
index d3dc334..42e69d9 100644
--- a/runtime/interpreter/mterp/x86_64/op_if_lez.S
+++ b/runtime/interpreter/mterp/x86_64/op_if_lez.S
@@ -1 +1,2 @@
-%include "x86_64/zcmp.S" { "revcmp":"g" }
+%def op_if_lez():
+% zcmp(revcmp="g")
diff --git a/runtime/interpreter/mterp/x86_64/op_if_lt.S b/runtime/interpreter/mterp/x86_64/op_if_lt.S
index f028005..052aabe 100644
--- a/runtime/interpreter/mterp/x86_64/op_if_lt.S
+++ b/runtime/interpreter/mterp/x86_64/op_if_lt.S
@@ -1 +1,2 @@
-%include "x86_64/bincmp.S" { "revcmp":"ge" }
+%def op_if_lt():
+% bincmp(revcmp="ge")
diff --git a/runtime/interpreter/mterp/x86_64/op_if_ltz.S b/runtime/interpreter/mterp/x86_64/op_if_ltz.S
index 383d73a..8e13e48 100644
--- a/runtime/interpreter/mterp/x86_64/op_if_ltz.S
+++ b/runtime/interpreter/mterp/x86_64/op_if_ltz.S
@@ -1 +1,2 @@
-%include "x86_64/zcmp.S" { "revcmp":"ge" }
+%def op_if_ltz():
+% zcmp(revcmp="ge")
diff --git a/runtime/interpreter/mterp/x86_64/op_if_ne.S b/runtime/interpreter/mterp/x86_64/op_if_ne.S
index ac6e063..2cfd8a9 100644
--- a/runtime/interpreter/mterp/x86_64/op_if_ne.S
+++ b/runtime/interpreter/mterp/x86_64/op_if_ne.S
@@ -1 +1,2 @@
-%include "x86_64/bincmp.S" { "revcmp":"e" }
+%def op_if_ne():
+% bincmp(revcmp="e")
diff --git a/runtime/interpreter/mterp/x86_64/op_if_nez.S b/runtime/interpreter/mterp/x86_64/op_if_nez.S
index c96e4f3..261a173 100644
--- a/runtime/interpreter/mterp/x86_64/op_if_nez.S
+++ b/runtime/interpreter/mterp/x86_64/op_if_nez.S
@@ -1 +1,2 @@
-%include "x86_64/zcmp.S" { "revcmp":"e" }
+%def op_if_nez():
+% zcmp(revcmp="e")
diff --git a/runtime/interpreter/mterp/x86_64/op_iget.S b/runtime/interpreter/mterp/x86_64/op_iget.S
index 4ab7c27..d09edc0 100644
--- a/runtime/interpreter/mterp/x86_64/op_iget.S
+++ b/runtime/interpreter/mterp/x86_64/op_iget.S
@@ -1,2 +1,2 @@
-%default { "is_object":"0", "helper":"MterpIGetU32"}
-%include "x86_64/field.S" { }
+%def op_iget(is_object="0", helper="MterpIGetU32"):
+% field(helper=helper)
diff --git a/runtime/interpreter/mterp/x86_64/op_iget_boolean.S b/runtime/interpreter/mterp/x86_64/op_iget_boolean.S
index 18e9264..cb8edee 100644
--- a/runtime/interpreter/mterp/x86_64/op_iget_boolean.S
+++ b/runtime/interpreter/mterp/x86_64/op_iget_boolean.S
@@ -1 +1,2 @@
-%include "x86_64/op_iget.S" { "helper":"MterpIGetU8" }
+%def op_iget_boolean():
+% op_iget(helper="MterpIGetU8")
diff --git a/runtime/interpreter/mterp/x86_64/op_iget_boolean_quick.S b/runtime/interpreter/mterp/x86_64/op_iget_boolean_quick.S
index 07139c7..4e16768 100644
--- a/runtime/interpreter/mterp/x86_64/op_iget_boolean_quick.S
+++ b/runtime/interpreter/mterp/x86_64/op_iget_boolean_quick.S
@@ -1 +1,2 @@
-%include "x86_64/op_iget_quick.S" { "load":"movsbl" }
+%def op_iget_boolean_quick():
+% op_iget_quick(load="movsbl")
diff --git a/runtime/interpreter/mterp/x86_64/op_iget_byte.S b/runtime/interpreter/mterp/x86_64/op_iget_byte.S
index bec0ad5..2b87fb1 100644
--- a/runtime/interpreter/mterp/x86_64/op_iget_byte.S
+++ b/runtime/interpreter/mterp/x86_64/op_iget_byte.S
@@ -1 +1,2 @@
-%include "x86_64/op_iget.S" { "helper":"MterpIGetI8" }
+%def op_iget_byte():
+% op_iget(helper="MterpIGetI8")
diff --git a/runtime/interpreter/mterp/x86_64/op_iget_byte_quick.S b/runtime/interpreter/mterp/x86_64/op_iget_byte_quick.S
index 07139c7..b92936c 100644
--- a/runtime/interpreter/mterp/x86_64/op_iget_byte_quick.S
+++ b/runtime/interpreter/mterp/x86_64/op_iget_byte_quick.S
@@ -1 +1,2 @@
-%include "x86_64/op_iget_quick.S" { "load":"movsbl" }
+%def op_iget_byte_quick():
+% op_iget_quick(load="movsbl")
diff --git a/runtime/interpreter/mterp/x86_64/op_iget_char.S b/runtime/interpreter/mterp/x86_64/op_iget_char.S
index 5e22b88..001bd03 100644
--- a/runtime/interpreter/mterp/x86_64/op_iget_char.S
+++ b/runtime/interpreter/mterp/x86_64/op_iget_char.S
@@ -1 +1,2 @@
-%include "x86_64/op_iget.S" { "helper":"MterpIGetU16" }
+%def op_iget_char():
+% op_iget(helper="MterpIGetU16")
diff --git a/runtime/interpreter/mterp/x86_64/op_iget_char_quick.S b/runtime/interpreter/mterp/x86_64/op_iget_char_quick.S
index 8cb3be3..d6f836b 100644
--- a/runtime/interpreter/mterp/x86_64/op_iget_char_quick.S
+++ b/runtime/interpreter/mterp/x86_64/op_iget_char_quick.S
@@ -1 +1,2 @@
-%include "x86_64/op_iget_quick.S" { "load":"movzwl" }
+%def op_iget_char_quick():
+% op_iget_quick(load="movzwl")
diff --git a/runtime/interpreter/mterp/x86_64/op_iget_object.S b/runtime/interpreter/mterp/x86_64/op_iget_object.S
index bcef1d2..4e5f769 100644
--- a/runtime/interpreter/mterp/x86_64/op_iget_object.S
+++ b/runtime/interpreter/mterp/x86_64/op_iget_object.S
@@ -1 +1,2 @@
-%include "x86_64/op_iget.S" { "is_object":"1", "helper":"MterpIGetObj" }
+%def op_iget_object():
+% op_iget(is_object="1", helper="MterpIGetObj")
diff --git a/runtime/interpreter/mterp/x86_64/op_iget_object_quick.S b/runtime/interpreter/mterp/x86_64/op_iget_object_quick.S
index 176c954..1969a25 100644
--- a/runtime/interpreter/mterp/x86_64/op_iget_object_quick.S
+++ b/runtime/interpreter/mterp/x86_64/op_iget_object_quick.S
@@ -1,3 +1,4 @@
+%def op_iget_object_quick():
/* For: iget-object-quick */
/* op vA, vB, offset@CCCC */
.extern artIGetObjectFromMterp
diff --git a/runtime/interpreter/mterp/x86_64/op_iget_quick.S b/runtime/interpreter/mterp/x86_64/op_iget_quick.S
index bfb7530..ba9e8e4 100644
--- a/runtime/interpreter/mterp/x86_64/op_iget_quick.S
+++ b/runtime/interpreter/mterp/x86_64/op_iget_quick.S
@@ -1,4 +1,4 @@
-%default { "load":"movl", "wide":"0"}
+%def op_iget_quick(load="movl", wide="0"):
/* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick, iget-wide-quick */
/* op vA, vB, offset@CCCC */
movl rINST, %ecx # rcx <- BA
diff --git a/runtime/interpreter/mterp/x86_64/op_iget_short.S b/runtime/interpreter/mterp/x86_64/op_iget_short.S
index 14c49f7..a62c4d9 100644
--- a/runtime/interpreter/mterp/x86_64/op_iget_short.S
+++ b/runtime/interpreter/mterp/x86_64/op_iget_short.S
@@ -1 +1,2 @@
-%include "x86_64/op_iget.S" { "helper":"MterpIGetI16" }
+%def op_iget_short():
+% op_iget(helper="MterpIGetI16")
diff --git a/runtime/interpreter/mterp/x86_64/op_iget_short_quick.S b/runtime/interpreter/mterp/x86_64/op_iget_short_quick.S
index 56ca858..f5e48d6 100644
--- a/runtime/interpreter/mterp/x86_64/op_iget_short_quick.S
+++ b/runtime/interpreter/mterp/x86_64/op_iget_short_quick.S
@@ -1 +1,2 @@
-%include "x86_64/op_iget_quick.S" { "load":"movswl" }
+%def op_iget_short_quick():
+% op_iget_quick(load="movswl")
diff --git a/runtime/interpreter/mterp/x86_64/op_iget_wide.S b/runtime/interpreter/mterp/x86_64/op_iget_wide.S
index a85a474..9643cc3 100644
--- a/runtime/interpreter/mterp/x86_64/op_iget_wide.S
+++ b/runtime/interpreter/mterp/x86_64/op_iget_wide.S
@@ -1 +1,2 @@
-%include "x86_64/op_iget.S" { "helper":"MterpIGetU64" }
+%def op_iget_wide():
+% op_iget(helper="MterpIGetU64")
diff --git a/runtime/interpreter/mterp/x86_64/op_iget_wide_quick.S b/runtime/interpreter/mterp/x86_64/op_iget_wide_quick.S
index 169d625..263ea8c 100644
--- a/runtime/interpreter/mterp/x86_64/op_iget_wide_quick.S
+++ b/runtime/interpreter/mterp/x86_64/op_iget_wide_quick.S
@@ -1 +1,2 @@
-%include "x86_64/op_iget_quick.S" { "load":"movswl", "wide":"1" }
+%def op_iget_wide_quick():
+% op_iget_quick(load="movswl", wide="1")
diff --git a/runtime/interpreter/mterp/x86_64/op_instance_of.S b/runtime/interpreter/mterp/x86_64/op_instance_of.S
index 4819833..237dd39 100644
--- a/runtime/interpreter/mterp/x86_64/op_instance_of.S
+++ b/runtime/interpreter/mterp/x86_64/op_instance_of.S
@@ -1,3 +1,4 @@
+%def op_instance_of():
/*
* Check to see if an object reference is an instance of a class.
*
diff --git a/runtime/interpreter/mterp/x86_64/op_int_to_byte.S b/runtime/interpreter/mterp/x86_64/op_int_to_byte.S
index f4e578f..80e4d5c 100644
--- a/runtime/interpreter/mterp/x86_64/op_int_to_byte.S
+++ b/runtime/interpreter/mterp/x86_64/op_int_to_byte.S
@@ -1 +1,2 @@
-%include "x86_64/unop.S" {"instr":"movsbl %al, %eax"}
+%def op_int_to_byte():
+% unop(instr="movsbl %al, %eax")
diff --git a/runtime/interpreter/mterp/x86_64/op_int_to_char.S b/runtime/interpreter/mterp/x86_64/op_int_to_char.S
index c1bf17f..83e9868 100644
--- a/runtime/interpreter/mterp/x86_64/op_int_to_char.S
+++ b/runtime/interpreter/mterp/x86_64/op_int_to_char.S
@@ -1 +1,2 @@
-%include "x86_64/unop.S" {"instr":"movzwl %ax,%eax"}
+%def op_int_to_char():
+% unop(instr="movzwl %ax,%eax")
diff --git a/runtime/interpreter/mterp/x86_64/op_int_to_double.S b/runtime/interpreter/mterp/x86_64/op_int_to_double.S
index 27ebf42..74e91ec 100644
--- a/runtime/interpreter/mterp/x86_64/op_int_to_double.S
+++ b/runtime/interpreter/mterp/x86_64/op_int_to_double.S
@@ -1 +1,2 @@
-%include "x86_64/fpcvt.S" {"source_suffix":"i","dest_suffix":"dl","wide":"1"}
+%def op_int_to_double():
+% fpcvt(source_suffix="i", dest_suffix="dl", wide="1")
diff --git a/runtime/interpreter/mterp/x86_64/op_int_to_float.S b/runtime/interpreter/mterp/x86_64/op_int_to_float.S
index 5a98d44..b57fc84 100644
--- a/runtime/interpreter/mterp/x86_64/op_int_to_float.S
+++ b/runtime/interpreter/mterp/x86_64/op_int_to_float.S
@@ -1 +1,2 @@
-%include "x86_64/fpcvt.S" {"source_suffix":"i","dest_suffix":"sl","wide":"0"}
+%def op_int_to_float():
+% fpcvt(source_suffix="i", dest_suffix="sl", wide="0")
diff --git a/runtime/interpreter/mterp/x86_64/op_int_to_long.S b/runtime/interpreter/mterp/x86_64/op_int_to_long.S
index 9281137..473d6a2 100644
--- a/runtime/interpreter/mterp/x86_64/op_int_to_long.S
+++ b/runtime/interpreter/mterp/x86_64/op_int_to_long.S
@@ -1,3 +1,4 @@
+%def op_int_to_long():
/* int to long vA, vB */
movzbq rINSTbl, %rax # rax <- +A
sarl $$4, %eax # eax <- B
diff --git a/runtime/interpreter/mterp/x86_64/op_int_to_short.S b/runtime/interpreter/mterp/x86_64/op_int_to_short.S
index 6ae6b50..e4db90b 100644
--- a/runtime/interpreter/mterp/x86_64/op_int_to_short.S
+++ b/runtime/interpreter/mterp/x86_64/op_int_to_short.S
@@ -1 +1,2 @@
-%include "x86_64/unop.S" {"instr":"movswl %ax, %eax"}
+%def op_int_to_short():
+% unop(instr="movswl %ax, %eax")
diff --git a/runtime/interpreter/mterp/x86_64/op_invoke_custom.S b/runtime/interpreter/mterp/x86_64/op_invoke_custom.S
index f4011f6..4bba9ee 100644
--- a/runtime/interpreter/mterp/x86_64/op_invoke_custom.S
+++ b/runtime/interpreter/mterp/x86_64/op_invoke_custom.S
@@ -1 +1,2 @@
-%include "x86_64/invoke.S" { "helper":"MterpInvokeCustom" }
+%def op_invoke_custom():
+% invoke(helper="MterpInvokeCustom")
diff --git a/runtime/interpreter/mterp/x86_64/op_invoke_custom_range.S b/runtime/interpreter/mterp/x86_64/op_invoke_custom_range.S
index 94612c4..57e61af 100644
--- a/runtime/interpreter/mterp/x86_64/op_invoke_custom_range.S
+++ b/runtime/interpreter/mterp/x86_64/op_invoke_custom_range.S
@@ -1 +1,2 @@
-%include "x86_64/invoke.S" { "helper":"MterpInvokeCustomRange" }
+%def op_invoke_custom_range():
+% invoke(helper="MterpInvokeCustomRange")
diff --git a/runtime/interpreter/mterp/x86_64/op_invoke_direct.S b/runtime/interpreter/mterp/x86_64/op_invoke_direct.S
index 9628589..d3139cf 100644
--- a/runtime/interpreter/mterp/x86_64/op_invoke_direct.S
+++ b/runtime/interpreter/mterp/x86_64/op_invoke_direct.S
@@ -1 +1,2 @@
-%include "x86_64/invoke.S" { "helper":"MterpInvokeDirect" }
+%def op_invoke_direct():
+% invoke(helper="MterpInvokeDirect")
diff --git a/runtime/interpreter/mterp/x86_64/op_invoke_direct_range.S b/runtime/interpreter/mterp/x86_64/op_invoke_direct_range.S
index 09ac881..b4a161f 100644
--- a/runtime/interpreter/mterp/x86_64/op_invoke_direct_range.S
+++ b/runtime/interpreter/mterp/x86_64/op_invoke_direct_range.S
@@ -1 +1,2 @@
-%include "x86_64/invoke.S" { "helper":"MterpInvokeDirectRange" }
+%def op_invoke_direct_range():
+% invoke(helper="MterpInvokeDirectRange")
diff --git a/runtime/interpreter/mterp/x86_64/op_invoke_interface.S b/runtime/interpreter/mterp/x86_64/op_invoke_interface.S
index 76d9cd4..559b976 100644
--- a/runtime/interpreter/mterp/x86_64/op_invoke_interface.S
+++ b/runtime/interpreter/mterp/x86_64/op_invoke_interface.S
@@ -1,4 +1,5 @@
-%include "x86_64/invoke.S" { "helper":"MterpInvokeInterface" }
+%def op_invoke_interface():
+% invoke(helper="MterpInvokeInterface")
/*
* Handle an interface method call.
*
diff --git a/runtime/interpreter/mterp/x86_64/op_invoke_interface_range.S b/runtime/interpreter/mterp/x86_64/op_invoke_interface_range.S
index 785b43c..2989115 100644
--- a/runtime/interpreter/mterp/x86_64/op_invoke_interface_range.S
+++ b/runtime/interpreter/mterp/x86_64/op_invoke_interface_range.S
@@ -1 +1,2 @@
-%include "x86_64/invoke.S" { "helper":"MterpInvokeInterfaceRange" }
+%def op_invoke_interface_range():
+% invoke(helper="MterpInvokeInterfaceRange")
diff --git a/runtime/interpreter/mterp/x86_64/op_invoke_polymorphic.S b/runtime/interpreter/mterp/x86_64/op_invoke_polymorphic.S
index 4529445..ce61f5a 100644
--- a/runtime/interpreter/mterp/x86_64/op_invoke_polymorphic.S
+++ b/runtime/interpreter/mterp/x86_64/op_invoke_polymorphic.S
@@ -1 +1,2 @@
-%include "x86_64/invoke_polymorphic.S" { "helper":"MterpInvokePolymorphic" }
+%def op_invoke_polymorphic():
+% invoke_polymorphic(helper="MterpInvokePolymorphic")
diff --git a/runtime/interpreter/mterp/x86_64/op_invoke_polymorphic_range.S b/runtime/interpreter/mterp/x86_64/op_invoke_polymorphic_range.S
index 01981c1..16731bd 100644
--- a/runtime/interpreter/mterp/x86_64/op_invoke_polymorphic_range.S
+++ b/runtime/interpreter/mterp/x86_64/op_invoke_polymorphic_range.S
@@ -1 +1,2 @@
-%include "x86_64/invoke_polymorphic.S" { "helper":"MterpInvokePolymorphicRange" }
+%def op_invoke_polymorphic_range():
+% invoke_polymorphic(helper="MterpInvokePolymorphicRange")
diff --git a/runtime/interpreter/mterp/x86_64/op_invoke_static.S b/runtime/interpreter/mterp/x86_64/op_invoke_static.S
index dd8027d..3e38d36 100644
--- a/runtime/interpreter/mterp/x86_64/op_invoke_static.S
+++ b/runtime/interpreter/mterp/x86_64/op_invoke_static.S
@@ -1,2 +1,3 @@
-%include "x86_64/invoke.S" { "helper":"MterpInvokeStatic" }
+%def op_invoke_static():
+% invoke(helper="MterpInvokeStatic")
diff --git a/runtime/interpreter/mterp/x86_64/op_invoke_static_range.S b/runtime/interpreter/mterp/x86_64/op_invoke_static_range.S
index ee26074..e0a546c 100644
--- a/runtime/interpreter/mterp/x86_64/op_invoke_static_range.S
+++ b/runtime/interpreter/mterp/x86_64/op_invoke_static_range.S
@@ -1 +1,2 @@
-%include "x86_64/invoke.S" { "helper":"MterpInvokeStaticRange" }
+%def op_invoke_static_range():
+% invoke(helper="MterpInvokeStaticRange")
diff --git a/runtime/interpreter/mterp/x86_64/op_invoke_super.S b/runtime/interpreter/mterp/x86_64/op_invoke_super.S
index d07f8d5..5b20550 100644
--- a/runtime/interpreter/mterp/x86_64/op_invoke_super.S
+++ b/runtime/interpreter/mterp/x86_64/op_invoke_super.S
@@ -1,4 +1,5 @@
-%include "x86_64/invoke.S" { "helper":"MterpInvokeSuper" }
+%def op_invoke_super():
+% invoke(helper="MterpInvokeSuper")
/*
* Handle a "super" method call.
*
diff --git a/runtime/interpreter/mterp/x86_64/op_invoke_super_range.S b/runtime/interpreter/mterp/x86_64/op_invoke_super_range.S
index 7245cfd..caeafaa 100644
--- a/runtime/interpreter/mterp/x86_64/op_invoke_super_range.S
+++ b/runtime/interpreter/mterp/x86_64/op_invoke_super_range.S
@@ -1 +1,2 @@
-%include "x86_64/invoke.S" { "helper":"MterpInvokeSuperRange" }
+%def op_invoke_super_range():
+% invoke(helper="MterpInvokeSuperRange")
diff --git a/runtime/interpreter/mterp/x86_64/op_invoke_virtual.S b/runtime/interpreter/mterp/x86_64/op_invoke_virtual.S
index 19c708b..e27eeed 100644
--- a/runtime/interpreter/mterp/x86_64/op_invoke_virtual.S
+++ b/runtime/interpreter/mterp/x86_64/op_invoke_virtual.S
@@ -1,4 +1,5 @@
-%include "x86_64/invoke.S" { "helper":"MterpInvokeVirtual" }
+%def op_invoke_virtual():
+% invoke(helper="MterpInvokeVirtual")
/*
* Handle a virtual method call.
*
diff --git a/runtime/interpreter/mterp/x86_64/op_invoke_virtual_quick.S b/runtime/interpreter/mterp/x86_64/op_invoke_virtual_quick.S
index 313bd05..ea72c17 100644
--- a/runtime/interpreter/mterp/x86_64/op_invoke_virtual_quick.S
+++ b/runtime/interpreter/mterp/x86_64/op_invoke_virtual_quick.S
@@ -1 +1,2 @@
-%include "x86_64/invoke.S" { "helper":"MterpInvokeVirtualQuick" }
+%def op_invoke_virtual_quick():
+% invoke(helper="MterpInvokeVirtualQuick")
diff --git a/runtime/interpreter/mterp/x86_64/op_invoke_virtual_range.S b/runtime/interpreter/mterp/x86_64/op_invoke_virtual_range.S
index 424ad32..baa0779 100644
--- a/runtime/interpreter/mterp/x86_64/op_invoke_virtual_range.S
+++ b/runtime/interpreter/mterp/x86_64/op_invoke_virtual_range.S
@@ -1 +1,2 @@
-%include "x86_64/invoke.S" { "helper":"MterpInvokeVirtualRange" }
+%def op_invoke_virtual_range():
+% invoke(helper="MterpInvokeVirtualRange")
diff --git a/runtime/interpreter/mterp/x86_64/op_invoke_virtual_range_quick.S b/runtime/interpreter/mterp/x86_64/op_invoke_virtual_range_quick.S
index 556f718..1d961a0 100644
--- a/runtime/interpreter/mterp/x86_64/op_invoke_virtual_range_quick.S
+++ b/runtime/interpreter/mterp/x86_64/op_invoke_virtual_range_quick.S
@@ -1 +1,2 @@
-%include "x86_64/invoke.S" { "helper":"MterpInvokeVirtualQuickRange" }
+%def op_invoke_virtual_range_quick():
+% invoke(helper="MterpInvokeVirtualQuickRange")
diff --git a/runtime/interpreter/mterp/x86_64/op_iput.S b/runtime/interpreter/mterp/x86_64/op_iput.S
index dad5af6..e5351ba 100644
--- a/runtime/interpreter/mterp/x86_64/op_iput.S
+++ b/runtime/interpreter/mterp/x86_64/op_iput.S
@@ -1,2 +1,2 @@
-%default { "is_object":"0", "helper":"MterpIPutU32" }
-%include "x86_64/field.S" { }
+%def op_iput(is_object="0", helper="MterpIPutU32"):
+% field(helper=helper)
diff --git a/runtime/interpreter/mterp/x86_64/op_iput_boolean.S b/runtime/interpreter/mterp/x86_64/op_iput_boolean.S
index 06bbd70..9eb8498 100644
--- a/runtime/interpreter/mterp/x86_64/op_iput_boolean.S
+++ b/runtime/interpreter/mterp/x86_64/op_iput_boolean.S
@@ -1 +1,2 @@
-%include "x86_64/op_iput.S" { "helper":"MterpIPutU8" }
+%def op_iput_boolean():
+% op_iput(helper="MterpIPutU8")
diff --git a/runtime/interpreter/mterp/x86_64/op_iput_boolean_quick.S b/runtime/interpreter/mterp/x86_64/op_iput_boolean_quick.S
index 6bd060e..c304c76 100644
--- a/runtime/interpreter/mterp/x86_64/op_iput_boolean_quick.S
+++ b/runtime/interpreter/mterp/x86_64/op_iput_boolean_quick.S
@@ -1 +1,2 @@
-%include "x86_64/op_iput_quick.S" { "reg":"rINSTbl", "store":"movb" }
+%def op_iput_boolean_quick():
+% op_iput_quick(reg="rINSTbl", store="movb")
diff --git a/runtime/interpreter/mterp/x86_64/op_iput_byte.S b/runtime/interpreter/mterp/x86_64/op_iput_byte.S
index 53f9008..4b74f9f 100644
--- a/runtime/interpreter/mterp/x86_64/op_iput_byte.S
+++ b/runtime/interpreter/mterp/x86_64/op_iput_byte.S
@@ -1 +1,2 @@
-%include "x86_64/op_iput.S" { "helper":"MterpIPutI8" }
+%def op_iput_byte():
+% op_iput(helper="MterpIPutI8")
diff --git a/runtime/interpreter/mterp/x86_64/op_iput_byte_quick.S b/runtime/interpreter/mterp/x86_64/op_iput_byte_quick.S
index 6bd060e..dac18e6 100644
--- a/runtime/interpreter/mterp/x86_64/op_iput_byte_quick.S
+++ b/runtime/interpreter/mterp/x86_64/op_iput_byte_quick.S
@@ -1 +1,2 @@
-%include "x86_64/op_iput_quick.S" { "reg":"rINSTbl", "store":"movb" }
+%def op_iput_byte_quick():
+% op_iput_quick(reg="rINSTbl", store="movb")
diff --git a/runtime/interpreter/mterp/x86_64/op_iput_char.S b/runtime/interpreter/mterp/x86_64/op_iput_char.S
index 4736f5e..64a249f 100644
--- a/runtime/interpreter/mterp/x86_64/op_iput_char.S
+++ b/runtime/interpreter/mterp/x86_64/op_iput_char.S
@@ -1 +1,2 @@
-%include "x86_64/op_iput.S" { "helper":"MterpIPutU16" }
+%def op_iput_char():
+% op_iput(helper="MterpIPutU16")
diff --git a/runtime/interpreter/mterp/x86_64/op_iput_char_quick.S b/runtime/interpreter/mterp/x86_64/op_iput_char_quick.S
index 3da96d5..21a2581 100644
--- a/runtime/interpreter/mterp/x86_64/op_iput_char_quick.S
+++ b/runtime/interpreter/mterp/x86_64/op_iput_char_quick.S
@@ -1 +1,2 @@
-%include "x86_64/op_iput_quick.S" { "reg":"rINSTw", "store":"movw" }
+%def op_iput_char_quick():
+% op_iput_quick(reg="rINSTw", store="movw")
diff --git a/runtime/interpreter/mterp/x86_64/op_iput_object.S b/runtime/interpreter/mterp/x86_64/op_iput_object.S
index 202e33f..131edd5 100644
--- a/runtime/interpreter/mterp/x86_64/op_iput_object.S
+++ b/runtime/interpreter/mterp/x86_64/op_iput_object.S
@@ -1 +1,2 @@
-%include "x86_64/op_iput.S" { "is_object":"1", "helper":"MterpIPutObj" }
+%def op_iput_object():
+% op_iput(is_object="1", helper="MterpIPutObj")
diff --git a/runtime/interpreter/mterp/x86_64/op_iput_object_quick.S b/runtime/interpreter/mterp/x86_64/op_iput_object_quick.S
index b5b128a..e41540d 100644
--- a/runtime/interpreter/mterp/x86_64/op_iput_object_quick.S
+++ b/runtime/interpreter/mterp/x86_64/op_iput_object_quick.S
@@ -1,3 +1,4 @@
+%def op_iput_object_quick():
EXPORT_PC
leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG0
movq rPC, OUT_ARG1
diff --git a/runtime/interpreter/mterp/x86_64/op_iput_quick.S b/runtime/interpreter/mterp/x86_64/op_iput_quick.S
index ecaf98e..3cbb7e9 100644
--- a/runtime/interpreter/mterp/x86_64/op_iput_quick.S
+++ b/runtime/interpreter/mterp/x86_64/op_iput_quick.S
@@ -1,4 +1,4 @@
-%default { "reg":"rINST", "store":"movl" }
+%def op_iput_quick(reg="rINST", store="movl"):
/* For: iput-quick, iput-object-quick */
/* op vA, vB, offset@CCCC */
movzbq rINSTbl, %rcx # rcx <- BA
diff --git a/runtime/interpreter/mterp/x86_64/op_iput_short.S b/runtime/interpreter/mterp/x86_64/op_iput_short.S
index dca5735..e631a3b 100644
--- a/runtime/interpreter/mterp/x86_64/op_iput_short.S
+++ b/runtime/interpreter/mterp/x86_64/op_iput_short.S
@@ -1 +1,2 @@
-%include "x86_64/op_iput.S" { "helper":"MterpIPutI16" }
+%def op_iput_short():
+% op_iput(helper="MterpIPutI16")
diff --git a/runtime/interpreter/mterp/x86_64/op_iput_short_quick.S b/runtime/interpreter/mterp/x86_64/op_iput_short_quick.S
index 3da96d5..5eb28d6 100644
--- a/runtime/interpreter/mterp/x86_64/op_iput_short_quick.S
+++ b/runtime/interpreter/mterp/x86_64/op_iput_short_quick.S
@@ -1 +1,2 @@
-%include "x86_64/op_iput_quick.S" { "reg":"rINSTw", "store":"movw" }
+%def op_iput_short_quick():
+% op_iput_quick(reg="rINSTw", store="movw")
diff --git a/runtime/interpreter/mterp/x86_64/op_iput_wide.S b/runtime/interpreter/mterp/x86_64/op_iput_wide.S
index db52016..2f34fd3 100644
--- a/runtime/interpreter/mterp/x86_64/op_iput_wide.S
+++ b/runtime/interpreter/mterp/x86_64/op_iput_wide.S
@@ -1 +1,2 @@
-%include "x86_64/op_iput.S" { "helper":"MterpIPutU64" }
+%def op_iput_wide():
+% op_iput(helper="MterpIPutU64")
diff --git a/runtime/interpreter/mterp/x86_64/op_iput_wide_quick.S b/runtime/interpreter/mterp/x86_64/op_iput_wide_quick.S
index 473189d..a13a634 100644
--- a/runtime/interpreter/mterp/x86_64/op_iput_wide_quick.S
+++ b/runtime/interpreter/mterp/x86_64/op_iput_wide_quick.S
@@ -1,3 +1,4 @@
+%def op_iput_wide_quick():
/* iput-wide-quick vA, vB, offset@CCCC */
movzbq rINSTbl, %rcx # rcx<- BA
sarl $$4, %ecx # ecx<- B
diff --git a/runtime/interpreter/mterp/x86_64/op_long_to_double.S b/runtime/interpreter/mterp/x86_64/op_long_to_double.S
index 7cdae32..6b2d7bf 100644
--- a/runtime/interpreter/mterp/x86_64/op_long_to_double.S
+++ b/runtime/interpreter/mterp/x86_64/op_long_to_double.S
@@ -1 +1,2 @@
-%include "x86_64/fpcvt.S" {"source_suffix":"i","dest_suffix":"dq","wide":"1"}
+%def op_long_to_double():
+% fpcvt(source_suffix="i", dest_suffix="dq", wide="1")
diff --git a/runtime/interpreter/mterp/x86_64/op_long_to_float.S b/runtime/interpreter/mterp/x86_64/op_long_to_float.S
index 7553348..7c2edfd 100644
--- a/runtime/interpreter/mterp/x86_64/op_long_to_float.S
+++ b/runtime/interpreter/mterp/x86_64/op_long_to_float.S
@@ -1 +1,2 @@
-%include "x86_64/fpcvt.S" {"source_suffix":"i","dest_suffix":"sq","wide":"0"}
+%def op_long_to_float():
+% fpcvt(source_suffix="i", dest_suffix="sq", wide="0")
diff --git a/runtime/interpreter/mterp/x86_64/op_long_to_int.S b/runtime/interpreter/mterp/x86_64/op_long_to_int.S
index 7b50c8e..eacb8f5 100644
--- a/runtime/interpreter/mterp/x86_64/op_long_to_int.S
+++ b/runtime/interpreter/mterp/x86_64/op_long_to_int.S
@@ -1,2 +1,3 @@
+%def op_long_to_int():
/* we ignore the high word, making this equivalent to a 32-bit reg move */
-%include "x86_64/op_move.S"
+% op_move()
diff --git a/runtime/interpreter/mterp/x86_64/op_monitor_enter.S b/runtime/interpreter/mterp/x86_64/op_monitor_enter.S
index 411091f..7865156 100644
--- a/runtime/interpreter/mterp/x86_64/op_monitor_enter.S
+++ b/runtime/interpreter/mterp/x86_64/op_monitor_enter.S
@@ -1,3 +1,4 @@
+%def op_monitor_enter():
/*
* Synchronize on an object.
*/
diff --git a/runtime/interpreter/mterp/x86_64/op_monitor_exit.S b/runtime/interpreter/mterp/x86_64/op_monitor_exit.S
index 72d9a23..6422bc8 100644
--- a/runtime/interpreter/mterp/x86_64/op_monitor_exit.S
+++ b/runtime/interpreter/mterp/x86_64/op_monitor_exit.S
@@ -1,3 +1,4 @@
+%def op_monitor_exit():
/*
* Unlock an object.
*
diff --git a/runtime/interpreter/mterp/x86_64/op_move.S b/runtime/interpreter/mterp/x86_64/op_move.S
index ccaac2c..0ccf228 100644
--- a/runtime/interpreter/mterp/x86_64/op_move.S
+++ b/runtime/interpreter/mterp/x86_64/op_move.S
@@ -1,4 +1,4 @@
-%default { "is_object":"0" }
+%def op_move(is_object="0"):
/* for move, move-object, long-to-int */
/* op vA, vB */
movl rINST, %eax # eax <- BA
diff --git a/runtime/interpreter/mterp/x86_64/op_move_16.S b/runtime/interpreter/mterp/x86_64/op_move_16.S
index 6a813eb..238f089 100644
--- a/runtime/interpreter/mterp/x86_64/op_move_16.S
+++ b/runtime/interpreter/mterp/x86_64/op_move_16.S
@@ -1,4 +1,4 @@
-%default { "is_object":"0" }
+%def op_move_16(is_object="0"):
/* for: move/16, move-object/16 */
/* op vAAAA, vBBBB */
movzwq 4(rPC), %rcx # ecx <- BBBB
diff --git a/runtime/interpreter/mterp/x86_64/op_move_exception.S b/runtime/interpreter/mterp/x86_64/op_move_exception.S
index 33db878..9d87f7c 100644
--- a/runtime/interpreter/mterp/x86_64/op_move_exception.S
+++ b/runtime/interpreter/mterp/x86_64/op_move_exception.S
@@ -1,3 +1,4 @@
+%def op_move_exception():
/* move-exception vAA */
movq rSELF, %rcx
movl THREAD_EXCEPTION_OFFSET(%rcx), %eax
diff --git a/runtime/interpreter/mterp/x86_64/op_move_from16.S b/runtime/interpreter/mterp/x86_64/op_move_from16.S
index 150e9c2..6163e6d 100644
--- a/runtime/interpreter/mterp/x86_64/op_move_from16.S
+++ b/runtime/interpreter/mterp/x86_64/op_move_from16.S
@@ -1,4 +1,4 @@
-%default { "is_object":"0" }
+%def op_move_from16(is_object="0"):
/* for: move/from16, move-object/from16 */
/* op vAA, vBBBB */
movzwq 2(rPC), %rax # eax <- BBBB
diff --git a/runtime/interpreter/mterp/x86_64/op_move_object.S b/runtime/interpreter/mterp/x86_64/op_move_object.S
index 0d86649..dbb4d59 100644
--- a/runtime/interpreter/mterp/x86_64/op_move_object.S
+++ b/runtime/interpreter/mterp/x86_64/op_move_object.S
@@ -1 +1,2 @@
-%include "x86_64/op_move.S" {"is_object":"1"}
+%def op_move_object():
+% op_move(is_object="1")
diff --git a/runtime/interpreter/mterp/x86_64/op_move_object_16.S b/runtime/interpreter/mterp/x86_64/op_move_object_16.S
index 32541ff..4012037 100644
--- a/runtime/interpreter/mterp/x86_64/op_move_object_16.S
+++ b/runtime/interpreter/mterp/x86_64/op_move_object_16.S
@@ -1 +1,2 @@
-%include "x86_64/op_move_16.S" {"is_object":"1"}
+%def op_move_object_16():
+% op_move_16(is_object="1")
diff --git a/runtime/interpreter/mterp/x86_64/op_move_object_from16.S b/runtime/interpreter/mterp/x86_64/op_move_object_from16.S
index 983e4ab..c82698e 100644
--- a/runtime/interpreter/mterp/x86_64/op_move_object_from16.S
+++ b/runtime/interpreter/mterp/x86_64/op_move_object_from16.S
@@ -1 +1,2 @@
-%include "x86_64/op_move_from16.S" {"is_object":"1"}
+%def op_move_object_from16():
+% op_move_from16(is_object="1")
diff --git a/runtime/interpreter/mterp/x86_64/op_move_result.S b/runtime/interpreter/mterp/x86_64/op_move_result.S
index 8268344..a089623 100644
--- a/runtime/interpreter/mterp/x86_64/op_move_result.S
+++ b/runtime/interpreter/mterp/x86_64/op_move_result.S
@@ -1,4 +1,4 @@
-%default { "is_object":"0" }
+%def op_move_result(is_object="0"):
/* for: move-result, move-result-object */
/* op vAA */
movq OFF_FP_RESULT_REGISTER(rFP), %rax # get pointer to result JType.
diff --git a/runtime/interpreter/mterp/x86_64/op_move_result_object.S b/runtime/interpreter/mterp/x86_64/op_move_result_object.S
index c5aac17..87aea26 100644
--- a/runtime/interpreter/mterp/x86_64/op_move_result_object.S
+++ b/runtime/interpreter/mterp/x86_64/op_move_result_object.S
@@ -1 +1,2 @@
-%include "x86_64/op_move_result.S" {"is_object":"1"}
+%def op_move_result_object():
+% op_move_result(is_object="1")
diff --git a/runtime/interpreter/mterp/x86_64/op_move_result_wide.S b/runtime/interpreter/mterp/x86_64/op_move_result_wide.S
index 03de783..80f49aa 100644
--- a/runtime/interpreter/mterp/x86_64/op_move_result_wide.S
+++ b/runtime/interpreter/mterp/x86_64/op_move_result_wide.S
@@ -1,3 +1,4 @@
+%def op_move_result_wide():
/* move-result-wide vAA */
movq OFF_FP_RESULT_REGISTER(rFP), %rax # get pointer to result JType.
movq (%rax), %rdx # Get wide
diff --git a/runtime/interpreter/mterp/x86_64/op_move_wide.S b/runtime/interpreter/mterp/x86_64/op_move_wide.S
index 508f8cc..afb67ef 100644
--- a/runtime/interpreter/mterp/x86_64/op_move_wide.S
+++ b/runtime/interpreter/mterp/x86_64/op_move_wide.S
@@ -1,3 +1,4 @@
+%def op_move_wide():
/* move-wide vA, vB */
/* NOTE: regs can overlap, e.g. "move v6,v7" or "move v7,v6" */
movl rINST, %ecx # ecx <- BA
diff --git a/runtime/interpreter/mterp/x86_64/op_move_wide_16.S b/runtime/interpreter/mterp/x86_64/op_move_wide_16.S
index ce371a9..b4de520 100644
--- a/runtime/interpreter/mterp/x86_64/op_move_wide_16.S
+++ b/runtime/interpreter/mterp/x86_64/op_move_wide_16.S
@@ -1,3 +1,4 @@
+%def op_move_wide_16():
/* move-wide/16 vAAAA, vBBBB */
/* NOTE: regs can overlap, e.g. "move v6,v7" or "move v7,v6" */
movzwq 4(rPC), %rcx # ecx<- BBBB
diff --git a/runtime/interpreter/mterp/x86_64/op_move_wide_from16.S b/runtime/interpreter/mterp/x86_64/op_move_wide_from16.S
index 0d6971a..c4389a4 100644
--- a/runtime/interpreter/mterp/x86_64/op_move_wide_from16.S
+++ b/runtime/interpreter/mterp/x86_64/op_move_wide_from16.S
@@ -1,3 +1,4 @@
+%def op_move_wide_from16():
/* move-wide/from16 vAA, vBBBB */
/* NOTE: regs can overlap, e.g. "move v6,v7" or "move v7,v6" */
movzwl 2(rPC), %ecx # ecx <- BBBB
diff --git a/runtime/interpreter/mterp/x86_64/op_mul_double.S b/runtime/interpreter/mterp/x86_64/op_mul_double.S
index 1f4bcb3..5353028 100644
--- a/runtime/interpreter/mterp/x86_64/op_mul_double.S
+++ b/runtime/interpreter/mterp/x86_64/op_mul_double.S
@@ -1 +1,2 @@
-%include "x86_64/sseBinop.S" {"instr":"muls","suff":"d"}
+%def op_mul_double():
+% sseBinop(instr="muls", suff="d")
diff --git a/runtime/interpreter/mterp/x86_64/op_mul_double_2addr.S b/runtime/interpreter/mterp/x86_64/op_mul_double_2addr.S
index 9850a28..7a6dcd0 100644
--- a/runtime/interpreter/mterp/x86_64/op_mul_double_2addr.S
+++ b/runtime/interpreter/mterp/x86_64/op_mul_double_2addr.S
@@ -1 +1,2 @@
-%include "x86_64/sseBinop2Addr.S" {"instr":"muls","suff":"d"}
+%def op_mul_double_2addr():
+% sseBinop2Addr(instr="muls", suff="d")
diff --git a/runtime/interpreter/mterp/x86_64/op_mul_float.S b/runtime/interpreter/mterp/x86_64/op_mul_float.S
index 85960e9..b9eeeee 100644
--- a/runtime/interpreter/mterp/x86_64/op_mul_float.S
+++ b/runtime/interpreter/mterp/x86_64/op_mul_float.S
@@ -1 +1,2 @@
-%include "x86_64/sseBinop.S" {"instr":"muls","suff":"s"}
+%def op_mul_float():
+% sseBinop(instr="muls", suff="s")
diff --git a/runtime/interpreter/mterp/x86_64/op_mul_float_2addr.S b/runtime/interpreter/mterp/x86_64/op_mul_float_2addr.S
index 6d36b6a..949af7b 100644
--- a/runtime/interpreter/mterp/x86_64/op_mul_float_2addr.S
+++ b/runtime/interpreter/mterp/x86_64/op_mul_float_2addr.S
@@ -1 +1,2 @@
-%include "x86_64/sseBinop2Addr.S" {"instr":"muls","suff":"s"}
+%def op_mul_float_2addr():
+% sseBinop2Addr(instr="muls", suff="s")
diff --git a/runtime/interpreter/mterp/x86_64/op_mul_int.S b/runtime/interpreter/mterp/x86_64/op_mul_int.S
index 5f3923a..51abae6 100644
--- a/runtime/interpreter/mterp/x86_64/op_mul_int.S
+++ b/runtime/interpreter/mterp/x86_64/op_mul_int.S
@@ -1 +1,2 @@
-%include "x86_64/binop.S" {"instr":"imull (rFP,%rcx,4), %eax"}
+%def op_mul_int():
+% binop(instr="imull (rFP,%rcx,4), %eax")
diff --git a/runtime/interpreter/mterp/x86_64/op_mul_int_2addr.S b/runtime/interpreter/mterp/x86_64/op_mul_int_2addr.S
index 0b5af8a..fb2ec89 100644
--- a/runtime/interpreter/mterp/x86_64/op_mul_int_2addr.S
+++ b/runtime/interpreter/mterp/x86_64/op_mul_int_2addr.S
@@ -1,3 +1,4 @@
+%def op_mul_int_2addr():
/* mul vA, vB */
movl rINST, %ecx # rcx <- A+
sarl $$4, rINST # rINST <- B
diff --git a/runtime/interpreter/mterp/x86_64/op_mul_int_lit16.S b/runtime/interpreter/mterp/x86_64/op_mul_int_lit16.S
index a4cfdbc..a0b1e71 100644
--- a/runtime/interpreter/mterp/x86_64/op_mul_int_lit16.S
+++ b/runtime/interpreter/mterp/x86_64/op_mul_int_lit16.S
@@ -1 +1,2 @@
-%include "x86_64/binopLit16.S" {"instr":"imull %ecx, %eax"}
+%def op_mul_int_lit16():
+% binopLit16(instr="imull %ecx, %eax")
diff --git a/runtime/interpreter/mterp/x86_64/op_mul_int_lit8.S b/runtime/interpreter/mterp/x86_64/op_mul_int_lit8.S
index 89e9acb..e68e7f7 100644
--- a/runtime/interpreter/mterp/x86_64/op_mul_int_lit8.S
+++ b/runtime/interpreter/mterp/x86_64/op_mul_int_lit8.S
@@ -1 +1,2 @@
-%include "x86_64/binopLit8.S" {"instr":"imull %ecx, %eax"}
+%def op_mul_int_lit8():
+% binopLit8(instr="imull %ecx, %eax")
diff --git a/runtime/interpreter/mterp/x86_64/op_mul_long.S b/runtime/interpreter/mterp/x86_64/op_mul_long.S
index 2b85370..e5bffa4 100644
--- a/runtime/interpreter/mterp/x86_64/op_mul_long.S
+++ b/runtime/interpreter/mterp/x86_64/op_mul_long.S
@@ -1 +1,2 @@
-%include "x86_64/binopWide.S" {"instr":"imulq (rFP,%rcx,4), %rax"}
+%def op_mul_long():
+% binopWide(instr="imulq (rFP,%rcx,4), %rax")
diff --git a/runtime/interpreter/mterp/x86_64/op_mul_long_2addr.S b/runtime/interpreter/mterp/x86_64/op_mul_long_2addr.S
index 167128b..25ffc14 100644
--- a/runtime/interpreter/mterp/x86_64/op_mul_long_2addr.S
+++ b/runtime/interpreter/mterp/x86_64/op_mul_long_2addr.S
@@ -1,3 +1,4 @@
+%def op_mul_long_2addr():
/* mul vA, vB */
movl rINST, %ecx # rcx <- A+
sarl $$4, rINST # rINST <- B
diff --git a/runtime/interpreter/mterp/x86_64/op_neg_double.S b/runtime/interpreter/mterp/x86_64/op_neg_double.S
index 2c14b09..56e3804 100644
--- a/runtime/interpreter/mterp/x86_64/op_neg_double.S
+++ b/runtime/interpreter/mterp/x86_64/op_neg_double.S
@@ -1 +1,2 @@
-%include "x86_64/unop.S" {"preinstr":" movq $0x8000000000000000, %rsi", "instr":" xorq %rsi, %rax", "wide":"1"}
+%def op_neg_double():
+% unop(preinstr=" movq $0x8000000000000000, %rsi", instr=" xorq %rsi, %rax", wide="1")
diff --git a/runtime/interpreter/mterp/x86_64/op_neg_float.S b/runtime/interpreter/mterp/x86_64/op_neg_float.S
index 148b21e..6a39444 100644
--- a/runtime/interpreter/mterp/x86_64/op_neg_float.S
+++ b/runtime/interpreter/mterp/x86_64/op_neg_float.S
@@ -1 +1,2 @@
-%include "x86_64/unop.S" {"instr":" xorl $0x80000000, %eax"}
+%def op_neg_float():
+% unop(instr=" xorl $0x80000000, %eax")
diff --git a/runtime/interpreter/mterp/x86_64/op_neg_int.S b/runtime/interpreter/mterp/x86_64/op_neg_int.S
index f90a937..44790ed 100644
--- a/runtime/interpreter/mterp/x86_64/op_neg_int.S
+++ b/runtime/interpreter/mterp/x86_64/op_neg_int.S
@@ -1 +1,2 @@
-%include "x86_64/unop.S" {"instr":" negl %eax"}
+%def op_neg_int():
+% unop(instr=" negl %eax")
diff --git a/runtime/interpreter/mterp/x86_64/op_neg_long.S b/runtime/interpreter/mterp/x86_64/op_neg_long.S
index 18fc3cc..2d296ee 100644
--- a/runtime/interpreter/mterp/x86_64/op_neg_long.S
+++ b/runtime/interpreter/mterp/x86_64/op_neg_long.S
@@ -1 +1,2 @@
-%include "x86_64/unop.S" {"instr":" negq %rax", "wide":"1"}
+%def op_neg_long():
+% unop(instr=" negq %rax", wide="1")
diff --git a/runtime/interpreter/mterp/x86_64/op_new_array.S b/runtime/interpreter/mterp/x86_64/op_new_array.S
index 9831a0b..de1b001 100644
--- a/runtime/interpreter/mterp/x86_64/op_new_array.S
+++ b/runtime/interpreter/mterp/x86_64/op_new_array.S
@@ -1,3 +1,4 @@
+%def op_new_array():
/*
* Allocate an array of objects, specified with the array class
* and a count.
diff --git a/runtime/interpreter/mterp/x86_64/op_new_instance.S b/runtime/interpreter/mterp/x86_64/op_new_instance.S
index fc8c8cd..cc3f31c 100644
--- a/runtime/interpreter/mterp/x86_64/op_new_instance.S
+++ b/runtime/interpreter/mterp/x86_64/op_new_instance.S
@@ -1,3 +1,4 @@
+%def op_new_instance():
/*
* Create a new instance of a class.
*/
diff --git a/runtime/interpreter/mterp/x86_64/op_nop.S b/runtime/interpreter/mterp/x86_64/op_nop.S
index 4cb68e3..aa4a843 100644
--- a/runtime/interpreter/mterp/x86_64/op_nop.S
+++ b/runtime/interpreter/mterp/x86_64/op_nop.S
@@ -1 +1,2 @@
+%def op_nop():
ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
diff --git a/runtime/interpreter/mterp/x86_64/op_not_int.S b/runtime/interpreter/mterp/x86_64/op_not_int.S
index 463d080..55ac8a7 100644
--- a/runtime/interpreter/mterp/x86_64/op_not_int.S
+++ b/runtime/interpreter/mterp/x86_64/op_not_int.S
@@ -1 +1,2 @@
-%include "x86_64/unop.S" {"instr":" notl %eax"}
+%def op_not_int():
+% unop(instr=" notl %eax")
diff --git a/runtime/interpreter/mterp/x86_64/op_not_long.S b/runtime/interpreter/mterp/x86_64/op_not_long.S
index c97bb9e..c6c0f85 100644
--- a/runtime/interpreter/mterp/x86_64/op_not_long.S
+++ b/runtime/interpreter/mterp/x86_64/op_not_long.S
@@ -1 +1,2 @@
-%include "x86_64/unop.S" {"instr":" notq %rax", "wide":"1"}
+%def op_not_long():
+% unop(instr=" notq %rax", wide="1")
diff --git a/runtime/interpreter/mterp/x86_64/op_or_int.S b/runtime/interpreter/mterp/x86_64/op_or_int.S
index 730310f..0e6dd67 100644
--- a/runtime/interpreter/mterp/x86_64/op_or_int.S
+++ b/runtime/interpreter/mterp/x86_64/op_or_int.S
@@ -1 +1,2 @@
-%include "x86_64/binop.S" {"instr":"orl (rFP,%rcx,4), %eax"}
+%def op_or_int():
+% binop(instr="orl (rFP,%rcx,4), %eax")
diff --git a/runtime/interpreter/mterp/x86_64/op_or_int_2addr.S b/runtime/interpreter/mterp/x86_64/op_or_int_2addr.S
index f722e4d..c722938 100644
--- a/runtime/interpreter/mterp/x86_64/op_or_int_2addr.S
+++ b/runtime/interpreter/mterp/x86_64/op_or_int_2addr.S
@@ -1 +1,2 @@
-%include "x86_64/binop2addr.S" {"instr":"orl %eax, (rFP,%rcx,4)"}
+%def op_or_int_2addr():
+% binop2addr(instr="orl %eax, (rFP,%rcx,4)")
diff --git a/runtime/interpreter/mterp/x86_64/op_or_int_lit16.S b/runtime/interpreter/mterp/x86_64/op_or_int_lit16.S
index fee86c7..ba9b6bf 100644
--- a/runtime/interpreter/mterp/x86_64/op_or_int_lit16.S
+++ b/runtime/interpreter/mterp/x86_64/op_or_int_lit16.S
@@ -1 +1,2 @@
-%include "x86_64/binopLit16.S" {"instr":"orl %ecx, %eax"}
+%def op_or_int_lit16():
+% binopLit16(instr="orl %ecx, %eax")
diff --git a/runtime/interpreter/mterp/x86_64/op_or_int_lit8.S b/runtime/interpreter/mterp/x86_64/op_or_int_lit8.S
index 81104c7..758109b 100644
--- a/runtime/interpreter/mterp/x86_64/op_or_int_lit8.S
+++ b/runtime/interpreter/mterp/x86_64/op_or_int_lit8.S
@@ -1 +1,2 @@
-%include "x86_64/binopLit8.S" {"instr":"orl %ecx, %eax"}
+%def op_or_int_lit8():
+% binopLit8(instr="orl %ecx, %eax")
diff --git a/runtime/interpreter/mterp/x86_64/op_or_long.S b/runtime/interpreter/mterp/x86_64/op_or_long.S
index 6c70a20..b9c9321 100644
--- a/runtime/interpreter/mterp/x86_64/op_or_long.S
+++ b/runtime/interpreter/mterp/x86_64/op_or_long.S
@@ -1 +1,2 @@
-%include "x86_64/binopWide.S" {"instr":"orq (rFP,%rcx,4), %rax"}
+%def op_or_long():
+% binopWide(instr="orq (rFP,%rcx,4), %rax")
diff --git a/runtime/interpreter/mterp/x86_64/op_or_long_2addr.S b/runtime/interpreter/mterp/x86_64/op_or_long_2addr.S
index 546da1d..616288e 100644
--- a/runtime/interpreter/mterp/x86_64/op_or_long_2addr.S
+++ b/runtime/interpreter/mterp/x86_64/op_or_long_2addr.S
@@ -1 +1,2 @@
-%include "x86_64/binopWide2addr.S" {"instr":"orq %rax, (rFP,%rcx,4)"}
+%def op_or_long_2addr():
+% binopWide2addr(instr="orq %rax, (rFP,%rcx,4)")
diff --git a/runtime/interpreter/mterp/x86_64/op_packed_switch.S b/runtime/interpreter/mterp/x86_64/op_packed_switch.S
index 148552f..8b2b18b 100644
--- a/runtime/interpreter/mterp/x86_64/op_packed_switch.S
+++ b/runtime/interpreter/mterp/x86_64/op_packed_switch.S
@@ -1,4 +1,4 @@
-%default { "func":"MterpDoPackedSwitch" }
+%def op_packed_switch(func="MterpDoPackedSwitch"):
/*
* Handle a packed-switch or sparse-switch instruction. In both cases
* we decode it and hand it off to a helper function.
diff --git a/runtime/interpreter/mterp/x86_64/op_rem_double.S b/runtime/interpreter/mterp/x86_64/op_rem_double.S
index 00aed78..9b1c0b4 100644
--- a/runtime/interpreter/mterp/x86_64/op_rem_double.S
+++ b/runtime/interpreter/mterp/x86_64/op_rem_double.S
@@ -1,3 +1,4 @@
+%def op_rem_double():
/* rem_double vAA, vBB, vCC */
movzbq 3(rPC), %rcx # ecx <- BB
movzbq 2(rPC), %rax # eax <- CC
diff --git a/runtime/interpreter/mterp/x86_64/op_rem_double_2addr.S b/runtime/interpreter/mterp/x86_64/op_rem_double_2addr.S
index 9768266..0600e90 100644
--- a/runtime/interpreter/mterp/x86_64/op_rem_double_2addr.S
+++ b/runtime/interpreter/mterp/x86_64/op_rem_double_2addr.S
@@ -1,3 +1,4 @@
+%def op_rem_double_2addr():
/* rem_double/2addr vA, vB */
movzbq rINSTbl, %rcx # ecx <- A+
sarl $$4, rINST # rINST <- B
diff --git a/runtime/interpreter/mterp/x86_64/op_rem_float.S b/runtime/interpreter/mterp/x86_64/op_rem_float.S
index 5af28ac..28c1328 100644
--- a/runtime/interpreter/mterp/x86_64/op_rem_float.S
+++ b/runtime/interpreter/mterp/x86_64/op_rem_float.S
@@ -1,3 +1,4 @@
+%def op_rem_float():
/* rem_float vAA, vBB, vCC */
movzbq 3(rPC), %rcx # ecx <- BB
movzbq 2(rPC), %rax # eax <- CC
diff --git a/runtime/interpreter/mterp/x86_64/op_rem_float_2addr.S b/runtime/interpreter/mterp/x86_64/op_rem_float_2addr.S
index e9282a8..8cfdca0 100644
--- a/runtime/interpreter/mterp/x86_64/op_rem_float_2addr.S
+++ b/runtime/interpreter/mterp/x86_64/op_rem_float_2addr.S
@@ -1,3 +1,4 @@
+%def op_rem_float_2addr():
/* rem_float/2addr vA, vB */
movzbq rINSTbl, %rcx # ecx <- A+
sarl $$4, rINST # rINST <- B
diff --git a/runtime/interpreter/mterp/x86_64/op_rem_int.S b/runtime/interpreter/mterp/x86_64/op_rem_int.S
index fd77d7c..1530f5f 100644
--- a/runtime/interpreter/mterp/x86_64/op_rem_int.S
+++ b/runtime/interpreter/mterp/x86_64/op_rem_int.S
@@ -1 +1,2 @@
-%include "x86_64/bindiv.S" {"result":"%edx","second":"%ecx","wide":"0","suffix":"l","rem":"1"}
+%def op_rem_int():
+% bindiv(result="%edx", second="%ecx", wide="0", suffix="l", rem="1")
diff --git a/runtime/interpreter/mterp/x86_64/op_rem_int_2addr.S b/runtime/interpreter/mterp/x86_64/op_rem_int_2addr.S
index 25ffbf7..742213a 100644
--- a/runtime/interpreter/mterp/x86_64/op_rem_int_2addr.S
+++ b/runtime/interpreter/mterp/x86_64/op_rem_int_2addr.S
@@ -1 +1,2 @@
-%include "x86_64/bindiv2addr.S" {"result":"%edx","second":"%ecx","wide":"0","suffix":"l","rem":"1"}
+%def op_rem_int_2addr():
+% bindiv2addr(result="%edx", second="%ecx", wide="0", suffix="l", rem="1")
diff --git a/runtime/interpreter/mterp/x86_64/op_rem_int_lit16.S b/runtime/interpreter/mterp/x86_64/op_rem_int_lit16.S
index 21cc370..eaa44a4 100644
--- a/runtime/interpreter/mterp/x86_64/op_rem_int_lit16.S
+++ b/runtime/interpreter/mterp/x86_64/op_rem_int_lit16.S
@@ -1 +1,2 @@
-%include "x86_64/bindivLit16.S" {"result":"%edx","rem":"1"}
+%def op_rem_int_lit16():
+% bindivLit16(result="%edx", rem="1")
diff --git a/runtime/interpreter/mterp/x86_64/op_rem_int_lit8.S b/runtime/interpreter/mterp/x86_64/op_rem_int_lit8.S
index 2eb0150..3fef144 100644
--- a/runtime/interpreter/mterp/x86_64/op_rem_int_lit8.S
+++ b/runtime/interpreter/mterp/x86_64/op_rem_int_lit8.S
@@ -1 +1,2 @@
-%include "x86_64/bindivLit8.S" {"result":"%edx","rem":"1"}
+%def op_rem_int_lit8():
+% bindivLit8(result="%edx", rem="1")
diff --git a/runtime/interpreter/mterp/x86_64/op_rem_long.S b/runtime/interpreter/mterp/x86_64/op_rem_long.S
index efa7215..60bfd3d 100644
--- a/runtime/interpreter/mterp/x86_64/op_rem_long.S
+++ b/runtime/interpreter/mterp/x86_64/op_rem_long.S
@@ -1 +1,2 @@
-%include "x86_64/bindiv.S" {"result":"%rdx","second":"%rcx","wide":"1","suffix":"q","ext":"cqo","rem":"1"}
+%def op_rem_long():
+% bindiv(result="%rdx", second="%rcx", wide="1", suffix="q", ext="cqo", rem="1")
diff --git a/runtime/interpreter/mterp/x86_64/op_rem_long_2addr.S b/runtime/interpreter/mterp/x86_64/op_rem_long_2addr.S
index ce0dd86..fc5a2d0 100644
--- a/runtime/interpreter/mterp/x86_64/op_rem_long_2addr.S
+++ b/runtime/interpreter/mterp/x86_64/op_rem_long_2addr.S
@@ -1 +1,2 @@
-%include "x86_64/bindiv2addr.S" {"result":"%rdx","second":"%rcx","wide":"1","suffix":"q","rem":"1","ext":"cqo"}
+%def op_rem_long_2addr():
+% bindiv2addr(result="%rdx", second="%rcx", wide="1", suffix="q", rem="1", ext="cqo")
diff --git a/runtime/interpreter/mterp/x86_64/op_return.S b/runtime/interpreter/mterp/x86_64/op_return.S
index 8cb6cba..b838f18 100644
--- a/runtime/interpreter/mterp/x86_64/op_return.S
+++ b/runtime/interpreter/mterp/x86_64/op_return.S
@@ -1,3 +1,4 @@
+%def op_return():
/*
* Return a 32-bit value.
*
diff --git a/runtime/interpreter/mterp/x86_64/op_return_object.S b/runtime/interpreter/mterp/x86_64/op_return_object.S
index 1ae69a5..2eeec0b 100644
--- a/runtime/interpreter/mterp/x86_64/op_return_object.S
+++ b/runtime/interpreter/mterp/x86_64/op_return_object.S
@@ -1 +1,2 @@
-%include "x86_64/op_return.S"
+%def op_return_object():
+% op_return()
diff --git a/runtime/interpreter/mterp/x86_64/op_return_void.S b/runtime/interpreter/mterp/x86_64/op_return_void.S
index ba68e7e..301dc92 100644
--- a/runtime/interpreter/mterp/x86_64/op_return_void.S
+++ b/runtime/interpreter/mterp/x86_64/op_return_void.S
@@ -1,3 +1,4 @@
+%def op_return_void():
.extern MterpThreadFenceForConstructor
call SYMBOL(MterpThreadFenceForConstructor)
movq rSELF, OUT_ARG0
diff --git a/runtime/interpreter/mterp/x86_64/op_return_void_no_barrier.S b/runtime/interpreter/mterp/x86_64/op_return_void_no_barrier.S
index 6799da1..cec739c 100644
--- a/runtime/interpreter/mterp/x86_64/op_return_void_no_barrier.S
+++ b/runtime/interpreter/mterp/x86_64/op_return_void_no_barrier.S
@@ -1,3 +1,4 @@
+%def op_return_void_no_barrier():
movq rSELF, OUT_ARG0
testl $$(THREAD_SUSPEND_OR_CHECKPOINT_REQUEST), THREAD_FLAGS_OFFSET(OUT_ARG0)
jz 1f
diff --git a/runtime/interpreter/mterp/x86_64/op_return_wide.S b/runtime/interpreter/mterp/x86_64/op_return_wide.S
index d6d6d1b..90e0a42 100644
--- a/runtime/interpreter/mterp/x86_64/op_return_wide.S
+++ b/runtime/interpreter/mterp/x86_64/op_return_wide.S
@@ -1,3 +1,4 @@
+%def op_return_wide():
/*
* Return a 64-bit value.
*/
diff --git a/runtime/interpreter/mterp/x86_64/op_rsub_int.S b/runtime/interpreter/mterp/x86_64/op_rsub_int.S
index 2dd2002..05ba130 100644
--- a/runtime/interpreter/mterp/x86_64/op_rsub_int.S
+++ b/runtime/interpreter/mterp/x86_64/op_rsub_int.S
@@ -1,2 +1,3 @@
+%def op_rsub_int():
/* this op is "rsub-int", but can be thought of as "rsub-int/lit16" */
-%include "x86_64/binopLit16.S" {"instr":"subl %eax, %ecx","result":"%ecx"}
+% binopLit16(instr="subl %eax, %ecx", result="%ecx")
diff --git a/runtime/interpreter/mterp/x86_64/op_rsub_int_lit8.S b/runtime/interpreter/mterp/x86_64/op_rsub_int_lit8.S
index 64d0d8a..d023047 100644
--- a/runtime/interpreter/mterp/x86_64/op_rsub_int_lit8.S
+++ b/runtime/interpreter/mterp/x86_64/op_rsub_int_lit8.S
@@ -1 +1,2 @@
-%include "x86_64/binopLit8.S" {"instr":"subl %eax, %ecx" , "result":"%ecx"}
+%def op_rsub_int_lit8():
+% binopLit8(instr="subl %eax, %ecx", result="%ecx")
diff --git a/runtime/interpreter/mterp/x86_64/op_sget.S b/runtime/interpreter/mterp/x86_64/op_sget.S
index 21e8e64..8a6a66a 100644
--- a/runtime/interpreter/mterp/x86_64/op_sget.S
+++ b/runtime/interpreter/mterp/x86_64/op_sget.S
@@ -1,2 +1,2 @@
-%default { "is_object":"0", "helper":"MterpSGetU32" }
-%include "x86_64/field.S" { }
+%def op_sget(is_object="0", helper="MterpSGetU32"):
+% field(helper=helper)
diff --git a/runtime/interpreter/mterp/x86_64/op_sget_boolean.S b/runtime/interpreter/mterp/x86_64/op_sget_boolean.S
index e5a4e41..d9c12c9 100644
--- a/runtime/interpreter/mterp/x86_64/op_sget_boolean.S
+++ b/runtime/interpreter/mterp/x86_64/op_sget_boolean.S
@@ -1 +1,2 @@
-%include "x86_64/op_sget.S" {"helper":"MterpSGetU8"}
+%def op_sget_boolean():
+% op_sget(helper="MterpSGetU8")
diff --git a/runtime/interpreter/mterp/x86_64/op_sget_byte.S b/runtime/interpreter/mterp/x86_64/op_sget_byte.S
index 4602f7d..37c6879 100644
--- a/runtime/interpreter/mterp/x86_64/op_sget_byte.S
+++ b/runtime/interpreter/mterp/x86_64/op_sget_byte.S
@@ -1 +1,2 @@
-%include "x86_64/op_sget.S" {"helper":"MterpSGetI8"}
+%def op_sget_byte():
+% op_sget(helper="MterpSGetI8")
diff --git a/runtime/interpreter/mterp/x86_64/op_sget_char.S b/runtime/interpreter/mterp/x86_64/op_sget_char.S
index a094a54..003bcd1 100644
--- a/runtime/interpreter/mterp/x86_64/op_sget_char.S
+++ b/runtime/interpreter/mterp/x86_64/op_sget_char.S
@@ -1 +1,2 @@
-%include "x86_64/op_sget.S" {"helper":"MterpSGetU16"}
+%def op_sget_char():
+% op_sget(helper="MterpSGetU16")
diff --git a/runtime/interpreter/mterp/x86_64/op_sget_object.S b/runtime/interpreter/mterp/x86_64/op_sget_object.S
index 94597b1..7cf3597 100644
--- a/runtime/interpreter/mterp/x86_64/op_sget_object.S
+++ b/runtime/interpreter/mterp/x86_64/op_sget_object.S
@@ -1 +1,2 @@
-%include "x86_64/op_sget.S" {"is_object":"1", "helper":"MterpSGetObj"}
+%def op_sget_object():
+% op_sget(is_object="1", helper="MterpSGetObj")
diff --git a/runtime/interpreter/mterp/x86_64/op_sget_short.S b/runtime/interpreter/mterp/x86_64/op_sget_short.S
index dee5c24..afacb57 100644
--- a/runtime/interpreter/mterp/x86_64/op_sget_short.S
+++ b/runtime/interpreter/mterp/x86_64/op_sget_short.S
@@ -1 +1,2 @@
-%include "x86_64/op_sget.S" {"helper":"MterpSGetI16"}
+%def op_sget_short():
+% op_sget(helper="MterpSGetI16")
diff --git a/runtime/interpreter/mterp/x86_64/op_sget_wide.S b/runtime/interpreter/mterp/x86_64/op_sget_wide.S
index c53c077..fff2be6 100644
--- a/runtime/interpreter/mterp/x86_64/op_sget_wide.S
+++ b/runtime/interpreter/mterp/x86_64/op_sget_wide.S
@@ -1 +1,2 @@
-%include "x86_64/op_sget.S" {"helper":"MterpSGetU64"}
+%def op_sget_wide():
+% op_sget(helper="MterpSGetU64")
diff --git a/runtime/interpreter/mterp/x86_64/op_shl_int.S b/runtime/interpreter/mterp/x86_64/op_shl_int.S
index fa1edb7..a98b256 100644
--- a/runtime/interpreter/mterp/x86_64/op_shl_int.S
+++ b/runtime/interpreter/mterp/x86_64/op_shl_int.S
@@ -1 +1,2 @@
-%include "x86_64/binop1.S" {"instr":"sall %cl, %eax"}
+%def op_shl_int():
+% binop1(instr="sall %cl, %eax")
diff --git a/runtime/interpreter/mterp/x86_64/op_shl_int_2addr.S b/runtime/interpreter/mterp/x86_64/op_shl_int_2addr.S
index dd96279..987c7d1 100644
--- a/runtime/interpreter/mterp/x86_64/op_shl_int_2addr.S
+++ b/runtime/interpreter/mterp/x86_64/op_shl_int_2addr.S
@@ -1 +1,2 @@
-%include "x86_64/shop2addr.S" {"instr":"sall %cl, %eax"}
+%def op_shl_int_2addr():
+% shop2addr(instr="sall %cl, %eax")
diff --git a/runtime/interpreter/mterp/x86_64/op_shl_int_lit8.S b/runtime/interpreter/mterp/x86_64/op_shl_int_lit8.S
index 39b23ae..ee1a15e 100644
--- a/runtime/interpreter/mterp/x86_64/op_shl_int_lit8.S
+++ b/runtime/interpreter/mterp/x86_64/op_shl_int_lit8.S
@@ -1 +1,2 @@
-%include "x86_64/binopLit8.S" {"instr":"sall %cl, %eax"}
+%def op_shl_int_lit8():
+% binopLit8(instr="sall %cl, %eax")
diff --git a/runtime/interpreter/mterp/x86_64/op_shl_long.S b/runtime/interpreter/mterp/x86_64/op_shl_long.S
index fdc7cb6..c288b36 100644
--- a/runtime/interpreter/mterp/x86_64/op_shl_long.S
+++ b/runtime/interpreter/mterp/x86_64/op_shl_long.S
@@ -1 +1,2 @@
-%include "x86_64/binop1.S" {"instr":"salq %cl, %rax","wide":"1"}
+%def op_shl_long():
+% binop1(instr="salq %cl, %rax", wide="1")
diff --git a/runtime/interpreter/mterp/x86_64/op_shl_long_2addr.S b/runtime/interpreter/mterp/x86_64/op_shl_long_2addr.S
index 546633f..820e703 100644
--- a/runtime/interpreter/mterp/x86_64/op_shl_long_2addr.S
+++ b/runtime/interpreter/mterp/x86_64/op_shl_long_2addr.S
@@ -1 +1,2 @@
-%include "x86_64/shop2addr.S" {"instr":"salq %cl, %rax","wide":"1"}
+%def op_shl_long_2addr():
+% shop2addr(instr="salq %cl, %rax", wide="1")
diff --git a/runtime/interpreter/mterp/x86_64/op_shr_int.S b/runtime/interpreter/mterp/x86_64/op_shr_int.S
index fc289f4..4d4d79c 100644
--- a/runtime/interpreter/mterp/x86_64/op_shr_int.S
+++ b/runtime/interpreter/mterp/x86_64/op_shr_int.S
@@ -1 +1,2 @@
-%include "x86_64/binop1.S" {"instr":"sarl %cl, %eax"}
+%def op_shr_int():
+% binop1(instr="sarl %cl, %eax")
diff --git a/runtime/interpreter/mterp/x86_64/op_shr_int_2addr.S b/runtime/interpreter/mterp/x86_64/op_shr_int_2addr.S
index 0e5bca7..8e4b055 100644
--- a/runtime/interpreter/mterp/x86_64/op_shr_int_2addr.S
+++ b/runtime/interpreter/mterp/x86_64/op_shr_int_2addr.S
@@ -1 +1,2 @@
-%include "x86_64/shop2addr.S" {"instr":"sarl %cl, %eax"}
+%def op_shr_int_2addr():
+% shop2addr(instr="sarl %cl, %eax")
diff --git a/runtime/interpreter/mterp/x86_64/op_shr_int_lit8.S b/runtime/interpreter/mterp/x86_64/op_shr_int_lit8.S
index 3cc9307..a7acf5f 100644
--- a/runtime/interpreter/mterp/x86_64/op_shr_int_lit8.S
+++ b/runtime/interpreter/mterp/x86_64/op_shr_int_lit8.S
@@ -1 +1,2 @@
-%include "x86_64/binopLit8.S" {"instr":"sarl %cl, %eax"}
+%def op_shr_int_lit8():
+% binopLit8(instr="sarl %cl, %eax")
diff --git a/runtime/interpreter/mterp/x86_64/op_shr_long.S b/runtime/interpreter/mterp/x86_64/op_shr_long.S
index 25028d3..ed3e504 100644
--- a/runtime/interpreter/mterp/x86_64/op_shr_long.S
+++ b/runtime/interpreter/mterp/x86_64/op_shr_long.S
@@ -1 +1,2 @@
-%include "x86_64/binop1.S" {"instr":"sarq %cl, %rax","wide":"1"}
+%def op_shr_long():
+% binop1(instr="sarq %cl, %rax", wide="1")
diff --git a/runtime/interpreter/mterp/x86_64/op_shr_long_2addr.S b/runtime/interpreter/mterp/x86_64/op_shr_long_2addr.S
index 3738413..be6898d 100644
--- a/runtime/interpreter/mterp/x86_64/op_shr_long_2addr.S
+++ b/runtime/interpreter/mterp/x86_64/op_shr_long_2addr.S
@@ -1 +1,2 @@
-%include "x86_64/shop2addr.S" {"instr":"sarq %cl, %rax","wide":"1"}
+%def op_shr_long_2addr():
+% shop2addr(instr="sarq %cl, %rax", wide="1")
diff --git a/runtime/interpreter/mterp/x86_64/op_sparse_switch.S b/runtime/interpreter/mterp/x86_64/op_sparse_switch.S
index 0eaa514..b74d7da 100644
--- a/runtime/interpreter/mterp/x86_64/op_sparse_switch.S
+++ b/runtime/interpreter/mterp/x86_64/op_sparse_switch.S
@@ -1 +1,2 @@
-%include "x86_64/op_packed_switch.S" { "func":"MterpDoSparseSwitch" }
+%def op_sparse_switch():
+% op_packed_switch(func="MterpDoSparseSwitch")
diff --git a/runtime/interpreter/mterp/x86_64/op_sput.S b/runtime/interpreter/mterp/x86_64/op_sput.S
index 7dd2498..cbd6ee9 100644
--- a/runtime/interpreter/mterp/x86_64/op_sput.S
+++ b/runtime/interpreter/mterp/x86_64/op_sput.S
@@ -1,2 +1,2 @@
-%default { "is_object":"0", "helper":"MterpSPutU32"}
-%include "x86_64/field.S" { }
+%def op_sput(is_object="0", helper="MterpSPutU32"):
+% field(helper=helper)
diff --git a/runtime/interpreter/mterp/x86_64/op_sput_boolean.S b/runtime/interpreter/mterp/x86_64/op_sput_boolean.S
index ea9acbf..36fba84 100644
--- a/runtime/interpreter/mterp/x86_64/op_sput_boolean.S
+++ b/runtime/interpreter/mterp/x86_64/op_sput_boolean.S
@@ -1 +1,2 @@
-%include "x86_64/op_sput.S" {"helper":"MterpSPutU8"}
+%def op_sput_boolean():
+% op_sput(helper="MterpSPutU8")
diff --git a/runtime/interpreter/mterp/x86_64/op_sput_byte.S b/runtime/interpreter/mterp/x86_64/op_sput_byte.S
index 62c9e20..84ad4a0 100644
--- a/runtime/interpreter/mterp/x86_64/op_sput_byte.S
+++ b/runtime/interpreter/mterp/x86_64/op_sput_byte.S
@@ -1 +1,2 @@
-%include "x86_64/op_sput.S" {"helper":"MterpSPutI8"}
+%def op_sput_byte():
+% op_sput(helper="MterpSPutI8")
diff --git a/runtime/interpreter/mterp/x86_64/op_sput_char.S b/runtime/interpreter/mterp/x86_64/op_sput_char.S
index ab0196e..9b8eeba 100644
--- a/runtime/interpreter/mterp/x86_64/op_sput_char.S
+++ b/runtime/interpreter/mterp/x86_64/op_sput_char.S
@@ -1 +1,2 @@
-%include "x86_64/op_sput.S" {"helper":"MterpSPutU16"}
+%def op_sput_char():
+% op_sput(helper="MterpSPutU16")
diff --git a/runtime/interpreter/mterp/x86_64/op_sput_object.S b/runtime/interpreter/mterp/x86_64/op_sput_object.S
index c2bd07b..081360c 100644
--- a/runtime/interpreter/mterp/x86_64/op_sput_object.S
+++ b/runtime/interpreter/mterp/x86_64/op_sput_object.S
@@ -1 +1,2 @@
-%include "x86_64/op_sput.S" {"is_object":"1", "helper":"MterpSPutObj"}
+%def op_sput_object():
+% op_sput(is_object="1", helper="MterpSPutObj")
diff --git a/runtime/interpreter/mterp/x86_64/op_sput_short.S b/runtime/interpreter/mterp/x86_64/op_sput_short.S
index f73a3fc..ee16513 100644
--- a/runtime/interpreter/mterp/x86_64/op_sput_short.S
+++ b/runtime/interpreter/mterp/x86_64/op_sput_short.S
@@ -1 +1,2 @@
-%include "x86_64/op_sput.S" {"helper":"MterpSPutI16"}
+%def op_sput_short():
+% op_sput(helper="MterpSPutI16")
diff --git a/runtime/interpreter/mterp/x86_64/op_sput_wide.S b/runtime/interpreter/mterp/x86_64/op_sput_wide.S
index 7e77072..44c1a18 100644
--- a/runtime/interpreter/mterp/x86_64/op_sput_wide.S
+++ b/runtime/interpreter/mterp/x86_64/op_sput_wide.S
@@ -1 +1,2 @@
-%include "x86_64/op_sput.S" {"helper":"MterpSPutU64"}
+%def op_sput_wide():
+% op_sput(helper="MterpSPutU64")
diff --git a/runtime/interpreter/mterp/x86_64/op_sub_double.S b/runtime/interpreter/mterp/x86_64/op_sub_double.S
index 952667e..64a28c3 100644
--- a/runtime/interpreter/mterp/x86_64/op_sub_double.S
+++ b/runtime/interpreter/mterp/x86_64/op_sub_double.S
@@ -1 +1,2 @@
-%include "x86_64/sseBinop.S" {"instr":"subs","suff":"d"}
+%def op_sub_double():
+% sseBinop(instr="subs", suff="d")
diff --git a/runtime/interpreter/mterp/x86_64/op_sub_double_2addr.S b/runtime/interpreter/mterp/x86_64/op_sub_double_2addr.S
index 0bd5dbb..753074b 100644
--- a/runtime/interpreter/mterp/x86_64/op_sub_double_2addr.S
+++ b/runtime/interpreter/mterp/x86_64/op_sub_double_2addr.S
@@ -1 +1,2 @@
-%include "x86_64/sseBinop2Addr.S" {"instr":"subs","suff":"d"}
+%def op_sub_double_2addr():
+% sseBinop2Addr(instr="subs", suff="d")
diff --git a/runtime/interpreter/mterp/x86_64/op_sub_float.S b/runtime/interpreter/mterp/x86_64/op_sub_float.S
index ea0ae14..1a1966d 100644
--- a/runtime/interpreter/mterp/x86_64/op_sub_float.S
+++ b/runtime/interpreter/mterp/x86_64/op_sub_float.S
@@ -1 +1,2 @@
-%include "x86_64/sseBinop.S" {"instr":"subs","suff":"s"}
+%def op_sub_float():
+% sseBinop(instr="subs", suff="s")
diff --git a/runtime/interpreter/mterp/x86_64/op_sub_float_2addr.S b/runtime/interpreter/mterp/x86_64/op_sub_float_2addr.S
index 9dd1780..9557907 100644
--- a/runtime/interpreter/mterp/x86_64/op_sub_float_2addr.S
+++ b/runtime/interpreter/mterp/x86_64/op_sub_float_2addr.S
@@ -1 +1,2 @@
-%include "x86_64/sseBinop2Addr.S" {"instr":"subs","suff":"s"}
+%def op_sub_float_2addr():
+% sseBinop2Addr(instr="subs", suff="s")
diff --git a/runtime/interpreter/mterp/x86_64/op_sub_int.S b/runtime/interpreter/mterp/x86_64/op_sub_int.S
index 560394f..ecab19d 100644
--- a/runtime/interpreter/mterp/x86_64/op_sub_int.S
+++ b/runtime/interpreter/mterp/x86_64/op_sub_int.S
@@ -1 +1,2 @@
-%include "x86_64/binop.S" {"instr":"subl (rFP,%rcx,4), %eax"}
+%def op_sub_int():
+% binop(instr="subl (rFP,%rcx,4), %eax")
diff --git a/runtime/interpreter/mterp/x86_64/op_sub_int_2addr.S b/runtime/interpreter/mterp/x86_64/op_sub_int_2addr.S
index 6f50f78..61fc7a7 100644
--- a/runtime/interpreter/mterp/x86_64/op_sub_int_2addr.S
+++ b/runtime/interpreter/mterp/x86_64/op_sub_int_2addr.S
@@ -1 +1,2 @@
-%include "x86_64/binop2addr.S" {"instr":"subl %eax, (rFP,%rcx,4)"}
+%def op_sub_int_2addr():
+% binop2addr(instr="subl %eax, (rFP,%rcx,4)")
diff --git a/runtime/interpreter/mterp/x86_64/op_sub_long.S b/runtime/interpreter/mterp/x86_64/op_sub_long.S
index 7fa54e7..9c38f88 100644
--- a/runtime/interpreter/mterp/x86_64/op_sub_long.S
+++ b/runtime/interpreter/mterp/x86_64/op_sub_long.S
@@ -1 +1,2 @@
-%include "x86_64/binopWide.S" {"instr":"subq (rFP,%rcx,4), %rax"}
+%def op_sub_long():
+% binopWide(instr="subq (rFP,%rcx,4), %rax")
diff --git a/runtime/interpreter/mterp/x86_64/op_sub_long_2addr.S b/runtime/interpreter/mterp/x86_64/op_sub_long_2addr.S
index c18be10..ab31aaf 100644
--- a/runtime/interpreter/mterp/x86_64/op_sub_long_2addr.S
+++ b/runtime/interpreter/mterp/x86_64/op_sub_long_2addr.S
@@ -1 +1,2 @@
-%include "x86_64/binopWide2addr.S" {"instr":"subq %rax, (rFP,%rcx,4)"}
+%def op_sub_long_2addr():
+% binopWide2addr(instr="subq %rax, (rFP,%rcx,4)")
diff --git a/runtime/interpreter/mterp/x86_64/op_throw.S b/runtime/interpreter/mterp/x86_64/op_throw.S
index 8095c25..09fc1ec 100644
--- a/runtime/interpreter/mterp/x86_64/op_throw.S
+++ b/runtime/interpreter/mterp/x86_64/op_throw.S
@@ -1,3 +1,4 @@
+%def op_throw():
/*
* Throw an exception object in the current thread.
*/
diff --git a/runtime/interpreter/mterp/x86_64/op_unused_3e.S b/runtime/interpreter/mterp/x86_64/op_unused_3e.S
index 280615f..d889f1a 100644
--- a/runtime/interpreter/mterp/x86_64/op_unused_3e.S
+++ b/runtime/interpreter/mterp/x86_64/op_unused_3e.S
@@ -1 +1,2 @@
-%include "x86_64/unused.S"
+%def op_unused_3e():
+% unused()
diff --git a/runtime/interpreter/mterp/x86_64/op_unused_3f.S b/runtime/interpreter/mterp/x86_64/op_unused_3f.S
index 280615f..b3ebcfa 100644
--- a/runtime/interpreter/mterp/x86_64/op_unused_3f.S
+++ b/runtime/interpreter/mterp/x86_64/op_unused_3f.S
@@ -1 +1,2 @@
-%include "x86_64/unused.S"
+%def op_unused_3f():
+% unused()
diff --git a/runtime/interpreter/mterp/x86_64/op_unused_40.S b/runtime/interpreter/mterp/x86_64/op_unused_40.S
index 280615f..7920fb3 100644
--- a/runtime/interpreter/mterp/x86_64/op_unused_40.S
+++ b/runtime/interpreter/mterp/x86_64/op_unused_40.S
@@ -1 +1,2 @@
-%include "x86_64/unused.S"
+%def op_unused_40():
+% unused()
diff --git a/runtime/interpreter/mterp/x86_64/op_unused_41.S b/runtime/interpreter/mterp/x86_64/op_unused_41.S
index 280615f..5ed03b8 100644
--- a/runtime/interpreter/mterp/x86_64/op_unused_41.S
+++ b/runtime/interpreter/mterp/x86_64/op_unused_41.S
@@ -1 +1,2 @@
-%include "x86_64/unused.S"
+%def op_unused_41():
+% unused()
diff --git a/runtime/interpreter/mterp/x86_64/op_unused_42.S b/runtime/interpreter/mterp/x86_64/op_unused_42.S
index 280615f..ac32521 100644
--- a/runtime/interpreter/mterp/x86_64/op_unused_42.S
+++ b/runtime/interpreter/mterp/x86_64/op_unused_42.S
@@ -1 +1,2 @@
-%include "x86_64/unused.S"
+%def op_unused_42():
+% unused()
diff --git a/runtime/interpreter/mterp/x86_64/op_unused_43.S b/runtime/interpreter/mterp/x86_64/op_unused_43.S
index 280615f..33e2aa1 100644
--- a/runtime/interpreter/mterp/x86_64/op_unused_43.S
+++ b/runtime/interpreter/mterp/x86_64/op_unused_43.S
@@ -1 +1,2 @@
-%include "x86_64/unused.S"
+%def op_unused_43():
+% unused()
diff --git a/runtime/interpreter/mterp/x86_64/op_unused_79.S b/runtime/interpreter/mterp/x86_64/op_unused_79.S
index 280615f..3c6dafc 100644
--- a/runtime/interpreter/mterp/x86_64/op_unused_79.S
+++ b/runtime/interpreter/mterp/x86_64/op_unused_79.S
@@ -1 +1,2 @@
-%include "x86_64/unused.S"
+%def op_unused_79():
+% unused()
diff --git a/runtime/interpreter/mterp/x86_64/op_unused_7a.S b/runtime/interpreter/mterp/x86_64/op_unused_7a.S
index 280615f..9c03cd5 100644
--- a/runtime/interpreter/mterp/x86_64/op_unused_7a.S
+++ b/runtime/interpreter/mterp/x86_64/op_unused_7a.S
@@ -1 +1,2 @@
-%include "x86_64/unused.S"
+%def op_unused_7a():
+% unused()
diff --git a/runtime/interpreter/mterp/x86_64/op_unused_f3.S b/runtime/interpreter/mterp/x86_64/op_unused_f3.S
index 280615f..ab10b78 100644
--- a/runtime/interpreter/mterp/x86_64/op_unused_f3.S
+++ b/runtime/interpreter/mterp/x86_64/op_unused_f3.S
@@ -1 +1,2 @@
-%include "x86_64/unused.S"
+%def op_unused_f3():
+% unused()
diff --git a/runtime/interpreter/mterp/x86_64/op_unused_f4.S b/runtime/interpreter/mterp/x86_64/op_unused_f4.S
index 280615f..09229d6 100644
--- a/runtime/interpreter/mterp/x86_64/op_unused_f4.S
+++ b/runtime/interpreter/mterp/x86_64/op_unused_f4.S
@@ -1 +1,2 @@
-%include "x86_64/unused.S"
+%def op_unused_f4():
+% unused()
diff --git a/runtime/interpreter/mterp/x86_64/op_unused_f5.S b/runtime/interpreter/mterp/x86_64/op_unused_f5.S
index 280615f..0d6149b 100644
--- a/runtime/interpreter/mterp/x86_64/op_unused_f5.S
+++ b/runtime/interpreter/mterp/x86_64/op_unused_f5.S
@@ -1 +1,2 @@
-%include "x86_64/unused.S"
+%def op_unused_f5():
+% unused()
diff --git a/runtime/interpreter/mterp/x86_64/op_unused_f6.S b/runtime/interpreter/mterp/x86_64/op_unused_f6.S
index 280615f..117b03d 100644
--- a/runtime/interpreter/mterp/x86_64/op_unused_f6.S
+++ b/runtime/interpreter/mterp/x86_64/op_unused_f6.S
@@ -1 +1,2 @@
-%include "x86_64/unused.S"
+%def op_unused_f6():
+% unused()
diff --git a/runtime/interpreter/mterp/x86_64/op_unused_f7.S b/runtime/interpreter/mterp/x86_64/op_unused_f7.S
index 280615f..4e3a0f3 100644
--- a/runtime/interpreter/mterp/x86_64/op_unused_f7.S
+++ b/runtime/interpreter/mterp/x86_64/op_unused_f7.S
@@ -1 +1,2 @@
-%include "x86_64/unused.S"
+%def op_unused_f7():
+% unused()
diff --git a/runtime/interpreter/mterp/x86_64/op_unused_f8.S b/runtime/interpreter/mterp/x86_64/op_unused_f8.S
index 280615f..d122075 100644
--- a/runtime/interpreter/mterp/x86_64/op_unused_f8.S
+++ b/runtime/interpreter/mterp/x86_64/op_unused_f8.S
@@ -1 +1,2 @@
-%include "x86_64/unused.S"
+%def op_unused_f8():
+% unused()
diff --git a/runtime/interpreter/mterp/x86_64/op_unused_f9.S b/runtime/interpreter/mterp/x86_64/op_unused_f9.S
index 280615f..7d09a0e 100644
--- a/runtime/interpreter/mterp/x86_64/op_unused_f9.S
+++ b/runtime/interpreter/mterp/x86_64/op_unused_f9.S
@@ -1 +1,2 @@
-%include "x86_64/unused.S"
+%def op_unused_f9():
+% unused()
diff --git a/runtime/interpreter/mterp/x86_64/op_unused_fc.S b/runtime/interpreter/mterp/x86_64/op_unused_fc.S
index 280615f..0697819 100644
--- a/runtime/interpreter/mterp/x86_64/op_unused_fc.S
+++ b/runtime/interpreter/mterp/x86_64/op_unused_fc.S
@@ -1 +1,2 @@
-%include "x86_64/unused.S"
+%def op_unused_fc():
+% unused()
diff --git a/runtime/interpreter/mterp/x86_64/op_unused_fd.S b/runtime/interpreter/mterp/x86_64/op_unused_fd.S
index 280615f..4bc2b4b 100644
--- a/runtime/interpreter/mterp/x86_64/op_unused_fd.S
+++ b/runtime/interpreter/mterp/x86_64/op_unused_fd.S
@@ -1 +1,2 @@
-%include "x86_64/unused.S"
+%def op_unused_fd():
+% unused()
diff --git a/runtime/interpreter/mterp/x86_64/op_ushr_int.S b/runtime/interpreter/mterp/x86_64/op_ushr_int.S
index dd91086..38c8782 100644
--- a/runtime/interpreter/mterp/x86_64/op_ushr_int.S
+++ b/runtime/interpreter/mterp/x86_64/op_ushr_int.S
@@ -1 +1,2 @@
-%include "x86_64/binop1.S" {"instr":"shrl %cl, %eax"}
+%def op_ushr_int():
+% binop1(instr="shrl %cl, %eax")
diff --git a/runtime/interpreter/mterp/x86_64/op_ushr_int_2addr.S b/runtime/interpreter/mterp/x86_64/op_ushr_int_2addr.S
index d38aedd..f1da71a 100644
--- a/runtime/interpreter/mterp/x86_64/op_ushr_int_2addr.S
+++ b/runtime/interpreter/mterp/x86_64/op_ushr_int_2addr.S
@@ -1 +1,2 @@
-%include "x86_64/shop2addr.S" {"instr":"shrl %cl, %eax"}
+%def op_ushr_int_2addr():
+% shop2addr(instr="shrl %cl, %eax")
diff --git a/runtime/interpreter/mterp/x86_64/op_ushr_int_lit8.S b/runtime/interpreter/mterp/x86_64/op_ushr_int_lit8.S
index f7ff8ab..4298d36 100644
--- a/runtime/interpreter/mterp/x86_64/op_ushr_int_lit8.S
+++ b/runtime/interpreter/mterp/x86_64/op_ushr_int_lit8.S
@@ -1 +1,2 @@
-%include "x86_64/binopLit8.S" {"instr":"shrl %cl, %eax"}
+%def op_ushr_int_lit8():
+% binopLit8(instr="shrl %cl, %eax")
diff --git a/runtime/interpreter/mterp/x86_64/op_ushr_long.S b/runtime/interpreter/mterp/x86_64/op_ushr_long.S
index 7c6daca..a0b4daf 100644
--- a/runtime/interpreter/mterp/x86_64/op_ushr_long.S
+++ b/runtime/interpreter/mterp/x86_64/op_ushr_long.S
@@ -1 +1,2 @@
-%include "x86_64/binop1.S" {"instr":"shrq %cl, %rax","wide":"1"}
+%def op_ushr_long():
+% binop1(instr="shrq %cl, %rax", wide="1")
diff --git a/runtime/interpreter/mterp/x86_64/op_ushr_long_2addr.S b/runtime/interpreter/mterp/x86_64/op_ushr_long_2addr.S
index cd6a22c..2213cf3 100644
--- a/runtime/interpreter/mterp/x86_64/op_ushr_long_2addr.S
+++ b/runtime/interpreter/mterp/x86_64/op_ushr_long_2addr.S
@@ -1 +1,2 @@
-%include "x86_64/shop2addr.S" {"instr":"shrq %cl, %rax","wide":"1"}
+%def op_ushr_long_2addr():
+% shop2addr(instr="shrq %cl, %rax", wide="1")
diff --git a/runtime/interpreter/mterp/x86_64/op_xor_int.S b/runtime/interpreter/mterp/x86_64/op_xor_int.S
index b295d74..5dc2603 100644
--- a/runtime/interpreter/mterp/x86_64/op_xor_int.S
+++ b/runtime/interpreter/mterp/x86_64/op_xor_int.S
@@ -1 +1,2 @@
-%include "x86_64/binop.S" {"instr":"xorl (rFP,%rcx,4), %eax"}
+%def op_xor_int():
+% binop(instr="xorl (rFP,%rcx,4), %eax")
diff --git a/runtime/interpreter/mterp/x86_64/op_xor_int_2addr.S b/runtime/interpreter/mterp/x86_64/op_xor_int_2addr.S
index 879bfc0..2c84702 100644
--- a/runtime/interpreter/mterp/x86_64/op_xor_int_2addr.S
+++ b/runtime/interpreter/mterp/x86_64/op_xor_int_2addr.S
@@ -1 +1,2 @@
-%include "x86_64/binop2addr.S" {"instr":"xorl %eax, (rFP,%rcx,4)"}
+%def op_xor_int_2addr():
+% binop2addr(instr="xorl %eax, (rFP,%rcx,4)")
diff --git a/runtime/interpreter/mterp/x86_64/op_xor_int_lit16.S b/runtime/interpreter/mterp/x86_64/op_xor_int_lit16.S
index 5d375a1..f5dc00e 100644
--- a/runtime/interpreter/mterp/x86_64/op_xor_int_lit16.S
+++ b/runtime/interpreter/mterp/x86_64/op_xor_int_lit16.S
@@ -1 +1,2 @@
-%include "x86_64/binopLit16.S" {"instr":"xorl %ecx, %eax"}
+%def op_xor_int_lit16():
+% binopLit16(instr="xorl %ecx, %eax")
diff --git a/runtime/interpreter/mterp/x86_64/op_xor_int_lit8.S b/runtime/interpreter/mterp/x86_64/op_xor_int_lit8.S
index 54cce9c..98a1a432 100644
--- a/runtime/interpreter/mterp/x86_64/op_xor_int_lit8.S
+++ b/runtime/interpreter/mterp/x86_64/op_xor_int_lit8.S
@@ -1 +1,2 @@
-%include "x86_64/binopLit8.S" {"instr":"xorl %ecx, %eax"}
+%def op_xor_int_lit8():
+% binopLit8(instr="xorl %ecx, %eax")
diff --git a/runtime/interpreter/mterp/x86_64/op_xor_long.S b/runtime/interpreter/mterp/x86_64/op_xor_long.S
index 52b44e2..1c26793 100644
--- a/runtime/interpreter/mterp/x86_64/op_xor_long.S
+++ b/runtime/interpreter/mterp/x86_64/op_xor_long.S
@@ -1 +1,2 @@
-%include "x86_64/binopWide.S" {"instr":"xorq (rFP,%rcx,4), %rax"}
+%def op_xor_long():
+% binopWide(instr="xorq (rFP,%rcx,4), %rax")
diff --git a/runtime/interpreter/mterp/x86_64/op_xor_long_2addr.S b/runtime/interpreter/mterp/x86_64/op_xor_long_2addr.S
index d75c4ba..c649651 100644
--- a/runtime/interpreter/mterp/x86_64/op_xor_long_2addr.S
+++ b/runtime/interpreter/mterp/x86_64/op_xor_long_2addr.S
@@ -1 +1,2 @@
-%include "x86_64/binopWide2addr.S" {"instr":"xorq %rax, (rFP,%rcx,4)"}
+%def op_xor_long_2addr():
+% binopWide2addr(instr="xorq %rax, (rFP,%rcx,4)")
diff --git a/runtime/interpreter/mterp/x86_64/shop2addr.S b/runtime/interpreter/mterp/x86_64/shop2addr.S
index 6b06d00..d0d838b 100644
--- a/runtime/interpreter/mterp/x86_64/shop2addr.S
+++ b/runtime/interpreter/mterp/x86_64/shop2addr.S
@@ -1,4 +1,4 @@
-%default {"wide":"0"}
+%def shop2addr(wide="0", instr=""):
/*
* Generic 32-bit "shift/2addr" operation.
*/
diff --git a/runtime/interpreter/mterp/x86_64/sseBinop.S b/runtime/interpreter/mterp/x86_64/sseBinop.S
index 09d3364..638ea8e 100644
--- a/runtime/interpreter/mterp/x86_64/sseBinop.S
+++ b/runtime/interpreter/mterp/x86_64/sseBinop.S
@@ -1,4 +1,4 @@
-%default {"instr":"","suff":""}
+%def sseBinop(instr="", suff=""):
movzbq 2(rPC), %rcx # ecx <- BB
movzbq 3(rPC), %rax # eax <- CC
movs${suff} VREG_ADDRESS(%rcx), %xmm0 # %xmm0 <- 1st src
diff --git a/runtime/interpreter/mterp/x86_64/sseBinop2Addr.S b/runtime/interpreter/mterp/x86_64/sseBinop2Addr.S
index 084166b..1292a36 100644
--- a/runtime/interpreter/mterp/x86_64/sseBinop2Addr.S
+++ b/runtime/interpreter/mterp/x86_64/sseBinop2Addr.S
@@ -1,4 +1,4 @@
-%default {"instr":"","suff":""}
+%def sseBinop2Addr(instr="", suff=""):
movl rINST, %ecx # ecx <- A+
andl $$0xf, %ecx # ecx <- A
movs${suff} VREG_ADDRESS(%rcx), %xmm0 # %xmm0 <- 1st src
diff --git a/runtime/interpreter/mterp/x86_64/unop.S b/runtime/interpreter/mterp/x86_64/unop.S
index 1777123..1dd12a3 100644
--- a/runtime/interpreter/mterp/x86_64/unop.S
+++ b/runtime/interpreter/mterp/x86_64/unop.S
@@ -1,4 +1,4 @@
-%default {"preinstr":"", "instr":"", "wide":"0"}
+%def unop(preinstr="", instr="", wide="0"):
/*
* Generic 32/64-bit unary operation. Provide an "instr" line that
* specifies an instruction that performs "result = op eax".
diff --git a/runtime/interpreter/mterp/x86_64/unused.S b/runtime/interpreter/mterp/x86_64/unused.S
index c95ef94..ef35b6e 100644
--- a/runtime/interpreter/mterp/x86_64/unused.S
+++ b/runtime/interpreter/mterp/x86_64/unused.S
@@ -1,3 +1,4 @@
+%def unused():
/*
* Bail to reference interpreter to throw.
*/
diff --git a/runtime/interpreter/mterp/x86_64/zcmp.S b/runtime/interpreter/mterp/x86_64/zcmp.S
index fb8ae6a..e794fb0 100644
--- a/runtime/interpreter/mterp/x86_64/zcmp.S
+++ b/runtime/interpreter/mterp/x86_64/zcmp.S
@@ -1,3 +1,4 @@
+%def zcmp(revcmp=""):
/*
* Generic one-operand compare-and-branch operation. Provide a "revcmp"
* fragment that specifies the *reverse* comparison to perform, e.g.
