ARM: VIXL32: Use VIXL backend by default.

export ART_USE_OLD_ARM_BACKEND=true to use the previous backend.

Test: mma test-art-host && mma test-art-target
Change-Id: Ia4fd4ad88df7183784ea76bae8f912c4b18e046b
diff --git a/build/art.go b/build/art.go
index e6e0544..3349f6b 100644
--- a/build/art.go
+++ b/build/art.go
@@ -74,10 +74,10 @@
 		cflags = append(cflags, "-fstack-protector")
 	}
 
-	if envTrue(ctx, "ART_USE_VIXL_ARM_BACKEND") {
-		// Used to enable the new VIXL-based ARM code generator.
-		cflags = append(cflags, "-DART_USE_VIXL_ARM_BACKEND=1")
-		asflags = append(asflags, "-DART_USE_VIXL_ARM_BACKEND=1")
+	if envTrue(ctx, "ART_USE_OLD_ARM_BACKEND") {
+		// Used to enable the old, pre-VIXL ARM code generator.
+		cflags = append(cflags, "-DART_USE_OLD_ARM_BACKEND=1")
+		asflags = append(asflags, "-DART_USE_OLD_ARM_BACKEND=1")
 	}
 
 	return cflags, asflags
diff --git a/compiler/optimizing/code_generator_arm_vixl.cc b/compiler/optimizing/code_generator_arm_vixl.cc
index 05a76e1..ecabc58 100644
--- a/compiler/optimizing/code_generator_arm_vixl.cc
+++ b/compiler/optimizing/code_generator_arm_vixl.cc
@@ -431,10 +431,12 @@
       // TODO: Change art_quick_initialize_type/art_quick_initialize_static_storage to
       // kSaveEverything and use a temporary for the .bss entry address in the fast path,
       // so that we can avoid another calculation here.
+      UseScratchRegisterScope temps(down_cast<CodeGeneratorARMVIXL*>(codegen)->GetVIXLAssembler());
+      vixl32::Register temp = temps.Acquire();
       CodeGeneratorARMVIXL::PcRelativePatchInfo* labels =
           arm_codegen->NewTypeBssEntryPatch(cls_->GetDexFile(), type_index);
-      arm_codegen->EmitMovwMovtPlaceholder(labels, ip);
-      __ Str(OutputRegister(cls_), MemOperand(ip));
+      arm_codegen->EmitMovwMovtPlaceholder(labels, temp);
+      __ Str(OutputRegister(cls_), MemOperand(temp));
     }
     __ B(GetExitLabel());
   }
diff --git a/compiler/optimizing/code_generator_arm_vixl.h b/compiler/optimizing/code_generator_arm_vixl.h
index be65353..219b003 100644
--- a/compiler/optimizing/code_generator_arm_vixl.h
+++ b/compiler/optimizing/code_generator_arm_vixl.h
@@ -35,11 +35,11 @@
 #include "aarch32/macro-assembler-aarch32.h"
 #pragma GCC diagnostic pop
 
-// True if VIXL32 should be used for codegen on ARM.
-#ifdef ART_USE_VIXL_ARM_BACKEND
-static constexpr bool kArmUseVIXL32 = true;
-#else
+// Default to use the VIXL-based backend on ARM.
+#ifdef ART_USE_OLD_ARM_BACKEND
 static constexpr bool kArmUseVIXL32 = false;
+#else
+static constexpr bool kArmUseVIXL32 = true;
 #endif
 
 namespace art {
diff --git a/compiler/optimizing/dex_cache_array_fixups_arm.cc b/compiler/optimizing/dex_cache_array_fixups_arm.cc
index 9ddcd56..446595e 100644
--- a/compiler/optimizing/dex_cache_array_fixups_arm.cc
+++ b/compiler/optimizing/dex_cache_array_fixups_arm.cc
@@ -17,23 +17,23 @@
 #include "dex_cache_array_fixups_arm.h"
 
 #include "base/arena_containers.h"
-#ifdef ART_USE_VIXL_ARM_BACKEND
-#include "code_generator_arm_vixl.h"
-#include "intrinsics_arm_vixl.h"
-#else
+#ifdef ART_USE_OLD_ARM_BACKEND
 #include "code_generator_arm.h"
 #include "intrinsics_arm.h"
+#else
+#include "code_generator_arm_vixl.h"
+#include "intrinsics_arm_vixl.h"
 #endif
 #include "utils/dex_cache_arrays_layout-inl.h"
 
 namespace art {
 namespace arm {
-#ifdef ART_USE_VIXL_ARM_BACKEND
-typedef CodeGeneratorARMVIXL CodeGeneratorARMType;
-typedef IntrinsicLocationsBuilderARMVIXL IntrinsicLocationsBuilderARMType;
-#else
+#ifdef ART_USE_OLD_ARM_BACKEND
 typedef CodeGeneratorARM CodeGeneratorARMType;
 typedef IntrinsicLocationsBuilderARM IntrinsicLocationsBuilderARMType;
+#else
+typedef CodeGeneratorARMVIXL CodeGeneratorARMType;
+typedef IntrinsicLocationsBuilderARMVIXL IntrinsicLocationsBuilderARMType;
 #endif
 
 /**
diff --git a/compiler/optimizing/optimizing_cfi_test.cc b/compiler/optimizing/optimizing_cfi_test.cc
index 0e02311..490e50c 100644
--- a/compiler/optimizing/optimizing_cfi_test.cc
+++ b/compiler/optimizing/optimizing_cfi_test.cc
@@ -24,17 +24,17 @@
 #include "optimizing/code_generator.h"
 #include "optimizing/optimizing_unit_test.h"
 #include "utils/assembler.h"
-#ifdef ART_USE_VIXL_ARM_BACKEND
-#include "utils/arm/assembler_arm_vixl.h"
-#else
+#ifdef ART_USE_OLD_ARM_BACKEND
 #include "utils/arm/assembler_thumb2.h"
+#else
+#include "utils/arm/assembler_arm_vixl.h"
 #endif
 #include "utils/mips/assembler_mips.h"
 #include "utils/mips64/assembler_mips64.h"
 
 #include "optimizing/optimizing_cfi_test_expected.inc"
 
-#ifdef ART_USE_VIXL_ARM_BACKEND
+#ifndef ART_USE_OLD_ARM_BACKEND
 namespace vixl32 = vixl::aarch32;
 
 using vixl32::r0;
@@ -196,7 +196,15 @@
       expected_cfi_kThumb2_adjust,
       expected_cfi_kThumb2_adjust + arraysize(expected_cfi_kThumb2_adjust));
   SetUpFrame(kThumb2);
-#ifdef ART_USE_VIXL_ARM_BACKEND
+#ifdef ART_USE_OLD_ARM_BACKEND
+#define __ down_cast<arm::Thumb2Assembler*>(GetCodeGenerator()->GetAssembler())->
+  Label target;
+  __ CompareAndBranchIfZero(arm::R0, &target);
+  // Push the target out of range of CBZ.
+  for (size_t i = 0; i != 65; ++i) {
+    __ ldr(arm::R0, arm::Address(arm::R0));
+  }
+#else
 #define __ down_cast<arm::ArmVIXLAssembler*>(GetCodeGenerator() \
     ->GetAssembler())->GetVIXLAssembler()->
   vixl32::Label target;
@@ -205,14 +213,6 @@
   for (size_t i = 0; i != 65; ++i) {
     __ Ldr(r0, vixl32::MemOperand(r0));
   }
-#else
-#define __ down_cast<arm::Thumb2Assembler*>(GetCodeGenerator()->GetAssembler())->
-  Label target;
-  __ CompareAndBranchIfZero(arm::R0, &target);
-  // Push the target out of range of CBZ.
-  for (size_t i = 0; i != 65; ++i) {
-    __ ldr(arm::R0, arm::Address(arm::R0));
-  }
 #endif
   __ Bind(&target);
 #undef __
diff --git a/compiler/optimizing/optimizing_cfi_test_expected.inc b/compiler/optimizing/optimizing_cfi_test_expected.inc
index 82670c3..d84fe6c 100644
--- a/compiler/optimizing/optimizing_cfi_test_expected.inc
+++ b/compiler/optimizing/optimizing_cfi_test_expected.inc
@@ -223,15 +223,15 @@
 // 0x00000040: .cfi_def_cfa_offset: 64
 
 static constexpr uint8_t expected_asm_kThumb2_adjust[] = {
-#ifdef ART_USE_VIXL_ARM_BACKEND
-    // VIXL emits an extra 2 bytes here for a 32-bit beq as there is no
-    // optimistic 16-bit emit and subsequent fixup for out of reach targets
-    // as with the current assembler.
-    0x60, 0xB5, 0x2D, 0xED, 0x02, 0x8A, 0x8B, 0xB0, 0x00, 0x28, 0x00, 0xF0,
-    0x41, 0x80, 0x00, 0x68, 0x00, 0x68, 0x00, 0x68, 0x00, 0x68, 0x00, 0x68,
-#else
+#ifdef ART_USE_OLD_ARM_BACKEND
     0x60, 0xB5, 0x2D, 0xED, 0x02, 0x8A, 0x8B, 0xB0, 0x00, 0x28,
     0x40, 0xD0, 0x00, 0x68, 0x00, 0x68, 0x00, 0x68, 0x00, 0x68, 0x00, 0x68,
+#else
+    // VIXL emits an extra 2 bytes here for a 32-bit beq as there is no
+    // optimistic 16-bit emit and subsequent fixup for out of reach targets
+    // as with the old assembler.
+    0x60, 0xB5, 0x2D, 0xED, 0x02, 0x8A, 0x8B, 0xB0, 0x00, 0x28, 0x00, 0xF0,
+    0x41, 0x80, 0x00, 0x68, 0x00, 0x68, 0x00, 0x68, 0x00, 0x68, 0x00, 0x68,
 #endif
     0x00, 0x68, 0x00, 0x68, 0x00, 0x68, 0x00, 0x68, 0x00, 0x68, 0x00, 0x68,
     0x00, 0x68, 0x00, 0x68, 0x00, 0x68, 0x00, 0x68, 0x00, 0x68, 0x00, 0x68,
@@ -247,10 +247,10 @@
 };
 static constexpr uint8_t expected_cfi_kThumb2_adjust[] = {
     0x42, 0x0E, 0x0C, 0x85, 0x03, 0x86, 0x02, 0x8E, 0x01, 0x44, 0x0E, 0x14,
-#ifdef ART_USE_VIXL_ARM_BACKEND
-    0x05, 0x50, 0x05, 0x05, 0x51, 0x04, 0x42, 0x0E, 0x40, 0x02, 0x88, 0x0A,
-#else
+#ifdef ART_USE_OLD_ARM_BACKEND
     0x05, 0x50, 0x05, 0x05, 0x51, 0x04, 0x42, 0x0E, 0x40, 0x02, 0x86, 0x0A,
+#else
+    0x05, 0x50, 0x05, 0x05, 0x51, 0x04, 0x42, 0x0E, 0x40, 0x02, 0x88, 0x0A,
 #endif
     0x42, 0x0E, 0x14, 0x44, 0x0E, 0x0C, 0x06, 0x50, 0x06, 0x51, 0x42, 0x0B,
     0x0E, 0x40,