riscv64: Add comment into Riscv64Assembler::Add In case of 'add rd, Zero, Zero' we could use conversion into 'c.li rd, 0' but for some reason clang does not support it so it could not be tested. Test: None Bug: 328561342 Change-Id: I6efab426bf72330e3df2d6122bc83a3499ac4c9e