Fix null checks on volatile reference field loads on ARM64.

ART's compiler adds a null check HIR instruction before each field
load HIR instruction created in the instruction builder phase. When
implicit null checks are allowed, the compiler elides the null check
if it can be turned into an implicit one (i.e. if the offset is within
a system page range).

On ARM64, the Baker read barrier thunk built for field reference loads
needs to check the lock word of the holder of the field, and thus
includes an explicit null check if no null check has been done before.
However, this was not done for volatile loads (implemented with a
load-acquire instruction on ARM64). This change adds this missing null
check.

Test: art/test/testrunner/testrunner.py --target --64 -t 1004-checker-volatile-ref-load
Bug: 140507091
Bug: 36141117
Change-Id: Ie94f2e73d2f439ae4460549d7b71848401602a21
7 files changed