commit | 5192cbb12856b12620dc346758605baaa1469ced | [log] [tgz] |
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author | Yixin Shou <yixin.shou@intel.com> | Tue Jul 01 13:48:17 2014 -0400 |
committer | Yixin Shou <yixin.shou@intel.com> | Wed Jul 02 06:40:12 2014 -0400 |
tree | 46f8727c0009978e1c15f94ea353a9fc92d2fe42 | |
parent | 7a59a24987beb52877b72b4e3f841e406413bb6d [diff] |
Load 64 bit constant into GPR by single instruction for 64bit mode This patch load 64 bit constant into a register by a single movabsq instruction on 64 bit bit instead of previous mov, shift, add instruction sequences. Change-Id: I9d013c4f6c0b5c2e43bd125f91436263c7e6028c Signed-off-by: Yixin Shou <yixin.shou@intel.com>