commit 33ecf8d692eb192aa0ddb752d3ffe1e899e0f42e
author Mark Mendell <mark.p.mendell@intel.com> Fri Jun 06 15:19:45 2014 -0400
committer Ian Rogers <irogers@google.com> Sun Jun 08 22:27:11 2014 -0700
tree bf29fe047b99ff3e387c1eff5c2ea2215bdfda16
parent 6473c0ab5fe81761c34515c5049d8baf8ee1d35e

Add Move with Sign Extend Double to disassembler

I noticed another missing instruction.

Change-Id: I71170496b014ac2609116eff2aeb13a13e71e263
Signed-off-by: Mark Mendell <mark.p.mendell@intel.com>

disassembler/disassembler_x86.cc

diff --git a/disassembler/disassembler_x86.cc b/disassembler/disassembler_x86.cc
index 456e3b5..e6a6860 100644
--- a/disassembler/disassembler_x86.cc
+++ b/disassembler/disassembler_x86.cc
@@ -258,6 +258,17 @@
     reg_in_opcode = true;
     target_specific = true;
     break;
+  case 0x63:
+    if (rex == 0x48) {
+      opcode << "movsxd";
+      has_modrm = true;
+      load = true;
+    } else {
+      // In 32-bit mode (!supports_rex_) this is ARPL, with no REX prefix the functionality is the
+      // same as 'mov' but the use of the instruction is discouraged.
+      opcode << StringPrintf("unknown opcode '%02X'", *instr);
+    }
+    break;
   case 0x68: opcode << "push"; immediate_bytes = 4; break;
   case 0x69: opcode << "imul"; load = true; has_modrm = true; immediate_bytes = 4; break;
   case 0x6A: opcode << "push"; immediate_bytes = 1; break;