tree 7d09ef0c00e0b2daa1ee98a12327cd8bb0a64f03
parent 2e21be131922fa55509603c54a5859e87000c256
author Razvan A Lupusoru <razvan.a.lupusoru@intel.com> 1387578903 -0800
committer Razvan A Lupusoru <razvan.a.lupusoru@intel.com> 1387588719 -0800

Eliminate redundant x86 compare for GenDivZeroCheck

For x86, the ALU operations on general purpose registers update the flags.
Thus, when generating the zero check for divide/remainder operations, the
compare is not needed.

Change-Id: I07bfdf7d5491d3e3e9d98a932472d7f18d5b46d3
Signed-off-by: Razvan A Lupusoru <razvan.a.lupusoru@intel.com>