| /include/ "tegra124-soc.dtsi" |
| |
| / { |
| compatible = "nvidia,tegra132"; |
| interrupt-parent = <&intc>; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| |
| cpus { |
| #address-cells = <2>; |
| #size-cells = <0>; |
| |
| cpu@0 { |
| device_type = "cpu"; |
| compatible = "nvidia,denver", "arm,armv8"; |
| reg = <0x0 0x0>; |
| enable-method = "spin-table"; |
| cpu-release-addr = <0x0 0x8000fff8>; |
| }; |
| |
| cpu@1 { |
| device_type = "cpu"; |
| compatible = "nvidia,denver", "arm,armv8"; |
| reg = <0x0 0x1>; |
| enable-method = "spin-table"; |
| cpu-release-addr = <0x0 0x8000fff8>; |
| }; |
| }; |
| |
| intc: interrupt-controller { |
| compatible = "arm,cortex-a15-gic"; |
| reg = <0x50041000 0x1000 |
| 0x50042000 0x0100>; |
| interrupt-controller; |
| #interrupt-cells = <3>; |
| }; |
| |
| timer { |
| compatible = "arm,armv8-timer"; |
| interrupts = <1 14 0xff01>; |
| clock-frequency = <12000000>; |
| }; |
| }; |
