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  1. /*
  2. * Misc utility routines for accessing PMU corerev specific features
  3. * of the SiliconBackplane-based Broadcom chips.
  4. *
  5. * Copyright (C) 1999-2011, Broadcom Corporation
  6. *
  7. * Unless you and Broadcom execute a separate written software license
  8. * agreement governing use of this software, this software is licensed to you
  9. * under the terms of the GNU General Public License version 2 (the "GPL"),
  10. * available at http://www.broadcom.com/licenses/GPLv2.php, with the
  11. * following added to such license:
  12. *
  13. * As a special exception, the copyright holders of this software give you
  14. * permission to link this software with independent modules, and to copy and
  15. * distribute the resulting executable under terms of your choice, provided that
  16. * you also meet, for each linked independent module, the terms and conditions of
  17. * the license of that module. An independent module is a module which is not
  18. * derived from this software. The special exception does not apply to any
  19. * modifications of the software.
  20. *
  21. * Notwithstanding the above, under no circumstances may you combine this
  22. * software in any way with any other Broadcom software provided under a license
  23. * other than the GPL, without Broadcom's express prior written consent.
  24. *
  25. * $Id: hndpmu.c,v 1.228.2.56 2011-02-11 22:49:07 $
  26. */
  27. #include <typedefs.h>
  28. #include <bcmdefs.h>
  29. #include <osl.h>
  30. #include <bcmutils.h>
  31. #include <siutils.h>
  32. #include <bcmdevs.h>
  33. #include <hndsoc.h>
  34. #include <sbchipc.h>
  35. #include <hndpmu.h>
  36. #define PMU_ERROR(args)
  37. #define PMU_MSG(args)
  38. /* To check in verbose debugging messages not intended
  39. * to be on except on private builds.
  40. */
  41. #define PMU_NONE(args)
  42. /* SDIO Pad drive strength to select value mappings.
  43. * The last strength value in each table must be 0 (the tri-state value).
  44. */
  45. typedef struct {
  46. uint8 strength; /* Pad Drive Strength in mA */
  47. uint8 sel; /* Chip-specific select value */
  48. } sdiod_drive_str_t;
  49. /* SDIO Drive Strength to sel value table for PMU Rev 1 */
  50. static const sdiod_drive_str_t sdiod_drive_strength_tab1[] = {
  51. {4, 0x2},
  52. {2, 0x3},
  53. {1, 0x0},
  54. {0, 0x0} };
  55. /* SDIO Drive Strength to sel value table for PMU Rev 2, 3 */
  56. static const sdiod_drive_str_t sdiod_drive_strength_tab2[] = {
  57. {12, 0x7},
  58. {10, 0x6},
  59. {8, 0x5},
  60. {6, 0x4},
  61. {4, 0x2},
  62. {2, 0x1},
  63. {0, 0x0} };
  64. /* SDIO Drive Strength to sel value table for PMU Rev 8 (1.8V) */
  65. static const sdiod_drive_str_t sdiod_drive_strength_tab3[] = {
  66. {32, 0x7},
  67. {26, 0x6},
  68. {22, 0x5},
  69. {16, 0x4},
  70. {12, 0x3},
  71. {8, 0x2},
  72. {4, 0x1},
  73. {0, 0x0} };
  74. /* SDIO Drive Strength to sel value table for PMU Rev 11 (1.8v) */
  75. static const sdiod_drive_str_t sdiod_drive_strength_tab4_1v8[] = {
  76. {32, 0x6},
  77. {26, 0x7},
  78. {22, 0x4},
  79. {16, 0x5},
  80. {12, 0x2},
  81. {8, 0x3},
  82. {4, 0x0},
  83. {0, 0x1} };
  84. /* SDIO Drive Strength to sel value table for PMU Rev 11 (1.2v) */
  85. /* SDIO Drive Strength to sel value table for PMU Rev 11 (2.5v) */
  86. /* SDIO Drive Strength to sel value table for PMU Rev 13 (1.8v) */
  87. static const sdiod_drive_str_t sdiod_drive_strength_tab5_1v8[] = {
  88. {6, 0x7},
  89. {5, 0x6},
  90. {4, 0x5},
  91. {3, 0x4},
  92. {2, 0x2},
  93. {1, 0x1},
  94. {0, 0x0} };
  95. /* SDIO Drive Strength to sel value table for PMU Rev 13 (3.3v) */
  96. #define SDIOD_DRVSTR_KEY(chip, pmu) (((chip) << 16) | (pmu))
  97. void
  98. si_sdiod_drive_strength_init(si_t *sih, osl_t *osh, uint32 drivestrength)
  99. {
  100. chipcregs_t *cc;
  101. uint origidx, intr_val = 0;
  102. sdiod_drive_str_t *str_tab = NULL;
  103. uint32 str_mask = 0;
  104. uint32 str_shift = 0;
  105. if (!(sih->cccaps & CC_CAP_PMU)) {
  106. return;
  107. }
  108. /* Remember original core before switch to chipc */
  109. cc = (chipcregs_t *) si_switch_core(sih, CC_CORE_ID, &origidx, &intr_val);
  110. switch (SDIOD_DRVSTR_KEY(sih->chip, sih->pmurev)) {
  111. case SDIOD_DRVSTR_KEY(BCM4325_CHIP_ID, 1):
  112. str_tab = (sdiod_drive_str_t *)&sdiod_drive_strength_tab1;
  113. str_mask = 0x30000000;
  114. str_shift = 28;
  115. break;
  116. case SDIOD_DRVSTR_KEY(BCM4325_CHIP_ID, 2):
  117. case SDIOD_DRVSTR_KEY(BCM4325_CHIP_ID, 3):
  118. case SDIOD_DRVSTR_KEY(BCM4315_CHIP_ID, 4):
  119. str_tab = (sdiod_drive_str_t *)&sdiod_drive_strength_tab2;
  120. str_mask = 0x00003800;
  121. str_shift = 11;
  122. break;
  123. case SDIOD_DRVSTR_KEY(BCM4336_CHIP_ID, 8):
  124. case SDIOD_DRVSTR_KEY(BCM4336_CHIP_ID, 11):
  125. if (sih->pmurev == 8) {
  126. str_tab = (sdiod_drive_str_t *)&sdiod_drive_strength_tab3;
  127. }
  128. else if (sih->pmurev == 11) {
  129. str_tab = (sdiod_drive_str_t *)&sdiod_drive_strength_tab4_1v8;
  130. }
  131. str_mask = 0x00003800;
  132. str_shift = 11;
  133. break;
  134. case SDIOD_DRVSTR_KEY(BCM4330_CHIP_ID, 12):
  135. str_tab = (sdiod_drive_str_t *)&sdiod_drive_strength_tab4_1v8;
  136. str_mask = 0x00003800;
  137. str_shift = 11;
  138. break;
  139. case SDIOD_DRVSTR_KEY(BCM43362_CHIP_ID, 13):
  140. str_tab = (sdiod_drive_str_t *)&sdiod_drive_strength_tab5_1v8;
  141. str_mask = 0x00003800;
  142. str_shift = 11;
  143. break;
  144. default:
  145. PMU_MSG(("No SDIO Drive strength init done for chip %s rev %d pmurev %d\n",
  146. bcm_chipname(sih->chip, chn, 8), sih->chiprev, sih->pmurev));
  147. break;
  148. }
  149. if (str_tab != NULL) {
  150. uint32 cc_data_temp;
  151. int i;
  152. /* Pick the lowest available drive strength equal or greater than the
  153. * requested strength. Drive strength of 0 requests tri-state.
  154. */
  155. for (i = 0; drivestrength < str_tab[i].strength; i++)
  156. ;
  157. if (i > 0 && drivestrength > str_tab[i].strength)
  158. i--;
  159. W_REG(osh, &cc->chipcontrol_addr, 1);
  160. cc_data_temp = R_REG(osh, &cc->chipcontrol_data);
  161. cc_data_temp &= ~str_mask;
  162. cc_data_temp |= str_tab[i].sel << str_shift;
  163. W_REG(osh, &cc->chipcontrol_data, cc_data_temp);
  164. PMU_MSG(("SDIO: %dmA drive strength requested; set to %dmA\n",
  165. drivestrength, str_tab[i].strength));
  166. }
  167. /* Return to original core */
  168. si_restore_core(sih, origidx, intr_val);
  169. }