Merge "ARM: dts: msm: Add MPM interrupt controller for qcs405"
diff --git a/arch/arm/configs/qcs405-perf_defconfig b/arch/arm/configs/qcs405-perf_defconfig
index 4a8d620..fd6f86a 100644
--- a/arch/arm/configs/qcs405-perf_defconfig
+++ b/arch/arm/configs/qcs405-perf_defconfig
@@ -370,6 +370,7 @@
CONFIG_IIO=y
CONFIG_PWM=y
CONFIG_PWM_QTI_LPG=y
+CONFIG_QTI_MPM=y
CONFIG_ANDROID=y
CONFIG_ANDROID_BINDER_IPC=y
CONFIG_EXT2_FS=y
diff --git a/arch/arm/configs/qcs405_defconfig b/arch/arm/configs/qcs405_defconfig
index 95e48a4..f993334 100644
--- a/arch/arm/configs/qcs405_defconfig
+++ b/arch/arm/configs/qcs405_defconfig
@@ -391,6 +391,7 @@
CONFIG_IIO=y
CONFIG_PWM=y
CONFIG_PWM_QTI_LPG=y
+CONFIG_QTI_MPM=y
CONFIG_ANDROID=y
CONFIG_ANDROID_BINDER_IPC=y
CONFIG_EXT2_FS=y
diff --git a/arch/arm64/boot/dts/qcom/qcs405-pinctrl.dtsi b/arch/arm64/boot/dts/qcom/qcs405-pinctrl.dtsi
index 0463c5c..26fa64a 100644
--- a/arch/arm64/boot/dts/qcom/qcs405-pinctrl.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcs405-pinctrl.dtsi
@@ -15,10 +15,11 @@
tlmm: pinctrl@1000000 {
compatible = "qcom,qcs405-pinctrl";
reg = <0x1000000 0x300000>;
- interrupts = <0 208 0>;
+ interrupts-extended = <&wakegic GIC_SPI 208 IRQ_TYPE_NONE>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
+ interrupt-parent = <&wakegpio>;
#interrupt-cells = <2>;
pmx-uartconsole {
diff --git a/arch/arm64/boot/dts/qcom/qcs405.dtsi b/arch/arm64/boot/dts/qcom/qcs405.dtsi
index 3c5111c..c9b3ea8 100644
--- a/arch/arm64/boot/dts/qcom/qcs405.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcs405.dtsi
@@ -23,7 +23,7 @@
model = "Qualcomm Technologies, Inc. QCS405";
compatible = "qcom,qcs405";
qcom,msm-id = <352 0x0>;
- interrupt-parent = <&intc>;
+ interrupt-parent = <&wakegic>;
chosen {
bootargs = "rcupdate.rcu_expedited=1 rcu_nocbs=0-7";
@@ -125,11 +125,31 @@
intc: interrupt-controller@b000000 {
compatible = "qcom,msm-qgic2";
interrupt-controller;
+ interrupt-parent = <&intc>;
#interrupt-cells = <3>;
reg = <0x0b000000 0x1000>,
<0x0b002000 0x1000>;
};
+ wakegic: wake-gic {
+ compatible = "qcom,mpm-gic-msm8937", "qcom,mpm-gic";
+ interrupts = <GIC_SPI 171 IRQ_TYPE_EDGE_RISING>;
+ reg = <0x601d0 0x1000>,
+ <0xb011008 0x4>; /* MSM_APCS_GCC_BASE 4K */
+ reg-names = "vmpm", "ipc";
+ qcom,num-mpm-irqs = <64>;
+ interrupt-controller;
+ interrupt-parent = <&intc>;
+ #interrupt-cells = <3>;
+ };
+
+ wakegpio: wake-gpio {
+ compatible = "qcom,mpm-gpio-msm8937", "qcom,mpm-gpio";
+ interrupt-controller;
+ interrupt-parent = <&intc>;
+ #interrupt-cells = <2>;
+ };
+
timer {
compatible = "arm,armv8-timer";
interrupts = <1 2 0xff08>,
diff --git a/arch/arm64/configs/qcs405-perf_defconfig b/arch/arm64/configs/qcs405-perf_defconfig
index 2ba1211..f79b04d 100644
--- a/arch/arm64/configs/qcs405-perf_defconfig
+++ b/arch/arm64/configs/qcs405-perf_defconfig
@@ -370,6 +370,7 @@
CONFIG_IIO=y
CONFIG_PWM=y
CONFIG_PWM_QTI_LPG=y
+CONFIG_QTI_MPM=y
CONFIG_ANDROID=y
CONFIG_ANDROID_BINDER_IPC=y
CONFIG_EXT2_FS=y
diff --git a/arch/arm64/configs/qcs405_defconfig b/arch/arm64/configs/qcs405_defconfig
index c999ba3..ee5b207 100644
--- a/arch/arm64/configs/qcs405_defconfig
+++ b/arch/arm64/configs/qcs405_defconfig
@@ -390,6 +390,7 @@
CONFIG_IIO=y
CONFIG_PWM=y
CONFIG_PWM_QTI_LPG=y
+CONFIG_QTI_MPM=y
CONFIG_ANDROID=y
CONFIG_ANDROID_BINDER_IPC=y
CONFIG_EXT2_FS=y
