commit 8572cf8343a7c498fb035c413b75fcb2fb9c6174
author Ramandeep Trehan <rtrehan@codeaurora.org> Fri Jan 18 14:40:48 2019 +0530
committer Gerrit - the friendly Code Review server <code-review@localhost> Tue Jan 22 23:46:32 2019 -0800
tree 2e1864f9eeb88a0769ed3244862e6e5ebe012831
parent 0b8903e1a079584f9c45460023f1ccd2cb67918f

ARM: dts: msm: Update in master id for crypto devices for trinket

Update in master id for qcedev and qcrypto device node to enable
HW crypto CE operations.

Change-Id: Iafe674797a338261de52487e72b8c1d9e0b6fe32
Signed-off-by: Ramandeep Trehan <rtrehan@codeaurora.org>

arch/arm64/boot/dts/qcom/trinket.dtsi

diff --git a/arch/arm64/boot/dts/qcom/trinket.dtsi b/arch/arm64/boot/dts/qcom/trinket.dtsi
index 19d4b20..c54951c 100644
--- a/arch/arm64/boot/dts/qcom/trinket.dtsi
+++ b/arch/arm64/boot/dts/qcom/trinket.dtsi
@@ -1903,8 +1903,8 @@
 		qcom,msm-bus,num-cases = <2>;
 		qcom,msm-bus,num-paths = <1>;
 		qcom,msm-bus,vectors-KBps =
-				<125 512 0 0>,
-				<125 512 393600 393600>;
+				<55 512 0 0>,
+				<55 512 393600 393600>;
 		qcom,smmu-s1-enable;
 		qcom,no-clock-support;
 		iommus = <&apps_smmu 0x01A6 0x0011>,
@@ -1927,8 +1927,8 @@
 		qcom,msm-bus,num-cases = <2>;
 		qcom,msm-bus,num-paths = <1>;
 		qcom,msm-bus,vectors-KBps =
-			<125 512 0 0>,
-			<125 512 393600 393600>;
+			<55 512 0 0>,
+			<55 512 393600 393600>;
 		qcom,use-sw-aes-cbc-ecb-ctr-algo;
 		qcom,use-sw-aes-xts-algo;
 		qcom,use-sw-aes-ccm-algo;