msm: Add support to dump the caches on panic
During the normal course of panic, caches are flushed.
In most regular cases, this behavior is fine. If the
cache itself is suspect, it is important to store whatever
data is there before restart. A suspect cache may manifest
as a kernel panic due to an abort. Dump the caches during
the panic code path to save for analysis later.
Change-Id: Iaa7194027f2f589a60bfade896cd455eb4cc8989
Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig
index e4e2653..0202746 100644
--- a/arch/arm/mach-msm/Kconfig
+++ b/arch/arm/mach-msm/Kconfig
@@ -2236,4 +2236,13 @@
This allows for analysis of the caches in case cache corruption is
suspected.
+config MSM_CACHE_DUMP_ON_PANIC
+ bool "Dump caches on panic"
+ depends on MSM_CACHE_DUMP
+ help
+ By default, the caches are flushed on panic. This means that trying to
+ look at them in a RAM dump will give useless data. Select this if you
+ want to dump the L1 and L2 caches on panic before any flush occurs.
+ If unsure, say N
+
endif
diff --git a/arch/arm/mach-msm/board-8960.c b/arch/arm/mach-msm/board-8960.c
index 724dd80..3f0d8df 100644
--- a/arch/arm/mach-msm/board-8960.c
+++ b/arch/arm/mach-msm/board-8960.c
@@ -612,6 +612,7 @@
#ifdef CONFIG_MSM_CACHE_DUMP
unsigned int spare;
unsigned int l1_size;
+ unsigned int l2_size;
unsigned int total;
int ret;
@@ -622,10 +623,18 @@
/* Fall back to something reasonable here */
l1_size = L1_BUFFER_SIZE;
- total = l1_size + L2_BUFFER_SIZE;
+ ret = scm_call(L1C_SERVICE_ID, L2C_BUFFER_GET_SIZE_COMMAND_ID, &spare,
+ sizeof(spare), &l2_size, sizeof(l2_size));
+
+ if (ret)
+ /* Fall back to something reasonable here */
+ l2_size = L2_BUFFER_SIZE;
+
+ total = l1_size + l2_size;
msm8960_reserve_table[MEMTYPE_EBI1].size += total;
msm_cache_dump_pdata.l1_size = l1_size;
+ msm_cache_dump_pdata.l2_size = l2_size;
#endif
}
diff --git a/arch/arm/mach-msm/include/mach/msm_cache_dump.h b/arch/arm/mach-msm/include/mach/msm_cache_dump.h
index a8d2987..6e4f628 100644
--- a/arch/arm/mach-msm/include/mach/msm_cache_dump.h
+++ b/arch/arm/mach-msm/include/mach/msm_cache_dump.h
@@ -58,12 +58,15 @@
};
#define L1_BUFFER_SIZE SZ_1M
-#define L2_BUFFER_SIZE (sizeof(struct l2_cache_dump))
+#define L2_BUFFER_SIZE SZ_4M
#define CACHE_BUFFER_DUMP_SIZE (L1_BUFFER_SIZE + L2_BUFFER_SIZE)
#define L1C_SERVICE_ID 3
#define L1C_BUFFER_SET_COMMAND_ID 4
+#define CACHE_BUFFER_DUMP_COMMAND_ID 5
#define L1C_BUFFER_GET_SIZE_COMMAND_ID 6
+#define L2C_BUFFER_SET_COMMAND_ID 7
+#define L2C_BUFFER_GET_SIZE_COMMAND_ID 8
#endif
diff --git a/arch/arm/mach-msm/msm_cache_dump.c b/arch/arm/mach-msm/msm_cache_dump.c
index 40c358a..404c8f0 100644
--- a/arch/arm/mach-msm/msm_cache_dump.c
+++ b/arch/arm/mach-msm/msm_cache_dump.c
@@ -20,6 +20,7 @@
#include <linux/platform_device.h>
#include <linux/pm.h>
#include <linux/memory_alloc.h>
+#include <linux/notifier.h>
#include <mach/scm.h>
#include <mach/msm_cache_dump.h>
#include <mach/memory.h>
@@ -38,6 +39,25 @@
static struct l1_cache_dump __used *l1_dump;
static struct l2_cache_dump __used *l2_dump;
+static int msm_cache_dump_panic(struct notifier_block *this,
+ unsigned long event, void *ptr)
+{
+#ifdef CONFIG_MSM_CACHE_DUMP_ON_PANIC
+ scm_call_atomic1(L1C_SERVICE_ID, CACHE_BUFFER_DUMP_COMMAND_ID, 2);
+ scm_call_atomic1(L1C_SERVICE_ID, CACHE_BUFFER_DUMP_COMMAND_ID, 1);
+#endif
+ return 0;
+}
+
+static struct notifier_block msm_cache_dump_blk = {
+ .notifier_call = msm_cache_dump_panic,
+ /*
+ * higher priority to ensure this runs before another panic handler
+ * flushes the caches.
+ */
+ .priority = 1,
+};
+
static int msm_cache_dump_probe(struct platform_device *pdev)
{
struct msm_cache_dump_platform_data *d = pdev->dev.platform_data;
@@ -46,7 +66,9 @@
unsigned long buf;
unsigned long size;
} l1_cache_data;
+#ifndef CONFIG_MSM_CACHE_DUMP_ON_PANIC
unsigned int *imem_loc;
+#endif
void *temp;
unsigned long total_size = d->l1_size + d->l2_size;
@@ -72,14 +94,36 @@
pr_err("%s: could not register L1 buffer ret = %d.\n",
__func__, ret);
+#if defined(CONFIG_MSM_CACHE_DUMP_ON_PANIC)
+ l1_cache_data.buf = msm_cache_dump_addr + d->l1_size;
+ l1_cache_data.size = d->l2_size;
+
+ ret = scm_call(L1C_SERVICE_ID, L2C_BUFFER_SET_COMMAND_ID,
+ &l1_cache_data, sizeof(l1_cache_data), NULL, 0);
+
+ if (ret)
+ pr_err("%s: could not register L2 buffer ret = %d.\n",
+ __func__, ret);
+#else
imem_loc = ioremap(L2C_IMEM_ADDR, SZ_4K);
__raw_writel(msm_cache_dump_addr + d->l1_size, imem_loc);
iounmap(imem_loc);
+#endif
+ atomic_notifier_chain_register(&panic_notifier_list,
+ &msm_cache_dump_blk);
+ return 0;
+}
+
+static int msm_cache_dump_remove(struct platform_device *pdev)
+{
+ atomic_notifier_chain_unregister(&panic_notifier_list,
+ &msm_cache_dump_blk);
return 0;
}
static struct platform_driver msm_cache_dump_driver = {
+ .remove = __devexit_p(msm_cache_dump_remove),
.driver = {
.name = "msm_cache_dump",
.owner = THIS_MODULE
