| #include <bindings/qcom,audio-ext-clk.h> |
| &soc { |
| lpass_core_hw_vote: vote_lpass_core_hw { |
| compatible = "qcom,audio-ref-clk"; |
| qcom,codec-ext-clk-src = <AUDIO_LPASS_CORE_HW_VOTE>; |
| #clock-cells = <1>; |
| }; |
| lpass_audio_hw_vote: vote_lpass_audio_hw { |
| compatible = "qcom,audio-ref-clk"; |
| qcom,codec-ext-clk-src = <AUDIO_LPASS_AUDIO_HW_VOTE>; |
| #clock-cells = <1>; |
| }; |
| lpi_tlmm: lpi_pinctrl@3440000 { |
| compatible = "qcom,lpi-pinctrl"; |
| reg = <0x3440000 0x0>; |
| qcom,slew-reg = <0x34da000 0x0>; |
| qcom,gpios-count = <23>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| qcom,lpi-offset-tbl = <0x00000000>, <0x00001000>,/* gpio quat{0 1 2 3 4 5}, quin{6 7 8 9}, sen{10 11 15 16}, sep{19 20 21 22} oct{12 13 17 18}*/ |
| <0x00002000>, <0x00003000>, |
| <0x00004000>, <0x00005000>, |
| <0x00006000>, <0x00007000>, |
| <0x00008000>, <0x00009000>, |
| <0x0000A000>, <0x0000B000>, |
| <0x0000C000>, <0x0000D000>, |
| <0x0000E000>, <0x0000F000>, |
| <0x00010000>, <0x00011000>, |
| <0x00012000>, <0x00013000>, |
| <0x00014000>, <0x00015000>, |
| <0x00016000>; |
| qcom,lpi-slew-offset-tbl = <0x00000000>, <0x00000002>, |
| <0x00000004>, <0x00000008>, |
| <0x0000000A>, <0x0000000C>, |
| <0x00000000>, <0x00000000>, |
| <0x00000000>, <0x00000000>, |
| <0x00000010>, <0x00000012>, |
| <0x00000000>, <0x00000000>, |
| <0x00000000>, <0x00000000>, |
| <0x00000000>, <0x00000000>, |
| <0x00000014>, <0x00000000>, |
| <0x00000000>, <0x00000000>, |
| <0x00000000>; |
| clock-names = "lpass_core_hw_vote", |
| "lpass_audio_hw_vote"; |
| clocks = <&lpass_core_hw_vote 0>, |
| <&lpass_audio_hw_vote 0>; |
| quat_mi2s_sck { |
| quat_mi2s_sck_sleep: quat_mi2s_sck_sleep { |
| mux { |
| pins = "gpio0"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio0"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| quat_mi2s_sck_active: quat_mi2s_sck_active { |
| mux { |
| pins = "gpio0"; |
| function = "func2"; |
| }; |
| |
| config { |
| pins = "gpio0"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| output-high; |
| }; |
| }; |
| }; |
| |
| quat_mi2s_ws { |
| quat_mi2s_ws_sleep: quat_mi2s_ws_sleep { |
| mux { |
| pins = "gpio1"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio1"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| quat_mi2s_ws_active: quat_mi2s_ws_active { |
| mux { |
| pins = "gpio1"; |
| function = "func2"; |
| }; |
| |
| config { |
| pins = "gpio1"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| output-high; |
| }; |
| }; |
| }; |
| |
| quat_mi2s_sd0 { |
| quat_mi2s_sd0_sleep: quat_mi2s_sd0_sleep { |
| mux { |
| pins = "gpio2"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio2"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| quat_mi2s_sd0_active: quat_mi2s_sd0_active { |
| mux { |
| pins = "gpio2"; |
| function = "func2"; |
| }; |
| |
| config { |
| pins = "gpio2"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-disable; /* NO PULL */ |
| input-enable; |
| }; |
| }; |
| }; |
| |
| quat_mi2s_sd1 { |
| quat_mi2s_sd1_sleep: quat_mi2s_sd1_sleep { |
| mux { |
| pins = "gpio3"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio3"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| quat_mi2s_sd1_active: quat_mi2s_sd1_active { |
| mux { |
| pins = "gpio3"; |
| function = "func2"; |
| }; |
| |
| config { |
| pins = "gpio3"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| output-high; |
| }; |
| }; |
| }; |
| |
| quat_mi2s_sd2 { |
| quat_mi2s_sd2_sleep: quat_mi2s_sd2_sleep { |
| mux { |
| pins = "gpio4"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio4"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| quat_mi2s_sd2_active: quat_mi2s_sd2_active { |
| mux { |
| pins = "gpio4"; |
| function = "func2"; |
| }; |
| |
| config { |
| pins = "gpio4"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-disable; /* NO PULL */ |
| input-enable; |
| }; |
| }; |
| }; |
| |
| quat_mi2s_sd3 { |
| quat_mi2s_sd3_sleep: quat_mi2s_sd3_sleep { |
| mux { |
| pins = "gpio5"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio5"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| quat_mi2s_sd3_active: quat_mi2s_sd3_active { |
| mux { |
| pins = "gpio5"; |
| function = "func3"; |
| }; |
| |
| config { |
| pins = "gpio5"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| output-high; |
| }; |
| }; |
| }; |
| |
| lpi_i2s1_sck { |
| lpi_i2s1_sck_sleep: lpi_i2s1_sck_sleep { |
| mux { |
| pins = "gpio6"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio6"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| lpi_i2s1_sck_active: lpi_i2s1_sck_active { |
| mux { |
| pins = "gpio6"; |
| function = "func2"; |
| }; |
| |
| config { |
| pins = "gpio6"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| output-high; |
| }; |
| }; |
| }; |
| |
| lpi_i2s1_ws { |
| lpi_i2s1_ws_sleep: lpi_i2s1_ws_sleep { |
| mux { |
| pins = "gpio7"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio7"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| lpi_i2s1_ws_active: lpi_i2s1_ws_active { |
| mux { |
| pins = "gpio7"; |
| function = "func2"; |
| }; |
| |
| config { |
| pins = "gpio7"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| output-high; |
| }; |
| }; |
| }; |
| |
| lpi_i2s1_sd0 { |
| lpi_i2s1_sd0_sleep: lpi_i2s1_sd0_sleep { |
| mux { |
| pins = "gpio8"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio8"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| lpi_i2s1_sd0_active: lpi_i2s1_sd0_active { |
| mux { |
| pins = "gpio8"; |
| function = "func2"; |
| }; |
| |
| config { |
| pins = "gpio8"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-disable; /* NO PULL */ |
| input-enable; |
| }; |
| }; |
| }; |
| |
| lpi_i2s1_sd1 { |
| lpi_i2s1_sd1_sleep: lpi_i2s1_sd1_sleep { |
| mux { |
| pins = "gpio9"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio9"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| lpi_i2s1_sd1_active: lpi_i2s1_sd1_active { |
| mux { |
| pins = "gpio9"; |
| function = "func2"; |
| }; |
| |
| config { |
| pins = "gpio9"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| output-high; |
| }; |
| }; |
| }; |
| |
| lpi_i2s2_sck { |
| lpi_i2s2_sck_sleep: lpi_i2s2_sck_sleep { |
| mux { |
| pins = "gpio10"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio10"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| lpi_i2s2_sck_active: lpi_i2s2_sck_active { |
| mux { |
| pins = "gpio10"; |
| function = "func1"; |
| }; |
| |
| config { |
| pins = "gpio10"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| output-high; |
| }; |
| }; |
| }; |
| |
| lpi_i2s2_ws { |
| lpi_i2s2_ws_sleep: lpi_i2s2_ws_sleep { |
| mux { |
| pins = "gpio11"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio11"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| lpi_i2s2_ws_active: lpi_i2s2_ws_active { |
| mux { |
| pins = "gpio11"; |
| function = "func1"; |
| }; |
| |
| config { |
| pins = "gpio11"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| output-high; |
| }; |
| }; |
| }; |
| |
| lpi_i2s2_sd0 { |
| lpi_i2s2_sd0_sleep: lpi_i2s2_sd0_sleep { |
| mux { |
| pins = "gpio15"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio15"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| lpi_i2s2_sd0_active: lpi_i2s2_sd0_active { |
| mux { |
| pins = "gpio15"; |
| function = "func1"; |
| }; |
| |
| config { |
| pins = "gpio15"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-disable; /* NO PULL */ |
| input-enable; |
| }; |
| }; |
| }; |
| |
| lpi_i2s2_sd1 { |
| lpi_i2s2_sd1_sleep: lpi_i2s2_sd1_sleep { |
| mux { |
| pins = "gpio16"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio16"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| lpi_i2s2_sd1_active: lpi_i2s2_sd1_active { |
| mux { |
| pins = "gpio16"; |
| function = "func1"; |
| }; |
| |
| config { |
| pins = "gpio16"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| output-high; |
| }; |
| }; |
| }; |
| |
| lpi_i2s3_sck { |
| lpi_i2s3_sck_sleep: lpi_i2s3_sck_sleep { |
| mux { |
| pins = "gpio19"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio19"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| lpi_i2s3_sck_active: lpi_i2s3_sck_active { |
| mux { |
| pins = "gpio19"; |
| function = "func1"; |
| }; |
| |
| config { |
| pins = "gpio19"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| output-high; |
| }; |
| }; |
| }; |
| |
| lpi_i2s3_ws { |
| lpi_i2s3_ws_sleep: lpi_i2s3_ws_sleep { |
| mux { |
| pins = "gpio20"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio20"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| lpi_i2s3_ws_active: lpi_i2s3_ws_active { |
| mux { |
| pins = "gpio20"; |
| function = "func1"; |
| }; |
| |
| config { |
| pins = "gpio20"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| output-high; |
| }; |
| }; |
| }; |
| |
| lpi_i2s3_sd0 { |
| lpi_i2s3_sd0_sleep: lpi_i2s3_sd0_sleep { |
| mux { |
| pins = "gpio21"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio21"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| lpi_i2s3_sd0_active: lpi_i2s3_sd0_active { |
| mux { |
| pins = "gpio21"; |
| function = "func1"; |
| }; |
| |
| config { |
| pins = "gpio21"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-disable; /* NO PULL */ |
| input-enable; |
| }; |
| }; |
| }; |
| |
| lpi_i2s3_sd1 { |
| lpi_i2s3_sd1_sleep: lpi_i2s3_sd1_sleep { |
| mux { |
| pins = "gpio22"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio22"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| lpi_i2s3_sd1_active: lpi_i2s3_sd1_active { |
| mux { |
| pins = "gpio22"; |
| function = "func1"; |
| }; |
| |
| config { |
| pins = "gpio22"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| output-high; |
| }; |
| }; |
| }; |
| |
| lpi_i2s4_sck { |
| lpi_i2s4_sck_sleep: lpi_i2s4_sck_sleep { |
| mux { |
| pins = "gpio12"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio12"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| lpi_i2s4_sck_active: lpi_i2s4_sck_active { |
| mux { |
| pins = "gpio12"; |
| function = "func2"; |
| }; |
| |
| config { |
| pins = "gpio12"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-disable; /* NO PULL */ |
| input-enable; |
| }; |
| }; |
| }; |
| |
| lpi_i2s4_ws { |
| lpi_i2s4_ws_sleep: lpi_i2s4_ws_sleep { |
| mux { |
| pins = "gpio13"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio13"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| lpi_i2s4_ws_active: lpi_i2s4_ws_active { |
| mux { |
| pins = "gpio13"; |
| function = "func2"; |
| }; |
| |
| config { |
| pins = "gpio13"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-disable; /* NO PULL */ |
| input-enable; |
| }; |
| }; |
| }; |
| |
| lpi_i2s4_sd0 { |
| lpi_i2s4_sd0_sleep: lpi_i2s4_sd0_sleep { |
| mux { |
| pins = "gpio17"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio17"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| lpi_i2s4_sd0_active: lpi_i2s4_sd0_active { |
| mux { |
| pins = "gpio17"; |
| function = "func2"; |
| }; |
| |
| config { |
| pins = "gpio17"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-disable; /* NO PULL */ |
| input-enable; |
| }; |
| }; |
| }; |
| |
| lpi_i2s4_sd1 { |
| lpi_i2s4_sd1_sleep: lpi_i2s4_sd1_sleep { |
| mux { |
| pins = "gpio18"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio18"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| lpi_i2s4_sd1_active: lpi_i2s4_sd1_active { |
| mux { |
| pins = "gpio18"; |
| function = "func2"; |
| }; |
| |
| config { |
| pins = "gpio18"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| output-high; |
| }; |
| }; |
| }; |
| }; |
| }; |