sdxpinn-wcd.dtsi

&qupv3_se2_i2c {
	tavil_codec {
		wcd: wcd_pinctrl@5 {
			compatible = "qcom,wcd-pinctrl";
			qcom,gpios-count = <5>;
			gpio-controller;
			#gpio-cells = <2>;

			spkr_1_wcd_en_active: spkr_1_wcd_en_active {
				mux {
					pins = "gpio2";
				};

				config {
					pins = "gpio2";
					output-high;
				};
			};

			spkr_1_wcd_en_sleep: spkr_1_wcd_en_sleep {
				mux {
					pins = "gpio2";
				};

				config {
					pins = "gpio2";
					input-enable;
				};
			};

			spkr_2_wcd_en_active: spkr_2_sd_n_active {
				mux {
					pins = "gpio3";
				};

				config {
					pins = "gpio3";
					output-high;
				};
			};

			spkr_2_wcd_en_sleep: spkr_2_sd_n_sleep {
				mux {
					pins = "gpio3";
				};

				config {
					pins = "gpio3";
					input-enable;
				};
			};
		};

		wsa_spkr_wcd_sd1: msm_cdc_pinctrll {
		      compatible = "qcom,msm-cdc-pinctrl";
		      pinctrl-names = "aud_active", "aud_sleep";
		      pinctrl-0 = <&spkr_1_wcd_en_active>;
		      pinctrl-1 = <&spkr_1_wcd_en_sleep>;
		};

		wsa_spkr_wcd_sd2: msm_cdc_pinctrlr {
		      compatible = "qcom,msm-cdc-pinctrl";
		      pinctrl-names = "aud_active", "aud_sleep";
		      pinctrl-0 = <&spkr_2_wcd_en_active>;
		      pinctrl-1 = <&spkr_2_wcd_en_sleep>;
		};
	};
};