NAND access with parameter command
In the current implementation, to construct a NAND operation, such as
read/write/erase, the goldfish_nand driver requires several MMIO
operations that passes down the parameters like buffer address, length, etc.
This has visible impacts on emulator performance when running with hardware
virtualization enabled (e.g. HAXM) because each MMIO causes expensive
transition from the guest kernel to the kernel driver, and to the QEMU user
space in the end.
This change should not change the behavior of the goldfish_nand driver on
non-x86 kernels because this capability is not advertised on non-x86 qemu.
For x86, qemu already advertises this capability (NAND_DEV_FLAG_CMD_PARAMS_CAP).
Change-Id: I95fad86414ed73687268c9a613cfcb259a5ab10e
Signed-off-by: Zhang, Xiantao <xiantao.zhang@intel.com>
Signed-off-by: Xin, Xiaohui <xiaohui.xin@intel.com>
Signed-off-by: Jiang, Yunhong <yunhong.jiang@intel.com>
Signed-off-by: Nakajima, Jun <jun.nakajima@intel.com>
2 files changed
