tree 82db23c890de3bce8a834c51bbf0cfb8804a486e
parent 3069eab7eeb3da3f42e04ed5422a46bbad3f8c67
author Lucas Stach <l.stach@pengutronix.de> 1562347043 +0200
committer Greg Kroah-Hartman <gregkh@linuxfoundation.org> 1586766860 +0200

drm/etnaviv: replace MMU flush marker with flush sequence

commit 4900dda90af2cb13bc1d4c12ce94b98acc8fe64e upstream.

If a MMU is shared between multiple GPUs, all of them need to flush their
TLBs, so a single marker that gets reset on the first flush won't do.
Replace the flush marker with a sequence number, so that it's possible to
check if the TLB is in sync with the current page table state for each GPU.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Guido Günther <agx@sigxcpu.org>
Signed-off-by: Robert Beckett <bob.beckett@collabora.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>