EDAC/amd64: Read back the scrub rate PCI register on F15h
[ Upstream commit ee470bb25d0dcdf126f586ec0ae6dca66cb340a4 ]
da92110dfdfa ("EDAC, amd64_edac: Extend scrub rate support to F15hM60h")
added support for F15h, model 0x60 CPUs but in doing so, missed to read
back SCRCTRL PCI config register on F15h CPUs which are *not* model
0x60. Add that read so that doing
$ cat /sys/devices/system/edac/mc/mc0/sdram_scrub_rate
can show the previously set DRAM scrub rate.
Fixes: da92110dfdfa ("EDAC, amd64_edac: Extend scrub rate support to F15hM60h")
Reported-by: Anders Andersson <firstname.lastname@example.org>
Signed-off-by: Borislav Petkov <email@example.com>
Cc: <firstname.lastname@example.org> #v4.4..
Signed-off-by: Sasha Levin <email@example.com>
1 file changed