BACKPORT: usb: dwc3: core: Set force_gen1 bit for all applicable SuperSpeed ports Currently if the maximum-speed is set to Super Speed for a 3.1 Gen2 capable controller, the FORCE_GEN1 bit of LLUCTL register is set only for one SuperSpeed port (or the first port) present. Modify the logic to set the FORCE_GEN1 bit for all ports if speed is being limited to Gen-1. Suggested-by: Thinh Nguyen <Thinh.Nguyen@synopsys.com> Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com> Acked-by: Thinh Nguyen <Thinh.Nguyen@synopsys.com> Link: https://lore.kernel.org/r/20241112182018.199392-1-quic_kriskura@quicinc.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> (cherry picked from commit ce25e2a8d82de7f8bcbedd18973e5b8030749d45 https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master) Bug: 379220296 Change-Id: I4b2b12ea343aa1f8a97c812815b9d39d8b2b836f [quic_kuruva: Minor correction, 'num_usb3_ports' is part of the DWC structure in upstream. However, it has been acknowledged that it has moved to dwc3_vendor to avoid an ABI break, replacing 'dwc' with 'vdwc' in the change.] Signed-off-by: Rajashekar kuruva <quic_kuruva@quicinc.com>
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index a8ea07e..12089ba 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c
@@ -1425,9 +1425,13 @@ static int dwc3_core_init(struct dwc3 *dwc) if (hw_mode != DWC3_GHWPARAMS0_MODE_GADGET && (DWC3_IP_IS(DWC31)) && dwc->maximum_speed == USB_SPEED_SUPER) { - reg = dwc3_readl(dwc->regs, DWC3_LLUCTL); - reg |= DWC3_LLUCTL_FORCE_GEN1; - dwc3_writel(dwc->regs, DWC3_LLUCTL, reg); + int i; + + for (i = 0; i < vdwc->num_usb3_ports; i++) { + reg = dwc3_readl(dwc->regs, DWC3_LLUCTL(i)); + reg |= DWC3_LLUCTL_FORCE_GEN1; + dwc3_writel(dwc->regs, DWC3_LLUCTL(i), reg); + } } return 0;
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index ecff4c9..c77bb7f 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h
@@ -180,7 +180,7 @@ #define DWC3_OEVTEN 0xcc0C #define DWC3_OSTS 0xcc10 -#define DWC3_LLUCTL 0xd024 +#define DWC3_LLUCTL(n) (0xd024 + ((n) * 0x80)) /* Bit fields */