CorebootModulePkg/SecCore: Adding NASM files in SecCore module
Ported MASM/GAS assembly files into NASM files and updated the inf
file to refer to NASM files.
This change has been tested with GCC 4.8 and VS2013 build.
Cc: Prince Agyeman <prince.agyeman@intel.com>
Cc: Lee Leahy <leroy.p.leahy@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
diff --git a/CorebootModulePkg/SecCore/Ia32/SecEntry.nasm b/CorebootModulePkg/SecCore/Ia32/SecEntry.nasm
new file mode 100644
index 0000000..d3fab89
--- /dev/null
+++ b/CorebootModulePkg/SecCore/Ia32/SecEntry.nasm
@@ -0,0 +1,72 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Abstract:
+;
+; Entry point for the coreboot UEFI payload.
+;
+;------------------------------------------------------------------------------
+
+SECTION .text
+
+; C Functions
+extern ASM_PFX(SecStartup)
+
+; Pcds
+extern ASM_PFX(PcdGet32 (PcdPayloadFdMemBase))
+
+;
+; SecCore Entry Point
+;
+; Processor is in flat protected mode
+;
+; @param[in] EAX Initial value of the EAX register (BIST: Built-in Self Test)
+; @param[in] DI 'BP': boot-strap processor, or 'AP': application processor
+; @param[in] EBP Pointer to the start of the Boot Firmware Volume
+;
+; @return None This routine does not return
+;
+global ASM_PFX(_ModuleEntryPoint)
+ASM_PFX(_ModuleEntryPoint):
+ ;
+ ; Disable all the interrupts
+ ;
+ cli
+ ;
+ ; Construct the temporary memory at 0x80000, length 0x10000
+ ;
+ mov esp, (BASE_512KB + SIZE_64KB)
+
+ ;
+ ; Pass BFV into the PEI Core
+ ;
+ push DWORD [ASM_PFX(PcdGet32 (PcdPayloadFdMemBase))]
+
+ ;
+ ; Pass stack base into the PEI Core
+ ;
+ push BASE_512KB
+
+ ;
+ ; Pass stack size into the PEI Core
+ ;
+ push SIZE_64KB
+
+ ;
+ ; Pass Control into the PEI Core
+ ;
+ call ASM_PFX(SecStartup)
+
+ ;
+ ; Should never return
+ ;
+ jmp $
+
diff --git a/CorebootModulePkg/SecCore/Ia32/Stack.nasm b/CorebootModulePkg/SecCore/Ia32/Stack.nasm
new file mode 100644
index 0000000..f3362f6
--- /dev/null
+++ b/CorebootModulePkg/SecCore/Ia32/Stack.nasm
@@ -0,0 +1,78 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Abstract:
+;
+; Switch the stack from temporary memory to permanent memory.
+;
+;------------------------------------------------------------------------------
+
+SECTION .text
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; SecSwitchStack (
+; UINT32 TemporaryMemoryBase,
+; UINT32 PermenentMemoryBase
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(SecSwitchStack)
+ASM_PFX(SecSwitchStack):
+ ;
+ ; Save three register: eax, ebx, ecx
+ ;
+ push eax
+ push ebx
+ push ecx
+ push edx
+
+ ;
+ ; !!CAUTION!! this function address's is pushed into stack after
+ ; migration of whole temporary memory, so need save it to permanent
+ ; memory at first!
+ ;
+
+ mov ebx, [esp + 20] ; Save the first parameter
+ mov ecx, [esp + 24] ; Save the second parameter
+
+ ;
+ ; Save this function's return address into permanent memory at first.
+ ; Then, Fixup the esp point to permanent memory
+ ;
+ mov eax, esp
+ sub eax, ebx
+ add eax, ecx
+ mov edx, [esp] ; copy pushed register's value to permanent memory
+ mov [eax], edx
+ mov edx, [esp + 4]
+ mov [eax + 4], edx
+ mov edx, [esp + 8]
+ mov [eax + 8], edx
+ mov edx, [esp + 12]
+ mov [eax + 12], edx
+ mov edx, [esp + 16] ; Update return address into permanent memory
+ mov [eax + 16], edx
+ mov esp, eax ; From now, esp is pointed to permanent memory
+
+ ;
+ ; Fixup the ebp point to permenent memory
+ ;
+ mov eax, ebp
+ sub eax, ebx
+ add eax, ecx
+ mov ebp, eax ; From now, ebp is pointed to permanent memory
+
+ pop edx
+ pop ecx
+ pop ebx
+ pop eax
+ ret
diff --git a/CorebootModulePkg/SecCore/SecCore.inf b/CorebootModulePkg/SecCore/SecCore.inf
index f8468f4..3eb8aa0 100644
--- a/CorebootModulePkg/SecCore/SecCore.inf
+++ b/CorebootModulePkg/SecCore/SecCore.inf
@@ -1,7 +1,7 @@
## @file
# This is the first module taking control from the coreboot.
#
-# Copyright (c) 2013, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2013 - 2016, Intel Corporation. All rights reserved.<BR>
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
@@ -33,10 +33,8 @@
FindPeiCore.c
[Sources.IA32]
- Ia32/Stack.asm | MSFT
- Ia32/Stack.S | GCC
- Ia32/SecEntry.asm | MSFT
- Ia32/SecEntry.S | GCC
+ Ia32/Stack.nasm
+ Ia32/SecEntry.nasm
[Packages]
MdePkg/MdePkg.dec
