commit 5dc574b4cd2ab7f6c4eb9ccc64592df912e02d45
author Rich Wiley <rwiley@nvidia.com> Wed Jan 04 10:45:44 2017 -0800
committer Varun Wadekar <vwadekar@nvidia.com> Fri Apr 07 09:32:28 2017 -0700
tree 2513f8aaa60519b5d7f1bb93948d97a5804ce576
parent 6d6bbc88d122557abdce61e2e0273a506a6b67d2

Tegra186: mce: support for TEGRA_ARI_MISC_CCPLEX_EDBGREQ

This ARI call enables the EDBGREQ feature in the CCPLEX,
which will cause the CPUs to enter debug state instead of
vectoring to sw (ie MCA handler) upon receiving an async
abort signal.

Change-Id: Ifcb0e11446b6ac55179e3350d8f02b60ba32c94d
Signed-off-by: Rich Wiley <rwiley@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

plat/nvidia/tegra/soc/t186/drivers/mce/ari.c

diff --git a/plat/nvidia/tegra/soc/t186/drivers/mce/ari.c b/plat/nvidia/tegra/soc/t186/drivers/mce/ari.c
index 95b8c7b..7f711a7 100644
--- a/plat/nvidia/tegra/soc/t186/drivers/mce/ari.c
+++ b/plat/nvidia/tegra/soc/t186/drivers/mce/ari.c
@@ -483,7 +483,7 @@
 	 * used to enable/disable coresight clock gating.
 	 */
 
-	if ((index > TEGRA_ARI_MISC_CCPLEX_CORESIGHT_CG_CTRL) ||
+	if ((index > TEGRA_ARI_MISC_CCPLEX_EDBGREQ) ||
 		((index == TEGRA_ARI_MISC_CCPLEX_CORESIGHT_CG_CTRL) &&
 		(value > 1))) {
 		ERROR("%s: invalid parameters \n", __func__);