commit | f750a5e4e654ff4d1176a2a29cbab4b878b3672c | [log] [tgz] |
---|---|---|
author | Arve Hjønnevåg <arve@android.com> | Thu Oct 24 19:23:56 2013 -0700 |
committer | Arve Hjønnevåg <arve@android.com> | Thu Oct 24 20:37:24 2013 -0700 |
tree | 873e00498541a055426cc927f7d930d8d52ddee4 | |
parent | 6df380404d8c9f4cf7cdf3fb0a0d6a0f28993a4b [diff] |
arm_gic: Implement GICC_AIAR, GICC_AEOIR and GICC_AHPPIR Implement aliased registers so group 1 interrupts can be used in secure mode. GICC_AEOIR is only implemented as a direct alias to GICC_EOIR for now as gic_complete_irq does not currently check if the cpu is in secure mode. Change-Id: I438840e3037cd7a9f2308e08d82f70daa3a4f599